Data verification methods, data encoding methods, devices, equipment, media and program products

Abstract

This disclosure provides a data verification method, apparatus, device, medium, and program product, which can be applied in the fields of information security technology and fintech. It includes: in response to receiving a target data packet sent by a first virtual machine, determining binary data to be processed, target encoded data, and a virtual machine identifier of the first virtual machine from the target data packet; decoding the target encoded data based on a preset decoding path diagram corresponding to the virtual machine identifier to obtain target decoded data; if it is determined that the binary data to be processed is different from the target decoded data, hashing the binary data to be processed to obtain first hash data; and determining the verification result of the binary data to be processed based on a comparison result between the first hash data and the target decoded data. This disclosure also provides a data encoding method, apparatus, device, medium, and program product.

Description

Technical Field

[0001] This disclosure relates to the fields of information security technology and financial technology, specifically to a data verification method, data encoding method, apparatus, device, medium, and program product. Background Technology

[0002] In business scenarios involving multiple virtual machines, after a virtual machine generates data, it usually needs to be sent to another virtual machine for data processing. If the data has errors or omissions during transmission and the virtual machine receiving the data does not detect it, it will cause problems in the subsequent processing results, and in severe cases, it may even lead to the generation of a large amount of erroneous data.

[0003] In the process of realizing the concept of this invention, the inventors discovered that there are at least the following problems in the related technology: if there are errors or omissions in the data during transmission and they are not detected in time, it may lead to the generation of a large amount of erroneous data. Summary of the Invention

[0004] In view of the above problems, this disclosure provides a data verification method, a data encoding method, and apparatus, equipment, media, and program products of the above methods.

[0005] According to one aspect of this disclosure, a data verification method is provided, comprising:

[0006] In response to receiving a target data packet sent by a first virtual machine, the following steps are taken: First, binary data to be processed, target encoded data, and the virtual machine identifier of the first virtual machine are determined from the target data packet. The target encoded data is obtained by the first virtual machine encoding the binary data to be processed using a preset encoding method, which includes encoding by a convolutional coding circuit. Second, the target encoded data is decoded based on a preset decoding path diagram corresponding to the virtual machine identifier to obtain target decoded data. Third, if it is determined that the binary data to be processed is different from the target decoded data, the binary data to be processed is hash-encoded to obtain first hash data. Finally, based on the comparison result between the first hash data and the target decoded data, a verification result of the binary data to be processed is determined.

[0007] According to embodiments of this disclosure, a preset decoding path diagram includes multiple preset decoding paths, each preset decoding path having a preset encoding value and a preset decoding value corresponding to the preset encoding value, and the target decoding data includes multiple target decoding values; the target encoded data is decoded based on the preset decoding path diagram corresponding to the virtual machine identifier to obtain target decoded data, including:

[0008] Based on the number of bits of the preset encoding value in the preset decoding path diagram, the target encoded data is grouped to obtain multiple target encoded data groups. For the i-th target encoded data group, based on the target encoding value included in the i-th target encoded data group, the target decoding path of the i-th target encoded data group is determined from at least two candidate decoding paths connected to the target decoding path of the (i-1)-th target encoded data group, where i is an integer greater than or equal to 1, and when i equals 1, the candidate decoding path is the preset decoding path located at the starting position. The preset decoding value of the target decoding path is used as the target decoding value corresponding to the i-th target encoded data group. Based on the target decoding values ​​corresponding to each of the multiple target encoded data groups, the target decoded data is obtained.

[0009] According to embodiments of this disclosure, based on the target encoded values ​​included in the i-th target encoded data group, determining the target decoding path of the i-th target encoded data group from at least two candidate decoding paths connected to the target decoding path of the (i-1)-th target encoded data group includes:

[0010] The preset coding values ​​of each of the at least two candidate decoding paths and the target coding values ​​included in the i-th target coding data group are compared respectively to obtain the code distances corresponding to each of the at least two candidate decoding paths; based on the code distances corresponding to each of the at least two candidate decoding paths, the candidate decoding path with the smallest code distance is determined from the at least two candidate decoding paths; the candidate decoding path with the smallest code distance is taken as the target decoding path.

[0011] According to embodiments of this disclosure, the above data verification method further includes:

[0012] The target decoded data is compared with the binary data to be processed to obtain the target checksum;

[0013] If the target value is determined to exist in the target checksum, then the binary data to be processed is different from the target decoded data.

[0014] According to embodiments of this disclosure, the target checksum includes multiple check values; the above data verification method further includes:

[0015] If it is determined that the number of bits of the binary data to be processed is less than the preset number of bits and the comparison result indicates that the first hash data is different from the target decoded data, the location information of the target value is determined based on the target checksum; based on the location information and the preset alarm template, an alarm message for the binary data to be processed is generated.

[0016] According to another aspect of this disclosure, a data encoding method is provided, comprising:

[0017] In response to the generated file to be processed, the file to be processed is converted into binary data to obtain binary data to be processed; if it is determined that the number of bits of the binary data to be processed is greater than or equal to the preset number of bits, the binary data to be processed is hashed to obtain second hash data; the second hash data is encoded using a convolutional coding circuit to obtain target encoded data; based on the target encoded data, the binary data to be processed, and the virtual machine identifier of the first virtual machine, a target data packet is generated; and the target data packet is sent to the second virtual machine.

[0018] According to embodiments of this disclosure, the above data encoding method further includes:

[0019] If the number of bits of the binary data to be processed is less than the preset number of bits, a convolutional coding circuit is used to encode the binary data to be processed to obtain the target encoded data.

[0020] Another aspect of this disclosure provides a data verification apparatus, comprising:

[0021] The module includes a determination module, configured to, in response to receiving a target data packet sent by the first virtual machine, determine the binary data to be processed, target encoded data, and the virtual machine identifier of the first virtual machine from the target data packet, wherein the target encoded data is obtained by the first virtual machine encoding the binary data to be processed using a preset encoding method, including encoding by a convolutional coding circuit; a decoding module, configured to decode the target encoded data based on a preset decoding path diagram corresponding to the virtual machine identifier to obtain target decoded data, wherein the preset decoding path diagram is obtained based on the convolutional coding circuit; a processing module, configured to, if it is determined that the binary data to be processed is different from the target decoded data, perform hash encoding on the binary data to be processed to obtain first hash data; and a verification module, configured to, based on the comparison result between the first hash data and the target decoded data, determine the verification result of the binary data to be processed.

[0022] Another aspect of this disclosure provides a data encoding apparatus, comprising:

[0023] The system includes a conversion module for performing binary conversion on the generated file to be processed to obtain binary data to be processed; a first encoding module for hash encoding the binary data to be processed to obtain second hash data when the number of bits of the binary data to be processed is greater than or equal to a preset number of bits; a second encoding module for encoding the second hash data using a convolutional coding circuit to obtain target encoded data; a data generation module for generating a target data packet based on the target encoded data, the binary data to be processed, and the virtual machine identifier of the first virtual machine; and a sending module for sending the target data packet to the second virtual machine.

[0024] Another aspect of this disclosure provides an electronic device comprising: one or more processors; and a memory for storing one or more computer programs, wherein the one or more processors execute the one or more computer programs to implement the steps of the method described above.

[0025] Another aspect of this disclosure provides a computer-readable storage medium having a computer program or instructions stored thereon, which, when executed by a processor, implement the steps of the above-described method.

[0026] Another aspect of this disclosure provides a computer program product, including a computer program or instructions that, when executed by a processor, implement the steps of the above-described method.

[0027] According to the data verification method disclosed herein, the first virtual machine packages both the target encoded data and the binary data to be processed into a data packet and sends it to the second virtual machine. This allows the second virtual machine to decode the target encoded data to obtain the target decoded data, and then verify the binary data using the target decoded data to determine whether there are any problems with the binary data to be processed. Since different encoding methods may be used for different binary data, the binary data to be processed is first verified to see if it is the same as the target decoded data. If the binary data to be processed is different from the decoded data, the binary data to be processed is hashed to obtain the first hash data, and the first hash data is compared with the target decoded data to achieve a second verification of the binary data to be processed. Thus, through the above multiple verification processes, the technical problem that if there are errors or omissions in the data during transmission and they are not detected in time, it may lead to the generation of batch erroneous data is at least partially solved, thereby improving the reliability of data transmission between virtual machines. Attached Figure Description

[0028] The foregoing contents, as well as other objects, features, and advantages of this disclosure, will become clearer from the following description of embodiments with reference to the accompanying drawings, in which:

[0029] Figure 1 The illustrations depict application scenarios of data verification methods, data encoding methods, apparatuses, devices, media, and program products according to embodiments of the present disclosure.

[0030] Figure 2 A flowchart illustrating a data verification method according to an embodiment of the present disclosure is shown schematically.

[0031] Figure 3 A flowchart illustrating a data encoding method according to an embodiment of the present disclosure is shown schematically;

[0032] Figure 4A schematic diagram of a convolutional coding circuit according to an embodiment of the present disclosure is shown.

[0033] Figure 5 A schematic diagram of a state transition diagram according to an embodiment of the present disclosure is shown.

[0034] Figure 6 A schematic diagram of a preset decoding path according to an embodiment of the present disclosure is shown.

[0035] Figure 7 The diagram illustrates the interaction between a first virtual machine and a second virtual machine according to an embodiment of the present disclosure.

[0036] Figure 8 A schematic block diagram of a data verification apparatus according to an embodiment of the present disclosure is shown.

[0037] Figure 9 A schematic block diagram of a data encoding apparatus according to an embodiment of the present disclosure is shown; and

[0038] Figure 10 A block diagram schematically illustrates an electronic device suitable for implementing a data verification method and a data encoding method according to embodiments of the present disclosure. Detailed Implementation

[0039] The embodiments of the present disclosure will now be described with reference to the accompanying drawings. However, it should be understood that these descriptions are exemplary only and are not intended to limit the scope of the disclosure. In the following detailed description, numerous specific details are set forth to provide a thorough understanding of the embodiments of the present disclosure for ease of explanation. However, it will be apparent that one or more embodiments may be practiced without these specific details. Furthermore, descriptions of well-known structures and techniques are omitted in the following description to avoid unnecessarily obscuring the concepts of the present disclosure.

[0040] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit this disclosure. The terms “comprising,” “including,” etc., as used herein indicate the presence of features, steps, operations, and / or components, but do not exclude the presence or addition of one or more other features, steps, operations, or components.

[0041] All terms used herein (including technical and scientific terms) have the meanings commonly understood by those skilled in the art, unless otherwise defined. It should be noted that the terms used herein are to be interpreted in a manner consistent with the context of this specification, and not in an idealized or overly rigid way.

[0042] When using expressions such as "at least one of A, B and C", they should generally be interpreted in accordance with the meaning that is commonly understood by those skilled in the art (e.g., "a system having at least one of A, B and C" should include, but is not limited to, a system having A alone, a system having B alone, a system having C alone, a system having A and B, a system having A and C, a system having B and C, and / or a system having A, B and C, etc.).

[0043] It should be noted that the data verification method and data encoding method disclosed herein can be used in the fields of financial technology and information security technology, as well as in any field other than financial technology and information security technology, such as artificial intelligence technology. This disclosure does not limit the application fields of the data verification method and data encoding method.

[0044] Embodiments of this disclosure provide a data verification method comprising: in response to receiving a target data packet sent by a first virtual machine, determining binary data to be processed, target encoded data, and a virtual machine identifier of the first virtual machine from the target data packet, wherein the target encoded data is obtained by the first virtual machine encoding the binary data to be processed using a preset encoding method, the preset encoding method including encoding by a convolutional coding circuit; decoding the target encoded data based on a preset decoding path diagram corresponding to the virtual machine identifier to obtain target decoded data, wherein the preset decoding path diagram is obtained based on the convolutional coding circuit; if it is determined that the binary data to be processed is different from the target decoded data, performing hash encoding on the binary data to be processed to obtain first hash data; and determining the verification result of the binary data to be processed based on the comparison result of the first hash data and the target decoded data.

[0045] Figure 1 The illustrations depict application scenarios of data verification methods, data encoding methods, apparatuses, devices, media, and program products according to embodiments of the present disclosure.

[0046] like Figure 1 As shown, application scenario 100 according to this embodiment may include a first terminal device 101, a second terminal device 102, a third terminal device 103, a network 104, and a server 105. The network 104 serves as a medium for providing communication links between the first terminal device 101, the second terminal device 102, the third terminal device 103, and the server 105. The network 104 may include various connection types, such as wired or wireless communication links, or fiber optic cables, etc.

[0047] Users can use the first terminal device 101, the second terminal device 102, and the third terminal device 103 to interact with the server 105 via the network 104 to receive or send messages, etc. Various communication client applications can be installed on the first terminal device 101, the second terminal device 102, and the third terminal device 103, such as shopping applications, web browser applications, search applications, instant messaging tools, email clients, social media platform software, etc. (for example only).

[0048] The first terminal device 101, the second terminal device 102, and the third terminal device 103 can be various electronic devices with displays and support web browsing, including but not limited to smartphones, tablets, laptops, and desktop computers.

[0049] Server 105 can be a server that provides various services, such as a backend management server that supports websites browsed by users using the first terminal device 101, the second terminal device 102, and the third terminal device 103 (this is just an example). The backend management server can analyze and process data such as received user requests, and feed back the processing results (such as web pages, information, or data obtained or generated according to user requests) to the terminal devices.

[0050] It should be noted that the data verification method or data encoding method provided in this disclosure embodiment can generally be executed by server 105. Correspondingly, the data verification device or data encoding device provided in this disclosure embodiment can generally be located in server 105. The data verification method or data encoding method provided in this disclosure embodiment can also be executed by a server or server cluster that is different from server 105 and capable of communicating with the first terminal device 101, the second terminal device 102, the third terminal device 103, and / or server 105. Correspondingly, the data verification device or data encoding device provided in this disclosure embodiment can also be located in a server or server cluster that is different from server 105 and capable of communicating with the first terminal device 101, the second terminal device 102, the third terminal device 103, and / or server 105.

[0051] It should be understood that Figure 1 The number of terminal devices, networks, and servers shown is merely illustrative. Depending on implementation needs, any number of terminal devices, networks, and servers can be included.

[0052] The following will be based on Figure 1 The described scene, through Figures 2-7 The data verification method and data encoding method of the disclosed embodiments are described in detail.

[0053] Figure 2 A flowchart illustrating a data verification method according to an embodiment of the present disclosure is shown schematically.

[0054] like Figure 2 As shown, the method includes operations S210 to S240.

[0055] In operation S210, in response to receiving the target data packet sent by the first virtual machine, the binary data to be processed, the target encoded data, and the virtual machine identifier of the first virtual machine are determined from the target data packet. The target encoded data is obtained by the first virtual machine encoding the binary data to be processed through a preset encoding method, which includes encoding by a convolutional coding circuit.

[0056] In operation S220, the target encoded data is decoded based on the preset decoding path diagram corresponding to the virtual machine identifier to obtain the target decoded data. The preset decoding path diagram is obtained based on the convolutional coding circuit.

[0057] In operation S230, if it is determined that the binary data to be processed is different from the target decoded data, the binary data to be processed is hashed to obtain the first hash data.

[0058] In operation S240, the verification result of the binary data to be processed is determined based on the comparison result between the first hash data and the target decoded data.

[0059] According to embodiments of this disclosure, the above data verification method can be executed by a second virtual machine. The first virtual machine and the second virtual machine can be different virtual machines. For example, the first virtual machine is a virtual machine used for processing business, while the second virtual machine is a virtual machine used for parsing and processing log files generated by the first virtual machine.

[0060] According to embodiments of this disclosure, the binary data to be processed can be obtained by a first virtual machine performing binary conversion on a file it generates.

[0061] According to embodiments of this disclosure, the target encoded data can be obtained by encoding the binary data to be processed by a first virtual machine using a preset encoding method. The preset encoding method is not limited and can be different in different situations. For example, when the number of bits of the binary data to be processed is greater than or equal to the preset number of bits, the preset encoding method can include hash encoding and convolutional coding circuit encoding; when the number of bits of the binary data to be processed is less than the preset number of bits, the preset encoding method can include convolutional coding circuit encoding.

[0062] According to the embodiments of this disclosure, the specific implementation of the hash encoding is not limited, and it can be Message Digest Algorithm 5 (MD5), Secure Hash Algorithm 1 (SHA-1), etc.

[0063] According to the embodiments of this disclosure, the specific implementation of the convolutional coding circuit is not limited, and the convolutional coding circuit can be obtained by adopting the framework of convolutional code.

[0064] According to embodiments of this disclosure, the first virtual machine may have a virtual machine identifier that represents its identity, and different virtual machine identifiers may correspond to different convolutional coding circuits.

[0065] According to embodiments of this disclosure, a preset decoding path diagram is used to decode the encoding result of the convolutional coding circuit. The preset decoding path diagram corresponds to the convolutional coding circuit and is related to the register state and the number of registers of the shift register in the convolutional coding circuit.

[0066] According to embodiments of this disclosure, the correspondence between virtual machine identifiers and preset decoding path maps can be pre-stored in the storage space of the second virtual machine.

[0067] According to embodiments of this disclosure, since the length of the preset decoding path diagram corresponding to binary data to be processed with different bit lengths may be different, the second virtual machine can store the preset decoding path diagram of the same convolutional coding circuit under input binary data with different bit lengths in the storage space, or it can store a longer preset decoding path diagram and truncate it to the length corresponding to the number of bits of the binary data to be processed when using the preset decoding path diagram.

[0068] According to embodiments of this disclosure, the binary data to be processed can be compared with the target decoded data first. If the binary data to be processed is different from the target decoded data, the first hash data can be compared with the target decoded data. Thus, the verification of the binary data to be processed for all bits can be achieved more comprehensively through two comparison processes.

[0069] According to embodiments of this disclosure, if it is determined that the first hash data is different from the target decoded data, it can be determined that there is an anomaly in the binary data to be processed. The problem can be determined by using a multiple duplicate data verification method.

[0070] According to the embodiments of this disclosure, if it is determined that the first hash data is the same as the target decoded data, it can be determined that there is no anomaly in the binary data to be processed. Subsequent binary inverse conversion of the binary data to be processed can be performed to convert the binary data to be processed into a file to be processed, and the file to be processed can be analyzed or used.

[0071] According to the data verification method disclosed herein, the first virtual machine packages both the target encoded data and the binary data to be processed into a data packet and sends it to the second virtual machine. This allows the second virtual machine to decode the target encoded data to obtain the target decoded data, and then verify the binary data using the target decoded data to determine whether there are any problems with the binary data to be processed. Since different encoding methods may be used for different binary data, the binary data to be processed is first verified to see if it is the same as the target decoded data. If the binary data to be processed is different from the decoded data, the binary data to be processed is hashed to obtain the first hash data, and the first hash data is compared with the target decoded data to achieve a second verification of the binary data to be processed. Thus, through the above multiple verification processes, the technical problem that if there are errors or omissions in the data during transmission and they are not detected in time, it may lead to the generation of batch erroneous data is at least partially solved, thereby improving the reliability of data transmission between virtual machines.

[0072] According to embodiments of this disclosure, a preset decoding path diagram includes multiple preset decoding paths, each preset decoding path having a preset encoding value and a preset decoding value corresponding to the preset encoding value, and the target decoding data includes multiple target decoding values; decoding the target encoded data based on the preset decoding path diagram corresponding to the virtual machine identifier to obtain the target decoded data may include the following operations.

[0073] Based on the number of bits of the preset encoding value in the preset decoding path diagram, the target encoded data is grouped to obtain multiple target encoded data groups. For the i-th target encoded data group, based on the target encoding value included in the i-th target encoded data group, the target decoding path of the i-th target encoded data group is determined from at least two candidate decoding paths connected to the target decoding path of the (i-1)-th target encoded data group, where i is an integer greater than or equal to 1, and when i equals 1, the candidate decoding path is the preset decoding path located at the starting position. The preset decoding value of the target decoding path is used as the target decoding value corresponding to the i-th target encoded data group. Based on the target decoding values ​​corresponding to each of the multiple target encoded data groups, the target decoded data is obtained.

[0074] According to embodiments of this disclosure, the preset encoding value can be the encoding value that can be obtained after inputting the preset decoding value into the convolutional coding circuit.

[0075] According to embodiments of this disclosure, since a single binary value input to the convolutional coding circuit can be processed by the convolutional coding circuit, multiple encoded values ​​can be obtained based on the number of bits output by the convolutional coding circuit. Therefore, each target encoded data group can correspond to a target decoded value.

[0076] According to an embodiment of this disclosure, the target decoding path of the (i-1)th target encoded data group is a preset decoding path corresponding to the target decoding value of the (i-1)th target encoded data group.

[0077] According to the embodiments of this disclosure, since the preset decoding path map includes consecutive preset decoding paths, when determining the target decoding path of the i-th target encoded data group, it is necessary to first determine the candidate decoding path that is consecutive to the target decoding path of the (i-1)-th target encoded data group, and then determine the target decoding path of the i-th target encoded data group from the candidate decoding paths.

[0078] According to embodiments of this disclosure, target decoded data can be obtained by sequentially splicing the target decoded data of multiple target encoded data groups.

[0079] According to embodiments of this disclosure, determining the target decoding path of the i-th target encoded data group from at least two candidate decoding paths connected to the target decoding path of the (i-1)-th target encoded data group based on the target encoded values ​​included in the i-th target encoded data group may include the following operations.

[0080] The preset coding values ​​of each of the at least two candidate decoding paths and the target coding values ​​included in the i-th target coding data group are compared respectively to obtain the code distances corresponding to each of the at least two candidate decoding paths; based on the code distances corresponding to each of the at least two candidate decoding paths, the candidate decoding path with the smallest code distance is determined from the at least two candidate decoding paths; the candidate decoding path with the smallest code distance is taken as the target decoding path.

[0081] According to embodiments of this disclosure, when determining the target decoding path of the i-th target encoded data group, the code distance between the target encoded data group and the candidate decoding path can be determined by comparing the target encoded value included in the target encoded data group with the preset encoded value of the candidate decoding path. For example, if the target encoded value included in the target encoded data group is 00 and the preset encoded value of the candidate decoding path is 11, then the code distance between the target encoded data group and the candidate decoding path is determined to be 2.

[0082] According to embodiments of this disclosure, since the decoding process of the target encoded data depends on the decoding result of the previous target encoded data group, that is, the decoding process is continuous, and the target decoding path needs to be determined by comparing the code distance between the target encoded data group and the candidate encoding path, it is possible to obtain the correct decoding result even if there are bit errors in the target encoded data during transmission, thereby improving the verification reliability of the binary data to be processed.

[0083] According to embodiments of this disclosure, the above data verification method may further include the following operations.

[0084] The target decoded data is compared with the binary data to be processed to obtain the target checksum;

[0085] If the target value is found in the target checksum, it is determined that the binary data to be processed is different from the target decoded data.

[0086] According to embodiments of this disclosure, the target decoded data may include a target decoded value, and the binary data to be processed may include a binary value. If it is determined that the target decoded value and the binary value corresponding to the target decoded value are the same, the generated check value can be 0. Conversely, if it is determined that the target decoded value and the binary value corresponding to the target decoded value are not the same, the generated check value can be 1, that is, the target value can be 1.

[0087] According to embodiments of this disclosure, during the comparison of target decoded data and binary data to be processed, the target decoded data and binary data to be processed can be aligned first. If alignment is determined, the multiple target decoded values ​​included in the target decoded data and the multiple binary values ​​included in the binary data to be processed are compared with the corresponding binary value according to the correspondence between the aligned multiple target decoded values ​​and the aligned multiple binary values, thereby obtaining a check value. After comparing multiple target decoded values ​​with multiple binary values, the check values ​​corresponding to each of the multiple target decoded values ​​are concatenated sequentially to obtain a target checksum.

[0088] According to embodiments of this disclosure, during the comparison of the first hash data and the target decoded data, a target checksum may or may not be generated. Instead, the data values ​​of the first hash data and the target decoded values ​​of the target decoded data are compared one by one. If it is determined that there are data values ​​and target decoded values ​​with the same position but different data, it is determined that the first hash data and the target decoded data are different, i.e., there is a problem with the binary data to be processed.

[0089] According to embodiments of this disclosure, the target checker includes multiple check values; the above data verification method may further include the following operations.

[0090] If it is determined that the number of bits of the binary data to be processed is less than the preset number of bits and the comparison result indicates that the first hash data is different from the target decoded data, the location information of the target value is determined from the target checker; based on the location information and the preset alarm template, an alarm message for the binary data to be processed is generated.

[0091] According to embodiments of this disclosure, if the data position of the binary data to be processed is determined to be less than a preset number of bits, the encoding method used when encoding the binary data to be processed is likely to be encoding using a convolutional coding circuit. Therefore, by generating an alarm message for the binary data to be processed based on the position information of the target value, it is possible to provide a prompt for abnormal binary values.

[0092] According to embodiments of this disclosure, the location of an anomaly in the binary data to be processed can be determined by the location of the check value. This location information is then input into a preset alarm template to generate an alarm message for the binary data to be processed. The alarm message is then sent to the target client so that the target client or the target object using the target client can quickly determine the location of the problem in the binary data to be processed, correct the binary data to be processed, and detect the communication transmission process between the first virtual machine and the second virtual machine.

[0093] According to embodiments of this disclosure, the target client can be a server that has functions for correcting binary data to be processed and for detecting the communication transmission process between the first virtual machine and the second virtual machine; the target object can be an operations and maintenance personnel.

[0094] Figure 3 A flowchart illustrating a data encoding method according to an embodiment of the present disclosure is shown schematically.

[0095] like Figure 3 As shown, the method includes operations S310 to S350.

[0096] In operation S310, in response to the generation of the file to be processed, the file to be processed is converted into binary data to obtain the binary data to be processed.

[0097] In operation S320, if it is determined that the number of bits of the binary data to be processed is greater than or equal to the preset number of bits, the binary data to be processed is hashed to obtain the second hash data.

[0098] In operation S330, the second hash data is encoded using a convolutional coding circuit to obtain the target encoded data.

[0099] In operation S340, a target data packet is generated based on the target encoded data, the binary data to be processed, and the virtual machine identifier of the first virtual machine.

[0100] When operating the S350, the target data packet is sent to the second virtual machine.

[0101] According to embodiments of this disclosure, when a first virtual machine has generated a file to be processed, the first virtual machine can perform binary conversion on it to obtain binary data to be processed. The method of binary conversion is not limited. It can be that the file to be processed is first encoded into characters, and then the string obtained after character encoding is converted into a byte sequence to obtain binary data to be processed.

[0102] According to the embodiments of this disclosure, the specific implementation of the character encoding is not limited, and can be 8-bit Unicode Transformation Format (UTF-8), 16-bit Unicode Transformation Format (UTF-16), etc.

[0103] According to the embodiments of this disclosure, the preset number of bits is not limited and may be related to the encoding method of the hash encoding. For example, if MD5 is used for hash encoding, since the hash encoding can produce a second hash data of 128, the preset number of bits is 128; if SHA-1 is used for hash encoding, since the hash encoding can produce a second hash data of 160, the preset number of bits is 160.

[0104] According to the embodiments of this disclosure, since encoding using a convolutional coding circuit is a variable-length encoding method, when it is determined that the number of bits of the binary data to be processed is greater than or equal to the preset number of bits, the binary data to be processed can be hashed first and then the second hash data can be encoded using a convolutional coding circuit, thereby shortening the number of bits required for encoding using the convolutional coding circuit and reducing the communication transmission pressure.

[0105] According to embodiments of this disclosure, the above data encoding method may further include the following operations.

[0106] If the number of bits of the binary data to be processed is less than the preset number of bits, a convolutional coding circuit is used to encode the binary data to be processed to obtain the target encoded data.

[0107] According to embodiments of this disclosure, when it is determined that the number of bits of the binary data to be processed is less than a preset number of bits, the binary data to be processed can be encoded using only a convolutional coding circuit, thereby saving computational resources used for hash coding.

[0108] Figure 4 A schematic diagram of a convolutional coding circuit according to an embodiment of the present disclosure is shown.

[0109] like Figure 4 As shown, the convolutional coding circuit includes shift register D1, shift register D2, adder S1, adder S2, point A, point B, point C, point D, output O1, and output O2.

[0110] According to the embodiments of this disclosure, adders S1 and S2 perform modulo-2 addition operations, the initial values ​​of shift registers D1 and D2 are both 0, and the states of points A, B, C, and D are equivalent to the states of the connecting lines where those points are located.

[0111] According to an embodiment of this disclosure, one binary value is input into the convolutional coding circuit in the order of the binary data to be processed. When the binary data to be processed is 1010, each 1, 0, 1, 0 is input into the convolutional coding circuit in sequence, and one binary value is 1 bit.

[0112] According to the embodiments of this disclosure, when the first binary value is input into the convolutional coding circuit, 1 enters shift register D1 and simultaneously moves to points A and B. That is, point A=1, point B=1. Because 1 enters shift register D1, it shifts the initial 0 of shift register D1 to point G and enters shift register D2, thereby shifting the initial 0 of shift register D2 to points C and D. Thus, we can conclude that A=1, B=1, C=0, D=0, G=0, D1=1, D2=0. Next, the output O1 is obtained by adder S1 and the output O2 is obtained by adder S2. The specific calculation process is as follows: formulas (1) to (2).

[0113] (1)

[0114] (2)

[0115] According to an embodiment of this disclosure, when the second bit is input into the convolutional encoding circuit, D1=1, D2=0. Since the input is 0, the 0 enters shift register D1, and simultaneously moves to points A and B. That is, A=0, B=0. Because the 0 enters shift register D1, it shifts the 1 in shift register D1 to point G and enters shift register D2, thereby shifting the 0 in shift register D2 to points C and D. Therefore, A=0, B=0, C=0, D=0, G=1, D1=0, D2=1. Next, adder S1 is used to calculate the output O1=1 and adder S2 is used to calculate the output O2=0.

[0116] According to an embodiment of this disclosure, when the third bit is input into the convolutional encoding circuit, D1=0, D2=1. Since the input is 1, 1 enters shift register D1 and simultaneously moves to points A and B. That is, A=1, B=1. Because 1 enters shift register D1, it shifts the 0 in shift register D1 to point G and enters shift register D2, thereby shifting the 1 in shift register D2 to points C and D. Therefore, A=1, B=1, C=1, D=1, G=0, D1=1, D2=0. Next, adder S1 is used to calculate the output O1=0 and adder S2 is used to calculate the output O2=0.

[0117] According to an embodiment of this disclosure, when the fourth bit is input into the convolutional encoding circuit, D1=1, D2=0. Since the input is 0, the 0 enters shift register D1, and simultaneously moves to points A and B. That is, A=0, B=0. Because the 0 enters shift register D1, it shifts the 1 in shift register D1 to point G and enters shift register D2, thereby shifting the 0 in shift register D2 to points C and D. Therefore, A=0, B=0, C=0, D=0, G=1, D1=0, D2=1. Next, adder S1 is used to calculate the output O1=1 and adder S2 is used to calculate the output O2=0.

[0118] According to an embodiment of this disclosure, the above process can yield target encoded data of 11100010 when the binary data to be output is 1010.

[0119] According to embodiments of this disclosure, for Figure 4 The number of shift registers and adders and their connection methods are illustrative. Different numbers and connection methods of shift registers and adders can be used in different situations.

[0120] Figure 5 A schematic diagram of a state transition diagram according to an embodiment of the present disclosure is shown.

[0121] like Figure 5As shown, in determining the target Figure 4 Before determining the preset decoding path diagram of the convolutional coding circuit, the state transition diagram of the convolutional coding circuit can be determined first. In this state transition diagram, a, b, c, and d represent the register states of shift registers D1 and D2. For example, a represents 00, meaning D1=0 and D2=0. Through the above process, it can be seen that shift registers D1 and D2 have... Figure 5 The four register states.

[0122] According to embodiments of this disclosure, for Figure 5 The numbers on the connection lines between the states of each register are as follows: the data inside the parentheses represents the input binary value, i.e., the preset decoded value; the data outside the parentheses represents the output value that can be obtained after encoding the input binary value, i.e., the preset encoded value.

[0123] According to embodiments of this disclosure, the direction of the connection lines between the various register states characterizes the probability of transitions between the various states.

[0124] Figure 6 A schematic diagram of a preset decoding path diagram according to an embodiment of the present disclosure is shown.

[0125] like Figure 6 As shown, this schematically illustrates the situation for, Figure 4 The preset decoding path diagram corresponding to the convolutional coding circuit shown is as follows: Since the convolutional coding circuit has two outputs (one input corresponds to two outputs), when grouping the target encoded data, two bits of target encoded data are divided into one encoded data group. Since the target encoded data is 11100010 (8 bits), it can be divided into 4 groups. Therefore, this preset decoding path diagram represents the preset decoding path diagram of the convolutional coding circuit when the target encoded data is divided into 4 groups.

[0126] According to embodiments of this disclosure, in practice, a preset decoding path diagram with a large number of target encoded data groups corresponding to each convolutional coding circuit can be stored in the storage space of the second virtual machine, and the required number of groups can be extracted when needed.

[0127] According to embodiments of this disclosure, such as Figure 6 In the preset decoding path diagram shown, the preset decoding value of the preset decoding path represented by the dashed line is 1, and the preset decoding value of the preset decoding path represented by the solid line is 0. The data next to the preset decoding path is the preset encoding value of that preset decoding path.

[0128] According to embodiments of this disclosure, by Figure 6It can determine the preset decoding path when the four registers a, b, c, and d are in state transition, the preset encoding value of each preset decoding path, the preset decoding value of each preset decoding path, and the connection relationship of each preset path.

[0129] According to embodiments of this disclosure, the preset decoding path diagram can be... Figure 5 The state transition diagram shown yields the following: Figure 5 When the register state is 'a', if there is a connection line that can be converted to 'b' or remain 'a', then from... Figure 6 It can be seen that when the register state is 'a', there is a preset decoding path that is still not 'a' or from 'a' to 'b'. The preset encoding value marked next to the preset encoding path is the same as that in the state transition diagram.

[0130] According to embodiments of this disclosure, by Figure 6 It can also be seen that the first target encoding group corresponds to the preset decoding path in the first column, the second target encoding group corresponds to the preset decoding path in the second column, the third target encoding group corresponds to the preset decoding path in the third column, and the fourth target encoding group corresponds to the preset decoding path in the fourth column. Each target encoding group corresponds to multiple preset decoding paths.

[0131] According to embodiments of this disclosure, when determining the decoded value of each target coding group, it is necessary to determine the target decoding path corresponding to the target coding group. When determining the target decoding path, it is necessary to determine the target decoding path of the previous target coding group and determine the target decoding path of the current target coding group from the candidate decoding paths connected to the target decoding path of the previous target coding group.

[0132] According to an embodiment of this disclosure, specifically, when decoding the target encoded data 11100010, the first target encoded data group has an encoded value of 11. It can be seen that the preset encoded values ​​of the candidate decoding paths corresponding to the first target encoded data group are 11 and 00 respectively. By comparing the preset encoded values ​​of the candidate decoding paths with the encoded values, it is determined that the code distance of the candidate encoding path with the preset encoded value of 11 is 0, and the code distance of the candidate encoding path with the preset encoded value of 00 is 2. Therefore, the target decoding path of the first target encoded data group is the candidate encoding path with the preset encoded value of 11. Since the target encoded path is represented by a dashed line, the decoding value of the first target encoded data group is 1.

[0133] According to an embodiment of this disclosure, if the second target encoded data group has an encoded value of 10, then the preset encoded values ​​of the candidate decoding paths connected to the target decoding path of the first target encoded data group are 10 and 11 respectively. Similarly, the code distance between the candidate decoding path and the encoded value of the second target encoded data group is determined. The code distance with the candidate encoding path with a preset encoded value of 10 is determined to be 0, and the code distance with the candidate encoding path with a preset encoded value of 01 is determined to be 2. Therefore, the target decoding path of the second target encoded data group is the candidate encoding path with a preset encoded value of 10. Since the target encoded path is represented by a solid line, the decoding value of the second target encoded data group is 0.

[0134] According to an embodiment of this disclosure, the process of determining the decoded values ​​of the third target encoded data group and the fourth target encoded data group is the same as described above. By repeating the above process, the decoded value of the third target encoded data group is 1, and the decoded value of the fourth target encoded data group is 0, thereby obtaining the target decoded data as 1010.

[0135] Figure 7 The diagram illustrates the interaction between a first virtual machine and a second virtual machine according to an embodiment of the present disclosure.

[0136] like Figure 7 As shown, the interaction between the first virtual machine and the second virtual machine includes operations S701 to S712.

[0137] When operating S701, in response to the first virtual machine generating a file to be processed, the file to be processed is converted into binary data to obtain binary data to be processed.

[0138] In operation S702, it is determined whether the number of bits in the binary data to be processed is greater than or equal to the preset number of bits. If the number of bits in the binary data to be processed is greater than or equal to the preset number of bits, operation S703 is executed. If the number of bits in the binary data to be processed is less than the preset number of bits, operation S705 is executed.

[0139] In operation S703, the binary data to be processed is hashed to obtain the second hash data.

[0140] In operation S704, the second hash data is encoded using a convolutional coding circuit to obtain the target encoded data.

[0141] When operating the S705, the convolutional coding circuit is used to encode the binary data to be processed to obtain the target encoded data.

[0142] In operation S706, a target data packet is generated based on the target encoded data, the binary data to be processed, and the virtual machine identifier of the first virtual machine, and then the target data packet is sent to the second virtual machine.

[0143] In operation S707, in response to the second virtual machine having received the target data packet sent by the first virtual machine, the binary data to be processed, the target encoded data, and the virtual machine identifier of the first virtual machine are determined from the target data packet.

[0144] During operation of S708, the target encoded data is decoded based on the preset decoding path diagram corresponding to the virtual machine identifier to obtain the target decoded data.

[0145] In operation S709, it is determined whether the target decoded data is the same as the binary data to be processed. If the binary data to be processed is different from the target decoded data, operation S710 is executed; if the binary data to be processed is the same as the target decoded data, operation S712 is executed.

[0146] When operating the S710, the binary data to be processed is hashed to obtain the first hash data.

[0147] In operation S711, the verification result of the binary data to be processed is determined based on the comparison result between the first hash data and the target decoded data.

[0148] In operation S712, the verification result of the binary data to be processed is determined based on the comparison result between the binary data to be processed and the target decoded data.

[0149] Based on the above data verification and data encoding methods, this disclosure also provides a data verification device and a data encoding device. The following will be combined with... Figures 8-9 The above-mentioned device will be described in detail.

[0150] Figure 8 A schematic block diagram of a data verification apparatus according to an embodiment of the present disclosure is shown.

[0151] like Figure 8 As shown, the data verification device 800 of this embodiment includes a determination module 810, a decoding module 820, a processing module 830, and a verification module 840.

[0152] The determination module 810 is used to determine, in response to receiving a target data packet sent by the first virtual machine, the binary data to be processed, the target encoded data, and the virtual machine identifier of the first virtual machine from the target data packet. The target encoded data is obtained by the first virtual machine encoding the binary data to be processed through a preset encoding method, which includes encoding by a convolutional coding circuit.

[0153] The decoding module 820 is used to decode the target encoded data based on a preset decoding path diagram corresponding to the virtual machine identifier to obtain the target decoded data. The preset decoding path diagram is obtained based on the convolutional coding circuit.

[0154] The processing module 830 is used to perform hash encoding on the binary data to be processed to obtain the first hash data when it is determined that the binary data to be processed is different from the target decoded data.

[0155] The verification module 840 is used to determine the verification result of the binary data to be processed based on the comparison result between the first hash data and the target decoded data.

[0156] According to embodiments of this disclosure, the preset decoding path diagram includes multiple preset decoding paths, each preset decoding path having a preset encoding value and a preset decoding value corresponding to the preset encoding value, and the target decoding data includes multiple target decoding values. The decoding module 820 includes: a grouping submodule, a path determination submodule, a decoding value determination submodule, and a decoding data determination submodule.

[0157] The grouping submodule is used to group the target encoded data into multiple target encoded data groups based on the number of bits of the preset encoding value in the preset decoding path diagram.

[0158] The path determination submodule is used to determine the target decoding path of the i-th target encoded data group from at least two candidate decoding paths connected to the target decoding path of the (i-1)-th target encoded data group, based on the target encoded values ​​included in the i-th target encoded data group, where i is an integer greater than or equal to 1, and when i equals 1, the candidate decoding path is the preset decoding path located at the starting position.

[0159] The decoding value determination submodule is used to take the preset decoding value of the target decoding path as the target decoding value corresponding to the i-th target encoded data group.

[0160] The decoding data determination submodule is used to obtain target decoded data based on the target decoded values ​​corresponding to each of the multiple target encoded data groups.

[0161] According to embodiments of this disclosure, the path determination submodule includes: a comparison unit, a first path determination unit, and a second path determination unit.

[0162] The comparison unit is used to compare the preset coding values ​​of at least two candidate decoding paths with the target coding values ​​included in the i-th target coding data group to obtain the code distance corresponding to each of the at least two candidate decoding paths.

[0163] The first path determination unit is used to determine the candidate decoding path with the smallest code distance from at least two candidate decoding paths based on the code distance corresponding to each of the at least two candidate decoding paths.

[0164] The second path determination unit is used to select the candidate decoding path with the smallest code distance as the target decoding path.

[0165] According to embodiments of this disclosure, the data verification device 800 further includes: a comparison module and a result determination module.

[0166] The comparison module compares the target decoded data with the binary data to be processed to obtain the target checksum.

[0167] The result determination module is used to determine that the binary data to be processed is different from the target decoded data if the target value is found in the target checksum.

[0168] According to embodiments of this disclosure, the target checksum includes multiple check values. The method also includes a location determination submodule and a message generation submodule.

[0169] The position determination submodule is used to determine the position information of the target value from the target checksum when the number of bits of the binary data to be processed is less than the preset number of bits and the comparison result indicates that the first hash data is different from the target decoded data.

[0170] The message generation submodule is used to generate alarm messages for the binary data to be processed based on location information and preset alarm templates.

[0171] Figure 9 A schematic block diagram of a data encoding apparatus according to an embodiment of the present disclosure is shown.

[0172] like Figure 9 As shown, the data encoding device 900 of this embodiment includes a conversion module 910, a first encoding module 920, a second encoding module 930, a data generation module 940, and a transmission module 950.

[0173] The conversion module 910 is used to perform binary conversion on the generated file to be processed in response to the generated file to be processed, so as to obtain binary data to be processed.

[0174] The first encoding module 920 is used to perform hash encoding on the binary data to be processed when it is determined that the number of bits of the binary data to be processed is greater than or equal to the preset number of bits, so as to obtain the second hash data.

[0175] The second encoding module 930 is used to encode the second hash data using a convolutional encoding circuit to obtain the target encoded data.

[0176] The data generation module 940 is used to generate a target data packet based on the target encoded data, the binary data to be processed, and the virtual machine identifier of the first virtual machine.

[0177] The sending module 950 is used to send the target data packet to the second virtual machine.

[0178] According to embodiments of this disclosure, the above data encoding method includes: a third encoding module.

[0179] The third encoding module is used to encode the binary data to be processed using a convolutional coding circuit when the number of bits of the binary data to be processed is less than the preset number of bits, so as to obtain the target encoded data.

[0180] According to embodiments of this disclosure, any multiple modules selected from the determination module 810, decoding module 820, processing module 830, and verification module 840, or the conversion module 910, first encoding module 920, second encoding module 930, data generation module 940, and sending module 950, can be combined into one module, or any one of these modules can be split into multiple modules. Alternatively, at least some of the functions of one or more of these modules can be combined with at least some of the functions of other modules and implemented in one module. According to embodiments of this disclosure, at least one of the following components—determining module 810, decoding module 820, processing module 830, and verification module 840, or conversion module 910, first encoding module 920, second encoding module 930, data generation module 940, and transmission module 950—can be at least partially implemented as hardware circuitry, such as a Field Programmable Gate Array (FPGA), Programmable Logic Array (PLA), System-on-Chip, System-on-Substrate, System-on-Package, Application-Specific Integrated Circuit (ASIC), or any other reasonable method of integrating or packaging circuitry, or implemented in software, hardware, or firmware, or in any suitable combination of any of these three methods. Alternatively, at least one of the following components—determining module 810, decoding module 820, processing module 830, and verification module 840, or conversion module 910, first encoding module 920, second encoding module 930, data generation module 940, and transmission module 950—can be at least partially implemented as a computer program module, which, when run, can perform corresponding functions.

[0181] Figure 10 A block diagram schematically illustrates an electronic device suitable for implementing a data verification method and a data encoding method according to embodiments of the present disclosure.

[0182] like Figure 10As shown, an electronic device 1000 according to an embodiment of the present disclosure includes a processor 1001, which can perform various appropriate actions and processes according to a program stored in a read-only memory (ROM) 1002 or a program loaded from a storage portion 1008 into a random access memory (RAM) 1003. The processor 1001 may include, for example, a general-purpose microprocessor (e.g., a CPU), an instruction set processor and / or an associated chipset and / or a special-purpose microprocessor (e.g., an application-specific integrated circuit (ASIC)), etc. The processor 1001 may also include onboard memory for caching purposes. The processor 1001 may include a single processing unit or multiple processing units for performing different actions of the method flow according to an embodiment of the present disclosure.

[0183] RAM 1003 stores various programs and data required for the operation of electronic device 1000. Processor 1001, ROM 1002, and RAM 1003 are interconnected via bus 1004. Processor 1001 performs various operations of the method flow according to embodiments of the present disclosure by executing programs in ROM 1002 and / or RAM 1003. It should be noted that programs may also be stored in one or more memories other than ROM 1002 and RAM 1003. Processor 1001 may also perform various operations of the method flow according to embodiments of the present disclosure by executing programs stored in one or more memories.

[0184] According to embodiments of this disclosure, the electronic device 1000 may further include an input / output (I / O) interface 1005, which is also connected to a bus 1004. The electronic device 1000 may also include one or more of the following components connected to the input / output (I / O) interface 1005: an input section 1006 including a keyboard, mouse, etc.; an output section 1007 including a cathode ray tube (CRT), liquid crystal display (LCD), etc., and a speaker, etc.; a storage section 1008 including a hard disk, etc.; and a communication section 1009 including a network interface card such as a LAN card, modem, etc. The communication section 1009 performs communication processing via a network such as the Internet. A drive 1010 is also connected to the input / output (I / O) interface 1005 as needed. A removable medium 1011, such as a disk, optical disk, magneto-optical disk, semiconductor memory, etc., is installed on the drive 1010 as needed so that computer programs read from it can be installed into the storage section 1008 as needed.

[0185] This disclosure also provides a computer-readable storage medium, which may be included in the device / apparatus / system described in the above embodiments; or it may exist independently and not assembled into the device / apparatus / system. The computer-readable storage medium carries one or more programs that, when executed, implement the method according to the embodiments of this disclosure.

[0186] According to embodiments of this disclosure, the computer-readable storage medium may be a non-volatile computer-readable storage medium, such as including, but not limited to: portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination thereof. In this disclosure, the computer-readable storage medium may be any tangible medium that contains or stores a program that can be used by or in conjunction with an instruction execution system, apparatus, or device. For example, according to embodiments of this disclosure, the computer-readable storage medium may include ROM 1002 and / or RAM 1003 and / or one or more memories other than ROM 1002 and RAM 1003 described above.

[0187] Embodiments of this disclosure also include a computer program product comprising a computer program containing program code for performing the methods shown in the flowchart. When the computer program product is run on a computer system, the program code enables the computer system to implement the data verification method and data encoding method provided in the embodiments of this disclosure.

[0188] When the computer program is executed by the processor 1001, it performs the functions defined in the system / apparatus of this disclosure embodiments. According to embodiments of this disclosure, the systems, apparatuses, modules, units, etc., described above can be implemented by computer program modules.

[0189] In one embodiment, the computer program may rely on a tangible storage medium such as an optical storage device or a magnetic storage device. In another embodiment, the computer program may also be transmitted and distributed in the form of signals over a network medium, and may be downloaded and installed via the communication section 1009, and / or installed from a removable medium 1011. The program code contained in the computer program can be transmitted using any suitable network medium, including but not limited to: wireless, wired, etc., or any suitable combination thereof.

[0190] In such an embodiment, the computer program can be downloaded and installed from a network via communication section 1009, and / or installed from removable medium 1011. When the computer program is executed by processor 1001, it performs the functions defined in the system of this disclosure embodiment. According to embodiments of this disclosure, the systems, devices, apparatuses, modules, units, etc., described above can be implemented by computer program modules.

[0191] According to embodiments of this disclosure, program code for executing the computer programs provided in embodiments of this disclosure can be written in any combination of one or more programming languages. Specifically, these computational programs can be implemented using high-level procedural and / or object-oriented programming languages, and / or assembly / machine languages. Programming languages ​​include, but are not limited to, languages ​​such as Java, C++, Python, "C", or similar programming languages. The program code can execute entirely on a user's computing device, partially on a user's device, partially on a remote computing device, or entirely on a remote computing device or server. In cases involving remote computing devices, the remote computing device can be connected to the user's computing device via any type of network, including a local area network (LAN) or a wide area network (WAN), or it can be connected to an external computing device (e.g., via the Internet using an Internet service provider).

[0192] The flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of this disclosure. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of code containing one or more executable instructions for implementing a specified logical function. It should also be noted that in some alternative implementations, the functions indicated in the blocks may occur in a different order than those indicated in the drawings. For example, two consecutively indicated blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in a block diagram or flowchart, and combinations of blocks in a block diagram or flowchart, may be implemented using a dedicated hardware-based system that performs the specified function or operation, or using a combination of dedicated hardware and computer instructions.

[0193] Those skilled in the art will understand that the features described in the various embodiments of this disclosure can be combined and / or combined in various ways, even if such combinations or combinations are not explicitly described in this disclosure. In particular, the features described in the various embodiments of this disclosure can be combined and / or combined in various ways without departing from the spirit and teachings of this disclosure. All such combinations and / or combinations fall within the scope of this disclosure.

[0194] The embodiments of this disclosure have been described above. However, these embodiments are for illustrative purposes only and are not intended to limit the scope of this disclosure. Although various embodiments have been described above, this does not mean that the measures in the various embodiments cannot be used advantageously in combination. Various substitutions and modifications can be made by those skilled in the art without departing from the scope of this disclosure, and all such substitutions and modifications should fall within the scope of this disclosure.

Claims

1. A data verification method, characterized in that, The method includes: In response to receiving a target data packet sent by a first virtual machine, binary data to be processed, target encoded data, and the virtual machine identifier of the first virtual machine are determined from the target data packet. The target encoded data is obtained by the first virtual machine encoding the binary data to be processed using a preset encoding method, which includes encoding by a convolutional coding circuit. The target encoded data is decoded based on a preset decoding path diagram corresponding to the virtual machine identifier to obtain target decoded data, wherein the preset decoding path diagram is obtained based on the convolutional coding circuit; If it is determined that the binary data to be processed is different from the target decoded data, the binary data to be processed is hash-encoded to obtain first hash data; and Based on the comparison result between the first hash data and the target decoded data, the verification result of the binary data to be processed is determined.

2. The method according to claim 1, characterized in that, The preset decoding path diagram includes multiple preset decoding paths, each preset decoding path having a preset encoding value and a preset decoding value corresponding to the preset encoding value, and the target decoding data includes multiple target decoding values; The step of decoding the target encoded data based on a preset decoding path map corresponding to the virtual machine identifier to obtain target decoded data includes: Based on the number of data bits of the preset encoding value in the preset decoding path diagram, the target encoded data is grouped to obtain multiple target encoded data groups; For the i-th target encoded data group, based on the target encoded value included in the i-th target encoded data group, the target decoding path of the i-th target encoded data group is determined from at least two candidate decoding paths connected to the target decoding path of the (i-1)-th target encoded data group, where i is an integer greater than or equal to 1, and when i equals 1, the candidate decoding path is a preset decoding path located at the starting position. The preset decoding value of the target decoding path is used as the target decoding value corresponding to the i-th target encoded data group; and The target decoded data is obtained based on the target decoded values ​​corresponding to each of the multiple target encoded data groups.

3. The method according to claim 2, characterized in that, The step of determining the target decoding path of the i-th target encoded data group from at least two candidate decoding paths connected to the target decoding path of the (i-1)-th target encoded data group based on the target encoded values ​​included in the i-th target encoded data group includes: The preset encoding values ​​of each of the at least two candidate decoding paths are compared with the target encoding values ​​included in the i-th target encoded data group to obtain the code distance corresponding to each of the at least two candidate decoding paths; Based on the code distances corresponding to each of the at least two candidate decoding paths, determine the candidate decoding path with the smallest code distance from the at least two candidate decoding paths; and The candidate decoding path with the smallest code distance is taken as the target decoding path.

4. The method according to claim 1, characterized in that, The method further includes: The target decoded data is compared with the binary data to be processed to obtain the target checksum; If a target value is found in the target checksum, the binary data to be processed is determined to be different from the target decoded data.

5. The method according to claim 4, characterized in that, The target checksum includes multiple check values; the method further includes: If it is determined that the number of bits in the binary data to be processed is less than a preset number of bits and the comparison result indicates that the first hash data is different from the target decoded data, the position information of the target value is determined based on the target checksum; and Based on the location information and the preset alarm template, an alarm message is generated for the binary data to be processed.

6. A data encoding method, characterized in that, The method further includes: In response to the generation of a file to be processed, the file to be processed is converted into binary data to obtain the binary data to be processed. If it is determined that the number of bits of the binary data to be processed is greater than or equal to the preset number of bits, the binary data to be processed is hash-encoded to obtain the second hash data; The second hash data is encoded using the convolutional coding circuit to obtain the target encoded data; Based on the target encoded data, the binary data to be processed, and the virtual machine identifier of the first virtual machine, the target data packet is generated; and The target data packet is sent to the second virtual machine so that the second virtual machine uses the target data packet for the method according to any one of claims 1 to 5.

7. The method according to claim 6, characterized in that, The method further includes: If the number of bits of the binary data to be processed is less than the preset number of bits, the binary data to be processed is encoded using the convolutional coding circuit to obtain the target encoded data.

8. A data verification device, characterized in that, The device includes: The determination module is configured to, in response to receiving a target data packet sent by a first virtual machine, determine from the target data packet the binary data to be processed, the target encoded data, and the virtual machine identifier of the first virtual machine, wherein the target encoded data is obtained by the first virtual machine encoding the binary data to be processed through a preset encoding method, the preset encoding method including encoding by a convolutional coding circuit; A decoding module is used to decode the target encoded data based on a preset decoding path diagram corresponding to the virtual machine identifier to obtain target decoded data, wherein the preset decoding path diagram is obtained based on the convolutional coding circuit; The processing module is configured to, when it is determined that the binary data to be processed is different from the target decoded data, perform hash encoding on the binary data to be processed to obtain first hash data; and The verification module is used to determine the verification result of the binary data to be processed based on the comparison result between the first hash data and the target decoded data.

9. A data encoding device, characterized in that, The device includes: A conversion module is used to perform binary conversion on the generated file to be processed in response to obtain binary data to be processed. The first encoding module is used to perform hash encoding on the binary data to be processed when it is determined that the number of data bits of the binary data to be processed is greater than or equal to the number of preset bits, so as to obtain the second hash data. The second encoding module is used to encode the second hash data using a convolutional coding circuit to obtain the target encoded data; The data generation module is used to generate a target data packet based on the target encoded data, the binary data to be processed, and the virtual machine identifier of the first virtual machine; and The sending module is used to send the target data packet to the second virtual machine.

10. An electronic device, comprising: One or more processors; Memory, used to store one or more computer programs. The characteristic feature is that the one or more processors execute the one or more computer programs to implement the steps of the method according to any one of claims 1 to 7.

11. A computer-readable storage medium having a computer program or instructions stored thereon, characterized in that, When the computer program or instructions are executed by a processor, they implement the steps of the method according to any one of claims 1 to 7.

12. A computer program product, comprising a computer program or instructions, characterized in that, When the computer program or instructions are executed by a processor, they implement the steps of the method according to any one of claims 1 to 7.

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