Radio frequency chip and working method thereof, radio frequency front-end system and electronic device

Abstract

The present application relates to a radio frequency chip and a working method thereof, a radio frequency front-end system and an electronic device, and relates to the technical field of electronic devices. It is used to solve the problem of low sensitivity of receiving signals by radio frequency chips. The radio frequency chip includes a radio frequency interface, a communication interface and an interference suppression network. The radio frequency interface is used to receive radio frequency signals. The communication interface is used to couple with a control chip to receive communication signals, and the frequency range of the communication signal at least partially overlaps with the frequency range of the radio frequency signal. The interference suppression network is coupled to the communication interface, and the interference suppression network is used to improve the isolation between the communication signal and the radio frequency signal.

Description

Technical Field

[0001] The present disclosure relates to the technical field of electronic equipment, and in particular to a radio frequency chip and a working method thereof, a radio frequency front-end system and an electronic device. Background Art

[0002] The radio frequency front-end (RFFE) is the core component of electronic devices to achieve wireless communication. At present, the functions of the RF front-end are becoming more and more abundant, and the integration of RF modules is also getting higher and higher, which easily causes digital signals to interfere with RF signals, resulting in the problem of reduced sensitivity of the RF chip in the RF front-end to receive RF signals. Summary of the invention

[0003] The embodiments of the present application provide a radio frequency chip and a working method thereof, a radio frequency front-end system and an electronic device, which are used to reduce the interference of digital signals on radio frequency signals, and alleviate or even prevent the reduction in the sensitivity of the radio frequency chip in receiving radio frequency signals.

[0004] To achieve the above objectives, the embodiments of the present application adopt the following technical solutions:

[0005] In a first aspect, a radio frequency chip is provided. The radio frequency chip includes a radio frequency interface, a communication interface, and an interference suppression network. The radio frequency interface is used to receive a radio frequency signal. The communication interface is used to couple with a control chip to receive a communication signal, and the frequency range of the communication signal at least partially overlaps with the frequency range of the radio frequency signal. The interference suppression network is coupled to the communication interface, and the interference suppression network is used to improve the isolation between the communication signal and the radio frequency signal.

[0006] The control chip can be a radio frequency transceiver or a modem. The radio frequency chip can receive external radio frequency signals, filter, amplify, and remove noise from the signals, and then provide the processed signals to the control chip; or the radio frequency chip can also receive the signals provided by the control chip, amplify and filter them, and then transmit the radio frequency signals to the outside.

[0007] The radio frequency chip may include a communication interface. The communication interface may include a mobile industry processor interface (MIPI) interface. It can be understood that the radio frequency chip can communicate with the control chip through the communication interface, thereby receiving the control instructions and data signals provided by the control chip. At the same time, the radio frequency chip can also provide data signals to the control chip through the MIPI interface.

[0008] The RF chip and the control chip are connected via the MIPI RFFE protocol bus. The MIPI RFFE protocol bus includes a clock control (SCLK) line and a data control (SDATA) line. The clock control (SCLK) line is used to provide a clock signal to facilitate the synchronization function between the control chip and the RF chip. The data control (SDATA) line is used to transmit control signals and data signals. The data control line can be bidirectional. It can be understood that the control chip can transmit data signals to the RF chip through the data control line, and the RF chip can also transmit data signals to the control chip through the data control line.

[0009] The high-frequency clock signal on the SCLK line will reduce the sensitivity of the RF interface in the RF chip to receive the RF signal. Therefore, the RF chip can also include an interference suppression network.

[0010] The interference suppression network can be connected to the SCLK line. It can be understood that the interference suppression network acts on the high-frequency clock signal on the SCLK line that has not yet entered the communication interface. In this way, the interference suppression network can prevent the high-order harmonics and / or spurious signals (hereinafter collectively referred to as interference signals, and since the interference signal is caused by the high-frequency clock signal, the interference signal can be understood as a partial signal component in a communication signal) generated by the high-frequency clock signal on the SCLK line from entering the communication interface and spreading, so that the interference signal can be uniformly filtered out. In this way, the interference suppression network can increase the isolation between the interference signal and the RF signal, thereby reducing or even preventing the problem of reducing the receiving sensitivity of the RF interface signal due to the interference signal.

[0011] Since the interference suppression network is set inside the RF chip, each device in the interference suppression network can be manufactured by a refined process, and the size of the RF chip will hardly increase. Compared with directly adding an interference suppression network on the surface of the circuit board, this can avoid increasing the number and arrangement density of devices on the surface of the circuit board, and can also avoid redesigning the layout of the circuit board, improve the convenience of setting up the interference suppression network, and reduce the production cost of electronic equipment.

[0012] In some feasible implementations of the first aspect, the interference suppression network includes a capacitor unit and an inductor unit. A first end of the capacitor unit is coupled to the communication interface, a first end of the inductor unit is coupled to a second end of the capacitor unit, and a second end of the inductor unit is coupled to a reference end.

[0013] The interference suppression network may filter the interference signal by band-stop filtering to filter out interference signals in a specified frequency range. In some examples, the interference suppression network may include a capacitor unit and an inductor unit. Since there is impedance on the SCLK line itself, the capacitor unit and the inductor unit may form an LC band-stop filter circuit (hereinafter referred to as an LC circuit) together with the impedance on the SCLK line.

[0014] Among them, by adjusting the capacitance value of the capacitor unit in the LC circuit, the frequency range rate of the LC circuit filtering can be appropriately adjusted so that different LC circuits are adapted to RF chips that process RF signals of different frequencies. Similarly, by adjusting the inductance value of the inductor unit in the LC circuit, the frequency range rate of the LC circuit filtering can be appropriately adjusted so that different LC circuits are adapted to RF chips that process RF signals of different frequencies.

[0015] Exemplarily, the RF chip can be used to process RF signals in the band 8 frequency band (the frequency range can be 880MHz-915MHz and 925MHz-950MHz). By presetting the capacitance value of the capacitor unit and the inductance value of the inductor unit in the interference suppression network, the interference suppression network (or LC circuit) is used to filter out interference signals in the band 8 band. In this way, the isolation between the interference signals in the band 8 band and the RF signals in the band 8 band can be improved, and the problem of reduced sensitivity of the RF interface to receive RF signals in the band 8 band caused by the interference signals in the band 8 band can be reduced or even prevented.

[0016] In some feasible implementations of the first aspect, the capacitor unit includes N capacitors connected in parallel and N first switches. The first plate of each capacitor is coupled to the control chip, and the second plate of each capacitor is coupled to the first end of the inductor unit. N is an integer greater than 1. Each first switch is connected in series with a capacitor, and different first switches are connected in series with different capacitors. The RF chip also includes a controller, which is coupled to the N first switches respectively to control each first switch to be opened or closed respectively.

[0017] The capacitor unit may include N capacitors connected in parallel with each other. Wherein, N may be an integer greater than or equal to 2, for example, N is 2, 3, 4, 5, 6, etc., which is not limited here. In addition, a first switch is also connected in series in the parallel path of each capacitor. It can be understood that the capacitor unit may also include N first switches.

[0018] A first switch and a capacitor connected in series form a group of capacitor subunits. In a group of capacitor subunits, the capacitor is invalid when the first switch is disconnected, and the capacitor is valid when the first switch is closed. In this way, the capacitance value of the capacitor unit can be obtained by calculating the capacitance values ​​of N valid capacitors connected in parallel.

[0019] The radio frequency chip further includes a controller. The controller may be coupled to the radio frequency interface and the interference suppression network, respectively. Exemplarily, the controller may be coupled to a capacitor unit in the interference suppression network, and is used to control N first switches in the capacitor unit to be opened or closed, respectively.

[0020] In this way, after the controller obtains the frequency band range of the working signal processed by the RF chip from the RF interface, the corresponding control instruction can be determined based on the mapping relationship. The controller sends the control signal to the capacitor unit to control the N first switches to perform the opening or closing action respectively, so that the interference suppression network can filter out the interference signal that overlaps with the frequency range of the current working signal, and improve the isolation between the working signal and the interference signal, thereby reducing or even preventing the interference signal from leaking to the RF interface, causing the RF interface to receive the working signal (RF signal) The sensitivity is reduced.

[0021] In some feasible implementations of the first aspect, the inductor unit includes H inductors connected in series and H third switches. Each third switch is connected in parallel with an inductor, and different third switches are connected in parallel with different inductors. The RF chip also includes a controller, which is respectively coupled to the H third switches to control each third switch to be opened or closed.

[0022] The inductor unit may include H inductors connected in series. H may be an integer greater than or equal to 2, for example, H is 2, 3, 4, 5, 6, etc., which is not limited here. In addition, the inductor unit may also include H third switches. Each third switch is connected in parallel with an inductor.

[0023] A third switch and an inductor connected in parallel form a group of inductor subunits. In a group of inductor subunits, the inductor is effective when the third switch is disconnected, and the inductor is ineffective when the third switch is closed. In this way, by calculating the inductance values ​​of multiple effective inductors connected in series, the inductance value of the adjustable inductor component can be obtained.

[0024] The radio frequency chip also includes a controller. The controller can be coupled to the radio frequency interface and the interference suppression network respectively. Exemplarily, the controller can be coupled to the inductor unit in the interference suppression network, and is used to control the H third switches in the inductor unit to be opened or closed respectively.

[0025] In this way, after the controller obtains the frequency band range of the working signal processed by the RF chip from the RF interface, the corresponding control instruction can be determined based on the mapping relationship. The controller sends the control signal to the inductor unit to control the H third switches to respectively perform the opening or closing action, so that the interference suppression network can filter out the interference signal that overlaps with the frequency range of the current working signal, and improve the isolation between the working signal and the interference signal, thereby reducing or even preventing the interference signal from leaking to the RF interface, causing the RF interface to receive the working signal (RF signal) The sensitivity is reduced.

[0026] In some feasible implementations of the first aspect, the interference suppression network further includes a resistor unit, wherein a first end of the resistor unit is used to couple with the control chip, and a second end of the resistor unit is coupled with the communication interface.

[0027] The interference suppression network may further include a resistance unit in addition to the capacitance unit and the inductance unit, so that the sum of the resistance unit and the impedance on the SCLK line, together with the capacitance unit and the inductance unit, forms an LC circuit.

[0028] When the interference suppression network includes a resistor unit, the frequency range rate of the LC circuit filtering can be appropriately adjusted by adjusting the resistance value of the resistor unit in the LC circuit, so that different LC circuits are adapted to RF chips that process RF signals of different frequencies.

[0029] Exemplarily, the RF chip can be used to process RF signals in the band 8 frequency band (the frequency range can be 880MHz-915MHz and 925MHz-950MHz). By presetting the capacitance value of the capacitor unit, the inductance value of the inductor unit, and the resistance value of the resistor unit in the interference suppression network, the interference suppression network (or LC circuit) is used to filter out interference signals in the band 8 frequency band. In this way, the isolation between the interference signals in the band 8 frequency band and the interference signals in the band 8 frequency band can be improved, and the problem of reduced sensitivity of the RF interface to receive RF signals in the band 8 frequency band caused by the interference signals in the band 8 frequency band being leaked to the RF interface can be reduced or even prevented.

[0030] In some feasible implementations of the first aspect, the resistance unit includes M resistors connected in series and M second switches. Each second switch is connected in parallel with a resistor, and different second switches are connected in parallel with different resistors. The RF chip also includes a controller, which is respectively coupled to the M second switches to control each second switch to be opened or closed.

[0031] The resistance unit may include M resistors connected in series. M may be an integer greater than or equal to 2, for example, M is 2, 3, 4, 5, 6, etc., which is not limited here. In addition, the resistance unit may also include M second switches. Each second switch is connected in parallel with a resistor.

[0032] A second switch and a resistor connected in parallel form a group of resistance subunits. In a group of resistance subunits, when the second switch is disconnected, the resistor is effective, and when the second switch is closed, the resistor is ineffective. In this way, by calculating the resistance values ​​of multiple effective resistors connected in series, the resistance value of the adjustable resistance component can be obtained.

[0033] The radio frequency chip further includes a controller. The controller may be coupled to the radio frequency interface and the interference suppression network, respectively. Exemplarily, the controller may be coupled to the resistor unit in the interference suppression network, and may be used to control the M second switches in the resistor unit to be opened or closed, respectively.

[0034] In this way, after the controller obtains the frequency band range of the working signal processed by the RF chip from the RF interface, the corresponding control instruction can be determined based on the mapping relationship. The controller sends the control signal to the resistor unit to control the M second switches to perform the opening or closing action respectively, so that the interference suppression network can filter out the interference signal that overlaps with the frequency range of the current working signal, and improve the isolation between the working signal and the interference signal, thereby reducing or even preventing the interference signal from leaking to the RF interface, causing the RF interface to reduce the sensitivity of receiving the working signal (RF signal).

[0035] In some possible implementations of the first aspect, the communication interface includes a controller.

[0036] In this implementation manner, the controller may be integrated inside the communication interface as a part of the communication interface.

[0037] By integrating the controller into the communication interface, it can be manufactured by a refined process, and the size of the communication interface will hardly increase. Compared with directly adding a controller inside the RF chip, this can avoid increasing the number of components and arrangement density of the RF chip.

[0038] In a second aspect, a radio frequency front-end system is provided. The radio frequency front-end system includes a control chip and a plurality of radio frequency chips. Each radio frequency chip is coupled to the control chip. At least one radio frequency chip among the plurality of radio frequency chips is a radio frequency chip in any of the above embodiments.

[0039] In a third aspect, an electronic device is provided. The electronic device includes: a circuit board, a radio frequency front-end system and an antenna. The radio frequency front-end system is the radio frequency front-end system in the second aspect above, and the control chip is located on the circuit board. The antenna is coupled to the radio frequency port of the radio frequency chip.

[0040] The beneficial effects of the second and third aspects can refer to the beneficial effects of the RF chip of any one of the first aspects, and will not be repeated here.

[0041] In a fourth aspect, a working method of a radio frequency chip is provided. The method is applied to the radio frequency chip as in any one of the first aspect. The method includes: an interference suppression network is used to filter a communication signal to suppress at least part of the signal components in the communication signal, and the frequency range of at least part of the signal components at least partially overlaps with the frequency range of the radio frequency signal.

[0042] In some feasible implementations of the fourth aspect, the RF chip includes a controller and N first switches; the method also includes: the controller controls at least one first switch to be closed and the remaining first switches to be opened based on the RF signal received by the RF interface; at least one first switch corresponds to the frequency of the RF signal.

[0043] In some feasible implementations of the fourth aspect, the RF chip includes a controller and M second switches; the method also includes: the controller controls at least one second switch to be closed and the remaining second switches to be opened based on the RF signal received by the RF interface; at least one second switch corresponds to the frequency of the RF signal.

[0044] In some feasible implementations of the fourth aspect, the RF chip includes a controller and H third switches; the method also includes: the controller controls at least one third switch to be closed and the remaining third switches to be opened based on the RF signal received by the RF interface; at least one third switch corresponds to the frequency of the RF signal.

[0045] In a fifth aspect, an electronic device is provided. The electronic device includes a memory and one or more processors. The memory is coupled to the processor. The memory stores a computer program code, and the computer program code includes computer instructions. When the computer instructions are executed by the processor, the electronic device executes any method as in the fourth aspect.

[0046] In a sixth aspect, a computer-readable storage medium is provided, wherein the computer-readable storage medium includes computer instructions, and when the computer instructions are executed on an electronic device, the electronic device executes any method as described in the fourth aspect.

[0047] The beneficial effects of the fifth and sixth aspects can refer to the beneficial effects of the working method of the RF chip in any one of the fourth aspects, and will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0048] Figure 1 A schematic diagram of the connection between a control chip and a radio frequency chip in a radio frequency front-end system;

[0049] Figure 2 A schematic diagram of a signal waveform transmitted by a clock control line and a signal waveform transmitted by a data control line when a typical MIPI control instruction is transmitted by the MIPI RFFE protocol bus;

[0050] Figure 3 It is a schematic diagram of the structure of a radio frequency front-end system;

[0051] Figure 4 for Figure 1 A frequency domain signal amplitude diagram corresponding to the RF chip shown;

[0052] Figure 5 for Figure 3 Another frequency domain signal amplitude diagram corresponding to the RF chip shown;

[0053] Figure 6 The waveform diagrams of the high-frequency clock signal in two cases are shown;

[0054] Figure 7 A schematic diagram of the structure of an electronic device provided for some embodiments of the present application;

[0055] Figure 8 A schematic diagram of the structure of a radio frequency front-end system in some embodiments of the present application;

[0056] Fig. 9 for Figure 8 A structural schematic diagram of a radio frequency chip shown;

[0057] Fig.10 A schematic diagram of the structure of a radio frequency front-end system in some embodiments of the present application;

[0058] Fig.11 A schematic diagram of the structure of a radio frequency front-end system in some embodiments of the present application;

[0059] Fig.12 A schematic diagram of the structure of a radio frequency front-end system provided for some embodiments of the present application;

[0060] Fig.13 for Fig.12 A structural schematic diagram of an adjustable capacitor component;

[0061] Fig.14 for Fig.13 The specific structural diagram of the adjustable capacitor component shown;

[0062] Fig.15 for Fig.12 Another structural schematic diagram of the adjustable capacitor component;

[0063] Fig.16 for Fig.15 The specific structural diagram of the adjustable capacitor component shown;

[0064] Fig.17 A schematic diagram of the structure of a radio frequency front-end system provided for some embodiments of the present application;

[0065] Fig.18 for Fig.17 A structural schematic diagram of an adjustable resistance component;

[0066] Fig.19 for Fig.17 Another structural schematic diagram of the adjustable resistance component;

[0067] Fig. 20 A schematic diagram of the structure of a radio frequency front-end system provided for some embodiments of the present application;

[0068] Fig.21 for Fig. 20 A structural schematic diagram of an adjustable inductor component;

[0069] Fig. 22 for Fig. 20 Another structural schematic diagram of the adjustable inductor component;

[0070] Fig.23 A schematic diagram of the structure of a radio frequency front-end system in some embodiments of the present application;

[0071] Fig.24 A schematic diagram of the structure of a radio frequency front-end system in some other embodiments of the present application;

[0072] Fig.25 A frequency domain signal amplitude diagram and a waveform diagram of a high-frequency clock signal corresponding to the interference suppression network under the first control instruction in some embodiments of the present application;

[0073] Fig.26 A frequency domain signal amplitude diagram and a waveform diagram of a high-frequency clock signal corresponding to the interference suppression network under the second control instruction in some embodiments of the present application;

[0074] Fig. 27 Figure 2 is the waveform diagram of two high-frequency clock signals. DETAILED DESCRIPTION

[0075] The following will describe the technical solutions in the embodiments of the present application in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments provided by the present application, all other embodiments obtained by ordinary technicians in this field belong to the scope of protection of the present application.

[0076] In the following, the terms "first" and "second" are used for descriptive purposes only and are not to be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of the embodiments of the present application, unless otherwise specified, "plurality" means two or more.

[0077] In addition, in the present application, directional terms such as "up", "down", "left" and "right" may be defined including but not limited to the orientation relative to the schematic placement of the components in the drawings. It should be understood that these directional terms may be relative concepts, which are used for relative description and clarification, and may change accordingly according to the change in the orientation of the components in the drawings.

[0078] When describing some embodiments, the expressions "connected", "connected" and their derivatives may be used. For example, when describing some embodiments, the term "connected" may be used to indicate that two or more components are in direct or indirect physical contact with each other. For example, A and B are connected, which may mean that A and B are connected, or that A and B are connected through other components. In addition, the term "coupled" may be a way of achieving electrical connection for signal transmission, and coupling may refer to direct coupling or indirect coupling.

[0079] “At least one of A, B, and C” has the same meaning as “at least one of A, B, or C” and both include the following combinations of A, B, and C: A only, B only, C only, the combination of A and B, the combination of A and C, the combination of B and C, and the combination of A, B, and C.

[0080] “A and / or B” includes the following three combinations: A only, B only, and a combination of A and B.

[0081] As used herein, "about," "substantially," or "approximately" includes the stated value and an average value that is within an acceptable range of variation from the particular value as determined by one of ordinary skill in the art taking into account the measurements in question and errors associated with the measurement of the particular quantity (i.e., the limitations of the measurement system).

[0082] The following is an explanation of the technical terms involved in the embodiments of the present application.

[0083] 1. Radio frequency front-end (RFFE)

[0084] RFFE is the core component of wireless communication modules. The RF front end is crucial to the wireless communication performance of electronic devices. The RF front end determines important performance indicators such as the communication mode, received signal strength, call stability, and transmission power that the electronic device can support, which directly affects the end-user experience. In addition to the communication system, the wireless connection system in electronic devices (such as global positioning system (GPS), Bluetooth, near field communication (NFC), etc.) also has a strong demand for the RF front end.

[0085] The RF front end mainly includes four types of devices: filter, power amplifier (PA), RF switch (switch / tuner), and low noise amplifier (LNA).

[0086] 2. MIPI radio frequency front-end (MIPI RFFE)

[0087] MIPI RFFE is a control interface standard dedicated to mobile terminal RF front-end control.

[0088] The MIPI RFFE system may include a control chip (RFFE master device) and a radio frequency chip (RFFE slave device, also known as a controlled device). The control chip may be a radio frequency transceiver (radio frequency integrated circuit, RFIC) or a modem. The radio frequency chip may receive external radio frequency signals, filter, amplify, denoise, and process the signals, and then provide the processed signals to the control chip; or the radio frequency chip may receive signals provided by the control chip, amplify, filter, and transmit radio frequency signals to the outside.

[0089] The control chip includes a MIPI interface as a communication interface, and the RF chip also includes a MIPI interface as a communication interface. Therefore, the control chip can communicate with the RF chip through the MIPI RFFE protocol bus to control the RF chip to work. Among them, the MIPI RFFE protocol bus can be used to transmit the digital signal sent by the control chip to the RF chip.

[0090] Figure 1 FIG. 1 shows a schematic diagram of the connection between the control chip and the RF chip. Figure 1 As shown, the control chip is connected to n RF chips via the MIPI RFFE protocol bus.

[0091] Among them, the MIPI RFFE protocol bus consists of a power line (VIO, Figure 1 The MIPI interface is composed of three lines (not shown) and two control lines (SCLK and SDATA). The MIPI interface is only connected to the two control lines (SCLK and SDATA).

[0092] The power line (VIO) is used to provide reference voltage and power supply voltage to facilitate the operation of the control chip and the RF chip.

[0093] The clock control (SCLK) line is used to provide a clock signal to facilitate the synchronization function between the control chip and the RF chip.

[0094] The data control (SDATA) line is used to realize the transmission of control signals and data signals. The data control line can be bidirectional. It can be understood that the control chip can transmit data signals to the RF chip through the data control line, and the RF chip can also transmit data signals to the control chip through the data control line.

[0095] Figure 2 The figure shows the signal waveform of the clock control line and the signal waveform of the data control line when the MIPI RFFE protocol bus transmits a typical MIPI control instruction. Figure 2 (a) is a schematic diagram of the signal waveform transmitted by the clock control line and the signal waveform transmitted by the data control line corresponding to the register write instruction frame in the MIPI control instruction. Figure 2 (b) is a schematic diagram of the signal waveform transmitted by the clock control line and the signal waveform transmitted by the data control line corresponding to the data frame in the MIPI control instruction.

[0096] like Figure 2 As shown, the clock signal provided by the clock control line (SCLK) can be a high-frequency square wave-like signal. The control instruction transmitted by the data control line (SDATA) includes at least a sequence start condition (SSC), a command frame, a data frame, and a bus park. SSC is used to indicate the start of the control signal. SSC is essentially a clock signal, which is distinguished from other signals by designing the duration of high voltage and low voltage in SSC.

[0097] The instruction frame may include:

[0098] Slave address (SA): used to indicate the address information of the RF chip that needs to be controlled.

[0099] Instruction data is used to write instruction data into the register of the RF chip to be controlled.

[0100] The check information (parity, P) is the parity check information of the previous controlled address and instruction data. For example, if RFFE adopts odd check, the number of 1s in the controlled address, instruction data, and the check bit of the check information is an odd number.

[0101] From the above, we can know that there is a high-frequency clock signal in the process of communication between the control chip and the RF chip through the MIPI RFFE protocol bus. The RF chip itself has an RF interface for receiving external RF signals. After the high-frequency clock signal enters the RF chip, due to the limited isolation between the MIPI interface and the RF interface, the high-order harmonics and stray signals generated by the high-frequency clock signal will leak into the RF interface, causing the problem of reduced receiving sensitivity of the RF interface.

[0102] For example, take the RF interface receiving band8 (the frequency range can be 880MHz-915MHz and 925MHz-950MHz) as an example. In the absence of high-frequency clock signal interference, the RF chip has a receiving sensitivity of -115dBm for band8 signals. When the frequency of the high-frequency clock signal is 52MHz, the amplitude of the 18th harmonic of the high-frequency clock signal (about 936MHz) is -45dBm, and the isolation between the MIPI interface and the RF interface is 70dB, the interference signal amplitude of the high-order harmonics of the high-frequency clock signal falling on the band8 signal is -115dBm, which will cause the sensitivity of the RF chip to receive the band8 signal to decrease by 3dB.

[0103] In order to solve the above problems, some solutions, taking mobile phones as an example, will add a suppression network on the printed circuit board (PCB, such as the motherboard) of the mobile phone to suppress the interference of the high-frequency clock signal on the sensitivity of the RF chip to receive the RF signal. Figure 3 A schematic diagram of the structure of MIPI RFFE is shown in FIG. Figure 3 In the present invention, a capacitor C0 is connected to the MIPI RFFE protocol bus between the control chip 01 and the RF chip 02 on the circuit board as a suppression network to suppress the interference of the high-frequency clock signal on the sensitivity of the RF chip 02 in receiving the RF signal.

[0104] However, Figure 3 The suppression network shown is a single capacitor directly set on the surface of the circuit board, which will increase the number of components on the circuit board surface and the density of component arrangement. The setting may lead to the redesign of the circuit board layout. Secondly, due to the differences in the routing layout of different electronic equipment products, the frequency and intensity of the interference caused by the high-frequency clock signal to the radio frequency signal will also be different. Figure 3 The suppression network shown needs to be debugged differently for each type of electronic equipment before leaving the factory, which reduces the production efficiency and production cost of the electronic equipment. Figure 3The suppression network shown can only suppress the interference of a specific frequency range by the high-frequency clock signal, but the RF front end in the electronic device needs to process signals of multiple frequency bands, and the current suppression network cannot suppress the interference of multiple frequency bands. For example, due to the high importance of band 8, a suppression network needs to be designed to suppress the interference of high-frequency clock signals on band 8 signals, reduce or even prevent the reduction of the sensitivity of the RF chip to the reception of band 8 signals; however, the high-frequency clock signal will actually interfere with signals of other frequency bands, causing the RF chip to reduce its sensitivity to the reception of signals of other frequency bands, and the suppression network cannot suppress it.

[0105] In addition, the suppression network debugged on the circuit board itself will also have an impact on the high-frequency clock signal. Take the suppression network used to suppress the interference of the high-frequency clock signal on the band8 frequency signal, and reduce or even prevent the reduction of the sensitivity of the RF chip to the band8 frequency signal reception as an example.

[0106] Figure 4 Shows Figure 1 A frequency domain signal amplitude diagram corresponding to the RF chip shown; Figure 5 Shows Figure 3 Another frequency domain signal amplitude diagram corresponding to the RF chip shown; Figure 6 It also shows Figure 1 The waveform diagram of the high-frequency clock signal in Figure 3 Waveform diagram of medium and high frequency clock signals.

[0107] Figure 4 The figure in the figure shows the frequency domain signal amplitude diagram in the MIPI RFFE system without setting the suppression network. Figure 5 This is a frequency domain signal amplitude diagram with a suppression network in the MIPI RFFE system. Figure 4 and Figure 5 By comparison, it can be found that the suppression network significantly reduces the amplitude of the 936MHz frequency, which increases the isolation of the high-frequency clock signal 936MHz frequency signal (explained in terms of the absolute value of isolation, the isolation mentioned in this article refers to the absolute value of isolation) from 84.424dB to 95.328dB. Figure 6 (The solid line shows the waveform of the high-frequency clock signal in the MIPI RFFE system without the suppression network, and the dotted line shows the waveform of the high-frequency clock signal in the MIPI RFFE system with the suppression network) It can be seen that the suppression network reduces the amplitude of the high-frequency clock signal and significantly slows down the signal edge (this is due to Figure 3The suppression network shown and the impedance of the SCLK line are equivalent to a resistor-capacitor circuit (RC circuit for short), which acts as a low-pass filter for the high-frequency clock signal. This will increase the probability that the signal waveform does not meet the MIPPI RFFE protocol conditions, causing signal abnormalities.

[0108] Based on this, the embodiments of the present application provide a radio frequency chip and its working method, a radio frequency front-end system and an electronic device. By setting the interference suppression network inside the radio frequency chip, each device in the interference suppression network can be manufactured by a refined process, and the size of the radio frequency chip will hardly be increased. Compared with directly adding an interference suppression network on the surface of the circuit board, this can avoid increasing the number and arrangement density of devices on the surface of the circuit board, and can also avoid redesigning the layout of the circuit board, thereby improving the convenience of setting the interference suppression network and reducing the production cost of the electronic device.

[0109] The electronic device provided in the embodiments of the present application may be an electronic device with a radio frequency communication function. The electronic device may include but is not limited to a mobile phone, a tablet computer, a laptop computer, a handheld computer, a netbook, a personal digital assistant (PDA), a wearable electronic device (smart watch, smart bracelet, smart ring, etc.), a virtual reality device, etc., and the embodiments of the present application do not limit this.

[0110] Figure 7 A schematic structural diagram of an electronic device is shown.

[0111] The electronic device 100 may include a processor 110 , an internal memory 120 , a universal serial bus (USB) interface 130 , an antenna 1 , an antenna 2 , a mobile communication module 140 , a wireless communication module 150 , and the like.

[0112] It is to be understood that the structure illustrated in the embodiment of the present invention does not constitute a specific limitation on the electronic device 100. In other embodiments of the present application, the electronic device 100 may include more or fewer components than shown in the figure, or combine some components, or separate some components, or arrange the components differently. The components shown in the figure may be implemented in hardware, software, or a combination of software and hardware.

[0113] The processor 110 may include one or more processing units, for example, the processor 110 may include an application processor (AP), a modem processor, an image signal processor (ISP), a controller, a memory, a digital signal processor (DSP), a baseband processor, etc. Among them, different processing units may be independent devices or integrated into one or more processors.

[0114] The controller may be the nerve center and command center of the electronic device 100. The controller may generate an operation control signal according to the instruction operation code and the timing signal to complete the control of fetching and executing instructions.

[0115] The processor 110 may also be provided with a memory for storing instructions and data. In some embodiments, the memory in the processor 110 is a cache memory. The memory may store instructions or data that the processor 110 has just used or cyclically used. If the processor 110 needs to use the instruction or data again, it may be directly called from the memory. This avoids repeated access, reduces the waiting time of the processor 110, and thus improves the efficiency of the system.

[0116] In some embodiments, the processor 110 may include one or more interfaces. The interface may include an inter-integrated circuit (I2C) interface, a MIPI RFFE interface, a general-purpose input / output (GPIO) interface, and / or a universal serial bus (USB) interface, etc.

[0117] The I2C interface is a bidirectional synchronous serial bus, including a serial data line (SDA) and a serial clock line (SCL). In some embodiments, the processor 110 may include multiple groups of I2C buses. The processor 110 may be coupled to different functional modules through different I2C bus interfaces. For example, the processor 110 may be coupled to a touch sensor through the I2C interface, so that the processor 110 communicates with the touch sensor through the I2C bus interface to realize the touch function of the electronic device 100.

[0118] The MIPI RFFE interface has been explained before and will not be repeated here.

[0119] The GPIO interface can be configured by software. The GPIO interface can be configured as a control signal or as a data signal. In some embodiments, the GPIO interface can be used to connect the processor 110 with a camera, a display, a wireless communication module, etc. The GPIO interface can also be configured as an I2C interface, a MIPI interface, etc.

[0120] The USB interface is an interface that complies with the USB standard specification, and specifically can be a Mini USB interface, a Micro USB interface, a USB Type C interface, etc. The USB interface 130 can be used to connect a charger to charge the electronic device 100, can also be used to transmit data between the electronic device 100 and a peripheral device, and can also use the hardware on the peripheral device to implement the functions of the electronic device.

[0121] It is understandable that the interface connection relationship between the modules illustrated in the embodiment of the present invention is only a schematic illustration and does not constitute a structural limitation on the electronic device 100. In other embodiments of the present application, the electronic device 100 may also adopt different interface connection methods in the above embodiments, or a combination of multiple interface connection methods.

[0122] The wireless communication function of the electronic device 100 can be implemented through the antenna 1, the antenna 2, the mobile communication module 140, the wireless communication module 150, the modem processor and the baseband processor.

[0123] Antenna 1 and antenna 2 are used to transmit and receive electromagnetic wave signals. Each antenna in electronic device 100 can be used to cover a single or multiple communication frequency bands. Different antennas can also be reused to improve the utilization of antennas. For example, antenna 1 can be reused as a diversity antenna for a wireless local area network. In some other embodiments, the antenna can be used in combination with a tuning switch.

[0124] The mobile communication module 140 can provide solutions for wireless communications including 2G / 3G / 4G / 5G, etc., applied to the electronic device 100. The mobile communication module 140 may include at least one filter, a switch, a power amplifier, a low noise amplifier (LNA), etc. The mobile communication module 150 can receive electromagnetic waves from the antenna 1, and filter, amplify, and process the received electromagnetic waves, and transmit them to the modulation and demodulation processor for demodulation. The mobile communication module 150 can also amplify the signal modulated by the modulation and demodulation processor, and convert it into electromagnetic waves for radiation through the antenna 1. In some embodiments, at least some of the functional modules of the mobile communication module 150 can be set in the processor 110. In some embodiments, at least some of the functional modules of the mobile communication module 150 can be set in the same device as at least some of the modules of the processor 110.

[0125] The modem processor may include a modulator and a demodulator. The modulator is used to modulate the low-frequency baseband signal to be sent into a medium-high frequency signal. The demodulator is used to demodulate the received electromagnetic wave signal into a low-frequency baseband signal. The demodulator then transmits the demodulated low-frequency baseband signal to the baseband processor for processing. After the low-frequency baseband signal is processed by the baseband processor, it is passed to the application processor. The application processor outputs a sound signal through an audio device (not limited to a speaker, a receiver, etc.), or displays an image or video through a display screen. In some embodiments, the modem processor may be an independent device. In other embodiments, the modem processor may be independent of the processor and be set in the same device as the mobile communication module or other functional modules.

[0126] The wireless communication module 150 can provide wireless communication solutions including wireless local area networks (WLAN) (such as wireless fidelity (Wi-Fi) networks), bluetooth (BT), global navigation satellite system (GNSS), frequency modulation (FM), near field communication (NFC), infrared (IR), etc., which are applied to the electronic device 100. The wireless communication module 150 can be one or more devices integrating at least one communication processing module. The wireless communication module 150 receives electromagnetic waves via the antenna 2, modulates the frequency of the electromagnetic wave signal and performs filtering, and sends the processed signal to the processor 110. The wireless communication module 150 can also receive the signal to be sent from the processor 110, modulate the frequency of the signal, amplify it, and convert it into electromagnetic waves for radiation through the antenna 2.

[0127] In some embodiments of the present application, the RF front-end system may belong to the mobile communication module 140. The RF front-end system may receive RF signals through the antenna 1, filter, amplify, and process the received RF signals, and transmit them to the modem processor for demodulation. The RF front-end system may also amplify the signal modulated by the modem processor, and convert it into a RF signal for radiation through the antenna 1.

[0128] In other embodiments of the present application, the RF front-end system may belong to the wireless communication module 150. The RF front-end system may receive RF signals via the antenna 2, frequency modulate and filter the RF signals, and send the processed signals to the processor 110. The RF front-end system may also receive signals to be sent from the processor 110, frequency modulate and amplify them, and convert them into RF signals for radiation via the antenna 2.

[0129] In addition, the USB interface 130 can also be connected to other hardware with wireless communication function. For example, the USB interface 130 can be connected to an external wireless network card.

[0130] In some examples, the external wireless network card may include at least an antenna 3. Inside the electronic device 100, the USB interface 130 may also be connected to the mobile communication module 140 and / or the wireless communication module 150. In this way, the RF front-end system in the mobile communication module 140 and / or the wireless communication module 150 may receive RF signals through the antenna 3, and filter, amplify, and process the received RF signals, and transmit them to the modulation and demodulation processor for demodulation. The RF front-end system may also amplify the signal modulated by the modulation and demodulation processor, and convert it into an RF signal for radiation through the antenna 3.

[0131] The internal memory 120 can be used to store computer executable program codes, which include instructions. The processor 110 executes various functional applications and data processing of the electronic device 100 by running the instructions stored in the internal memory 120. The internal memory 120 may include a program storage area and a data storage area. Among them, the program storage area may store an operating system, an application required for at least one function (such as a sound playback function, an image playback function, etc.), etc. The data storage area may store data created during the use of the electronic device 100 (such as audio data, a phone book, etc.), etc. In addition, the internal memory 120 may include a high-speed random access memory, and may also include a non-volatile memory, such as at least one disk storage device, a flash memory device, a universal flash storage (UFS), etc.

[0132] Figure 8 The schematic diagram of the structure of the radio frequency front-end system in some embodiments of the present application is shown. It should be noted that: Figure 8 The figure only shows the connection diagram between the control chip and one RF chip through the MIPI RFFE protocol bus. In fact, the control chip can be connected to multiple RF chips through the MIPI RFFE protocol bus, and the connection method and principle of each RF chip are basically the same. Figure 8 The structure of the RF chip shown in Figure 1 can help you understand the structure of each RF chip.

[0133] like Figure 8As shown, the RF front-end system 200 includes a control chip 210 and a RF chip 220. The control chip can be an RFIC or a modem. The RF chip can receive an external RF signal, and after filtering, amplifying, and denoising the signal, provide the processed signal to the control chip; or the RF chip can also receive the signal provided by the control chip, amplify, and filter it, and then transmit the RF signal to the outside.

[0134] The RF chip 220 may include a communication interface 221. The communication interface may include the above-mentioned MIPI interface. It can be understood that the RF chip 220 can communicate with the control chip 210 through the communication interface 221, thereby receiving the control instructions and data signals provided by the control chip 210; at the same time, the RF chip 220 can also provide data signals to the control chip 210 through the MIPI interface.

[0135] The RF chip 220 further includes a RF interface (denoted by RF in the figure) 222. The RF interface 222 may be coupled to the antenna 1 or the antenna 2, and is used to receive RF signals provided externally, or transmit RF signals externally.

[0136] Fig. 9 Shows Figure 8 A schematic diagram of the structure of a radio frequency chip is shown in FIG. Fig. 9 As shown, the RF chip 220 may include two power amplifiers (PA1 and PA2), a filter, a duplexer, two couplers (coupler 1 and coupler 2), and an LNA.

[0137] Among them, the power amplifier PA1, the filter, the coupler 1 and the LNA belong to the uplink and downlink of the RF signal of one frequency band (for example, the RF signal of the n41 frequency band). The power amplifier PA2, the duplexer, the coupler 2 and the LNA belong to the uplink and downlink of the RF signal of another frequency band (for example, the RF signal of the B3 frequency band). Fig. 9 As shown, the back-end circuit interface 1 and / or the back-end circuit interface 2 may be a radio frequency interface 222 of a radio frequency chip.

[0138] As described above, the high-frequency clock signal on the SCLK line in the MIPI RFFE protocol bus will reduce the sensitivity of the RF interface 222 in the RF chip 220 in receiving the RF signal. Therefore, the RF chip 220 may further include an interference suppression network 223.

[0139] The interference suppression network 223 can be connected to the SCLK line. It can be understood that the interference suppression network 223 acts on the high-frequency clock signal on the SCLK line that has not yet entered the communication interface 221. In this way, the interference suppression network 223 can prevent the high-order harmonics and / or spurious (hereinafter collectively referred to as interference signals, because the interference signal is caused by the high-frequency clock signal, the interference signal can be understood as a partial signal component in a communication signal) generated by the high-frequency clock signal on the SCLK line from entering the communication interface 221 and then spreading, so that the interference signal can be uniformly filtered out. In this way, the interference suppression network 223 can increase the isolation between the interference signal and the radio frequency signal, thereby reducing or even avoiding the problem of reducing the receiving sensitivity of the radio frequency interface signal due to the interference signal.

[0140] In some embodiments, the interference suppression network 223 may filter the interference signal by low-pass filtering to filter out the high-frequency part of the interference signal. Fig.10 FIG. 2 shows a schematic diagram of the structure of a radio frequency front-end system in some embodiments of the present application. Fig.10 As shown, in some examples, the interference suppression network 223 may include a capacitor C1. The first plate of the capacitor C1 is coupled to the SCLK line, and the second plate of the capacitor C1 is coupled to a reference terminal (represented by a triangle in the figure). The reference terminal may be a ground terminal, or may be coupled by a power line (VIO) providing a reference voltage, or may be other suitable signal terminals. The reference terminals mentioned later have the same meaning and will not be described in detail later.

[0141] Since the SCLK line itself has impedance, the capacitor C1 can form an RC low-pass filter circuit (hereinafter referred to as an RC circuit) together with the impedance on the SCLK line. In other examples, the interference suppression network 223 can also include a resistor on the basis of including the capacitor C1, so that the sum of the resistor and the impedance on the SCLK line and the filter capacitor C1 together form an RC circuit. The embodiments of the present application are not limited to this.

[0142] Among them, by adjusting the capacitance value of the capacitor C1 in the RC circuit, the cutoff frequency of the low-pass filter of the RC circuit can be appropriately adjusted, so that different RC circuits are adapted to RF chips that process RF signals of different frequencies. Similarly, when the RC circuit includes a resistor, the cutoff frequency of the low-pass filter of the RC circuit can also be adjusted by the resistance value of the resistor, so that different RC circuits are adapted to RF chips that process RF signals of different frequencies.

[0143] Exemplarily, the RF chip 220 can be used to process high-frequency RF signals. The RF chip 220 performs low-pass filtering on the interference signal through the interference suppression network 223, so that the high-frequency interference signal is filtered out, which can improve the isolation between the high-frequency interference signal and the high-frequency RF signal, and reduce or even prevent the high-frequency interference signal from leaking to the RF interface, causing the RF interface to receive low-frequency RF signals. The sensitivity problem is reduced.

[0144] Fig.10 In the embodiment shown, compared with Figure 3 For the solution shown, since the interference suppression network 223 is set inside the RF chip 220, each device in the interference suppression network 223 can be manufactured by a refined process, and the size of the RF chip 220 is hardly increased. Compared with directly adding the interference suppression network 223 on the surface of the circuit board, this can avoid increasing the number and arrangement density of devices on the surface of the circuit board, and can also avoid redesigning the layout of the circuit board, thereby improving the convenience of setting the interference suppression network 223 and reducing the production cost of the electronic device 100.

[0145] As mentioned before, the RC circuit has a suppressive effect on high-frequency signals, which will cause the amplitude of the high-frequency clock signal to decrease and the signal edge to slow down.

[0146] Therefore, in order to avoid the problem of the amplitude of the high-frequency clock signal being reduced and the signal edge being slowed down, in other embodiments, the interference suppression network 223 may filter the interference signal by band-stop filtering to filter out the interference signal in a specified frequency range. Fig.11 FIG. 2 shows a schematic diagram of the structure of a radio frequency front-end system in some embodiments of the present application. Fig.11 As shown, in some examples, the interference suppression network 223 may include a capacitor C2 (capacitor unit) and an inductor L1 (inductor unit). Since there is impedance on the SCLK line itself, the capacitor C2 and the inductor L1 can form an LC band-stop filter circuit (hereinafter referred to as an LC circuit) together with the impedance on the SCLK line. In other examples, the interference suppression network 223 may include a resistor R2 (resistance unit) on the basis of including the capacitor C2 and the inductor L1, so that the sum of the resistor R2 and the impedance on the SCLK line, together with the capacitor C2 and the inductor L1, forms an LC circuit. The embodiments of the present application are not limited to this. For the sake of ease of description, the interference suppression network 223 is described as including the capacitor C2, the inductor L1 and the resistor R2 at the same time.

[0147] Among them, by adjusting the capacitance value of the capacitor C2 in the LC circuit, the frequency range rate of the LC circuit filtering can be appropriately adjusted so that different LC circuits are adapted to process RF chips of RF signals of different frequencies. Similarly, by adjusting the inductance value of the inductor L1 in the LC circuit, the frequency range rate of the LC circuit filtering can be appropriately adjusted so that different LC circuits are adapted to process RF chips of RF signals of different frequencies. Similarly, in the case where the interference suppression network 223 includes a resistor R2, by adjusting the resistance value of the resistor R2 in the LC circuit, the frequency range rate of the LC circuit filtering can be appropriately adjusted so that different LC circuits are adapted to process RF chips of RF signals of different frequencies.

[0148] Exemplarily, the RF chip 220 can be used to process RF signals in the band 8 frequency band (the frequency range can be 880MHz-915MHz and 925MHz-950MHz). By presetting the capacitance value of the capacitor C2, the inductance value of the inductor L1, and the resistance value of the resistor R2 in the interference suppression network 223, the interference suppression network (or LC circuit) is used to filter out interference signals in the band 8 frequency band. In this way, the isolation between the interference signals in the band 8 frequency band and the interference signals in the band 8 frequency band can be improved, and the problem of reducing or even preventing the interference signals in the band 8 frequency band from leaking to the RF interface, which causes the RF interface to receive the RF signals in the band 8 frequency band with reduced sensitivity.

[0149] Fig.11 In the embodiment shown, the interference suppression network 223 is also located inside the radio frequency chip 220, so it can also avoid increasing the number of components and arrangement density on the circuit board surface, avoid redesigning the layout of the circuit board, improve the convenience of setting the interference suppression network 223, and reduce the production cost of the electronic device 100. In addition, due to Fig.11 The embodiment shown adopts a band-stop filtering method, which can avoid the influence of low-pass filtering on the waveform of the high-frequency clock signal and overcome the problem that the amplitude of the high-frequency clock signal becomes low and the signal edge becomes slow.

[0150] Since the capacitance value of capacitor C2, the inductance value of inductor L1, and the resistance value of resistor R2 in interference suppression network 223 are all fixed values, interference suppression network 223 can only filter out interference signals within a fixed frequency range. However, the interference signal generated by the high-frequency clock signal is not actually an interference signal with only one frequency band. The interference signal generated by the high-frequency clock signal can actually cover a wider frequency range and interfere with radio frequency signals of multiple frequency bands. In this way, the interference suppression network 223 may have the problem of not being able to suppress interference in all working frequency bands of the radio frequency chip 220.

[0151] Exemplarily, the operating frequency of the RF interface in the RF chip 220 includes the band 8 frequency band and the band 3 frequency band (1700MHz-1785MHz and 1805-1880MHz). The interference suppression network 223 is used to filter out interference signals of 880MHz-950MHz. In this way, when the RF chip 220 processes the signal of the band 8 frequency band, the interference suppression network 223 can improve the isolation between the interference signal of 880MHz-950MHz and the RF signal of the band 8 frequency band, and reduce or even prevent the interference signal of 880MHz-950MHz from leaking to the RF interface, causing the RF interface to receive the RF signal of the band 8 frequency band. The problem of reduced sensitivity. However, since the interference suppression network 223 cannot filter out the interference signals of 1700MHz-1880MHz, when the RF chip 220 processes the signals of band8, the interference suppression network 223 cannot improve the isolation between the interference signals of 1700MHz-1880MHZ and the RF signals of band3, resulting in the interference signals leaking to the RF interface, causing the sensitivity of the RF interface to receive the RF signals of band3 to be reduced.

[0152] In order to improve the flexibility of using the interference suppression network 223, in some embodiments of the present application, at least one of the capacitance value, inductance value and resistance value in the interference suppression network 223 can be adjusted, thereby adjusting the interference suppression network 223 to filter out the frequency range of the interference signal.

[0153] In some embodiments, the capacitance value in the interference suppression network 223 can be adjusted. Fig.12 The schematic diagram of the structure of the RF front-end system provided by some embodiments of the present application is shown. The interference suppression network 223 may include an inductor L1, a resistor R2 and an adjustable capacitor component C3. The inductance value of the inductor L1 is a fixed value, the resistance value of the resistor R2 is a fixed value, and the capacitance value of the adjustable capacitor component C3 can be adjusted.

[0154] Fig.13 Shows Fig.12 A structural schematic diagram of an adjustable capacitor component; Fig.14 Shows Fig.13 The specific structural diagram of the adjustable capacitor component is shown.

[0155] like Fig.13 As shown, the adjustable capacitance component C3 may include N capacitors (C31, C32, ..., C3N) connected in parallel with each other, wherein N may be an integer greater than or equal to 2, for example, N is 2, 3, 4, 5, 6, etc., which is not limited here.

[0156] In addition, a first switch is connected in series in the parallel path of each capacitor. It can be understood that the adjustable capacitor component C3 can also include N first switches (K11, K12, ... K1N). The first switch K11 is connected in series with the capacitor C31, the first switch K12 is connected in series with the capacitor C32, ... the first switch K1N is connected in series with the capacitor C3N.

[0157] A first switch (e.g., K11) and a capacitor (e.g., C31) connected in series form a group of capacitor subunits. In a group of capacitor subunits, the capacitor is invalid when the first switch is disconnected, and the capacitor is valid when the first switch is closed. In this way, by calculating the capacitance values ​​of N valid capacitors connected in parallel, the capacitance value of the adjustable capacitor component C3 can be obtained.

[0158] Fig.14 In the example, N is 4. In some examples, in the adjustable capacitance component C3, capacitor C31 = 1pF, capacitor C32 = 2pF, capacitor C33 = 3pF, and capacitor C34 = 4pF. In this way, by controlling the on and off of the four first switches (K11 to K14), the adjustable capacitance component C3 can be 0pF, 3pF, 4pF, 5pF, 6pF, 7pF, 8pF, 9pF, or 10pF.

[0159] For example, when the first switch K11 and the first switch K12 are both disconnected and the first switch K13 and the first switch K14 are both closed, the capacitors C33 and C34 are effective, and the capacitance value of the adjustable capacitance component C3 can be 7 pF. Alternatively, when the first switch K13 is disconnected and the first switch K11, the first switch K12, and the first switch K14 are all closed, the capacitors C31, C32, and C34 are effective, and the capacitance value of the adjustable capacitance component C3 can also be 7 pF.

[0160] In other examples, the capacitance values ​​of capacitors C31 to C34 in the adjustable capacitance component C3 can be designed in the form of a power of two. For example: capacitor C31 = 0.5pF, capacitor C32 = 1pF, capacitor C33 = 2pF, capacitor C34 = 4pF. In this way, by controlling the on and off of the four first switches (K11 to K14), the adjustable capacitance component C3 can be 0pF, 0.5pF, 1pF, 1.5pF, 2pF, 2.5pF, 3pF, 3.5pF, 4pF, 4.5pF, 5pF, 5.5pF, 6pF, 6.5pF, 7pF or 7.5pF. It can be understood that the capacitance value of the adjustable capacitance component C3 can be adjusted in the range of 0pF-7.5pF (including the boundary value) in steps of 0.5pF.

[0161] For example, when the first switch K11 and the first switch K12 are both opened and the first switch K13 and the first switch K14 are both closed, the capacitance value of the adjustable capacitor component C3 may be 6 pF. For another example, when the first switch K13 is opened and the first switch K11, the first switch K12, and the first switch K14 are all closed, the capacitance value of the adjustable capacitor component C3 may also be 7 pF.

[0162] The above is just an example of the capacitance values ​​of N capacitors (C31, C32, ... C3N) connected in parallel. In some other examples, different capacitors may have the same capacitance value. The embodiments of the present application do not limit the specific values ​​of the N capacitors.

[0163] In addition, in some other embodiments, the first switch may not be connected in series in the parallel circuits where some capacitors (C31, C32, ... or C3N) are located, thereby limiting the minimum capacitance value of the adjustable capacitor component C3. Fig.14 The first switch K11 is removed, so that the minimum capacitance value of the adjustable capacitance component C3 is the capacitance value of the capacitor C31.

[0164] Fig.15 Shows Fig.12 Another structural schematic diagram of the adjustable capacitor component; Fig.16 Shows Fig.15 The specific structural diagram of the adjustable capacitor component is shown.

[0165] like Fig.15 As shown, the adjustable capacitance component C3 may include N capacitors (C31, C32, ..., C3N) connected in series, wherein N may be an integer greater than or equal to 2, for example, N is 2, 3, 4, 5, 6, etc., which is not limited here.

[0166] In addition, the adjustable capacitor component C3 may further include N first switches (K11, K12, ... K1N). Each first switch is connected in parallel with a capacitor. It can be understood that the first switch K11 is connected in parallel with the capacitor C31, the first switch K12 is connected in parallel with the capacitor C32, ... the first switch K1N is connected in parallel with the capacitor C3N.

[0167] The specific values ​​of the N capacitors may refer to the values ​​of the N capacitors mentioned above and are not limited here.

[0168] A first switch (e.g., K11) and a capacitor (e.g., C31) connected in parallel with each other constitute a group of capacitor subunits. In a group of capacitor subunits, the capacitor is effective when the first switch is disconnected, and the capacitor is ineffective when the first switch is closed. In this way, by calculating the capacitance values ​​of the effective capacitors connected in series in the N capacitor subunits, the capacitance value of the adjustable capacitor component C3 can be obtained.

[0169] like Fig.16 As shown, taking capacitor C31=0.5pF, capacitor C32=1pF, capacitor C33=2pF, and capacitor C34=4pF as an example, when the first switch K11 and the first switch K12 are both disconnected and the first switch K13 and the first switch K14 are both closed, capacitor C33 and capacitor C34 are effective, and the capacitance value of the adjustable capacitance component C3 is 0.75pF. Alternatively, when the first switch K11 is closed and the first switch K12, the first switch K13, and the first switch K14 are all closed, capacitor C31 is effective, and the capacitance value of the adjustable capacitance component C3 is 2pF.

[0170] In other embodiments, the resistance value in the interference suppression network 223 can be adjusted. Fig.17 The schematic diagram of the structure of the RF front-end system provided by some embodiments of the present application is shown. The interference suppression network 223 may include an inductor L1, an adjustable resistance component R3 and a capacitor C2. The inductance value of the inductor L1 is a fixed value, the capacitance value of the capacitor C2 is a fixed value, and the resistance value of the adjustable resistance component R3 can be adjusted.

[0171] Fig.18 Shows Fig.17 A structural schematic diagram of an adjustable resistance component; Fig.19 Shows Fig.17 Another structural schematic diagram of the adjustable resistance component.

[0172] In some examples, such as Fig.18 As shown, the adjustable resistance component R3 may include M resistors (R31, R32, ..., R3M) connected in series, wherein M may be an integer greater than or equal to 2, for example, M is 2, 3, 4, 5, 6, etc., which is not limited here.

[0173] Taking M=5 as an example, resistor R31=20KΩ, resistor R32=30KΩ, resistor R33=50KΩ, resistor R34=75KΩ, resistor R35=80KΩ. Of course, M can also be other values, and the resistance values ​​of each resistor can also be other values, which is not limited in the embodiments of the present application.

[0174] In addition, the adjustable resistance component R3 may further include M second switches (K21, K22, ... K2M). Each second switch is connected in parallel with a resistor. It can be understood that the second switch K21 is connected in parallel with the resistor R31, the second switch K22 is connected in parallel with the resistor R32, ... the second switch K2M is connected in parallel with the resistor R3M.

[0175] A second switch (such as K21) and a resistor (such as R31) connected in parallel form a group of resistor subunits. In a group of resistor subunits, the resistor is effective when the second switch is open, and the resistor is ineffective when the second switch is closed. In this way, the resistance value of the adjustable resistor component R3 can be obtained by calculating the resistance values ​​of multiple effective resistors connected in series.

[0176] In other examples, such as Fig.19 As shown, the adjustable resistance component R3 may include M resistors (R31, R32, ..., R3M) connected in parallel, wherein M may be an integer greater than or equal to 2, for example, M is 2, 3, 4, 5, 6, etc., which is not limited here.

[0177] In addition, a second switch is connected in series in the parallel path of each resistor. It can be understood that the adjustable resistance component R3 can also include M second switches (K21, K22, ... K2M). The second switch K21 is connected in series with the resistor R31, the second switch K22 is connected in series with the resistor R32, ... the second switch K2M is connected in series with the resistor R3M.

[0178] A second switch (such as K21) and a resistor (such as R31) connected in series form a group of resistance subunits. In a group of resistance subunits, when the second switch is disconnected, the resistor is invalid, and when the second switch is closed, the resistor is valid. In this way, by calculating the resistance values ​​of multiple valid resistors connected in parallel, the resistance value of the adjustable resistance component R3 can be obtained.

[0179] In some other embodiments, the inductance value in the interference suppression network 223 can be adjusted. Fig. 20 The schematic diagram of the structure of the RF front-end system provided by some embodiments of the present application is shown. The interference suppression network 223 may include an adjustable inductor component L3, a resistor R2 and a capacitor C2. The resistance value of the resistor R2 is a fixed value, the capacitance value of the capacitor C2 is a fixed value, and the inductance value of the adjustable inductor component L3 can be adjusted.

[0180] Fig.21 Shows Fig. 20 A structural schematic diagram of an adjustable inductor component; Fig. 22 Shows Fig. 20 Another structural schematic diagram of the adjustable inductor component.

[0181] In some examples, such as Fig.21 As shown, the adjustable inductor component L3 may include H inductors (L31, L32, ..., L3H) connected in series, wherein H may be an integer greater than or equal to 2, for example, H is 2, 3, 4, 5, 6, etc., which is not limited here.

[0182] In addition, the adjustable inductor component L3 may further include H third switches (K31, K32, ... K3H). Each third switch is connected in parallel with an inductor. It can be understood that the third switch K31 is connected in parallel with the inductor L31, the third switch K32 is connected in parallel with the inductor L32, ... the third switch K3H is connected in parallel with the inductor L3H.

[0183] Fig. 22 The working mode and principle of adjusting the inductance value of the adjustable inductor component L3 by adjusting the H third switches can be referred to above. Fig.18 The working mode and principle of adjusting the resistance value of the adjustable resistance component R3 by adjusting the M second switches will not be described in detail here.

[0184] In other examples, such as Fig. 22 As shown, the adjustable inductor component L3 may include H inductors (L31, L32, ..., L3H) connected in parallel, wherein H may be an integer greater than or equal to 2, for example, H is 2, 3, 4, 5, 6, etc., which is not limited here.

[0185] In addition, a third switch is connected in series in the parallel path of each inductor. It can be understood that the adjustable inductor component L3 can also include H third switches (K31, K32, ... K3H). The third switch K31 is connected in series with the inductor L31, the third switch K32 is connected in series with the inductor L32, ... the third switch K3H is connected in series with the inductor L3H.

[0186] Fig. 22 The working mode and principle of adjusting the inductance value of the adjustable inductor component L3 by adjusting the H third switches can be referred to above. Fig.19 The working mode and principle of adjusting the resistance value of the adjustable resistance component R3 by adjusting the M second switches will not be described in detail here.

[0187] It should be noted that the first switch, the second switch and the third switch may be thin film transistors (TFT), metal-oxide-semiconductor field-effect transistors (MOS transistors) or other suitable switch devices, which are not limited here.

[0188] In some other embodiments of the present application, the inductance value and the resistance value in the interference suppression network 223 can be adjusted, or the inductance value and the capacitance value in the interference suppression network 223 can be adjusted, or the resistance value and the capacitance value in the interference suppression network 223 can be adjusted, or the capacitance value, the inductance value and the resistance value in the interference suppression network 223 can be adjusted. The embodiments of the present application are not limited. For ease of understanding, the capacitance value in the interference suppression network 223 can be adjusted, and the adjustable capacitor component C3 is as follows: Fig.12 Take this as an example to illustrate.

[0189] Fig.23 A schematic structural diagram of a radio frequency front-end system in some embodiments of the present application is shown.

[0190] The RF chip 220 may further include a controller 224. The controller 224 may be coupled to the RF interface 222 and the interference suppression network 223, respectively. Exemplarily, the controller 224 may be coupled to the adjustable capacitor component C3 in the interference suppression network 223, and is used to control the N first switches (K11, K12, ... K1N) in the adjustable capacitor component C3 to be opened or closed.

[0191] The controller 224 can obtain the working signal of which frequency band the control chip 210 controls the RF chip 220 to process by coupling with the RF interface 222. In this way, the controller 224 can control the N first switches in the adjustable capacitor component C3 to be opened or closed respectively, so that the interference suppression network 223 can filter out the interference signal that coincides with the frequency range of the current working signal, improve the isolation between the working signal and the interference signal, thereby reducing or even preventing the interference signal from leaking to the RF interface, causing the RF interface to reduce the sensitivity of receiving the RF signal.

[0192] Exemplarily, when the controller 224 is pre-configured with different signal frequency bands, different control instructions are used to control the mapping relationship of the N first switches. Taking N=4 as an example, the mapping relationship includes: when the signal frequency band is the band8 frequency band, it corresponds to the first control instruction, and the first control instruction is used to control the first switch K11 and the first switch K12 to be disconnected and the first switch K13 and the first switch K14 to be closed; and when the signal frequency band is the band3 frequency band, it corresponds to the second control instruction, and the second control instruction is used to control the first switch K11 to be disconnected and the first switch K12, the first switch K13 and the first switch K14 to be closed.

[0193] In this way, after the controller 224 obtains the frequency band range of the working signal processed by the RF chip 220 from the RF interface 222, the corresponding control instruction can be determined based on the above mapping relationship. The controller sends the control signal to the adjustable capacitor component C3 to control the N first switches to perform the opening or closing action respectively, so that the interference suppression network 223 can filter out the interference signal that coincides with the frequency range of the current working signal, and improve the isolation between the working signal and the interference signal, thereby reducing or even preventing the interference signal from leaking to the RF interface, causing the RF interface to reduce the sensitivity of receiving the RF signal.

[0194] Afterwards, when the control chip 210 controls the RF chip 220 to replace the working signal processed in other frequency bands, the controller 224 obtains the new frequency band range of the working signal processed by the RF chip 220 from the RF interface 222, and the corresponding new control instruction can be determined based on the above mapping relationship. The controller sends the new control signal to the adjustable capacitor component C3 to control the N first switches to perform the opening or closing action respectively, so that the interference suppression network 223 can filter out the interference signal that overlaps with the frequency range of the replaced working signal, and improve the isolation between the replaced working signal and the interference signal, thereby reducing or even preventing the interference signal from leaking to the RF interface, causing the RF interface to receive the replaced working signal (RF signal) with reduced sensitivity.

[0195] It can be understood that the controller can adjust the control instruction sent to the adjustable capacitor component C3 accordingly when the working signal processed by the RF chip changes, so that the frequency of the interference signal that can be filtered out by the interference suppression network 223 is also adjusted accordingly. In this way, no matter what kind of working signal is processed in the RF chip, it can maintain a high degree of isolation from the interference signal, thereby reducing or even preventing the interference signal from leaking to the RF interface, causing the RF interface to reduce the sensitivity of receiving the working signal (RF signal).

[0196] Exemplarily, when the control chip 210 controls the RF chip 220 to process the working signal of the band 8 frequency band, the controller 224 can send a first control instruction to the adjustable capacitor component C3 to control the N first switches to perform the action of opening or closing respectively, so that the interference suppression network 223 is used to filter out the interference signal of 880MHz-950MHz. In this way, the isolation between the interference signal of 880MHz-950MHz and the RF signal of the band 8 frequency band can be improved, and the problem of reducing the sensitivity of the RF interface to receive the RF signal of the band 8 frequency band caused by the leakage of the interference signal of 880MHz-950MHz to the RF interface or even preventing the interference signal of 880MHz-950MHz from leaking to the RF interface can be alleviated or even prevented. When the control chip 210 controls the RF chip 220 to process the working signal of the band 3 frequency band, the controller 224 can send a second control instruction to the adjustable capacitor component C3 to control the N first switches to perform the action of opening or closing respectively, so that the interference suppression network 223 is used to filter out the interference signal of 1700MHz-1880MHz. In this way, the isolation between the interference signal of 1700MHz-880MHz and the RF signal of band3 can be improved, reducing or even preventing the interference signal of 1700MHz-880MHz from leaking to the RF interface and causing the RF interface to reduce the sensitivity of receiving the RF signal of band3.

[0197] It should be noted that the embodiments of the present application do not limit the specific form of how the controller 224 controls the N first switches in the adjustable capacitor component C3. In some examples, the controller 224 may have N pins, which are respectively coupled to the control ends of the N first switches to control each first switch to be opened or closed. In other examples, the controller 224 may output a control instruction consisting of N binary digits, each of which is used to control a first switch to be opened or closed. Among them, the binary digit "1" is used to indicate that the first switch is opened, and the binary digit "0" is used to indicate that the first switch is closed. In addition, the controller may also use other methods to control the N first switches in the adjustable capacitor component C3 to be opened or closed respectively.

[0198] Fig.23 The controller 224 controls the N first switches in the adjustable capacitor component C3 to adjust the frequency range of the working signal used to be filtered out by the interference suppression network 223. In some other embodiments, the controller 224 also controls the M second switches in the adjustable resistor component R3 to adjust the frequency range of the working signal used to be filtered out by the interference suppression network 223. Alternatively, the controller 224 also controls the H third switches in the adjustable inductor component H3 to adjust the frequency range of the working signal used to be filtered out by the interference suppression network 223. Fig.23 The embodiments shown are basically the same and will not be described in detail here.

[0199] In this way, the controller can adjust the frequency of the interference signal that can be filtered out by the interference suppression network 223 by controlling the opening or closing of the connected switches (the first switch, the second switch and the third switch), so that the same interference suppression network can take into account multiple RF frequency bands and suppress the interference of interference signals to multiple RF signals.

[0200] Fig.24 A schematic structural diagram of a radio frequency front-end system in some other embodiments of the present application is shown.

[0201] like Fig.24 As shown, in this embodiment, the controller 224 can be used as a part of the communication interface 221 and integrated inside the communication interface 221. Fig.24 The function of the controller 224 is Fig.23 The functions of the middle controller 224 are basically the same and will not be described in detail here.

[0202] By integrating the controller 224 into the communication interface 221, it can be manufactured by a refined process, and the size of the communication interface 221 is hardly increased. Compared with directly adding a controller inside the RF chip, this can avoid increasing the number of components and arrangement density of the RF chip.

[0203] Fig.25 The frequency domain signal amplitude diagram and the waveform diagram of the high-frequency clock signal corresponding to the interference suppression network under the first control instruction in some embodiments of the present application are shown; Fig.26 The diagram shows a frequency domain signal amplitude diagram and a waveform diagram of a high-frequency clock signal corresponding to an interference suppression network under a second control instruction in some embodiments of the present application.

[0204] Figure 4 This is the frequency domain signal amplitude diagram without the interference suppression network in the RF front-end system. Fig.25 The interference suppression network is set in the RF front-end system of this application to filter out the frequency domain signal amplitude diagram of the 936MHz interference signal. By comparison, it can be found that Fig.25 The amplitude of the 936MHz frequency is significantly reduced, which increases the isolation of the high-frequency clock signal 936MHz frequency signal from 84.424dB to 102.155dB. Figure 4 This is the frequency domain signal amplitude diagram without the interference suppression network in the RF front-end system. Fig.26 The interference suppression network is set in the RF front-end system of this application to filter out the frequency domain signal amplitude diagram of the 1820MHz interference signal. By comparison, it can be found that Fig.26 The amplitude of the 1820MHz frequency is significantly reduced, which increases the isolation of the high-frequency clock signal 1820MHz frequency signal from 101.627dB to 126.595dB.

[0205] from Fig. 27 It also shows Figure 1 The waveform diagram of the high-frequency clock signal in Fig.12 Waveform diagram of medium and high frequency clock signals. Fig. 27 It can be seen from the figure (the bold dotted line represents the waveform of the high-frequency clock signal when the suppression network is not set in the RF front-end system, and the solid line represents the waveform of the high-frequency clock signal when the interference suppression network is set in the RF front-end system of the present application) that the amplitude and edge slope of the high-frequency clock signal when the RF front-end system of the present application is provided with an interference suppression network are no different from the amplitude and edge slope of the high-frequency clock signal when the RF front-end system is not provided with an interference suppression network. This shows that the use of band-stop filtering by the interference suppression network in the embodiment of the present application will not affect the high-frequency clock signal, and the probability that the high-frequency clock signal meets the MIPPI RFFE protocol conditions will not cause signal abnormality problems, which can improve the reliability of the RF front-end system.

[0206] An embodiment of the present application also provides a computer-readable storage medium, which includes computer instructions. When the computer instructions are executed on the above-mentioned controller, the controller executes each function or step of the controller in the above-mentioned embodiment.

[0207] The embodiment of the present application also provides a computer program product. When the computer program product is run on a computer, the computer is enabled to execute each function or step executed by the controller in the above method embodiment.

[0208] Through the description of the above implementation methods, technical personnel in the relevant field can clearly understand that for the convenience and simplicity of description, only the division of the above-mentioned functional modules is used as an example. In actual applications, the above-mentioned functions can be assigned to different functional modules as needed, that is, the internal structure of the device can be divided into different functional modules to complete all or part of the functions described above.

[0209] In the several embodiments provided in the present application, it should be understood that the disclosed devices and methods can be implemented in other ways. For example, the device embodiments described above are only schematic. For example, the division of the modules or units is only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another device, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0210] The units described as separate components may or may not be physically separated, and the components shown as units may be one physical unit or multiple physical units, that is, they may be located in one place or distributed in multiple different places. Some or all of the units may be selected according to actual needs to achieve the purpose of the present embodiment.

[0211] In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above-mentioned integrated unit may be implemented in the form of hardware or in the form of software functional units.

[0212] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a readable storage medium. Based on this understanding, the technical solution of the embodiment of the present application is essentially or the part that contributes to the prior art or all or part of the technical solution can be embodied in the form of a software product, which is stored in a storage medium, including several instructions to enable a device (which can be a single-chip microcomputer, chip, etc.) or a processor (processor) to execute all or part of the steps of the method described in each embodiment of the present application. The aforementioned storage medium includes: U disk, mobile hard disk, read only memory (ROM), random access memory (RAM), disk or optical disk and other media that can store program code.

[0213] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any changes or substitutions within the technical scope disclosed in the present application should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims

1. A radio frequency chip, characterized in that: include: A radio frequency interface, used for receiving radio frequency signals; A communication interface, used to couple with the control chip to receive a communication signal, wherein a frequency range of the communication signal at least partially overlaps with a frequency range of the radio frequency signal; An interference suppression network is coupled to the communication interface; the interference suppression network is used to filter interference signals of different frequencies at different times to improve the isolation between the communication signal and the radio frequency signal; wherein, at one moment, the frequency range of the interference signal filtered by the interference suppression network at least partially overlaps with the frequency range of the radio frequency signal received by the radio frequency interface.

2. The radio frequency chip according to claim 1, characterized in that: The interference suppression network comprises: A capacitor unit, a first end of which is coupled to the communication interface; An inductor unit, wherein a first end of the inductor unit is coupled to a second end of the capacitor unit, and a second end of the inductor unit is coupled to a reference end.

3. The radio frequency chip according to claim 2, characterized in that: The capacitor unit comprises: N capacitors connected in parallel, the first plate of each capacitor being coupled to the control chip, and the second plate of each capacitor being coupled to the first end of the inductor unit; N is an integer greater than 1; N first switches, each of which is connected in series with one of the capacitors, and different first switches are connected in series with different capacitors; The radio frequency chip further includes a controller, and the controller is coupled to the N first switches respectively to control each of the first switches to be opened or closed respectively.

4. The radio frequency chip according to claim 2, characterized in that: The inductor unit comprises: H inductors connected in series; H third switches, each of the third switches is connected in parallel with one of the inductors, and different third switches are connected in parallel with different inductors; The radio frequency chip further includes a controller, and the controller is coupled to the H third switches respectively to control each of the third switches to be opened or closed respectively.

5. The radio frequency chip according to any one of claims 2 to 4, characterized in that: The interference suppression network also includes: A resistor unit, wherein a first end of the resistor unit is used to be coupled to the control chip, and a second end of the resistor unit is coupled to the communication interface.

6. The radio frequency chip according to claim 5, characterized in that: The resistance unit comprises: M resistors connected in series; M second switches, each of the second switches is connected in parallel with one of the resistors, and different second switches are connected in parallel with different resistors; The radio frequency chip further includes a controller, which is coupled to the M second switches respectively to control each of the second switches to be opened or closed respectively.

7. The radio frequency chip according to claim 3, 4 or 6, characterized in that: The communication interface includes the controller.

8. A radio frequency front-end system, characterized in that: include: Control chip; A plurality of radio frequency chips, each of which is coupled to the control chip; at least one of the plurality of radio frequency chips is the radio frequency chip as described in any one of claims 1-7.

9. An electronic device, characterized in that: include: Circuit boards; A radio frequency front-end system, wherein the radio frequency front-end system is the radio frequency front-end system according to claim 8; wherein the control chip is located on the circuit board; The antenna is coupled to the radio frequency port of the radio frequency chip.

10. A working method of a radio frequency chip, characterized in that: Applied to a radio frequency chip according to any one of claims 1 to 7; the method comprising: The interference suppression network is used to filter the communication signal to suppress at least part of the signal components in the communication signal, and the frequency range of at least part of the signal components at least partially overlaps with the frequency range of the radio frequency signal.

11. The method according to claim 10, characterized in that The radio frequency chip includes a controller and N first switches; the method further includes: The controller controls at least one first switch to be closed and the other first switches to be opened based on the radio frequency signal received by the radio frequency interface; the at least one first switch corresponds to the frequency of the radio frequency signal; Alternatively, the radio frequency chip includes a controller and M second switches; and the method further includes: The controller controls at least one second switch to be closed and the other second switches to be opened based on the radio frequency signal received by the radio frequency interface; the at least one second switch corresponds to the frequency of the radio frequency signal; Alternatively, the radio frequency chip includes a controller and H third switches; and the method further includes: The controller controls at least one third switch to be closed and the other third switches to be opened based on the radio frequency signal received by the radio frequency interface; the at least one third switch corresponds to the frequency of the radio frequency signal.

12. An electronic device, characterized in that: It comprises a memory and one or more processors; the memory is coupled to the processor; the memory stores computer program code, the computer program code comprises computer instructions, and when the computer instructions are executed by the processor, the electronic device executes the method as claimed in claim 10 or 11.

13. A computer-readable storage medium, characterized in that: The method comprises computer instructions, which, when executed on an electronic device, cause the electronic device to execute the method according to claim 10 or 11.

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