A power module

By integrating a three-in-one half-bridge structure into the power module and using conductive buffer blocks to conduct current between the chip and the metal layer, the problems of complex processes and non-compact structures in the existing technology are solved, realizing a compact full-bridge design and improving heat dissipation and reliability.

CN118588696BActive Publication Date: 2026-03-24BYD CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2023-03-03
Publication Date
2026-03-24

AI Technical Summary

Technical Problem

In existing technologies, achieving full-bridge functionality requires assembling multiple power modules, resulting in complex processes, non-compact product structures, and large space requirements.

Method used

It adopts a six-in-one power module design, which sets three half-bridge structures between two substrates and uses conductive buffer blocks to conduct current between the chip and the metal layer, replacing the traditional chip lead bonding, forming a compact full-bridge structure, integrating three upper bridge arms and three lower bridge arms into one unit, and adopting double-sided packaging.

Benefits of technology

It achieves small size and compact structure, reduces stray inductance, improves heat dissipation and reliability, and simplifies the process flow.

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Abstract

The application discloses a power module. The power module comprises a first substrate and a second substrate arranged at intervals, and three half-bridge structures arranged between the first substrate and the second substrate. The half-bridge structure comprises three first metal layers arranged at intervals and electrically isolated from each other on the first substrate, three second metal layers arranged at intervals and electrically isolated from each other on the second substrate, a first chip arranged on the first metal layer, a second chip arranged on the second metal layer, a first conductive buffer and a second conductive buffer. The drain of the first chip is in conduction with the first metal layer. The drain of the second chip is in conduction with the second metal layer. The first conductive buffer is arranged on the first chip and connected with the second metal layer. The second conductive buffer is arranged on the second chip and connected with the first metal layer. The three half-bridge structures form a full-bridge structure. The power module is small in size and compact in structure, the current conduction distance is shortened, and the stray inductance is reduced.
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Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of electronic devices, in particular to a power module. BACKGROUND

[0002] In the prior art, a chip is often arranged on a substrate to form a bridge arm, and if a full-bridge function is to be achieved, multiple power modules need to be assembled. This results in a complex process and an insufficiently compact product structure, which occupies a large space in applications. SUMMARY

[0003] A series of simplified concepts are introduced in the summary section, which will be further described in detail in the detailed description section. The summary section of the present application does not mean to attempt to limit the key features and essential technical features of the claimed technical solutions, nor to determine the protection scope of the claimed technical solutions.

[0004] To at least partially solve the above problems, the present application provides a power module, which comprises a first substrate;

[0005] A second substrate is arranged in a stacked and spaced manner with the first substrate;

[0006] Three half-bridge structures are arranged between the first substrate and the second substrate, and each half-bridge structure comprises:

[0007] A first metal layer is arranged on the first substrate,

[0008] A second metal layer is arranged on the second substrate, and the second metal layer is arranged opposite to the first metal layer,

[0009] A first chip is arranged on the first metal layer, and the first chip is in conduction with the first metal layer,

[0010] A second chip is arranged on the second metal layer, and the second chip is in conduction with the second metal layer,

[0011] A first conductive buffer is arranged on the first chip and connected with the second metal layer, and

[0012] A second conductive buffer is arranged on the second chip and connected with the first metal layer.

[0013] Among them, the three first metal layers are arranged in an electrically isolated manner on the first substrate, the three second metal layers are arranged in an electrically isolated manner on the second substrate, and the three half-bridge structures form a full-bridge structure.

[0014] The power module according to the application is a six-in-one power module, that is, three upper bridge arms and three lower bridge arms are integrated, or three half-bridge structures are integrated, double-sided packaging is adopted, and conductive buffer blocks are used for current conduction between chips and metal layers, instead of the chip wire bonding form in the traditional scheme, so that the volume is small, the structure is compact, the current conduction distance is shortened, the stray inductance is reduced, heat dissipation is improved, and the reliability is high.

[0015] Optionally, the drain of the first chip is electrically connected with the first metal layer, and the drain of the second chip is electrically connected with the second metal layer.

[0016] Optionally, the half-bridge structure further comprises a high-voltage alternating current terminal, the high-voltage alternating current terminal is arranged on the second metal layer and is in conduction with the second metal layer.

[0017] Optionally, the half-bridge structure further comprises a high-voltage direct current terminal, the high-voltage direct current terminal is arranged on the first metal layer and is in conduction with the first metal layer, the high-voltage direct current terminal comprises a positive terminal and a negative terminal, and the positive terminal and the negative terminal are arranged in a stack.

[0018] Optionally, the first chip and the second chip are arranged staggered in the stacking direction of the first substrate and the second substrate.

[0019] Optionally, the side of the first substrate opposite to the first metal layer is provided with a first heat dissipation bottom plate.

[0020] The side of the second substrate opposite to the second metal layer is provided with a second heat dissipation bottom plate.

[0021] Optionally, the power module further comprises a plastic package shell, the first substrate, the second substrate and the three half-bridge structures are accommodated in an accommodation space inside the plastic package shell, and the first heat dissipation bottom plate and the second heat dissipation bottom plate comprise heat dissipation pins or heat dissipation fins, and the heat dissipation pins or the heat dissipation fins protrude from the plastic package shell.

[0022] Optionally, the first substrate is provided with a first wire linking area, the number of the first chips is at least two, and at least two of the first chips are arranged symmetrically relative to the first wire linking area.

[0023] The second substrate is provided with a second wire linking area, the number of the second chips is at least two, and at least two of the second chips are arranged symmetrically relative to the second wire linking area.

[0024] Optionally, the power module further comprises a liquid cooling assembly, and the liquid cooling assembly comprises:

[0025] a liquid inlet part located at one end of the power module;

[0026] a liquid outlet part located at the other end of the power module;

[0027] a first flow channel part connected between the liquid inlet part and the liquid outlet part, the first flow channel part being provided on the first substrate, a first liquid flow channel being formed between the first flow channel part and the first substrate, and the first heat dissipation base plate being located in the first liquid flow channel;

[0028] a second flow channel part provided on the second substrate, a second liquid flow channel being formed between the second flow channel part and the second substrate, and the second heat dissipation base plate being located in the second liquid flow channel.

[0029] Optionally, the first flow channel part is sealingly connected with the edge of the first heat dissipation base plate, and the second flow channel part is sealingly connected with the edge of the second heat dissipation base plate; or

[0030] the first flow channel part and the first heat dissipation base plate are configured as an integral member, and the second flow channel part and the second heat dissipation base plate are configured as an integral member.

[0031] Optionally, the liquid inlet part is provided with a first passage and a second passage, wherein the first passage is in communication with the first liquid flow channel, and the second passage is in communication with the second liquid flow channel;

[0032] the liquid outlet part is provided with a third passage and a fourth passage, wherein the third passage is in communication with the first liquid flow channel, and the fourth passage is in communication with the second liquid flow channel.

[0033] Optionally, the second passage is in communication with the third passage;

[0034] The liquid cooling assembly further comprises an end cover plate provided at the end of the liquid outlet part to close the fourth passage and the third passage. BRIEF DESCRIPTION OF DRAWINGS

[0035] The following drawings for the present application are hereby incorporated into this application as part of the present application for understanding the present application. The embodiments of the present application and the description thereof shown in the drawings are used to explain the principles of the present application.

[0036] In the drawings:

[0037] Figure 1 is a schematic view of the perspective structure of the power module according to an embodiment of the present application;

[0038] Figure 2 is a schematic view of the side view of the power module according to an embodiment of the present application;

[0039] Figure 3 A cross-sectional view of a power module according to an embodiment of the present application;

[0040] Figure 4 A schematic view of a connection structure of the first chip and the first conductive buffer, or a connection schematic view of the second chip and the second conductive buffer;

[0041] Figure 5 A schematic view of a composition of the first metal layer on the first substrate, the first chip, the first control terminal and the high-voltage DC terminal;

[0042] Figure 6 A schematic view of a composition of the second metal layer on the second substrate, the second chip and the high-voltage AC terminal;

[0043] Figure 7 A side view schematic view of a connection structure of the second metal layer on the second substrate and the second chip;

[0044] Figure 8 A side view schematic view of a connection structure of the first metal layer on the first substrate and the first chip;

[0045] Figure 9 A schematic view of a structure in which the second conductive buffer is added; Figure 7 A schematic view of a structure in which the first conductive buffer is added;

[0046] Figure 10 A schematic view of a structure in which the second conductive buffer is added; Figure 8 A schematic view of a structure in which the first conductive buffer is added;

[0047] Figure 11 A schematic view of a structure in which a lead wire from the gate and the source of the second chip to the second metal layer is added; Figure 9 A schematic view of a structure in which a lead wire from the gate and the source of the first chip to the first metal layer is added;

[0048] Figure 12 A schematic view of a structure in which a lead wire from the gate and the source of the first chip to the first metal layer is added; Figure 10 A schematic view of a structure in which a lead wire from the gate and the source of the first chip to the first metal layer is added;

[0049] Figure 13 A schematic view of a structure in which a lead wire from the gate and the source of the first chip to the first metal layer is added; Figure 11 A schematic view of a structure in which a lead wire from the gate and the source of the first chip to the first metal layer is added;

[0050] Figure 14 A schematic view of a structure in which a lead wire from the gate and the source of the first chip to the first metal layer is added; Figure 12 A schematic view of a structure in which a lead wire from the gate and the source of the first chip to the first metal layer is added;

[0051] Figure 15 A schematic view of a structure in which a lead wire from the gate and the source of the first chip to the first metal layer is added; Figure 13 A schematic view of a structure in which a lead wire from the gate and the source of the first chip to the first metal layer is added;

[0052] Figure 16 A schematic view of a structure in which a lead wire from the gate and the source of the first chip to the first metal layer is added; Figure 14 A schematic view of a structure in which a lead wire from the gate and the source of the first chip to the first metal layer is added;

[0053] Figure 17 To assemble the structures in Figure 15 the structures in Figure 16 Fig. 4 shows a schematic view of the interface assembly of the structures in

[0054] Figure 18 Fig. 5 shows a cross-sectional front view of a power module according to an embodiment of the present application, wherein a liquid cooling assembly is shown;

[0055] Figure 19 Fig. 6 shows a schematic view of a cross-section of a power module according to another embodiment of the present application, wherein a liquid cooling assembly is shown; and

[0056] Figure 20 Fig. 7 shows a schematic view of the structure of a first metal layer, a first chip, a first control terminal and a high voltage DC terminal on a first substrate according to another embodiment of the present application. DETAILED DESCRIPTION

[0057] In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present application. However, it will be apparent to one skilled in the art that the present application can be practiced without one or more of these specific details. In other instances, well-known features have not been described in detail to avoid obscuring aspects of the present application.

[0058] It is to be noted that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of example embodiments according to the present application. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and / or "comprising," when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof.

[0059] Numerical ordinals such as "first" and "second" as used in this application merely identify the ordinals and do not imply any specific order or order of precedence. Also, the use of terms such as "first" and "second" do not imply the existence of a "second" and "first" respectively, nor imply that there be two of such terms. It is to be noted that the terms "upper", "lower", "front", "rear", "left", "right", "inner", "outer", and similar terms are used for explanation only and not to limit.

[0060] Example embodiments according to the present application will now be described in more detail with reference to the drawings.

[0061] Reference is made to Figures 1-6In one aspect, the present application provides a power module 100, which comprises a first substrate 122, a second substrate 139 and three half-bridge structures. The second substrate 139 is spaced apart from the first substrate 122. The three half-bridge structures are arranged between the first substrate 122 and the second substrate 139. Each half-bridge structure comprises a first metal layer 111, a second metal layer 131, a first chip set, a second chip set, a first conductive buffer 113 and a second conductive buffer 133. The first metal layer 111 is arranged on the first substrate 122. The second metal layer 131 is arranged on the second substrate 139 and is arranged opposite to the first metal layer 111. The first chip set is arranged on the first metal layer 111, and a drain of a first chip 112 in the first chip set is in conduction with the first metal layer 111. The second chip set is arranged on the second metal layer 131, and a drain of a second chip 132 in the second chip set is in conduction with the second metal layer 131. The first conductive buffer 113 is arranged on the first chip 112 and connected with the second metal layer 131. The second conductive buffer 133 is arranged on the second chip 132 and connected with the first metal layer 111. The three first metal layers 111 are arranged in electrical isolation from each other on the first substrate 122. The three second metal layers 131 are arranged in electrical isolation from each other on the second substrate 139. The three half-bridge structures form a full-bridge structure.

[0062] The drain of the first chip 112 and the drain of the second chip 132 are not in the same direction, which is more conducive to heat dissipation. The first chip 112 can be an upper bridge chip, and the second chip 132 can be a lower bridge chip.

[0063] For example, the drain of the first chip 112 is electrically connected with the first metal layer 111, and the drain of the second chip 132 is electrically connected with the second metal layer 111. In this way, the drains of the first chip 112 and the second chip 132 are respectively directed towards the first substrate 122 and the second substrate 139, thereby improving the heat dissipation effect.

[0064] The power module of the present application is a six-in-one power module, i.e., three upper bridge arms and three lower bridge arms are integrated, or in other words, three half-bridge structures are integrated, which adopts double-sided packaging and utilizes conductive buffer blocks to conduct current between the chips and the metal layers, instead of the traditional chip wire bonding form, thereby being small in size, compact in structure, shortening the current conduction distance, reducing the stray inductance, improving the heat dissipation, and being high in reliability.

[0065] It should be noted that the power module can be placed horizontally, upside down or in any direction to adapt to the needs of the working scene during work.

[0066] For example, Figures 1 to 10As shown, the first metal layer 111 and the third metal layer 115 are arranged on both sides of the first substrate 122, in other words, the side of the first substrate 122 opposite to the first metal layer 111 is provided with the third metal layer 115. The second metal layer 131 and the fourth metal layer 135 are arranged on both sides of the second substrate 139, in other words, the side of the second substrate 139 opposite to the second metal layer 131 is provided with the fourth metal layer 135. The second substrate 139 is arranged above the first substrate 122 in a stacked and spaced manner. The aforementioned metal layer can be copper, because copper has good heat dissipation performance and high electrical conductivity. The thickness of the metal layer and the substrate can be flexibly selected according to the use requirements and actual production conditions. The first metal layer 111 has at least one edge round corner, which can reduce the current loss caused by the path, increase the current carrying capacity, and the number of edge round corners can be flexibly selected according to the actual working condition. The first substrate 122 and the second substrate 139 are ceramic materials, such as silicon nitride, aluminum oxide, aluminum nitride and the like. Considering the thermal expansion coefficient and thermal conductivity, silicon nitride can be selected. Three first metal layers 111 are arranged on the first substrate 122 in a spaced manner, thereby being electrically isolated from each other on the first substrate 122. Three second metal layers 131 are arranged on the second substrate 139 in a spaced manner, thereby being electrically isolated from each other on the second substrate 139. The first chip set is arranged on the first metal layer 111, and the drain of the first chip 112 in the first chip set is in conduction with the first metal layer 111. The second chip set is arranged on the second metal layer 131, and the drain of the second chip 132 in the second chip set is in conduction with the second metal layer 131. The first conductive buffer 113 is arranged on the first chip 112 and connected with the second metal layer 131. The second conductive buffer 133 is arranged on the second chip 132 and connected with the first metal layer 111. The first chip 112 is electrically connected to the first metal layer 111, the lower end of the first conductive buffer 113 is electrically connected to the first chip 112, and the upper end of the first conductive buffer 113 is electrically connected to the second metal layer 131, for example, the electrical connection can be realized by welding. The first metal layer 111 and the second metal layer 131 are processed into electrical circuits through etching and the like, which can connect the drain, source and gate of the chip and realize the electrical circuit connection of the chip. The first substrate 122 and the second substrate 139 have good insulation performance, which can not only realize the electrical isolation of the first metal layer 111 and the third metal layer 115, and the electrical isolation of the second metal layer 131 and the fourth metal layer 135, but also serve as the substrate of the first chip 112 and the second chip 132, thereby reducing the thermal deformation of the chip and the metal layer.

[0067] The first chip 112 and the second chip 132 can be silicon carbide-based field effect transistors, silicon-based insulated gate bipolar transistors (IGBT) and diodes, etc., for example, silicon carbide chips are selected. The first chip 112 is provided with a metal plating layer on the surface facing the first metal layer 111, the surface facing the first conductive buffer 113 and the surface for wire bonding, and the second chip 132 is provided with a metal plating layer on the surface facing the second metal layer 131, the surface facing the second conductive buffer 133 and the surface for wire bonding. The purpose of the metal plating layer is to better fuse with the solder, thereby realizing welding between different components. The material and thickness of the metal plating layer are not limited and can be flexibly selected according to the use requirements and actual production conditions.

[0068] In actual production, the first metal layer 111, the first substrate 122 and the third metal layer 115 can be integrally provided, and a copper-clad ceramic plate DBC and an AMB plate are selected, and further, the AMB plate can be selected. The second metal layer 131, the second substrate 139 and the fourth metal layer 135 can be integrally provided, and a copper-clad ceramic plate DBC and an AMB plate are selected, and further, the AMB plate can be selected. From this point of view, the two AMB plates are oppositely arranged, the first chip 112 is connected with the AMB plate above through the first conductive buffer 113 to realize electrical communication, and the second chip 132 is connected with the AMB plate below through the second conductive buffer 133 to realize electrical communication.

[0069] The first chip 112 and the second chip 132 are arranged staggered in the stacking direction of the first substrate 122 and the second substrate 139, which can increase the heat dissipation of the power module 100. The first substrate 122 is provided with a first chip 112 gate resistor and a first control line linking area, the first chip group includes at least two first chips 112, and the at least two first chips are symmetrically arranged relative to the first control line linking area; the second substrate 139 is provided with a second chip 132 gate resistor and a second lead linking area 137, and the second chip group includes at least two second chips 132, and the at least two second chips are symmetrically arranged relative to the second lead linking area 137. The symmetric arrangement of the first chip 112 / second chip 132 can realize uniform overcurrent and balanced heat dissipation of the chips. Optionally, the first chip group includes six first chips 112, and the six first chips 112 are arranged in a 2*3 array relative to the first control line linking area, that is, there are three first chips 112 arranged at intervals on both sides of the first control line linking area. The second chip group includes six second chips 132, and the six second chips 132 are arranged in a 2*3 array relative to the second lead linking area 137, that is, there are three first chips 112 arranged at intervals on both sides of the second lead linking area 137.

[0070] The half-bridge structure also includes control terminals configured to couple control signals and / or sampling signals. The control terminals include a first control terminal 121 and a second control terminal 141.

[0071] like Figures 11-17 As shown, the gate or source of the first chip 112 is electrically connected to the first metal layer 111 by wire bonding, that is, a first lead 123 is drawn from the gate or source of the first chip 112 to the first metal layer 111. The gate or source of the second chip 132 is electrically connected to the second metal layer 131 by wire bonding, that is, a second lead 138 is drawn from the gate or source of the second chip 132 to the second metal layer 131. This enables chip control and / or voltage sampling. The equal gate sampling spacing and equal source sampling spacing effectively reduce the routing path, shorten the wire length, and reduce parasitic inductance and capacitance during module operation. The wire connection surfaces of the gate and source of the first chip 112 are located on the first metal layer 111. Figure 5 The two leftmost first control terminals 121 are led out for control and / or sampling. The gate and source lead connection surfaces of the second chip 132 are disposed on the second metal layer 131 and can be led out by the second control terminal 141 for control and / or sampling. The height of the lead cannot be higher than the first conductive buffer 113 and the second conductive buffer 133. To reduce the lead height, a jumper structure is designed on the left side of the chip gate connection area, which can serve as an intermediate connection structure for the lead, dividing one lead into two, which can effectively reduce the lead height and thus reduce the impact on the height of the first conductive buffer 113 and the second conductive buffer 133. The first lead 123 and the second lead 138 must not have any cross interference to avoid short circuits and other situations.

[0072] like Figure 3 and Figure 4As shown, the first chip 112 is provided with a first connecting layer 124 between the first chip 112 and the first metal layer 111, in other words, the first chip 112 is connected with the first metal layer 111 through the first connecting layer 124, for example, a solder layer. Similarly, the first conductive buffer 113 is connected with the first chip 112 through a third connecting layer 125, for example, a solder layer, and the first conductive buffer 113 is connected with the second metal layer 131 through a fifth connecting layer 126, for example, a solder layer. The second chip 132 is provided with a second connecting layer 142 between the second chip 132 and the second metal layer 131, in other words, the second chip 132 is connected with the second metal layer 131 through the second connecting layer 142, for example, a solder layer. The second conductive buffer 133 is connected with the second chip 132 through a fourth connecting layer 143, for example, a solder layer, and the second conductive buffer 133 is connected with the first metal layer 111 through a sixth connecting layer 144, for example, a solder layer. The first conductive buffer 113 and the second conductive buffer 133 can reduce the soldering stress of the copper clad ceramic plate and reduce the thermal deformation of the material module on the one hand, and the first conductive buffer 113 and the second conductive buffer 133 both have a certain height, which can leave space for bonding of the low-voltage lead. The solder layer described above can be in the form of tin paste or metal sintering. The first conductive buffer 113 and / or the second conductive buffer 133 can be copper, molybdenum, silver, nickel or other metals or metal alloys, such as molybdenum or copper. The surface of the first conductive buffer 113 and / or the second conductive buffer 133 towards the chip and the surface of the first conductive buffer 113 and / or the second conductive buffer 133 towards the substrate are both provided with a metal plating layer, and the material and thickness of the metal plating layer are not limited and can be flexibly selected according to the use requirements and actual production conditions. All the solder layers in the present application can be formed by reflow soldering using lead-containing or lead-free solder, or can be formed by using tin paste or metal sintering (such as silver sintering or copper sintering).

[0073] As shown in Figure 5 and Figure 6 The half-bridge structure further includes a high-voltage alternating current terminal 134 provided on the second metal layer 131 and in electrical connection with the second metal layer 131. The high-voltage alternating current terminal 134 is in the form of three terminals, which are connected with three-phase lines of the motor, so that the power module 100 of the present application can realize three-phase control of the motor. The drain of the first chip 112 is electrically connected with the high-voltage alternating current terminal 134 through the first metal layer 111.

[0074] The first metal layer 111 of the first substrate comprises a first linking area 118 and a second linking area 119, the first chip is arranged in the first linking area 118, and the first linking area 118 is arranged in insulation with the second linking area 119. The half-bridge structure further comprises a high-voltage direct-current terminal 114 arranged in the first metal layer 111 and in conduction with the first metal layer 111, the high-voltage direct-current terminal 114 comprises a positive terminal 127 and a negative terminal 128, the positive terminal 127 is connected with the first linking area 118, and the negative terminal 128 is connected with the second linking area 119. The positive terminal 127 and the negative terminal 128 are arranged in a stack. The stack design makes the positive terminal 127 and the negative terminal 128 form currents in opposite directions, reduces the terminal stray inductance due to electromagnetic coupling, and improves the reliability of the power module 100. Optionally, the positive terminal 127 comprises a first terminal part 127a and a second terminal part 127b connected with each other, and the negative terminal 128 is located between the first terminal part 127a and the second terminal part 127b. It can be understood that, if necessary or desired, the positive terminal 127 can also have only one terminal part or a plurality of terminal parts. The positive terminal 127 and the negative terminal 128 of the power module 100 have no through hole, and the positive terminal 127 and the negative terminal 128 can be connected in a stack by using a laser welding process, thereby simplifying the process flow. Optionally, the positive terminal 127 comprises at least two positive pins 127c, and the negative terminal 128 comprises at least two negative pins 128c, the at least two positive pins 127c are symmetrically arranged on both sides of the at least two negative pins 128c. As an implementation manner, the positive terminal 127 has four positive pins 127c, the negative terminal 128 has four negative pins 128c, the first terminal part 127a and the second terminal part 127b each have two positive pins 127c, and the four negative pins 128c are arranged in the middle, that is, there are two positive pins 127c on both sides of the four negative pins 128c.

[0075] The positive terminal 127 can be connected with the positive pole of a capacitor in a motor controller, and the negative terminal 128 is connected with the negative pole of the capacitor. The current flows through the positive terminal 127 of the high-voltage direct-current terminal 114, flows into the first linking area 118 of the first metal layer 111, passes through the drain of the first chip 112, and flows to the source of the first chip 112 through the first chip 112; the current flows into the three second metal layers 131 through the first conductive buffer 113 due to the connection between the first conductive buffer 113 and the second metal layer 131, passes through the second metal layer 131, and flows to the high-voltage alternating-current terminal 134. The reverse current flows through the high-voltage alternating-current terminal 134, flows into the three second metal layers 131, passes through the drain of the second chip 132, enters the source of the second chip 132, passes through the second conductive buffer 133, enters the second linking area 119 of the first metal layer 111, and flows out through the negative terminal 128 of the high-voltage direct-current terminal 114.

[0076] The high-voltage DC terminal 114, the high-voltage AC terminal 134, and the control terminal in the present application are all formed by processing metal copper or its alloy.

[0077] As shown in Figure 1 , Figure 2 and Figures 13-19 , the power module 100 according to the present application can further include a first heat dissipation base plate 116 and a second heat dissipation base plate 136, which are respectively arranged on the third metal layer 115 and the fourth metal layer 135. The first heat dissipation base plate 116 and the second heat dissipation base plate 136 can be respectively welded to the third metal layer 115 and the fourth metal layer 135. The first heat dissipation base plate 116 and the second heat dissipation base plate 136 can be formed by processing metal aluminum or its alloy. The first heat dissipation base plate 116 and the second heat dissipation base plate 136 can have a heat dissipation form which is not limited, and can include heat dissipation pins, or heat dissipation fin forms, or other reasonable heat dissipation base plate forms according to actual conditions. The length and diameter of the heat dissipation pins can be flexibly selected according to actual needs and use conditions, and the diameter can be different, without hard regulations.

[0078] The power module 100 can further include a plastic package shell 170, and the first substrate 122, the second substrate 139, and the three half-bridge structures are accommodated in an accommodation space inside the plastic package shell 170. The plastic package is usually made of materials such as epoxy resin, which integrally packages the module, simplifies the process, and reduces the process complexity. The plastic package shell 170 produced by, for example, an injection molding process is high-temperature resistant and highly reliable. The plastic package shell 170 completely packages the above-mentioned components except for the first heat dissipation base plate 116 and the second heat dissipation base plate 136. The heat dissipation pins or the heat dissipation fins can protrude from the plastic package shell 170. The gap between the circuit module (such as a chip, a conductive buffer, a lead wire, a power terminal, and a control terminal) and the first substrate 122 and the second substrate 139 is electrically isolated by an epoxy plastic package body.

[0079] The power module 100 also comprises a liquid cooling assembly 150, which is in a form of direct cooling from both upper and lower surfaces to achieve heat dissipation of the power module 100, can effectively reduce the chip heat dissipation thermal resistance, improve the chip heat dissipation uniformity, solve the problem of too high junction temperature of the power module 100 of the pure electric vehicle, and can effectively reduce the module volume. The liquid cooling assembly 150 comprises a liquid inlet portion 151, a liquid outlet portion 152, a first flow channel portion 153 and a second flow channel portion 154. The liquid inlet portion 151 is located at one end of the power module 100. The liquid outlet portion 152 is located at the other end of the power module 100. The first flow channel portion 153 is connected between the liquid inlet portion 151 and the liquid outlet portion 152, and the first flow channel portion 153 is arranged on the first substrate 122, and a first liquid flow channel 155 is formed between the first flow channel portion 153 and the first substrate 122, and the first heat dissipation bottom plate 116 is located in the first liquid flow channel 155. The second flow channel portion 154 is arranged on the second substrate 139, and a second liquid flow channel 156 is formed between the second flow channel portion 154 and the second substrate 139, and the second heat dissipation bottom plate 136 is located in the second liquid flow channel 156. The first heat dissipation bottom plate 116 and the second heat dissipation bottom plate 136 can be respectively installed in the first liquid flow channel 155 and the second liquid flow channel 156. The cooling liquid, such as water, flows through the heat dissipation needles and / or heat dissipation fins of the first heat dissipation bottom plate 116 and the second heat dissipation bottom plate 136 to conductive heat dissipation. Optionally, the first channel 157 and the second channel 158 are arranged in the liquid inlet portion 151, wherein the first channel 157 is in communication with the first liquid flow channel 155, and the second channel 158 is in communication with the second liquid flow channel 156; the third channel 159 and the fourth channel 161 are arranged in the liquid outlet portion 152, wherein the third channel 159 is in communication with the first liquid flow channel 155, and the fourth channel 161 is in communication with the second liquid flow channel 156.

[0080] The liquid cooling assembly 150 can adopt a single inlet and outlet. For example, the cooling liquid can enter from the liquid inlet portion 151, be divided, enter the first liquid flow channel 155 and the second liquid flow channel 156 from the first channel 157 and the second channel 158 respectively, flow on the first heat dissipation bottom plate 116 and the second heat dissipation bottom plate 136 respectively, and then flow out from the third channel 159 and the fourth channel 161 respectively, and then flow out after converging in the liquid outlet portion 152.

[0081] The liquid cooling assembly 150 can also adopt a one-in-one-out form, in which case the second channel 158 is in communication with the third channel 159, and the liquid cooling assembly 150 further comprises an end cover plate 120 arranged at the end of the liquid outlet portion 152 to close the fourth channel 161 and the third channel 159. For example, the cooling liquid can enter the second liquid flow channel 156 from the second channel 158, flow out from the fourth channel 161 after passing through the second heat dissipation bottom plate 136, then flow into the first liquid flow channel 155 from the third channel 159, and then flow out from the first channel 157 after passing through the first heat dissipation bottom plate 116.

[0082] Optionally, the first flow channel portion 153 is sealingly connected with the edge of the first heat dissipation base plate 116, and the second flow channel portion 154 is sealingly connected with the edge of the second heat dissipation base plate 136; or the first flow channel portion 153 and the first heat dissipation base plate 116 are configured as an integral member, and the second flow channel portion 154 and the second heat dissipation base plate 136 are configured as an integral member. It can be understood that the above structure can avoid the cooling liquid from entering the circuit module.

[0083] In the present application, the first heat dissipation base plate 116, the second heat dissipation base plate 136, and the components such as the flow channel portion and the channel in the liquid cooling assembly 150 are formed by processing aluminum or its alloy, and the specific form of the flow channel and the channel is not limited.

[0084] Figure 20 A power module according to another embodiment of the present application is shown. In other embodiments, the power module is different from the above-described embodiments in that the negative terminal 228 includes a first terminal portion 228a and a second terminal portion 228b connected to each other, and the positive terminal 227 is located between the first terminal portion 228a and the second terminal portion 228b. It can be understood that the negative terminal 228 can also have only one terminal portion or multiple terminal portions if necessary / desired. The positive terminal 227 includes at least two positive pins 227c, and the negative terminal 228 includes at least two negative pins 228c, the at least two positive pins 227c being symmetrically arranged on both sides of the at least two negative pins 228c. The positive terminal 227 has four positive pins 227c, and the negative terminal 228 has four negative pins 228c, the first terminal portion 228a and the second terminal portion 228b each having two negative pins 228c, and the four negative pins 228c being arranged in the middle, i.e., two positive pins 227c are arranged on the left and right sides of the four negative pins 228c. In this case, the negative terminal 228 is connected to the first linking area, and the positive terminal 227 is connected to the second linking area. The remaining parts not described will be described with reference to the foregoing embodiments and the accompanying drawings, and will not be described and / or illustrated in detail for the sake of brevity.

[0085] In an embodiment not shown, the positive terminal includes at least two positive pins, and the negative terminal includes at least two negative pins, the at least two negative pins being symmetrically arranged on both sides of the at least two positive pins, and the remaining parts not described will be described with reference to the foregoing embodiments.

[0086] The processes and steps described in all the above embodiments are only examples. Unless an adverse effect occurs, various processing operations can be performed in an order different from the above-described processes. The order of the steps of the above-described processes can also be increased, combined, or deleted according to actual needs.

[0087] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of this application. The features described herein in one embodiment can be applied to another embodiment, mutatis mutandis, unless that embodiment is not applicable or the contrary is indicated.

[0088] The application has been described through the above-mentioned embodiments, but it should be understood that the above-mentioned embodiments are only for the purpose of example and illustration, and the application is not limited to the above-mentioned embodiments, and more kinds of variations and modifications can be made according to the teachings of the application, which all fall within the scope claimed by the application.

Claims

1. A power module, characterized in that, The power module includes: First substrate; The second substrate is stacked and spaced apart from the first substrate; Three half-bridge structures are disposed between the first substrate and the second substrate, and the half-bridge structures include: A first metal layer is disposed on the first substrate. A second metal layer is disposed on the second substrate, and the second metal layer is disposed opposite to the first metal layer. A first chip is disposed on the first metal layer and is electrically connected to the first metal layer. The second chip is disposed on the second metal layer and is electrically connected to the second metal layer. A first conductive buffer, the first conductive buffer being disposed on the first chip and connected to the second metal layer, and The second conductive buffer is disposed on the second chip and connected to the first metal layer; The three first metal layers are electrically isolated from each other on the first substrate, the three second metal layers are electrically isolated from each other on the second substrate, and the three half-bridge structures form a full-bridge structure.

2. The power module according to claim 1, characterized in that, The drain of the first chip is electrically connected to the first metal layer, and the drain of the second chip is electrically connected to the second metal layer.

3. The power module according to claim 1, characterized in that, The half-bridge structure also includes a high-voltage AC terminal, which is disposed on the second metal layer and is in communication with the second metal layer.

4. The power module according to claim 3, characterized in that, The half-bridge structure also includes a high-voltage DC terminal, which is disposed on the first metal layer and is in communication with the first metal layer. The high-voltage DC terminal includes a positive terminal and a negative terminal, which are stacked together.

5. The power module according to claim 1, characterized in that, The first chip and the second chip are staggered in the stacking direction of the first substrate and the second substrate.

6. The power module according to claim 1, characterized in that, A first heat dissipation base plate is provided on the side of the first substrate opposite to the direction of the first metal layer; A second heat dissipation base plate is provided on the side of the second substrate opposite to the direction of the second metal layer.

7. The power module according to claim 6, characterized in that, The power module also includes a plastic-encapsulated housing, in which the first substrate, the second substrate, and the three half-bridge structures are housed within a space inside the plastic-encapsulated housing. The first heat dissipation base plate and the second heat dissipation base plate include heat dissipation pins or heat dissipation fins, which protrude from the plastic-encapsulated housing.

8. The power module according to claim 1, characterized in that, The first substrate is provided with a first lead connection area, and the number of the first chips is at least two, with at least two first chips arranged symmetrically with respect to the first lead connection area; The second substrate is provided with a second lead connection area, and the number of the second chips is at least two, with the at least two second chips arranged symmetrically with respect to the second lead connection area.

9. The power module according to claim 6 or 7, characterized in that, The power module further includes a liquid cooling component, which comprises: The liquid inlet is located at one end of the power module; The liquid outlet is located at the other end of the power module; A first flow channel portion is connected between the liquid inlet portion and the liquid outlet portion. The first flow channel portion is disposed on the first substrate. A first liquid flow channel is formed between the first flow channel portion and the first substrate. The first heat dissipation base plate is located in the first liquid flow channel. The second flow channel is disposed on the second substrate, and a second liquid flow channel is formed between the second flow channel and the second substrate, and the second heat dissipation base plate is located in the second liquid flow channel.

10. The power module according to claim 9, characterized in that, The first flow channel portion is sealed to the edge of the first heat dissipation base plate, and the second flow channel portion is sealed to the edge of the second heat dissipation base plate; or The first flow channel and the first heat dissipation base plate are constructed as an integral component, and the second flow channel and the second heat dissipation base plate are constructed as an integral component.

11. The power module according to claim 10, characterized in that, The liquid inlet section is provided with a first channel and a second channel, wherein the first channel is connected to the first liquid flow channel and the second channel is connected to the second liquid flow channel; The liquid outlet section is provided with a third channel and a fourth channel, wherein the third channel is connected to the first liquid flow channel and the fourth channel is connected to the second liquid flow channel.

12. The power module according to claim 11, characterized in that, The second channel is connected to the third channel; The liquid cooling assembly also includes an end cover plate disposed at the end of the liquid outlet to close the fourth channel and the third channel.

Citation Information

Patent Citations

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    CN102956610A

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    US20230068223A1