Aging method for pixel circuit and pixel circuit

Abstract

The present application relates to the field of display technology, and specifically provides an aging method for a pixel circuit and a pixel circuit, aiming to solve the existing problem that it is impossible to perform an aging process from top to bottom on the first light-emitting control subcircuit in the pixel circuit to eliminate high grayscale dark spots. To this end, the aging method for the pixel circuit of the present application includes: performing an aging process on the first light-emitting control subcircuit in the pixel circuit, controlling the first light-emitting control subcircuit and the second light-emitting control subcircuit to be turned off during the aging process, and providing a preset voltage to the output end of the first light-emitting control subcircuit based on any one of a first initialization voltage, a data voltage, and a gate drive voltage, so that the gate-drain voltage and the drain-source voltage of the first light-emitting control subcircuit meet the leakage current elimination condition. This achieves the beneficial effect of reducing the leakage current of the first light-emitting control subcircuit and eliminating high grayscale dark spots.

Description

Technical Field

[0001] This application relates to the field of display technology, specifically providing an aging method for pixel circuits and a pixel circuit. Background Technology

[0002] In the pixel circuits of organic light-emitting diode (OLED) display panels, transistor aging can cause uneven light emission. To address this issue, the pixel circuits can be aged, for example by applying a higher voltage to each transistor in the pixel circuit. This eliminates leakage current caused by the migration of impurity charges within the transistors, thereby improving abnormal pixel emission and uneven light emission of the display panel. See also... Figure 1 As shown, in related technologies, the influence of transistor T5 on the circuit is usually not considered when aging the 7T1C pixel circuit.

[0003] However, during the writing stage of the 7T1C pixel circuit, leakage current in transistor T5 causes VDD to assist in writing data to the first node N1, pulling up the gate voltage of transistor T3 and resulting in high grayscale dark spots during the light-emitting stage. To reduce the leakage current of transistor T5 and eliminate high grayscale dark spots, transistor T5 needs to be aging from top to bottom. However, the conventional method of aging by turning off the EM cannot guarantee the drain voltage required for aging transistor T5 from top to bottom (i.e., from VDD to VSS). Therefore, an aging process for transistor T5 is urgently needed to eliminate high grayscale dark spots. Summary of the Invention

[0004] This application aims to solve the aforementioned technical problem, namely, to solve the problem that existing methods cannot perform top-down aging processing on the first light-emitting control sub-circuit in the pixel circuit to eliminate high grayscale dark spots.

[0005] In a first aspect, this application provides an aging method for a pixel circuit, the pixel circuit including a compensation sub-circuit, a first reset sub-circuit, a data writing sub-circuit, a first light emission control sub-circuit, a driving sub-circuit, a second light emission control sub-circuit, and a light emission element;

[0006] The first light-emitting control sub-circuit, the driving sub-circuit, and the second light-emitting control sub-circuit are sequentially arranged between the first power supply voltage and the anode of the light-emitting element, and the cathode of the light-emitting element is connected to the second power supply voltage.

[0007] The first reset sub-circuit is at least used to provide a first initialization voltage to the anode of the light-emitting element;

[0008] The data writing sub-circuit is used to provide a data voltage to the output terminal of the first light-emitting control sub-circuit, and to write a gate driving voltage to the control terminal of the driving sub-circuit based on the compensation sub-circuit.

[0009] The method includes:

[0010] During the aging process, the first light-emitting control sub-circuit and the second light-emitting control sub-circuit are turned off.

[0011] A preset voltage is provided to the output terminal of the first light-emitting control sub-circuit based on any one of the first initialization voltage, the data voltage, and the gate drive voltage, so that the gate-drain voltage and drain-source voltage of the first light-emitting control sub-circuit meet the leakage current elimination condition.

[0012] In some embodiments, the control terminals of both the first light-emitting control sub-circuit and the second light-emitting control sub-circuit are used to input light-emitting control signals;

[0013] Controlling the first light-emitting control sub-circuit and the second light-emitting control sub-circuit to turn off includes:

[0014] During the aging process in the writing or light emission stage, the first light emission control sub-circuit and the second light emission control sub-circuit are turned off based on the light emission control signal.

[0015] In some embodiments, the data writing sub-circuit includes a fourth transistor, the input terminal of which is used to input the data voltage, the output terminal of which is connected to the output terminal of the first light-emitting control sub-circuit, and the control terminal of which is used to input a first gate signal.

[0016] Based on the data voltage, a preset voltage is provided to the output terminal of the first light-emitting control sub-circuit, including:

[0017] During the aging process in the writing or light-emitting stage, the fourth transistor is controlled to turn on based on the first gate signal, and a preset voltage is provided to the output of the first light-emitting control sub-circuit based on the data voltage.

[0018] In some embodiments, during the aging process in the writing phase, controlling the fourth transistor to turn on based on the first gate signal and providing a preset voltage to the output of the first light-emitting control sub-circuit based on the data voltage includes:

[0019] The refresh frequency of the pixel circuit is adjusted to a preset refresh frequency, which is lower than the refresh frequency of the pixel circuit during the lamp-lighting process.

[0020] During the refresh cycle of the preset refresh frequency, in the writing phase, the fourth transistor is controlled to turn on based on the first gate signal, and a preset voltage is provided to the output terminal of the first light-emitting control sub-circuit based on the data voltage.

[0021] In some embodiments, the data writing sub-circuit includes a fourth transistor and an eighth transistor. The input terminal of the fourth transistor is used to input the data voltage, the output terminal of the fourth transistor is connected to the output terminal of the first light-emitting control sub-circuit, and the control terminal of the fourth transistor is used to input a first gate signal. The input terminal of the eighth transistor is connected to the input terminal of the fourth transistor, the output terminal of the eighth transistor is connected to the output terminal of the fourth transistor, and the control terminal of the eighth transistor is used to input a second gate signal.

[0022] Based on the data voltage, a preset voltage is provided to the output terminal of the first light-emitting control sub-circuit, including:

[0023] During the aging process in the light-emitting stage, the fourth transistor is controlled to turn off based on the first gate signal; and the eighth transistor is controlled to turn on based on the second gate signal, and a preset voltage is provided to the output terminal of the first light-emitting control sub-circuit based on the data voltage.

[0024] In some embodiments, the compensation sub-circuit includes a capacitor, a second transistor, and a ninth transistor. A first terminal of the capacitor is connected to the first power supply voltage, and a second terminal of the capacitor is connected to the control terminal of the driving sub-circuit. A first terminal of the second transistor is connected to the control terminal of the driving sub-circuit, and a second terminal of the second transistor is connected to the output terminal of the driving sub-circuit. The control terminal of the second transistor is used to input a first gate signal. A first terminal of the ninth transistor is connected to the control terminal of the driving sub-circuit, and a second terminal of the ninth transistor is connected to the output terminal of the first light-emitting control sub-circuit. The control terminal of the ninth transistor is used to input a third gate signal.

[0025] Based on the gate driving voltage, a preset voltage is provided to the output terminal of the first light-emitting control sub-circuit, including:

[0026] The aging process is performed during the light-emitting phase, and based on the first gate signal, the data writing sub-circuit and the second transistor are controlled to turn off; and,

[0027] Based on the third gate signal, the ninth transistor is controlled to turn on, and a preset voltage is provided to the output terminal of the first light-emitting control sub-circuit based on the gate drive voltage.

[0028] In some embodiments, the first reset sub-circuit includes a seventh transistor and a tenth transistor. The input terminal of the seventh transistor is used to input the first initialization voltage, the output terminal of the seventh transistor is connected to the anode of the light-emitting element, and the control terminal of the seventh transistor is used to input a first gate signal. The input terminal of the tenth transistor is connected to the input terminal of the seventh transistor, the output terminal of the tenth transistor is connected to the output terminal of the first light-emitting control sub-circuit or the driving sub-circuit, and the control terminal of the tenth transistor is used to input a fourth gate signal.

[0029] Based on the first initialization voltage, a preset voltage is provided to the output terminal of the first light-emitting control sub-circuit, including:

[0030] The aging process is performed during the light-emitting phase, and the seventh transistor is controlled to turn off based on the first gate signal; and,

[0031] Based on the fourth gate signal, the tenth transistor is controlled to turn on, and a preset voltage is provided to the output terminal of the first light-emitting control sub-circuit based on the first initialization voltage.

[0032] In some embodiments, the leakage current elimination conditions include a gate-drain voltage of 22 to 30V and a drain-source voltage of -12 to -20V.

[0033] In some embodiments, the first light-emitting control sub-circuit includes a fifth transistor, and the second light-emitting control sub-circuit includes a sixth transistor. The input terminal of the fifth transistor is used to input the first power supply voltage, the output terminal of the fifth transistor is connected to the output terminal of the data writing sub-circuit, the input terminal of the sixth transistor is connected to the output terminal of the driving sub-circuit, and the output terminal of the sixth transistor is connected to the anode of the light-emitting element. The control terminals of both the fifth transistor and the sixth transistor are used to input light-emitting control signals.

[0034] In some embodiments, the pixel circuit further includes a second reset sub-circuit, the input terminal of which is used to input a second initialization voltage, the output terminal of which is connected to the control terminal of the driving sub-circuit, and the control terminal of which is used to input a reset signal;

[0035] The method further includes:

[0036] During the reset phase, the second reset sub-circuit is turned on based on the reset signal, and the control terminal of the drive sub-circuit is initialized based on the second initialization voltage.

[0037] In a second aspect, this application provides a pixel circuit, which includes a compensation sub-circuit, a first reset sub-circuit, a data writing sub-circuit, a first light emission control sub-circuit, a driving sub-circuit, a second light emission control sub-circuit, a light emission element, and a voltage control sub-circuit.

[0038] The first light-emitting control sub-circuit, the driving sub-circuit, and the second light-emitting control sub-circuit are sequentially arranged between the first power supply voltage and the anode of the light-emitting element, and the cathode of the light-emitting element is connected to the second power supply voltage.

[0039] The first reset circuit is used to provide a first initialization voltage to the anode of the light-emitting element;

[0040] The data writing sub-circuit is used to provide a data voltage to the output terminal of the first light-emitting control sub-circuit, and to write a gate driving voltage to the control terminal of the driving sub-circuit based on the compensation sub-circuit.

[0041] During the aging process, the first light emission control sub-circuit and the second light emission control sub-circuit are used to turn off in response to the light emission control signal at the control terminal;

[0042] The voltage control sub-circuit is used to provide a preset voltage to the output terminal of the first light-emitting control sub-circuit based on any one of the first initialization voltage, the data voltage, and the gate drive voltage, so that the gate-drain voltage and drain-source voltage of the first light-emitting control sub-circuit meet the leakage current elimination condition.

[0043] By employing the above technical solution, this application can perform an aging process on the first light-emitting control sub-circuit in the pixel circuit. During the aging process, the first and second light-emitting control sub-circuits are controlled to be turned off. A preset voltage is provided to the output terminal of the first light-emitting control sub-circuit based on any one of the first initialization voltage, data voltage, and gate drive voltage, so that the gate-drain voltage and drain-source voltage of the first light-emitting control sub-circuit meet the leakage current elimination condition. This achieves the beneficial effect of reducing the leakage current of the first light-emitting control sub-circuit and eliminating high grayscale dark spots. Attached Figure Description

[0044] The preferred embodiments of this application are described below with reference to the accompanying drawings, in which:

[0045] Figure 1 This is a schematic diagram of the 7T1C pixel circuit;

[0046] Figure 2 This is the timing diagram for the lighting process control of the 7T1C pixel circuit;

[0047] Figure 3 This is a schematic diagram of the 7T1C pixel circuit aging from top to bottom;

[0048] Figure 4 This is a schematic diagram of the pixel circuit provided in an embodiment of this application;

[0049] Figure 5 This is a schematic diagram of the aging method for pixel circuits provided in an embodiment of this application;

[0050] Figure 6 This is a schematic diagram of the pixel circuit provided in another embodiment of this application;

[0051] Figure 7 This is a schematic diagram of the 8T2C gate drive circuit;

[0052] Figure 8 This is a control timing diagram of the 8T2C gate drive circuit provided in an embodiment of this application;

[0053] Figure 9 This is a schematic diagram of a pixel circuit for aging processing based on data voltage provided in an embodiment of this application;

[0054] Figure 10 This is a schematic diagram of a pixel circuit for aging processing based on gate driving voltage, provided in an embodiment of this application.

[0055] Figure 11 This is a schematic diagram of a pixel circuit for aging processing based on a first initialization voltage, provided in an embodiment of this application.

[0056] Figure 12 is with Figures 9 to 11 The control timing diagram corresponding to the pixel circuit is shown. Detailed Implementation

[0057] To make the objectives, technical solutions, and advantages of the embodiments of this disclosure clearer, the technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this disclosure. All other embodiments obtained by those skilled in the art based on the described embodiments of this disclosure without creative effort are within the scope of protection of this disclosure.

[0058] Unless otherwise defined, the technical or scientific terms used in this disclosure shall have the ordinary meaning understood by one of ordinary skill in the art to which this disclosure pertains. The terms “first,” “second,” and similar terms used in this disclosure do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Terms such as “comprising” or “including” mean that an element or object preceding the word encompasses the elements or objects listed following the word and their equivalents, without excluding other elements or objects.

[0059] In this application, the 7T1C pixel circuit is a pixel circuit used to drive an OLED (Organic Light-Emitting Diode) display screen. It consists of 7 thin-film transistors (T1 to T7) and 1 capacitor (Cst) to control the light emission process of the pixel.

[0060] See Figure 1 and Figure 2 As shown, the illumination process of the 7T1C pixel circuit can include three stages:

[0061] The first stage is the Vinit initialization stage. The light emission control signal EM and the first gate signal Gate are given a high level, the reset signal Reset is given a low level, T1 is turned on, and T2, T3, T4, T5, T6, and T7 are turned off. The initialization voltage Vinit is written to the gate of T3, and the gate signal of T3 is initialized.

[0062] The second stage is the data signal voltage writing stage. EM and Reset are given a high level, Gate is given a low level, T2, T3, T4, and T7 are turned on, and T1, T5, and T6 are turned off. The gate of T3 is written with Vdata+Vth voltage, and the OLED anode is written with Vinit for initialization; where Vth represents the threshold voltage.

[0063] The third stage is the light emission stage. Reset and Gate are given a high level, EM is given a low level, T5 and T6 are turned on, and T1, T2, T4 and T7 are turned off. T3 controls the degree of T3's on / off state according to the gate voltage written in the second stage, i.e., (Vdata+Vth) voltage, which affects the OLED's light emission intensity.

[0064] When the voltages in the 7T1C pixel circuit are set to the values ​​shown in Table 1, Vdata < VDD, where VDD is the first power supply voltage. Leakage in transistor T5 will cause VDD to assist Vdata in writing to point N1 during the second stage, i.e., the compensation stage. Figure 3 As shown, this pulls up the voltage at point N1, causing transistor T3 to turn off and generating a high grayscale dark spot. To reduce the leakage current of transistor T5 and eliminate the high grayscale dark spot, transistor T5 needs to be aging from top to bottom. However, the conventional method of aging by turning off EM cannot write signals such as the second power supply voltage VSS and Vinit to the drain of transistor T5. This cannot guarantee the drain voltage required when transistor T5 is aging from top to bottom (i.e., from the first voltage VDD to the second power supply voltage VSS), and cannot guarantee the gate-drain voltage VGD and drain-source voltage VDS required for aging.

[0065] Table 1. Voltage table of each signal during the pixel circuit's lamp-ignition process

[0066]

[0067]

[0068] Where VGH and VGL are the high and low levels N corresponding to the Gate signal, respectively, Vdata is the voltage corresponding to the Data signal, and Vinit is the initialization voltage.

[0069] In view of this, this application provides an aging method for pixel circuits, which can be applied to... Figure 4 The pixel circuit shown may include a compensation sub-circuit, a first reset sub-circuit, a data writing sub-circuit, a first light emission control sub-circuit, a driving sub-circuit, a second light emission control sub-circuit, and a light-emitting element. The first light emission control sub-circuit, the driving sub-circuit, and the second light emission control sub-circuit are sequentially arranged between a first power supply voltage and the anode of the light-emitting element, and the cathode of the light-emitting element is connected to the second power supply voltage. The first reset sub-circuit is used to provide a first initialization voltage to the anode of the light-emitting element. The data writing sub-circuit is used to provide a data voltage to the output terminal of the first light emission control sub-circuit and write a gate driving voltage to the control terminal of the driving sub-circuit based on the compensation sub-circuit.

[0070] See Figure 5 As shown, the pixel circuit aging method provided in this application embodiment may include:

[0071] Step S51: During the aging process, the first light-emitting control sub-circuit and the second light-emitting control sub-circuit are turned off;

[0072] Step S52: Provide a preset voltage to the output terminal of the first light-emitting control sub-circuit based on any one of the first initialization voltage, data voltage Vdata, and gate drive voltage, so that the gate-drain voltage and drain-source voltage of the first light-emitting control sub-circuit meet the leakage current elimination condition.

[0073] In some embodiments, the preset voltage can be determined based on the leakage current and gate voltage relationship curve of the first light-emitting control sub-circuit and the source and drain voltages of the transistor in the sub-circuit. By identifying a region where the leakage current and gate voltage have an approximately linear relationship, which is a region where the transistor operates relatively stably and is also the target region for eliminating the tailing phenomenon, the preset voltage is determined by combining the gate voltage in this target region with the source and drain voltages of the transistor. That is, the preset voltage needs to meet the leakage current elimination condition in the target region, along with the source and drain voltages of the transistor. In the case of transistor leakage, within a certain range of the gate voltage, the rate of increase of the drain current suddenly accelerates, causing the curve to exhibit a non-linear upward trend or deviate from the normal trend in that region, i.e., the tailing phenomenon.

[0074] In some embodiments, the leakage current elimination condition can be VGD = 22~30V, VDS = -12~-20V, where VGD is the voltage between the gate and drain of the transistor in the first light-emitting control sub-circuit, and VDS is the voltage between the drain and source of the transistor in the first light-emitting control sub-circuit.

[0075] In some embodiments, see Figure 6 As shown, the pixel circuit may further include a second reset sub-circuit. The input terminal of the second reset sub-circuit is used to input a second initialization voltage Vinit2, and the output terminal of the second reset sub-circuit is connected to the control terminal of the drive sub-circuit. The control terminal of the second reset sub-circuit is used to input a reset signal. The method may further include:

[0076] During the reset phase, the second reset sub-circuit is turned on based on the reset signal, and the control terminal of the drive sub-circuit is initialized based on the second initialization voltage.

[0077] In some embodiments, the pixel circuit can be a 7T1C circuit, and the aging method provided in this application can be applied to age the first light-emitting control sub-circuit.

[0078] like Figure 1 As shown, the second reset sub-circuit includes a first transistor T1. The input terminal of the first transistor T1 is used to input the second initialization voltage Vinit2. The output terminal of the first transistor T1 is connected to the control terminal of the third transistor T3. The control terminal of the first transistor T1 is used to input the reset signal Reset.

[0079] The compensation sub-circuit may include a capacitor Cst and a second transistor T2. The first terminal of the capacitor Cst is connected to the first power supply voltage VDD, and the second terminal of the capacitor Cst is connected to the control terminal of the third transistor T3. The first terminal of the second transistor T2 is connected to the control terminal of the third transistor T3, and the second terminal of the second transistor T2 is connected to the output terminal of the third transistor T3. The control terminal of the second transistor T2 is used to input the first gate signal Gate.

[0080] The driver sub-circuit may include a third transistor T3.

[0081] The data writing sub-circuit may include a fourth transistor T4, the input terminal of which is used to input the data voltage Vdata, the output terminal of which is connected to the output terminal of the fifth transistor T5, and the control terminal of which is used to input the first gate signal Gate.

[0082] The first light-emitting control sub-circuit includes a fifth transistor T5. The input terminal of the fifth transistor T5 is connected to the first power supply voltage VDD, and the control terminal of the fifth transistor T5 is used to input the light-emitting control signal EM.

[0083] The second light-emitting control sub-circuit includes a sixth transistor T6. The input terminal of the sixth transistor T6 is connected to the output terminal of the third transistor T3. The output terminal of the sixth transistor T6 is connected to the anode of the light-emitting element. The control terminal of the sixth transistor T6 is used to input the light-emitting control signal EM.

[0084] The first reset circuit includes a seventh transistor T7. The input terminal of the seventh transistor T7 is used to input the first initialization voltage Vinit1. The output terminal of the seventh transistor T7 is connected to the anode of the light-emitting element. The control terminal of the seventh transistor T7 is used to input the first gate signal Gate.

[0085] The cathode of the light-emitting element is connected to the second power supply voltage VSS.

[0086] In some embodiments, when aging the fifth transistor T5 in the 7T1C pixel circuit, step S51 may specifically involve: during the aging process in the light emission stage, controlling the fifth transistor T5 and the sixth transistor T6 to turn off based on the light emission control signal EM. Step S52 may specifically involve: providing a preset voltage to the output terminal of the fifth transistor T5 based on the data voltage Vdata, so that the gate-drain voltage and drain-source voltage of the fifth transistor T5 meet the leakage current elimination condition.

[0087] In the 7T1C pixel circuit, each transistor can be an N-type transistor. Accordingly, when EM is high, transistors T5 and T6 are turned off; when EM is low, they are turned on. In other embodiments, each transistor in the 7T1C pixel circuit can be a P-type transistor. Similarly, when EM is low, transistors T5 and T6 are turned off; when EM is high, they are turned on. The following description assumes all transistors are P-type transistors.

[0088] Providing a preset voltage to the output of the fifth transistor T5 based on the data voltage Vdata can include:

[0089] During the aging process in the light-emitting stage, the fourth transistor T4 is turned on based on the first gate signal Gate, and a preset voltage is provided to the output terminal of the fifth transistor T5 based on the data voltage Vdata.

[0090] Among them, see Figure 7 and Figure 8 As shown, an exemplary example is illustrated using an 8T2C gate drive circuit to provide the first gate signal Gate. The 8T2C gate drive circuit includes eight transistors (T1' to T8') and two capacitors (C1 and C2). The figure exemplarily shows the use of N-type transistors. Figure 8In the second and third stages, t3 corresponds to the second and third stages. By providing timing signals CK and CB to the 8T2C gate drive circuit, the 8T2C gate drive circuit outputs a low-level first gate signal Gate signal in both the second and third stages, thereby turning on the fourth transistor T4 in both the second and third stages. In the third stage, it can provide a preset voltage to the output of the fifth transistor T5 based on the data voltage Vdata.

[0091] At this point, the voltage values ​​of each signal in the 7T1C pixel circuit can be seen in Table 2. Correspondingly, in the third stage, the gate voltage Vg = VGH, the gate voltage Vs = VDD, and the drain voltage Vd = Vdata of the fifth transistor T5, where VGH and VGL are the high and low levels corresponding to EM, respectively. This allows for aging of the fifth transistor from top to bottom in the third stage, eliminating leakage current.

[0092] Table 2. Voltage values ​​of various signals during aging in the luminescence stage.

[0093] VGH VGL VDD VSS Vdata Vinit 14V -16.5V 0V -14V -14V -14V

[0094] During the writing phase, the fourth transistor T4 is turned on, allowing for aging up during this stage. A preset voltage is provided to the output of the first light-emitting control sub-circuit based on the data voltage Vdata. However, the writing phase accounts for a relatively small portion of the overall lighting process, making insufficient aging time a potential issue.

[0095] In response to this, in some other embodiments, when aging the fifth transistor T5 in the 7T1C pixel circuit, step S51 can specifically be as follows: during the aging process in the writing stage, based on the light emission control signal EM, control the fifth transistor T5 and the sixth transistor T6 to turn off. Step S52 can specifically be as follows: adjust the refresh frequency of the pixel circuit to a preset refresh frequency, which is less than the refresh frequency of the pixel circuit during the lamp-on process; within the refresh cycle of the preset refresh frequency, during the writing stage, based on the first gate signal Gate, control the fourth transistor T4 to turn on, and provide a preset voltage to the output terminal of the first light emission control sub-circuit based on the data voltage Vdata.

[0096] The voltage tables for each signal in the pixel circuit can be found in Table 3. Correspondingly, in the second stage, the gate voltage of the fifth transistor is Vg = VGH, the gate voltage is Vs = VDD, and the drain voltage is Vd = Vdata. The preset frequency can be reduced from 60Hz in the lamp-lighting stage to 30Hz.

[0097] Table 3. Voltage values ​​of various signals during aging in the luminescence stage.

[0098] VGH VGL VDD VSS Vdata Vinit 14V -16.5V 0V -14V -14V -14V

[0099] By reducing the refresh rate to lengthen the duration of the second stage and increasing its proportion in the entire refresh cycle, aging can be performed more efficiently than directly in the second stage of the lighting process, thus effectively reducing leakage current.

[0100] In some embodiments, the pixel circuit can also be aged by adding transistors and control signals, see details below. Figures 9 to 11 As shown.

[0101] Figure 9 and Figure 1 The difference lies in the fact that the data writing sub-circuit also includes an eighth transistor T8. The input terminal of the eighth transistor T8 is connected to the input terminal of the fourth transistor T4, which can be used to input data voltage. The output terminal of the eighth transistor T8 is connected to the output terminal of the fourth transistor T4. The control terminal of the eighth transistor T8 is used to input the second gate signal D1.

[0102] Accordingly, based on Figure 9 In the pixel circuit shown, step S51 can be specifically defined as follows: during the aging process in the writing stage, the fifth transistor T5 and the sixth transistor T6 are turned off based on the light emission control signal EM. Step S52 can be specifically defined as follows: during the aging process in the light emission stage, the fourth transistor T4 is turned off based on the first gate signal Gate; and the eighth transistor T8 is turned on based on the second gate signal D1, and a preset voltage is provided to the output terminal of the fifth transistor T5 based on the data voltage Vdata. Figure 9 The corresponding timing diagram can be found in [reference]. Figure 12 As shown, during the third stage of aging, the light emission control signal EM, the first gate signal Gate, and the reset signal Reset are all at high level, D1 is at low level, the eighth transistor T8 is turned on, and a preset voltage is provided to the output of the fifth transistor T5 based on the data voltage Vdata.

[0103] Figure 10 and Figure 1 The difference is that the compensator circuit also includes a ninth transistor T9. The first terminal of the ninth transistor T9 is connected to the control terminal of the third transistor T3, which can be connected to the control terminal of T3 through the first node N1. The second terminal of the ninth transistor T9 is connected to the output terminal of the fifth transistor T5, which can be connected to the output terminal of the fifth transistor T5 through the third node N3. The control terminal of the ninth transistor T9 is used to input the third gate signal D2.

[0104] Accordingly, based on Figure 10In the pixel circuit shown, step S51 can be specifically defined as follows: during the aging process in the writing stage, the fifth transistor T5 and the sixth transistor T6 are turned off based on the light emission control signal EM. Step S52 can be specifically defined as follows: during the aging process in the light emission stage, the fourth transistor T4 and the second transistor T2 are turned off based on the first gate signal Gate; and the ninth transistor T9 is turned on based on the third gate signal D2, and a preset voltage is provided to the output terminal of the first light emission control sub-circuit based on the gate drive voltage. The gate drive voltage can be the voltage applied to the control terminal T3 during the writing stage, and the gate drive voltage can be adaptively set according to the preset voltage.

[0105] Figure 10 The corresponding aging method timing diagram can be found in [reference]. Figure 12 As shown, during the third stage of aging, the third gate signal D2 is a low-level signal, the ninth transistor T9 is turned on, and a preset voltage is provided to the output of the fifth transistor T5 based on the gate drive voltage.

[0106] Figure 11 and Figure 1 The difference lies in that the first reset circuit also includes a tenth transistor T10, the input terminal of which is connected to the input terminal of the seventh transistor T7, and the output terminal of which is connected to the output terminal of either the fifth transistor T5 or the third transistor T3. Figure 11 The diagram exemplarily shows the output of the tenth transistor T10 connected to the output of the third transistor T3 via a third node N3. The control terminal of the tenth transistor T10 is used to input the fourth gate signal D3. When the output of the tenth transistor T10 is connected to the output of the fifth transistor T5, it can be connected to the output of the fifth transistor T5 via a second node N2, which is not shown in the diagram.

[0107] Accordingly, based on Figure 11 In the pixel circuit shown, step S51 can be specifically described as follows: during the aging process in the writing stage, the fifth transistor T5 and the sixth transistor T6 are turned off based on the light emission control signal EM. Step S52 can be specifically described as follows: during the aging process in the light emission stage, the seventh transistor T7 is turned off based on the first gate signal Gate; and the tenth transistor T10 is turned on based on the fourth gate signal D3, and a preset voltage is provided to the output terminal of T5 based on the first initialization voltage Vinit1.

[0108] Figure 11 The corresponding aging method timing diagram can be found in [reference]. Figure 12As shown, during the third stage of aging, the fourth gate signal D3 is a low-level signal, the tenth transistor T10 is turned on, and a preset voltage is provided to the output of the fifth transistor T5 or the third transistor T3 based on the first initialization voltage Vinit1. Specifically, when the output of the tenth transistor T10 is connected to the output of the third transistor T3, since the third transistor T3 can be turned on during the third stage, the preset voltage can be provided to the output of the third transistor T3, thereby enabling the output of the fifth transistor T5 to reach the preset voltage.

[0109] Another aspect of this application provides a pixel circuit, which may include a compensation sub-circuit, a first reset sub-circuit, a data writing sub-circuit, a first light emission control sub-circuit, a driving sub-circuit, a second light emission control sub-circuit, a light emission element, and a voltage control sub-circuit.

[0110] The first light-emitting control sub-circuit, the driving sub-circuit, and the second light-emitting control sub-circuit are sequentially arranged between the first power supply voltage and the anode of the light-emitting element, and the cathode of the light-emitting element is connected to the second power supply voltage.

[0111] The first reset circuit is used to provide a first initialization voltage to the anode of the light-emitting element;

[0112] The data writing sub-circuit is used to provide data voltage to the output terminal of the first light-emitting control sub-circuit and to write gate driving voltage to the control terminal of the driving sub-circuit based on the compensation sub-circuit.

[0113] During the aging process, the first light emission control sub-circuit and the second light emission control sub-circuit are used to turn off the light emission control signal EM in response to the control terminal.

[0114] The voltage control sub-circuit is used to provide a preset voltage to the output of the first light-emitting control sub-circuit based on any one of the first initialization voltage, the data voltage Vdata, and the gate drive voltage, so that the gate-drain voltage and the drain-source voltage of the first light-emitting control sub-circuit meet the leakage current elimination condition.

[0115] The compensation sub-circuit may include capacitor Cst and second transistor T2; the first reset sub-circuit may include seventh transistor T7; the data writing sub-circuit may include fourth transistor T4; the first light-emitting control sub-circuit may include fifth transistor T5; the driving sub-circuit may include third transistor T3; the second light-emitting control sub-circuit may include sixth transistor T6; and the light-emitting element and voltage control sub-circuit may include any one of eighth transistor T8, ninth transistor T9, and tenth transistor T10.

[0116] In this embodiment, the compensation sub-circuit, the first reset sub-circuit, the data writing sub-circuit, the first light-emitting control sub-circuit, the driving sub-circuit, the second light-emitting control sub-circuit, and the light-emitting element can be adopted and Figure 1 The voltage control sub-circuit, including the eighth transistor T8, can be configured in the same way as in [previous circuit]. Figure 9 Set in the same way, and with Figure 9 The aging process is performed using the same method as in the corresponding embodiment. When the voltage control sub-circuit includes the ninth transistor T9, it can employ the same method as... Figure 10 Set in the same way, and with Figure 10 The aging process is performed using the same method as in the corresponding embodiment. When the voltage control sub-circuit includes the tenth transistor T10, it can be performed using the same method as in the previous embodiment. Figure 11 Set in the same way, and with Figure 11 The aging process is performed using the same method as in the corresponding embodiment.

[0117] The aging method for pixel circuits provided in this application can be applied to pixel circuits with multiple light-emitting control sub-circuits set on the main circuit where the light-emitting element is located at the first power supply voltage. It can be used to age any one of the light-emitting control sub-circuits, such as aging the first light-emitting control sub-circuit, or it can be used to age the second light-emitting control sub-circuit through adaptive adjustment.

[0118] The technical solutions of this application have been described above with reference to the preferred embodiments shown in the accompanying drawings. However, it will be readily understood by those skilled in the art that the scope of protection of this application is obviously not limited to these specific embodiments. Without departing from the principles of this application, those skilled in the art can make equivalent changes or substitutions to the relevant technical features, and the technical solutions after these changes or substitutions will all fall within the scope of protection of this application.

Claims

1. An aging method for pixel circuits, characterized in that, The pixel circuit includes a compensation sub-circuit, a first reset sub-circuit, a data writing sub-circuit, a first light emission control sub-circuit, a driving sub-circuit, a second light emission control sub-circuit, and a light emission element; The first light-emitting control sub-circuit, the driving sub-circuit, and the second light-emitting control sub-circuit are sequentially arranged between the first power supply voltage and the anode of the light-emitting element, and the cathode of the light-emitting element is connected to the second power supply voltage. The first reset sub-circuit is at least used to provide a first initialization voltage to the anode of the light-emitting element; The data writing sub-circuit is used to provide a data voltage to the output terminal of the first light-emitting control sub-circuit, and to write a gate driving voltage to the control terminal of the driving sub-circuit based on the compensation sub-circuit. The method includes: During the aging process, the first light-emitting control sub-circuit and the second light-emitting control sub-circuit are turned off. A preset voltage is provided to the output terminal of the first light-emitting control sub-circuit based on any one of the first initialization voltage, the data voltage, and the gate drive voltage, so that the gate-drain voltage and drain-source voltage of the first light-emitting control sub-circuit meet the leakage current elimination condition.

2. The method according to claim 1, characterized in that, The control terminals of both the first and second light-emitting control sub-circuits are used to input light-emitting control signals. Controlling the first light-emitting control sub-circuit and the second light-emitting control sub-circuit to turn off includes: During the aging process in the writing or light emission stage, the first light emission control sub-circuit and the second light emission control sub-circuit are turned off based on the light emission control signal.

3. The method according to claim 2, characterized in that, The data writing sub-circuit includes a fourth transistor, the input terminal of which is used to input the data voltage, the output terminal of which is connected to the output terminal of the first light-emitting control sub-circuit, and the control terminal of which is used to input a first gate signal. Based on the data voltage, a preset voltage is provided to the output terminal of the first light-emitting control sub-circuit, including: During the aging process in the writing or light-emitting stage, the fourth transistor is controlled to turn on based on the first gate signal, and a preset voltage is provided to the output terminal of the first light-emitting control sub-circuit based on the data voltage.

4. The method according to claim 3, characterized in that, During the aging process in the writing phase, the step of controlling the fourth transistor to turn on based on the first gate signal and providing a preset voltage to the output of the first light-emitting control sub-circuit based on the data voltage includes: The refresh frequency of the pixel circuit is adjusted to a preset refresh frequency, which is lower than the refresh frequency of the pixel circuit during the lamp-lighting process. During the refresh cycle of the preset refresh frequency, in the writing phase, the fourth transistor is controlled to turn on based on the first gate signal, and a preset voltage is provided to the output terminal of the first light-emitting control sub-circuit based on the data voltage.

5. The method according to claim 2, characterized in that, The data writing sub-circuit includes a fourth transistor and an eighth transistor. The input terminal of the fourth transistor is used to input the data voltage, the output terminal of the fourth transistor is connected to the output terminal of the first light-emitting control sub-circuit, and the control terminal of the fourth transistor is used to input a first gate signal. The input terminal of the eighth transistor is connected to the input terminal of the fourth transistor, the output terminal of the eighth transistor is connected to the output terminal of the fourth transistor, and the control terminal of the eighth transistor is used to input a second gate signal. Based on the data voltage, a preset voltage is provided to the output terminal of the first light-emitting control sub-circuit, including: During the aging process in the light-emitting stage, the fourth transistor is controlled to turn off based on the first gate signal; Furthermore, based on the second gate signal, the eighth transistor is controlled to turn on, and a preset voltage is provided to the output terminal of the first light-emitting control sub-circuit based on the data voltage.

6. The method according to claim 2, characterized in that, The compensation sub-circuit includes a capacitor, a second transistor, and a ninth transistor. The first terminal of the capacitor is connected to the first power supply voltage, and the second terminal of the capacitor is connected to the control terminal of the driving sub-circuit. The first terminal of the second transistor is connected to the control terminal of the driving sub-circuit, and the second terminal of the second transistor is connected to the output terminal of the driving sub-circuit. The control terminal of the second transistor is used to input a first gate signal. The first terminal of the ninth transistor is connected to the control terminal of the driving sub-circuit, and the second terminal of the ninth transistor is connected to the output terminal of the first light-emitting control sub-circuit. The control terminal of the ninth transistor is used to input a third gate signal. Based on the gate driving voltage, a preset voltage is provided to the output terminal of the first light-emitting control sub-circuit, including: The aging process is performed during the light-emitting stage, and the data writing sub-circuit and the second transistor are controlled to turn off based on the first gate signal; as well as, Based on the third gate signal, the ninth transistor is controlled to turn on, and a preset voltage is provided to the output terminal of the first light-emitting control sub-circuit based on the gate drive voltage.

7. The method according to claim 2, characterized in that, The first reset sub-circuit includes a seventh transistor and a tenth transistor. The input terminal of the seventh transistor is used to input the first initialization voltage, the output terminal of the seventh transistor is connected to the anode of the light-emitting element, and the control terminal of the seventh transistor is used to input a first gate signal. The input terminal of the tenth transistor is connected to the input terminal of the seventh transistor, the output terminal of the tenth transistor is connected to the output terminal of the first light-emitting control sub-circuit or the driving sub-circuit, and the control terminal of the tenth transistor is used to input a fourth gate signal. Based on the first initialization voltage, a preset voltage is provided to the output terminal of the first light-emitting control sub-circuit, including: The aging process is performed during the light-emitting stage, and the seventh transistor is controlled to turn off based on the first gate signal; as well as, Based on the fourth gate signal, the tenth transistor is controlled to turn on, and a preset voltage is provided to the output terminal of the first light-emitting control sub-circuit based on the first initialization voltage.

8. The method according to any one of claims 1 to 7, characterized in that, The leakage current elimination conditions include a gate-drain voltage of 22 to 30V and a drain-source voltage of -12 to -20V.

9. The method according to any one of claims 1 to 7, characterized in that, The first light-emitting control sub-circuit includes a fifth transistor, and the second light-emitting control sub-circuit includes a sixth transistor. The input terminal of the fifth transistor is used to input the first power supply voltage, and the output terminal of the fifth transistor is connected to the output terminal of the data writing sub-circuit. The input terminal of the sixth transistor is connected to the output terminal of the driving sub-circuit, and the output terminal of the sixth transistor is connected to the anode of the light-emitting element. The control terminals of both the fifth and sixth transistors are used to input light-emitting control signals.

10. The method according to claim 1, characterized in that, The pixel circuit further includes a second reset sub-circuit, the input terminal of which is used to input a second initialization voltage, the output terminal of which is connected to the control terminal of the driving sub-circuit, and the control terminal of which is used to input a reset signal. The method further includes: During the reset phase, the second reset sub-circuit is turned on based on the reset signal, and the control terminal of the drive sub-circuit is initialized based on the second initialization voltage.

11. A pixel circuit, characterized in that, It includes a compensation sub-circuit, a first reset sub-circuit, a data writing sub-circuit, a first light-emitting control sub-circuit, a driving sub-circuit, a second light-emitting control sub-circuit, a light-emitting element, and a voltage control sub-circuit; The first light-emitting control sub-circuit, the driving sub-circuit, and the second light-emitting control sub-circuit are sequentially arranged between the first power supply voltage and the anode of the light-emitting element, and the cathode of the light-emitting element is connected to the second power supply voltage. The first reset circuit is used to provide a first initialization voltage to the anode of the light-emitting element; The data writing sub-circuit is used to provide a data voltage to the output terminal of the first light-emitting control sub-circuit, and to write a gate driving voltage to the control terminal of the driving sub-circuit based on the compensation sub-circuit. During the aging process, the first light emission control sub-circuit and the second light emission control sub-circuit are used to turn off in response to the light emission control signal at the control terminal; The voltage control sub-circuit is used to provide a preset voltage to the output terminal of the first light-emitting control sub-circuit based on any one of the first initialization voltage, the data voltage, and the gate drive voltage, so that the gate-drain voltage and drain-source voltage of the first light-emitting control sub-circuit meet the leakage current elimination condition.

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