Display device manufacturing method, display device and display equipment

Abstract

The present invention discloses a method for preparing a display device, a display device, and a display apparatus. The display device manufacturing method includes: providing a welding layer on a provided carrier board, the welding layer including a plurality of welding units distributed in an array, each welding unit including a circuit and a pad; welding a light-emitting chip and a driver IC to the pads in each welding unit to obtain a plurality of display units, wherein the light-emitting chip and the driver IC are connected via circuits; covering the display units with a packaging adhesive layer; removing the carrier board at the bottom of the welding layer to obtain a display device array; and cutting the display device array to obtain a plurality of independent display devices. Using the carrier board as the implementation carrier of the display device, uniformly providing circuits, pads, light-emitting chips, and driver ICs on the carrier board, a plurality of substrate-free display devices can be obtained simply and efficiently, achieving the requirements of thin packaging, reducing the manufacturing cost of the display device, and improving the yield rate, making it suitable for the production of large-scale macro display devices.

Description

Technical Field

[0001] The present invention relates to the technical field of display devices, and in particular to a method for manufacturing a display device, a display device, and a display apparatus. Background Art

[0002] With the promotion of Mini / Mirco LEDs, LED displays have entered the era of fine pitch. For Mini / Mirco LEDs, as the pixel pitch becomes smaller, the chip and driver size of LED displays are getting smaller and smaller, and LED devices are also tending to be thinner.

[0003] In the existing technology, in order to meet the requirements of thin packaging, the thickness of both the PCB substrate and the wiring frame is reduced as much as possible. However, due to process limitations, reducing the thickness of the PCB substrate and the wiring frame usually requires the assistance of complex processes, which makes the cost high. In addition, the high process difficulty makes the yield relatively low, making it difficult to achieve mass production of thin-packaged Mini / Mirco LED devices. Summary of the Invention

[0004] The present invention provides a method for preparing a display device, so as to solve the problems of high cost and low yield when a thin display device is required to be realized through a complex process in the prior art.

[0005] In a first aspect, the present invention provides a method for manufacturing a display device, comprising:

[0006] A welding layer is provided on the provided carrier board, wherein the welding layer includes a plurality of welding units distributed in an array, and each of the welding units includes a circuit and a pad;

[0007] Soldering a light-emitting chip and a driver IC onto the soldering pads in each soldering unit to obtain a plurality of display units, wherein the light-emitting chip and the driver IC are connected via the circuit;

[0008] covering the display unit with a packaging adhesive layer;

[0009] removing the carrier board at the bottom of the welding layer to obtain a display device array;

[0010] The display device array is cut to obtain a plurality of independent display devices.

[0011] Optionally, the soldering layer is a three-layer structure, which includes a bottom solder resist layer, a metal conductive layer, and a top solder resist layer from bottom to top. The soldering layer is provided on the provided carrier board, including:

[0012] Bonding a metal conductive layer to a provided carrier board;

[0013] Disposing a bottom solder resist layer on the upper surface of the metal conductive layer;

[0014] Separating the metal conductive layer from the carrier board and then flipping it over, and bonding the bottom solder resist layer to the carrier board;

[0015] Arranging a plurality of welding units on the metal conductive layer;

[0016] A top solder resist layer is disposed between the pads in the soldering unit of the metal conductive layer.

[0017] Optionally, after separating the metal conductive layer from the carrier and bonding the bottom solder resist layer to the carrier, the method further includes:

[0018] A plurality of blind holes are arranged at the edge of the metal conductive layer, and the blind holes vertically penetrate the metal conductive layer and the bottom solder resist layer and extend into the carrier board.

[0019] Optionally, providing a top solder resist layer on the upper surface of the metal conductive layer includes:

[0020] Solder resist ink is coated on the upper surface of the metal conductive layer, and the solder resist ink is allowed to flow into the blind hole.

[0021] Optionally, after covering the display unit with a packaging adhesive layer, the method further includes:

[0022] The area where the blind hole is located is removed.

[0023] Optionally, the removing the area where the blind hole is located includes:

[0024] For each area where the blind hole is located, a circular excision is performed on the area where the blind hole is located according to the central axis of the blind hole and a preset cutting radius.

[0025] Optionally, the display device array is cut to obtain a plurality of independent display devices, including:

[0026] Marking alignment lines in the X direction and the Y direction on the grid lines formed by the boundary lines of the display unit;

[0027] The display device array is cut using the alignment lines as cutting position calibration marks to obtain a plurality of independent display devices.

[0028] Optionally, the display device array is an M×N matrix, the grid lines include horizontal lines and vertical lines, each horizontal line includes N boundary lines of the display units, and each vertical line includes M boundary lines of the display units, and marking alignment lines in the X direction and the Y direction on the grid lines formed by the boundary lines of the display units includes:

[0029] On each of the grid lines, at least two boundary lines of the display units are marked as alignment lines.

[0030] Optionally, marking at least two boundary lines on each of the grid lines as alignment lines includes:

[0031] On each of the grid lines, at least the boundary lines of the display units at the leading and trailing ends are marked as alignment lines.

[0032] In a second aspect, the present invention provides a display device manufactured using the display device manufacturing method according to the first aspect, the display device comprising:

[0033] A welding layer, wherein the welding layer includes a welding unit, and the welding unit includes a circuit and a pad;

[0034] A display unit, wherein the display unit includes a light-emitting chip and a driver IC, wherein the light-emitting chip and the driver IC are soldered to the soldering pads in the soldering unit, and the light-emitting chip and the driver IC are connected via the circuit;

[0035] A packaging adhesive layer covers the display unit.

[0036] Optionally, in the display device, the driver IC is an active matrix driver IC, the light-emitting chip includes 4 chips, and the 4 chips and the active matrix driver IC are welded on the same side of the welding layer; the 4 chips are 1 red light chip, 2 green light chips and 1 blue light chip, and the 2 green light chips are diagonally arranged.

[0037] Optionally, the active matrix driver IC includes a first positive pin, four second positive pins, a first negative pin, a second negative pin and a third negative pin, and the active matrix driver IC further includes a CLK pin, a DATA pin, a Col pin and a Row pin;

[0038] The first positive pin, the two second positive pins, the first negative pin and the second negative pin are arranged in a first edge area of ​​the active matrix driver IC;

[0039] The third negative electrode pin and the two second positive electrode pins are arranged in a second edge region of the active matrix driver IC, and the first edge region is parallel to the second edge region;

[0040] The CLK pin, the DATA pin, the Col pin, and the Row pin are evenly arranged in a third edge region and a fourth edge region of the active matrix driver IC, and the third edge region is parallel to the fourth edge region.

[0041] Optionally, in the display device, the welding layer is provided with four die-bonding pads, one device positive pin, one device negative pin, one clock CLK signal pin, one data DATA signal pin, one column address Col signal pin, and one row address Row signal pin, and each of the die-bonding pads includes a positive pad and a negative pad;

[0042] The positive pin of the device is connected to the first positive pin through a metal trace; the negative pin of the device is connected to the third negative pin through a metal trace;

[0043] The positive electrode pad of each die-bonding pad is connected to one of the second positive electrode pins through a metal trace; the negative electrode pads of two die-bonding pads are respectively connected to the first negative electrode pin and the second negative electrode pin through metal traces; the negative electrode pads of the remaining two die-bonding pads are connected to the negative electrode pins of the device through metal traces;

[0044] The clock CLK signal pin, the data DATA signal pin, the column address Col signal pin, and the row address Row signal pin are respectively connected to the CLK pin, the DATA pin, the Col pin, and the Row pin through metal wiring.

[0045] Optionally, in the display device, the metal wiring is arranged in a single-layer manner.

[0046] In a third aspect, the present invention provides a display device comprising the display device as described in the second aspect.

[0047] An embodiment of the present invention provides a method for manufacturing a display device, comprising: providing a soldering layer on a provided carrier board, the soldering layer comprising a plurality of soldering units distributed in an array, each soldering unit comprising a circuit and a solder pad; soldering a light-emitting chip and a driver IC to the solder pads in each soldering unit to obtain a plurality of display units, wherein the light-emitting chip and the driver IC are connected via circuits; covering the display units with a packaging adhesive layer; removing the carrier board at the bottom of the soldering layer to obtain a display device array; and cutting the display device array to obtain a plurality of independent display devices. Using the carrier board as the implementation carrier of the display device, uniformly providing circuits, solder pads, light-emitting chips, and driver ICs on the carrier board can simply and efficiently obtain a plurality of display units. Removing the carrier board and cutting according to alignment lines can obtain a plurality of substrate-free display devices. Due to the substrate-free packaging, the package thickness of the display device is reduced, achieving the thin package requirement, reducing the manufacturing cost of LED devices and improving the yield rate, and being suitable for the production of large-scale mini / micro LED display devices.

[0048] It should be understood that the content described in this section is not intended to identify the key or important features of the embodiments of the present invention, nor is it intended to limit the scope of the present invention. Other features of the present invention will become readily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0049] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0050] Figure 1 This is a flow chart of a method for manufacturing a display device provided in the first embodiment of the present invention;

[0051] Figure 2a This is a front view of the structure of a display device array with a carrier board provided in the second embodiment of the present invention;

[0052] Figure 2b 1 is a top view of a structure of a display device array with a carrier board provided in a second embodiment of the present invention;

[0053] Figure 3 This is a flow chart of a method for manufacturing a display device provided in the second embodiment of the present invention;

[0054] Figure 4 This is a schematic diagram of structural changes during the process of manufacturing a display device array on a carrier board provided by the second embodiment of the present invention;

[0055] Figure 5This is a schematic diagram of providing a plurality of blind holes at the edge of a metal conductive layer provided by a second embodiment of the present invention;

[0056] Figure 6 This is a schematic diagram of a process for cutting a display device array with a carrier board into display devices, provided by a second embodiment of the present invention;

[0057] Figure 7 A schematic structural diagram of a single display device provided in the second embodiment of the present invention;

[0058] Figure 8 A schematic diagram of chip distribution in a display device structure provided in the third embodiment of the present invention;

[0059] Figure 9 A schematic structural diagram of an active matrix driver IC provided in the third embodiment of the present invention;

[0060] Figure 10 This is a schematic diagram of a wiring method in a display device provided in Example 3 of the present invention. DETAILED DESCRIPTION

[0061] In order to enable those skilled in the art to better understand the solutions of the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the embodiments described are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts should fall within the scope of protection of the present invention.

[0062] Example 1

[0063] Figure 1 This is a flow chart of a method for manufacturing a display device provided in the first embodiment of the present invention, as shown in FIG. Figure 1 As shown, the display device manufacturing method includes the following steps:

[0064] S101. Setting a welding layer on the provided carrier board.

[0065] In an embodiment of the invention, a carrier board serves as a packaging carrier for the entire display device. A carrier board refers to a template used during the assembly process to facilitate processes such as component fixation, insertion, connection, and welding, and is equivalent to an auxiliary tool for display device packaging. Carrier boards are typically made of special materials with good thermal stability and corrosion resistance, which can improve production efficiency and quality. Carrier boards are typically made of special materials such as steel plates, aluminum alloy plates, and plastic plates to meet the needs of mass production. The embodiments of the present invention do not limit the material of the carrier board, as long as it can serve as a packaging carrier. Figure 2a This is a front view of the structure of a display device array with a carrier board, as shown in FIG. Figure 2a As shown, the welding layer 20 is located on the upper surface of the carrier 10, and the welding units in the welding layer 20 are not Figure 2a As shown in FIG, the plane size of the carrier board 10 is at least the same as the plane size of the welding layer 20. In addition, in order to facilitate the arrangement of the display unit 30 on the welding layer 20 in subsequent steps, Figure 2b A top view of a structure of a display device array with a carrier board is shown in FIG. Figure 2b As shown, the planar size of the welding layer 20 is larger than the planar size of all the display units 30 to be arranged.

[0066] The soldering layer includes multiple soldering units arranged in an array, each of which includes circuits and pads. Each soldering unit corresponds to a display unit or display device, and each soldering unit is independent and has no electrical connection to each other. The circuits include pins and metal traces.

[0067] Optionally, the carrier board and the soldering layer are connected by bonding, which is to facilitate the bonding and separation of the carrier board and the soldering layer. On the one hand, the carrier board is only an auxiliary tool for making display devices and will be removed later. On the other hand, in the process of making the soldering layer on the carrier board, since the soldering layer is usually a multi-layer structure, for example, the soldering layer is a three-layer structure, with a bottom solder mask layer, a metal conductive layer, and a top solder mask layer from the bottom to the top, it may be necessary to repeatedly perform the bonding and removal steps, that is, the carrier board also needs to be removed during the process. Therefore, bonding is used to connect the carrier board and the soldering layer.

[0068] Specifically, a pyrolytic adhesive can be used to connect the carrier board to the solder layer. When bonding is required, the pyrolytic adhesive can bond the carrier board and the solder layer to form a fixed, integrated board. When the carrier board needs to be removed, the pyrolytic adhesive is heated to decompose into gas and liquid, which also weakens the adhesive's viscosity, allowing for quick and easy removal, facilitating subsequent steps.

[0069] S102 , soldering the light-emitting chip and the driver IC to the soldering pads in each soldering unit to obtain a plurality of display units.

[0070] Specifically, the light-emitting chip and driver IC can be soldered to the pads in each soldering unit through transfer soldering. After soldering the light-emitting chip and driver IC in each soldering unit, a display unit is obtained. Multiple soldering units can be used to obtain multiple display units. It should be noted that the display unit here only refers to the light-emitting chip and driver IC within the display unit.

[0071] The welding units are arranged in an array, and the display units are also arranged in an array. The display units at this time are the display devices before cutting. Figure 2a and Figure 2bAs shown, each display unit 30 is connected and arranged on the welding layer 20, as shown in FIG. Figure 2b As shown, the display units 30 are arranged in an array on the welding layer 20 .

[0072] It should be noted that the welding unit can be the same size as the display unit or smaller than the display unit. Usually, for convenience, the welding unit can be set to the same size as the display unit. The size of the display unit is usually set according to the size of the display device to be obtained and the cutting allowance. This can avoid cutting the internal components of the display device due to machine precision errors during cutting, thereby improving the yield of the display device. For example, the size of the display device to be obtained is 0.4mm*0.4mm. Assuming that the cutting allowance is 0.1mm, plus the cutting allowance, the size of each display unit is 0.5mm*0.5mm. Among them, the cutting allowance can usually be obtained based on the blade width of the cutting equipment, the cutting process, etc.

[0073] After the light-emitting chip and the driver IC are soldered to the pads in each soldering unit, the light-emitting chip and the driver IC are connected through a circuit. The circuit includes pins and metal traces. The light-emitting chip and the driver IC are specifically connected through the metal traces in the circuit. In each display unit, the driver IC can control the light emission and brightness of the light-emitting chip to achieve the desired display effect.

[0074] S103 , covering the display unit with a packaging adhesive layer.

[0075] The material of the encapsulation layer is encapsulation glue, which refers to a type of electronic glue or adhesive that can seal, encapsulate or pot components. Common encapsulation glues include epoxy encapsulation glue, silicone encapsulation glue, polyurethane encapsulation glue or UV light curing encapsulation glue. Figure 2a As shown, the encapsulation layer 40 covers the display unit 30 .

[0076] S104 , removing the carrier board at the bottom of the welding layer to obtain a display device array.

[0077] Because the solder layer and the carrier are bonded together, the carrier underneath the solder layer can be quickly removed. If a pyrolytic adhesive is used for bonding, heating the carrier underneath the solder layer in this step can reduce the viscosity of the pyrolytic adhesive between the solder layer and the carrier, making it easier to remove the carrier. Optionally, after removing the carrier, residual adhesive on the solder layer can be removed by cleaning.

[0078] S105 , cutting the display device array using the alignment lines as cutting position calibration marks to obtain a plurality of independent display devices.

[0079] Specifically, alignment lines in the X and Y directions can be marked on the grid lines formed by the boundary lines of the display units; the display device array is cut using the alignment lines as cutting position calibration marks to obtain multiple independent display devices.

[0080] Any two adjacent display units in the X or Y direction are connected, and the boundary lines of the two adjacent display units are shared, i.e., the intersection line. The display units are arranged in an array on the carrier board, and all the boundary lines can form a grid line. To cut all the display units on the carrier board, it is necessary to mark the X and Y direction alignment lines on the grid lines formed by the intersection lines. The alignment lines are used to calibrate the cutting position during cutting. Figure 2b As shown, the boundary lines of the display unit 30 constitute grid lines. To obtain each display unit 30 (display device), the lines on the grid lines need to be cut.

[0081] Because the dividing lines are distributed along the dividing lines of the X and Y directions, the display device array can be cut using the alignment lines as cutting position calibration marks. This allows the grid-like display device array to be cut into individual display devices, making the cutting process convenient and fast. During cutting, the cutting blade is perpendicular to the plane where the display device array is located.

[0082] The display device array is an M×N matrix, with grid lines including N+1 horizontal and M+1 vertical lines. Each horizontal line includes the boundaries of N display units, and each vertical line includes the boundaries of M display units. Alignment lines serve as markings for calibrating the cutting positions when cutting the display device array to obtain display devices. Alignment lines are simply set to ensure that the blade's cutting path is a straight line passing through each grid line.

[0083] Optionally, marking alignment lines in the X direction and the Y direction on the grid lines formed by the boundary lines of the display units includes: on each grid line, marking at least two boundary lines of the display units as alignment lines.

[0084] At least two boundary lines are used as alignment lines on the grid line. When the display unit is manufactured in accordance with the requirements, the two alignment lines are located on the same straight line. When cutting a grid line, the cutting path can be controlled on a straight line based on the two alignment lines of the grid line.

[0085] Furthermore, on each grid line, at least the boundary lines of the display units at the leading and trailing ends can be marked as alignment lines. The leading and trailing boundary lines can not only be used to calibrate the cutting position, but also to determine the blade feed position during cutting. When retracting the blade, the accuracy of the cutting path can be confirmed again based on the trailing boundary line.

[0086] Of course, on each grid line, in addition to the boundary lines at the beginning and the end, the boundary line in the middle of the grid line can also be used as an alignment line. Especially when there are a large number of display units and a large plane, the number of alignment lines can be appropriately increased to facilitate position calibration when cutting the display device array.

[0087] An embodiment of the present invention provides a method for manufacturing a display device, comprising: providing a soldering layer on a provided carrier board, the soldering layer comprising a plurality of soldering units distributed in an array, each soldering unit comprising a circuit and a solder pad; soldering a light-emitting chip and a driver IC to the solder pads in each soldering unit to obtain a plurality of display units, wherein the light-emitting chip and the driver IC are connected via circuits; covering the display units with a packaging adhesive layer; removing the carrier board at the bottom of the soldering layer to obtain a display device array; and cutting the display device array to obtain a plurality of independent display devices. Using the carrier board as the implementation carrier of the display device, uniformly providing circuits, solder pads, light-emitting chips, and driver ICs on the carrier board can simply and efficiently obtain a plurality of display units. Removing the carrier board and cutting according to alignment lines can obtain a plurality of substrate-free display devices. Due to the substrate-free packaging, the package thickness of the display device is reduced, achieving the thin package requirement, reducing the manufacturing cost of LED devices and improving the yield rate, and being suitable for the production of large-scale mini / micro LED display devices.

[0088] Example 2

[0089] Figure 3 This is a flow chart of a method for manufacturing a display device provided by the second embodiment of the present invention. The embodiment of the present invention is optimized based on the above-mentioned first embodiment. In this embodiment, the solder layer is a three-layer structure, which is a bottom solder resist layer, a metal conductive layer and a top solder resist layer from the bottom to the top. Figure 3 As shown, the display device manufacturing method includes the following steps:

[0090] S301 , bonding a metal conductive layer to the provided carrier board.

[0091] The material of the metal conductive layer is usually copper.

[0092] S302 , providing a bottom solder resist layer on the upper surface of the metal conductive layer.

[0093] Figure 4 Schematic diagram of structural changes in the process of manufacturing a display device array on a carrier board, such as Figure 4As shown in (a), a metal conductive layer 21 is bonded to the provided carrier board 10, which can be specifically bonded by pyrolytic adhesive, and then a bottom solder resist layer 22 is provided on the upper surface of the metal conductive layer 21, that is, solder resist ink is coated on the upper surface of the metal conductive layer 21 to produce the bottom solder resist layer 22 of the LED device. The pattern of the bottom solder resist layer 22 is the bottom pin pattern of the display device, that is, the window of the bottom solder resist layer 22 is the bottom pin of the display device, and the bottom pin is used to connect the display device to the display device.

[0094] S303, separating the metal conductive layer from the carrier board and then turning it over, and bonding the bottom solder resist layer to the carrier board.

[0095] like Figure 4 As shown in (a), after the metal conductive layer 21 is separated from the carrier 10 and flipped over, the carrier 10 is opposite to the bottom solder resist layer 22. At this time, the bottom solder resist layer 22 is bonded to the carrier 10. Similarly, the bonding can be performed by thermally debonding the adhesive.

[0096] S304 , setting a plurality of blind holes at the edge of the metal conductive layer.

[0097] like Figure 4 As shown in (c), a plurality of blind holes 50 are drilled at the edge of the metal conductive layer 21, and the blind holes 50 vertically penetrate the metal conductive layer 21 and the bottom solder resist layer 22 and extend into the carrier 10. It should be noted that, in Figure 4 In (c), only two blind holes 50 on both sides of the metal conductive layer 21 are used as examples. In the actual operation process, Figure 5 As shown, Figure 5 This is a schematic diagram of providing multiple blind holes at the edge of a metal conductive layer. Blind holes 50 can be provided at the edge of the entire plane of the metal conductive layer 21. When the plane of the metal conductive layer 21 is a square structure, the blind holes 50 can be provided at the edge areas of the four sides of the metal conductive layer 21.

[0098] Optionally, multiple blind holes can be set on the edge of the metal conductive layer based on a preset hole distance, that is, in the X direction or Y direction, the distance between two adjacent blind holes is the preset hole distance, and the preset hole distance can be 10 mm.

[0099] S305 , setting a plurality of welding units on the metal conductive layer.

[0100] The welding units are distributed in an array on the metal conductive layer. Each welding unit includes a circuit and a pad. Figure 4 Not shown in the figure.

[0101] S306 , providing a top solder resist layer between the pads in the soldering units of the metal conductive layer.

[0102] That is, the top solder mask does not cover the pad.

[0103] like Figure 4 As shown in (d) of FIG, solder resist ink is applied to the upper surface of metal conductive layer 21 to form a top solder resist layer 23. The openings in top solder resist layer 23 are solder pads. That is, except for the solder pads, all other circuits and locations on the surface of metal conductive layer 21 are covered with solder resist ink. Once top solder resist layer 23 is formed, bottom solder resist layer 22, metal conductive layer 21, and top solder resist layer 23 constitute solder layer 20.

[0104] like Figure 4 As shown in (d), during the process of applying solder resist ink to the upper surface of the metal conductive layer 21, a plurality of blind holes 50 are provided at the edge of the metal conductive layer 21, and a top solder resist layer is provided on the upper surface of the metal conductive layer 21, and the solder resist ink flows into the blind holes 50 at the same time. After the solder resist ink solidifies, the solder resist ink forms columns in the blind holes 50 that connect the metal conductive layer 21, the bottom solder resist layer 22, and the carrier 10. This is equivalent to adding a fixing structure, which can fix the relative position between the solder layer 20 and the carrier 10 and improve the bonding strength between the entire solder layer 20 and the carrier 10, thereby preventing relative displacement of the fixed solder layer 20 and the carrier 10 and preventing loose bonding between the fixed solder layer 20 and the carrier 10.

[0105] Because the display device of the present invention is a Mini / Mirco LED with a fine pitch, even a small relative displacement or looseness between the fixed soldering and the carrier board may cause a large precision error in the production of the display device. In the embodiment of the present invention, an aperture structure is set between the soldering layer and the carrier board and solder mask ink is poured. When setting the top solder mask layer, the aperture structure can be poured with ink at the same time. This can simply and efficiently increase the bonding force between the soldering layer and the carrier board, ensure the production accuracy of the display device, and further ensure the yield of the display device.

[0106] S307 , soldering the light-emitting chip and the driver IC to the soldering pads in each soldering unit to obtain a plurality of display units.

[0107] like Figure 4 As shown in (e) in FIG. 1 , the display unit 30 is disposed on the upper surface of the soldering layer 20 . In each display unit 30 , the light-emitting chip and the driver IC are connected via the wiring in the soldering unit. Furthermore, the display unit 30 is typically disposed within the range surrounded by the blind hole 50 .

[0108] S308 , covering the display unit with a packaging adhesive layer.

[0109] like Figure 4As shown in (e) in FIG. 3 , the display unit 30 is covered with a packaging adhesive layer 40 . It should be noted that the packaging adhesive layer 40 may also cover the area where the blind hole 50 is located, and the present invention is not limited to this.

[0110] S309: Cut off the area where the blind hole is located.

[0111] After the blind hole is poured with ink, the ink turns into a column inside the blind hole. The column can increase the bonding force between the solder layer and the carrier. In order to facilitate the peeling of the carrier from the solder layer in the subsequent steps, the bonding force between the solder layer and the carrier needs to be reduced, so the column needs to be removed in advance.

[0112] Optionally, the area where the blind holes are located is removed. This includes, when the weld layer has a square structure, determining the display unit closest to the blind holes in the edge region of each side, and drawing a cutting line parallel to the current side based on the display unit to ensure that all blind holes and display units are located on both sides of the cutting line. In other words, using a single cutting line to remove the columns in all blind holes in the edge region of the current side at once allows for quick and efficient removal of the columns in the blind holes.

[0113] Optionally, the step of cutting the area where the blind hole is located further includes: for each area where the blind hole is located, performing an annular cutting on the area where the blind hole is located according to the central axis of the blind hole and a preset cutting radius. Figure 6 Schematic diagram of a process of cutting a display device array with a carrier board into display devices, such as Figure 6 As shown in (a), the dotted line around the area where the blind hole 50 is located is a circular cutting line. According to the circular cutting line, the column in the blind hole 50 is cut off, and the following can be obtained: Figure 6 The display device array with a carrier board shown in (b).

[0114] That is, a circular cut is performed for each blind hole, and each column is removed in turn. When drilling a conductive metal layer to obtain a blind hole, due to machine precision limitations, the size and position of multiple blind holes may vary. A very small number of blind holes may be located next to the display unit, which may damage the components in the display unit during cutting and render the display unit scrapped. Therefore, in this example, a circular cut is performed for each blind hole, which can precisely remove the column, minimize the damage to the display unit caused by removing the column, reduce losses, and improve the yield rate.

[0115] Optionally, the ratio of the cutting radius to the radius of the blind hole is greater than 1 and less than 2, so as to avoid expanding the cutting range on the basis of effectively removing the column obtained after pouring solder mask ink into the blind hole.

[0116] S310, removing the carrier board at the bottom of the welding layer to obtain a display device array.

[0117] After removing the carrier board 10 at the bottom of the welding layer 20, the following is obtained: Figure 6 The display device array shown in (c) is composed of a welding layer 20, a display unit 30 and a packaging glue layer 40.

[0118] Specifically, when the soldering layer and the carrier board are bonded by using a thermally degradable adhesive, the carrier board at the bottom of the soldering layer can be removed by heating to thermally degrade the adhesive.

[0119] S311 , cutting the display device array to obtain multiple independent display devices.

[0120] By cutting the display device array, multiple independent Figure 7 The display device shown, Figure 7 Schematic diagram of the structure of a single display device.

[0121] The display device manufacturing method provided in the embodiment of the present invention can reduce the loss of the display device by increasing the bonding force between the carrier board and the welding layer and performing circular cutting on the area where the blind hole is located, thereby improving the yield of the display device. In addition, the display device is uniformly manufactured on the carrier board, which is suitable for the production of large-scale Mini / Mirco LED display devices.

[0122] Example 3

[0123] A third embodiment of the present invention provides a display device, which is manufactured using the display device manufacturing method of the first or second embodiment. The display device includes:

[0124] The welding layer includes welding units, and the welding units include circuits and pads;

[0125] A display unit, the display unit includes a light-emitting chip and a driver IC, the light-emitting chip and the driver IC are soldered to pads in the soldering unit, and the light-emitting chip and the driver IC are connected via a circuit;

[0126] The encapsulation adhesive layer covers the display unit.

[0127] Optionally, in an embodiment of the present invention, the light-emitting chip is a flip-chip. In the display device, the driver IC is an active matrix driver IC, and the light-emitting chip includes four chips, which are soldered to the same side of the solder layer as the active matrix driver IC. The four chips are one red chip, two green chips, and one blue chip, with the two green chips arranged diagonally.

[0128] Figure 8 A schematic diagram of chip distribution in a display device structure is shown in FIG. Figure 8As shown, in the display device A1, in the order from left to right and from top to bottom, the first chip is a red chip 11, the second and third chips are green chips 12, and the fourth chip is a blue chip 13. The two green chips 12 are arranged diagonally. It should be noted that Figure 8 The chip distribution shown is only an example. The present invention only limits the two green chips 12 to be arranged diagonally, and does not limit the placement of the red chip 11, the green chip 12, and the blue chip 13.

[0129] The present invention utilizes an active matrix (AM) driver IC. This is due to the complex wiring of PM drivers, the high parasitic resistance and capacitance that lead to low efficiency, short pixel light-emitting time, and thus low effective brightness. This leads to crosstalk between pixels and a high frequency requirement for the scanning signal. As pixel pitches reach the finer stage, especially below 0.7mm, the manufacturing and processing of PM driver ICs and the substrate of the LED display becomes increasingly difficult. Therefore, the AM driver IC is adopted, employing an independent drive circuit for one-to-one control of the LEDs. This allows each pixel to be continuously and independently driven to emit light, while also reducing the manufacturing difficulty and cost of mini / micro LEDs. Furthermore, both the AM and PM driver ICs are semiconductor products. When the AM driver IC is sufficiently small, the cost of the AM driver IC required for the LED display array is also lower.

[0130] In the display device, the four chips and the active matrix driver IC are located on the same side of the soldering layer. The electrical conductors inside the display device manufactured with this structure can be designed as a single layer, without adding guide holes to make a double layer design. Because the double layer design is usually more complex and difficult to manufacture, especially for the fine pitch Mini / Mirco LED, adding guide holes will also occupy the space of the soldering layer, which is not conducive to the layout of pads, pins, etc., and the manufacturing difficulty is even greater. It can be seen that the single layer design adopted by the present invention can reduce the manufacturing difficulty and cost of Mini / Mirco LED.

[0131] When multiple display devices of the same structure are distributed in an array, the chip is used as a matrix element, and any minimum 2×2 matrix constitutes a display pixel in the LED display device array. For example, the chip is used as a matrix element and numbered, and each chip is numbered X. RC , R represents the row where the chip is located, C represents the column where the chip is located, then chip X 12 、X 13 、X 22 、X 23 Can form a display pixel, X 13 、X 14 、X 23 、X 24It can also form a display pixel, and so on. Through pixel multiplexing technology, without increasing the number of chips, the number of display pixels can be increased in the same unit area, that is, the density of display pixels is increased, the distance between display pixels is reduced, and the pixel resolution is improved. At present, the minimum size of real pixel lamp beads is 0404, that is, 0.4*0.4mm, and its applicable dot pitch LED display screen is P0.6mm or above. The solution of the present invention proposes that the lamp beads can achieve a minimum dot pitch of 0.31mm for the LED display screen. It can be seen that the solution of the present invention is conducive to the production of Mini / Mirco LEDs, reducing the production difficulty and cost of Mini / Mirco LEDs; and, on the same area, it achieves the effect of more light-emitting points, improves the smoothness of the single-primary color image of the display screen, and improves the display image effect. It can also save the number of chips and further reduce the production cost of Mini / Mirco LEDs.

[0132] Optional, Figure 9 It is a structural diagram of an active matrix driver IC, such as Figure 9 As shown, the active matrix driver IC 4 includes a first positive pin 41, four second positive pins 42, a first negative pin 43, a second negative pin 44, and a third negative pin 45. The active matrix driver IC 4 also includes a CLK pin 46, a DATA pin 47, a Col pin 48, and a Row pin 49. The first positive pin 41, the two second positive pins 42, the first negative pin 43, and the second negative pin 44 are arranged in a first edge area of ​​the active matrix driver IC 4.

[0133] The third negative electrode pin 45 and the two second positive electrode pins 42 are arranged in the second edge region of the active matrix driver IC 4, and the first edge region is parallel to the second edge region;

[0134] CLK pin 46, DATA pin 47, Col pin 48, and Row pin 49 are evenly arranged in the third and fourth edge regions of the active matrix driver IC 4, with the third and fourth edge regions being parallel. The term "evenly arranged" here means that the four pins are evenly distributed in the third and fourth edge regions, i.e., two pins are distributed in each of the third and fourth edge regions.

[0135] Among them, the CLK pin 46 is the clock input / output terminal, which is used for reading and writing time; the DATA pin 47 is the communication interaction interface, the Col pin 48 is used to output the column address signal, and the Row pin 49 is used to output the row address signal. The column address signal and the row address signal are the address selection signals of the chip.

[0136] exist Figure 9In the embodiment, the DATA pin 47 and the Row pin 49 are arranged at the third edge region of the active matrix driver IC 4, and the CLK pin 46 and the Col pin 48 are arranged at the fourth edge region of the active matrix driver IC 4. However, it should be noted that Figure 9 The arrangement of the CLK pin 46, DATA pin 47, Col pin 48 and Row pin 49 shown is only an example, and the positions of these four pins are interchangeable. For example, the DATA pin 47 and Col pin 48 can be arranged in the third edge area of ​​the active matrix driver IC 4, and the CLK pin 46 and Row pin 49 can be arranged in the fourth edge area of ​​the active matrix driver IC 4. The DATA pin 47 and Row pin 49 can also be arranged in the fourth edge area of ​​the active matrix driver IC 4, and the CLK pin 46 and Col pin 48 can be arranged in the third edge area of ​​the active matrix driver IC 4, and so on. The arrangement of the CLK pin 46, DATA pin 47, Col pin 48 and Row pin 49 can be set according to the layout of the corresponding pins in the display device and based on the principle of saving wiring.

[0137] Optionally, the first cathode pin 43 , the second cathode pin 44 and the third cathode pin 45 are electrically connected internally.

[0138] Optional, such as Figure 10 As shown, Figure 10 This is a schematic diagram of the wiring method in a display device. In the display device A1, four die-bonding pads 52, one device positive pin 53, one device negative pin 54, one clock CLK signal pin 55, one data DATA signal pin 56, one column address Col signal pin 57, and one row address Row signal pin 58 are provided on the metal conductive layer 21 in the welding layer 20. Each die-bonding pad 52 includes a positive pad 521 and a negative pad 522.

[0139] The pins and pads on the metal conductive layer are electrically connected to the corresponding pins in the active matrix driver IC through metal traces. Figure 10 In the active matrix driver IC 4, the pin arrangement is the same as Figure 9The specific connection method is as follows: the device positive pin 53 is connected to the first positive pin 41 via a metal trace; the device negative pin 54 is connected to the third negative pin 45 via a metal trace; the positive pad 521 in each die-bonding pad 52 is connected to one second positive pin 42 via a metal trace; the negative pads 522 of two die-bonding pads 52 are connected to the first negative pin 43 and the second negative pin 44, respectively, via metal traces; and the negative pads 522 of the remaining two die-bonding pads 52 are connected to the device negative pin 54 via metal traces. It can be seen that the two negative pads 522 connected to the device negative pin 54 are ultimately electrically connected to the third negative pin 45. In addition, the clock CLK signal pin 55, the data DATA signal pin 56, the column address Col signal pin 57, and the row address Row signal pin 58 are respectively connected to the CLK pin 46, the DATA pin 47, the Col pin 48, and the Row pin 49 via metal traces.

[0140] like Figure 10 As shown, after the metal traces are set according to the above connection relationship, the die-bonding pads 52, the pins of the display device A1 and the active matrix driver IC 4 are still on the same surface of the metal conductive layer 21, wherein the four die-bonding pads 52 are used to fix the four chips in the display device A1, and each chip is fixed in one die-bonding pad 52. When the chip is fixed on the die-bonding pad 52, the positive pin of the chip is connected to the positive pad 521, and the negative pin of the chip is connected to the negative pad 522, so that the chip can be effectively connected to the active matrix driver IC 4, without setting vias on the metal conductive layer 21, to achieve a single-layer design.

[0141] Logic pins are pins corresponding to logic control functions. In this embodiment, the logic pins include one device positive pin, one device negative pin, one clock CLK signal pin, one data DATA signal pin, one column address Col signal pin, and one row address Row signal pin. They also include four second positive pins (each chip performs logic control separately), so there are a total of 10 logic pins. Generally speaking, the number of pads / pins set in the active matrix driver IC corresponds to the number of logic pins. However, this embodiment sets 12 logic pins in the active matrix driver IC. Compared with the conventional design, two VDD pins are added, namely the first negative pin and the second negative pin. By adding these two pins, the metal routing distance can be reduced and the routing operation difficulty can be reduced. There is no need to add guide holes to make a double-layer design, which can avoid the crossing of metal routing, further ensuring the feasibility of realizing a single-layer design display device.

[0142] Optionally, in the display device, the metal traces are arranged in a single-layer wiring manner. Four chips and an active matrix driver IC are soldered on the same side of the metal conductive layer. Under the condition of a reasonable layout of the chips, pins, and active matrix driver IC, the single-layer wiring method is feasible. The advantage of single-layer wiring is that there is no need to add guide holes to make a double-layer design. Therefore, the present invention adopts a single-layer wiring method to set the metal traces. The manufacturing difficulty of the single-layer design is lower than that of the double-layer design, which can reduce the manufacturing difficulty of the micro-pitch Mini / Mirco LED.

[0143] The embodiment of the present invention provides an internal structure of a display device, which reduces the difficulty of manufacturing fine-pitch Mini / Mirco LEDs through pixel multiplexing, active matrix driver IC and single-layer wiring, making batch production of fine-pitch Mini / Mirco LEDs feasible.

[0144] An embodiment of the present invention also provides a display device, including a display device as provided in the aforementioned embodiment, and the display device has the corresponding functions and effects of the display device provided in the aforementioned embodiment of the present invention. The display device can be a portable smart device such as a smart phone or a tablet computer, or it can be a fixed vertical display device such as a computer display or a conference room display. The embodiment of the present invention is not limited here.

[0145] In the description of this document, it should be understood that the terms "up", "down", "left", "right", etc., such as orientation or positional relationships, are based on the orientation or positional relationships shown in the accompanying drawings, and are only for the convenience of description and simplification of operation, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present invention.

[0146] Throughout this specification, reference to terms such as "one embodiment" or "example" indicates that a specific feature, structure, material, or characteristic described in conjunction with that embodiment or example is included in at least one embodiment or example of the present invention. In this specification, schematic representations of these terms do not necessarily refer to the same embodiment or example.

[0147] In addition, it should be understood that although this specification is described in terms of implementation methods, not every implementation method contains only one independent technical solution. This narrative method of the specification is only for the sake of clarity. Those skilled in the art should regard the specification as a whole. The technical solutions in each embodiment can also be appropriately combined to form other implementation methods that can be understood by those skilled in the art.

[0148] The technical principles of the present invention have been described above with reference to specific embodiments. These descriptions are intended solely to illustrate the principles of the present invention and are not to be construed in any way as limiting the scope of protection of the present invention. Based on the explanations herein, those skilled in the art will readily conceive of other specific embodiments of the present invention without inventive effort, and such embodiments will fall within the scope of protection of the present invention.

Claims

1. A method for manufacturing a display device, characterized in that: include: A welding layer is provided on the provided carrier board, wherein the welding layer includes a plurality of welding units distributed in an array, and each of the welding units includes a circuit and a pad; Soldering a light-emitting chip and a driver IC onto the soldering pads in each soldering unit to obtain a plurality of display units, wherein the light-emitting chip and the driver IC are connected via the circuit; covering the display unit with a packaging adhesive layer; removing the carrier board at the bottom of the welding layer to obtain a display device array; cutting the display device array to obtain a plurality of independent display devices; The soldering layer is a three-layer structure, which includes a bottom solder resist layer, a metal conductive layer, and a top solder resist layer from the bottom to the top. The soldering layer is provided on the provided carrier board, including: Bonding a metal conductive layer to a provided carrier board; Disposing a bottom solder resist layer on the upper surface of the metal conductive layer; Separating the metal conductive layer from the carrier board and then flipping it over, and bonding the bottom solder resist layer to the carrier board; Arranging a plurality of welding units on the metal conductive layer; providing a top solder resist layer between the pads in the soldering unit of the metal conductive layer; After separating the metal conductive layer from the carrier and bonding the bottom solder resist layer to the carrier, the method further includes: A plurality of blind holes are provided at the edge of the metal conductive layer, wherein the blind holes vertically penetrate the metal conductive layer and the bottom solder resist layer and extend into the carrier board; The step of providing a top solder resist layer on the upper surface of the metal conductive layer comprises: Solder resist ink is coated on the upper surface of the metal conductive layer, and the solder resist ink is allowed to flow into the blind hole.

2. The method for manufacturing a display device according to claim 1, wherein: After covering the display unit with a packaging glue layer, the method further includes: The area where the blind hole is located is removed.

3. The method for manufacturing a display device according to claim 2, wherein: The step of removing the area where the blind hole is located includes: For each area where the blind hole is located, a circular excision is performed on the area where the blind hole is located according to the central axis of the blind hole and a preset cutting radius.

4. The method for manufacturing a display device according to claim 3, wherein: The display device array is cut to obtain a plurality of independent display devices, comprising: Marking alignment lines in the X direction and the Y direction on the grid lines formed by the boundary lines of the display unit; The display device array is cut using the alignment lines as cutting position calibration marks to obtain a plurality of independent display devices.

5. The method for manufacturing a display device according to claim 4, wherein: The display device array is an M×N matrix, the grid lines include horizontal lines and vertical lines, each horizontal line includes N boundary lines of the display units, each vertical line includes M boundary lines of the display units, and the alignment lines in the X direction and the Y direction are marked on the grid lines formed by the boundary lines of the display units, including: On each of the grid lines, at least two boundary lines of the display units are marked as alignment lines.

6. The method for manufacturing a display device according to claim 5, wherein: On each of the grid lines, marking at least two boundary lines as alignment lines includes: On each of the grid lines, at least the boundary lines of the display units at the leading and trailing ends are marked as alignment lines.

7. A display device, characterized in that: The display device is manufactured by the method for manufacturing a display device according to any one of claims 1 to 6, wherein the display device comprises: A welding layer, wherein the welding layer includes a welding unit, and the welding unit includes a circuit and a pad; A display unit, wherein the display unit includes a light-emitting chip and a driver IC, wherein the light-emitting chip and the driver IC are soldered to the soldering pads in the soldering unit, and the light-emitting chip and the driver IC are connected via the circuit; A packaging adhesive layer covers the display unit.

8. The display device according to claim 7, wherein In the display device, the driver IC is an active matrix driver IC, and the light-emitting chip includes 4 chips, and the 4 chips and the active matrix driver IC are welded on the same side of the welding layer; the 4 chips are 1 red light chip, 2 green light chips and 1 blue light chip, and the 2 green light chips are arranged diagonally.

9. The display device according to claim 8, wherein The active matrix driver IC includes a first positive pin, four second positive pins, a first negative pin, a second negative pin and a third negative pin, and the active matrix driver IC also includes a CLK pin, a DATA pin, a Col pin and a Row pin; The first positive pin, the two second positive pins, the first negative pin and the second negative pin are arranged in a first edge area of ​​the active matrix driver IC; The third negative electrode pin and the two second positive electrode pins are arranged in a second edge region of the active matrix driver IC, and the first edge region is parallel to the second edge region; The CLK pin, the DATA pin, the Col pin, and the Row pin are evenly arranged in a third edge region and a fourth edge region of the active matrix driver IC, and the third edge region is parallel to the fourth edge region.

10. The display device according to claim 9, wherein In the display device, the welding layer is provided with 4 die-bonding pads, 1 device positive pin, 1 device negative pin, 1 clock CLK signal pin, 1 data DATA signal pin, 1 column address Col signal pin, and 1 row address Row signal pin, and each of the die-bonding pads includes a positive pad and a negative pad; The positive pin of the device is connected to the first positive pin through a metal trace; the negative pin of the device is connected to the third negative pin through a metal trace; The positive electrode pad of each die-bonding pad is connected to one of the second positive electrode pins through a metal trace; the negative electrode pads of two die-bonding pads are respectively connected to the first negative electrode pin and the second negative electrode pin through metal traces; the negative electrode pads of the remaining two die-bonding pads are connected to the negative electrode pins of the device through metal traces; The clock CLK signal pin, the data DATA signal pin, the column address Col signal pin, and the row address Row signal pin are respectively connected to the CLK pin, the DATA pin, the Col pin, and the Row pin through metal wiring.

11. The display device according to claim 10, wherein In the display device, the metal wiring is arranged in a single-layer manner.

12. A display device, characterized in that: Comprising the display device according to any one of claims 7 to 11.

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