field effect transistor, insulated gate bipolar transistor, and trench mos diode

Abstract

The application belongs to the technical field of semiconductor, the structure of the existing Schottky junction MOSFET is partially designed and optimized, a new field effect transistor with large on-state current capacity and always-off function is provided, the field effect transistor comprises an n-type semiconductor layer, a drain electrode, a source electrode, a gate electrode and a gate insulating film, a Schottky barrier exists between the first part of the source electrode and the n-type semiconductor layer, and the second part of the source electrode is in contact with the n-type semiconductor layer to form an ohmic contact, and the on-state current capacity of the field effect transistor can be comparable to or even exceed that of the pn junction MOSFET under the same conditions.

Description

Technical Field

[0001] This invention belongs to the field of semiconductor technology, and in particular, relates to a field-effect transistor, an insulated-gate bipolar transistor, and a trench MOS diode. Background Technology

[0002] The Schottky source-drain MOSFET structure was proposed in the 1960s. It utilizes a metal source-drain to replace the semiconductor-doped source-drain of a traditional pn junction MOSFET, and a Schottky contact barrier is formed between the metal source-drain and the semiconductor. For a Schottky source-drain MOSFET, when a positive voltage is applied between the drain and source, the Schottky barrier formed between the source and the semiconductor material is reverse-biased, causing the depletion layer to widen and thus achieving turn-off. Therefore, the Schottky source-drain MOSFET is a normally-off device. The conduction of the Schottky source-drain MOSFET is achieved by forming a conductive channel under the action of a positive gate bias, and the charge carriers at the source end tunnel directly through the barrier into the channel.

[0003] Compared to traditional pn junction MOSFETs, Schottky source-drain MOSFETs offer the following advantages: First, the metal Schottky contact features an ultra-shallow junction, effectively suppressing the short-channel effect and source-drain punch-through problem that plagues conventional MOSFETs as device size decreases significantly, thus enabling further size reduction of MOSFETs. Second, the high conductivity of the metal-semiconductor contact further reduces drain-source resistance. Third, Schottky source-drain MOSFETs lack parasitic body transistor effects, resulting in faster response times and the ability to operate at higher frequencies. Fourth, ion implantation to form n+ or P+ source-drain regions is unnecessary, eliminating the need for high-temperature annealing and simplifying the process. It also avoids the lattice damage issues associated with ion implantation and annealing, contributing to high interface quality and resulting in a high-quality dielectric layer with superior breakdown voltage and reliability.

[0004] However, since the inception of Schottky source-drain MOSFETs, they have had two significant drawbacks: First, their on-state current is small; when the drain-source voltage V of the Schottky source-drain MOSFET... DS When the value is greater than 0, the Schottky contact barrier formed between the Schottky source electrode and the semiconductor is reverse-biased, widening the depletion region. This makes it possible to deplete the region even when a positive gate-source voltage V is applied between the gate electrode and the Schottky source electrode. GSAt that time, a complete and high-concentration electron conduction channel could not be formed between the drain electrode and the Schottky source electrode. A certain Schottky barrier height always existed in the region near the Schottky source electrode. This limited Schottky barrier height suppressed the transport of electron carriers, so that only a small number of electron carriers formed current through tunneling. According to the formula for calculating conductivity σ=nqu (where n is the concentration of electron carriers participating in conduction, q is the amount of electron charge, and u is the mobility under a certain carrier concentration condition), the lower the concentration of carriers participating in conduction n, the lower the conductivity σ. Furthermore, according to the formula J = σE (where E represents the electric field strength), the lower the conductivity σ, the lower the current density J. This is why the on-state current of a Schottky source-drain MOSFET is smaller than that of a pn junction MOSFET under the same conditions. The on-state current of a conventional pn junction MOSFET can reach tens to hundreds of amperes, while the on-state current of a Schottky source-drain MOSFET under the same conditions can only reach milliamperes or even lower. Secondly, the off-state leakage current is large. The leakage current includes the thermionic emission current transmitted from the source junction through the substrate and the tunneling current from the source junction.

[0005] These two drawbacks, especially the low on-state current, have not yet been adequately addressed, severely limiting the use of Schottky source-drain MOSFETs, resulting in the absence of any commercial applications of Schottky source-drain MOSFETs to date. Summary of the Invention

[0006] In view of this, the present invention addresses the problems existing in the existing Schottky source-drain MOSFETs by improving the structure of the existing Schottky source-drain MOSFETs, solving the problem of small on-state current of the existing Schottky source-drain MOSFETs, and providing a normally-off semiconductor device with a large on-state current capability.

[0007] To solve the above-mentioned technical problems, the present invention provides a field-effect transistor having:

[0008] n-type semiconductor layer;

[0009] The electrodes include a drain electrode, a source electrode, and a gate electrode;

[0010] A gate insulating film, which is located between the gate electrode and the n-type semiconductor layer;

[0011] There is a Schottky barrier between the first part of the source electrode and the n-type semiconductor layer, and the second part of the source electrode forms an ohmic contact with the n-type semiconductor layer; the second part of the source electrode is closer to the gate insulating film than the first part of the source electrode.

[0012] Preferably, the first portion of the source electrode contacts the n-type semiconductor layer to form a Schottky barrier.

[0013] Preferably, a dielectric layer is provided between the first part of the source electrode and the n-type semiconductor layer, and the first part of the source electrode, the dielectric layer, and the n-type semiconductor layer form a MIS (metal-insulator-semiconductor) junction.

[0014] Preferably, the second portion of the source electrode is located between the first portion of the source electrode and the gate insulating film.

[0015] Preferably, the work function of the material corresponding to the second part of the source electrode is not higher than the work function of the material corresponding to the n-type semiconductor layer.

[0016] Preferably, the distance between the end of the second part of the source electrode away from the gate insulating film and the gate insulating film is in the range of 3nm to 200nm.

[0017] Preferably, the end of the second portion of the source electrode furthest from the gate insulating film is at a distance from the gate insulating film.

[0018] The width ranges from 3nm to 100nm.

[0019] Preferably, the second portion of the source electrode is connected to the source electrode.

[0020] The first part of the pole is a metal or alloy with a different work function.

[0021] Preferably, the first part and the second part of the source electrode are coplanar, or the bottom surface of the first part of the source electrode is lower than the bottom surface of the second part of the source electrode.

[0022] Preferably, the n-type semiconductor layer comprises multiple semiconductor layers, each with a different donor concentration.

[0023] Preferably, the donor concentration in the region where the n-type semiconductor layer contacts the second part of the source electrode to form an ohmic contact is ≥1.0 x 10¹⁸ cm⁻³.

[0024] Preferably, the region in the n-type semiconductor layer that forms a Schottky contact with the first part of the source electrode has a groove, the inner wall of the groove is covered with an insulating film layer, the groove is also filled with a conductive material, and the conductive material is separated from the n-type semiconductor layer by the insulating film layer.

[0025] Preferably, the region in the n-type semiconductor layer that forms a Schottky contact with the first part of the source electrode is formed by ion implantation to form a plurality of p-type regions spaced apart from each other, and the p-type regions form a pn junction with the n-type semiconductor layer.

[0026] Preferably, the field-effect transistor is a horizontal MOSFET or a vertical MOSFET, wherein the vertical MOSFET is one of a vertical planar gate MOSFET, a vertical trench gate MOSFET, a vertical shielded gate MOSFET, or a vertical superjunction MOSFET.

[0027] Preferably, the n-type semiconductor layer is composed of an oxide semiconductor, a compound semiconductor, or a single-element semiconductor.

[0028] To address the above problems, the present invention also provides a field-effect transistor. It has:

[0029] A semiconductor layer comprising an n-type conductive region and a high-resistivity doped region;

[0030] The electrodes include a drain electrode, a source electrode, and a gate electrode;

[0031] A gate insulating film, which is located between the gate electrode and the n-type semiconductor layer;

[0032] There is a Schottky barrier between the first part of the source electrode and the n-type conductive region of the semiconductor layer, and the second part of the source electrode is in contact with the high-resistivity doped region of the semiconductor layer; the second part of the source electrode is closer to the gate insulating film than the first part of the source electrode.

[0033] Preferably, the first portion of the source electrode contacts the n-type conductive region of the semiconductor layer to form a Schottky barrier.

[0034] Preferably, a dielectric layer is provided between the first part of the source electrode and the n-type conductive region of the semiconductor layer, and the first part of the source electrode, the dielectric layer, and the n-type conductive region of the semiconductor layer form a MIS (metal-insulator-semiconductor) junction.

[0035] Preferably, the second portion of the source electrode is located between the first portion of the source electrode and the gate insulating film.

[0036] Preferably, the work function of the material corresponding to the second part of the source electrode is not higher than the work function of the material corresponding to the semiconductor layer.

[0037] Preferably, the second part of the source electrode and the first part of the source electrode are metals or alloys with different work functions.

[0038] Preferably, the field-effect transistor is a horizontal MOSFET or a vertical MOSFET, wherein the vertical MOSFET is one of a vertical planar gate MOSFET, a vertical trench gate MOSFET, a vertical shielded gate MOSFET, or a vertical superjunction MOSFET.

[0039] Regarding the above-mentioned content of the invention, the present invention has the following beneficial effects:

[0040] This invention improves the structure of existing Schottky source-drain MOSFETs by changing the pure Schottky source in the MOSFET to a combination of an ohmic source and a Schottky source, wherein the ohmic source is located between the gate insulating film and the Schottky source. Through this structural improvement, the field-effect transistor of this invention, under a positive gate bias, can form a complete and highly concentrated electron conduction channel between the drain and source electrodes. When a positive voltage is applied between the drain and source electrodes, current will flow between them. The on-state current-carrying capacity of the field-effect transistor of this invention is comparable to or even exceeds that of a pn junction MOSFET under the same conditions, thus completely solving the problem of low on-state current in existing Schottky source-drain MOSFETs, significantly improving its current-carrying capacity, and meeting the requirements of applications with currents exceeding amperes.

[0041] The field-effect transistor of the present invention solves the problem of low on-state current of existing Schottky source-drain MOSFETs while still being a normally off device. The field-effect transistor of the present invention can achieve normally off function by utilizing the MIS junction formed between the gate electrode-gate insulating film layer-n-type semiconductor layer and the Schottky junction formed between the source electrode and the n-type semiconductor layer to deplete electron carriers.

[0042] The field-effect transistor of this invention solves the problem of low on-state current of existing Schottky source-drain MOSFETs while still maintaining the original advantages of Schottky source-drain MOSFETs (see background description for details).

[0043] The field-effect transistor of this invention has a simple manufacturing process, high feasibility for mass production, and is conducive to commercialization.

[0044] The field-effect transistor of this invention can be widely used in a variety of semiconductor materials, including oxide semiconductor materials, and can be used to fabricate devices with large on-state current and low leakage current without the need to use p-type materials.

[0045] The present invention further provides a field-effect transistor having:

[0046] p-type semiconductor layer;

[0047] The electrodes include a drain electrode, a source electrode, and a gate electrode;

[0048] A gate insulating film, situated between a gate electrode and a p-type semiconductor layer; characterized in that a Schottky barrier exists between a first portion of the source electrode and the p-type semiconductor layer.

[0049] The second part of the source electrode contacts the p-type semiconductor layer to form an ohmic contact; the second part of the source electrode is closer to the gate insulating film than the first part of the source electrode.

[0050] Preferably, the first part of the source electrode is in direct contact with the p-type semiconductor layer to form a Schottky barrier.

[0051] Preferably, a dielectric layer is provided between the first part of the source electrode and the p-type semiconductor layer, and the first part of the source electrode, the dielectric layer, and the p-type semiconductor layer form a MIS (metal-insulator-semiconductor) junction.

[0052] The present invention has the following beneficial effects:

[0053] P-type semiconductors and Schottky source-drain electrodes can also form Schottky source-drain MOSFETs. Due to the existence of the Schottky barrier, such Schottky source-drain MOSFETs also suffer from low on-state current. By utilizing the structural innovation of this invention, the pure Schottky source is adjusted to a combination of an ohmic source and a Schottky source, wherein the ohmic source is located between the gate insulating film and the Schottky source. Through this change in structural details, the problem of low on-state current of Schottky source-drain MOSFETs composed of p-type semiconductors and Schottky source-drain electrodes can also be solved, thereby improving their current carrying capacity.

[0054] The present invention also provides an insulated gate bipolar transistor, having:

[0055] A semiconductor layer, comprising a p-type conductive semiconductor layer and an n-type semiconductor layer stacked on top of the p-type conductive semiconductor layer;

[0056] The electrode includes a collector, an emitter, and a gate electrode;

[0057] A gate insulating film, which is located between the gate electrode and the n-type semiconductor layer;

[0058] There is a Schottky barrier between the first part of the emitter and the n-type semiconductor layer.

[0059] The second part of the emitter contacts the n-type semiconductor layer to form an ohmic contact; the second part of the emitter is closer to the gate insulating film than the first part of the emitter.

[0060] Preferably, the second portion of the emitter is located between the first portion of the emitter and the gate insulating film.

[0061] Preferably, the first portion of the emitter contacts the n-type semiconductor layer to form a Schottky barrier contact.

[0062] The present invention also provides a trench MOS diode, which has:

[0063] The semiconductor layer includes a first n-type semiconductor layer and a second n-type semiconductor layer, the second n-type semiconductor layer being stacked on top of the first n-type semiconductor layer, the second n-type semiconductor layer having trenches that open from the side of the second n-type semiconductor layer opposite to the first n-type semiconductor layer, and the donor concentration of the second n-type semiconductor layer being less than that of the first n-type semiconductor layer.

[0064] An anode electrode is formed on the side of the second n-type semiconductor layer opposite to the first n-type semiconductor layer;

[0065] A cathode electrode is formed on the side of the first n-type semiconductor layer opposite to the second n-type semiconductor layer;

[0066] The trench MOS gate is buried in the trench of the second n-type semiconductor layer, and is separated from the semiconductor layer by a gate insulating film.

[0067] The first part of the anode electrode contacts the second n-type semiconductor layer to form a Schottky contact, and the second part of the anode electrode contacts the second n-type semiconductor layer to form an ohmic contact. The second part of the anode electrode is closer to the gate insulating film than the first part of the anode electrode.

[0068] Preferably, the work function of the material corresponding to the second part of the anode electrode is lower than the work function of the material corresponding to the second n-type semiconductor layer.

[0069] Preferably, the width of the insulating film at the distance from the second part of the anode electrode is in the range of 3nm to 200nm, and more preferably 3nm to 150nm.

[0070] Preferably, the trench MOS gate is in direct contact with the anode electrode, or the trench MOS gate is separated from the anode electrode by an insulating layer.

[0071] The present invention has the following beneficial effects:

[0072] The trench MOS diode of the present invention, compared with the conventional trench MOS Schottky diode, adjusts the pure Schottky anode to a combination of an ohmic anode (the second part of the anode electrode) and a Schottky anode (the first part of the anode electrode). Through this structural detail change, when the trench MOS diode of the present invention is forward-biased, since there is no Schottky barrier between the ohmic anode and the second n-type semiconductor layer, only a very small voltage is required to turn it on. Therefore, the trench MOS diode of the present invention can further reduce the turn-on voltage, thereby reducing the on-resistance. Attached Figure Description

[0073] To more clearly illustrate the technical solution of the present invention, the accompanying drawings used in the following description of the embodiments or prior art will be briefly introduced. Obviously, some of the drawings in the following description are merely illustrative of some embodiments of the present invention, and the scope of protection claimed by the present invention is not limited to the embodiments. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0074] Appendix Figure 1 This is a vertical cross-sectional view of an embodiment of an existing pn junction vertical trench gate MOSFET.

[0075] Appendix Figure 2 This is a vertical cross-sectional view of an embodiment of an existing Schottky junction vertical trench gate MOSFET.

[0076] Appendix Figure 3a This is a schematic diagram of structural modeling for a portion of the existing pn junction MOSFET structure and a portion of the existing Schottky junction MOSFET structure.

[0077] Appendix Figure 3b This is a schematic diagram of structural modeling for a portion of an existing pn junction MOSFET structure and a portion of a MOSFET structure based on the present invention.

[0078] Appendix Figure 4 This is a vertical cross-sectional view of an embodiment of an existing Schottky junction vertical planar gate MOSFET.

[0079] Appendix Figure 5a This is a vertical cross-sectional view of a first embodiment of a vertical planar gate MOSFET according to an embodiment of the present invention.

[0080] Appendix Figure 5b This is a vertical cross-sectional view of a second embodiment of a vertical planar gate MOSFET according to an embodiment of the present invention.

[0081] Appendix Figure 6a This is a vertical cross-sectional view of a first embodiment of a vertical trench gate MOSFET according to an embodiment of the present invention.

[0082] Appendix Figure 6b This is a vertical cross-sectional view of a second embodiment of a vertical trench gate MOSFET according to an embodiment of the present invention.

[0083] Appendix Figure 6c This is a vertical cross-sectional view of a third embodiment of a vertical trench gate MOSFET according to an embodiment of the present invention.

[0084] Appendix Figure 6d This is a vertical cross-sectional view of the fourth embodiment of the vertical trench gate MOSFET according to the present invention.

[0085] Appendix Figure 6e This is a vertical cross-sectional view of the fifth embodiment of the vertical trench gate MOSFET according to the present invention.

[0086] Appendix Figure 7a This is a vertical cross-sectional view of a first embodiment of a vertically shielded gate MOSFET according to an embodiment of the present invention.

[0087] Appendix Figure 7b This is a vertical cross-sectional view of a second embodiment of the vertically shielded gate MOSFET according to an embodiment of the present invention.

[0088] Appendix Figure 7c This is a vertical cross-sectional view of a third embodiment of a vertically shielded gate MOSFET according to an embodiment of the present invention.

[0089] Appendix Figure 7d This is a vertical cross-sectional view of the fourth embodiment of the vertically shielded gate MOSFET according to the present invention.

[0090] Appendix Figure 7e This is a vertical cross-sectional view of the fifth embodiment of the vertically shielded gate MOSFET according to the present invention.

[0091] Appendix Figure 7f This is a vertical cross-sectional view of the sixth embodiment of the vertically shielded gate MOSFET according to the present invention.

[0092] Appendix Figure 8a This is a vertical cross-sectional view of the first embodiment of the vertical superjunction MOSFET according to an embodiment of the present invention.

[0093] Appendix Figure 8b This is a vertical cross-sectional view of a second embodiment of a vertical superjunction MOSFET according to an embodiment of the present invention.

[0094] Appendix Figure 9 This is a vertical cross-sectional view of one embodiment of the insulated gate bipolar transistor according to an embodiment of the present invention.

[0095] Appendix Figure 10 This is a vertical cross-sectional view of one embodiment of the trench MOS diode according to an embodiment of the present invention.

[0096] Appendix Figure 11 This is a vertical cross-sectional view of an embodiment of a vertical trench gate MOSFET associated with a p-type semiconductor layer according to an embodiment of the present invention.

[0097] The technical features corresponding to the markings in the attached diagram are as follows:

[0098] 11. Drain electrode (collector electrode)

[0099] 12 source electrodes (emitters)

[0100] 12A Ohmic Source Electrode (Ohmic Emitter)

[0101] 12b Schottky source electrode (Schottky emitter)

[0102] 13 gate electrodes

[0103] 21a n+ type semiconductor layer

[0104] 21b n-type semiconductor layer

[0105] 31a p+ type semiconductor layer

[0106] 31b p-type semiconductor layer

[0107] 41 High-resistivity semiconductor region

[0108] 51 Gate insulating film

[0109] 52 Insulating film layer

[0110] 61 Cathode electrode

[0111] 62 Anode electrode

[0112] 62A Ohmic Anode (Second Part of the Anode Electrode)

[0113] 62b Schottky anode (first part of the anode electrode)

[0114] 63-Trench MOS Gate Detailed Implementation

[0115] In the following description, specific details such as particular system architectures and techniques are set forth for illustrative purposes and not for limitation, in order to provide a thorough understanding of the embodiments of the invention. However, those skilled in the art will understand that the invention can be implemented in other embodiments without these specific details. In other instances, detailed descriptions of well-known systems, apparatuses, and methods have been omitted so as not to obscure the description of the invention with unnecessary detail.

[0116] Appendix Figure 1This is a vertical cross-sectional view of an embodiment of a pn junction vertical trench gate MOSFET. The pn junction vertical trench gate MOSFET (hereinafter referred to as pn junction MOSFET) has, from bottom to top: a drain electrode 11, an n+ type semiconductor layer 21a, an n- type semiconductor layer 21b, a p- type semiconductor layer 31b, an n+ type semiconductor layer 21a, a trench embedded from top to bottom in the n+ type semiconductor layer 21a, the p- type semiconductor layer 31b, and the n- type semiconductor layer 21b from the upper surface of the n+ type semiconductor layer 21a, a gate electrode 13 located in the trench and wrapped by a gate insulating film 51, and a source electrode 12.

[0117] Appendix Figure 1 The pn junction MOSFET shown, due to the presence of the bulk pn junction, when a forward voltage is applied only between the drain electrode 11 and the source electrode 12, the pn junction within the MOSFET is reverse-biased, widening the depletion region. This results in no complete electron conduction channel being formed between the drain electrode 11 and the source electrode 12, and no current flowing between the drain and source. Based on this principle, the attached... Figure 1 The pn junction MOSFET shown is a normally off device. When a voltage V is applied to the gate electrode 13... GS >V GS(th) The gate-source voltage when the channel is first formed will form an n-type thin layer (inversion layer) with only electron carriers in the region near the gate insulating film 51 of the p-type semiconductor layer 31b. This n-type thin layer connects the electron conduction channel between the drain electrode 11 and the source electrode 12. When a positive voltage is applied between the drain electrode 11 and the source electrode 12, current flows between the drain and the source, and the MOSFET is turned on.

[0118] Appendix Figure 2 This is a vertical cross-sectional view of an embodiment of a conventional Schottky junction vertical trench gate MOSFET. From bottom to top, this MOSFET has: a drain electrode 11, an n+ type semiconductor layer 21a, an n- type semiconductor layer 21b, and a trench located in the n- type semiconductor layer 21b; a gate electrode 13 located in the trench and enclosed by a gate insulating film 51; a Schottky source electrode 12b forming a Schottky barrier contact with the n- type semiconductor layer 21b; and a source electrode 12 located thereon.

[0119] Appendix Figure 2 The Schottky junction MOSFET shown, due to the presence of the Schottky junction formed between the Schottky source electrode 12b and the n-type semiconductor layer 21b, when a forward voltage is applied only between the drain electrode 11 and the source electrode 12, the Schottky junction is reverse-biased, widening the depletion region. This results in no complete electron conduction channel being formed between the drain electrode 11 and the source electrode 12, and no current flowing between the drain and source. Based on this principle, the attached... Figure 2 The Schottky junction MOSFET shown is a normally off device.

[0120] When a positive voltage is applied between the gate electrode 13 and the source electrode 12, the presence of the Schottky barrier between the Schottky source electrode 12b and the n-type semiconductor layer 21b prevents the formation of a complete and highly concentrated electron conduction channel between the drain electrode 11 and the source electrode 12. Even when a positive voltage is applied between the drain electrode 11 and the source electrode 12, the widening of the Schottky barrier depletion layer formed between the Schottky source electrode 12b and the n-type semiconductor layer 21b suppresses the transport of electron carriers. As a result, only a small portion of electron carriers form current through tunneling between the drain and the source, leading to poor on-state current carrying capacity of the existing Schottky junction MOSFET. Its on-state current is much smaller than that of the pn junction MOSFET under the same conditions.

[0121] To more clearly demonstrate the difference in current between existing pn junction MOSFETs and existing Schottky junction MOSFETs in the on-state, a portion of the traditional pn junction MOSFET structure and a portion of the traditional Schottky junction MOSFET structure are extracted and quantified using semiconductor process and device simulation software (TCAD).

[0122] Appendix Figure 3a This is a modeling diagram of a portion of an existing pn junction MOSFET structure and a portion of an existing Schottky junction MOSFET structure.

[0123] In the appendix Figure 3a In the schematic diagram shown, the area in the center of the diagram is the gate electrode 13, and the gate insulating film 51 is located on both sides of the gate electrode 13. The stacked structure in the left half is equivalent to a part of the structure of a pn junction MOSFET, which from bottom to top is: drain electrode 11, n+ type semiconductor layer 21a, n- type semiconductor layer 21b, p- type semiconductor layer 31b, n+ type semiconductor layer 21a, and source electrode 12. The stacked structure in the right half is equivalent to a part of the structure of a Schottky junction MOSFET, which from bottom to top is: drain electrode 11, n+ type semiconductor layer 21a, n- type semiconductor layer 21b, Schottky source electrode 12b, and source electrode 12.

[0124] In the actual simulation, the semiconductor layer material was set to SiC, and the concentration of the n+ type semiconductor layer 21a was set to 5 x 10⁻⁶. 18 cm -3 The concentration of the n-type semiconductor layer 21b is set to 1 x 10⁻⁶. 17 cm -3 The concentration of the p-type semiconductor layer 31b is set to 1 x 10⁻⁶. 17 cm -3The gate insulating film is made of HfO2 and has a thickness of 50 nm. The Schottky source electrode 12b is made of metal W with a work function of approximately 4.55 and forms a Schottky contact with the n-type semiconductor layer 21b.

[0125] In the appendix Figure 3a In the modeling schematic shown, when the voltage V between the gate electrode 13 and the source electrode 12 is set... GS When = 0, for a portion of the pn junction MOSFET structure located in the left half, a space charge region is formed in the pn junction region formed by the p-type semiconductor layer 31b and the n-type semiconductor layer 21b, with an influence range of approximately 250 nm; a space charge region is also formed at the MIS (metal-insulator-semiconductor) junction formed by the gate electrode 13, the gate insulating film 51, and the n-type semiconductor layer 21b located on the left, with an influence range of approximately 100 nm; for a portion of the Schottky junction MOSFET structure located in the right half, a space charge region is formed in the Schottky junction region formed by the Schottky source electrode 12b and the n-type semiconductor layer 21b, with an influence range of approximately 101 nm; a space charge region is also formed at the MIS (metal-insulator-semiconductor) junction formed by the gate electrode 13, the gate insulating film 51 (dielectric layer), and the n-type semiconductor layer 21b located on the right, with an influence range of approximately 100 nm;

[0126] In the appendix Figure 3a In the modeling schematic shown, when the voltage V between the gate electrode 13 and the source electrode 12 is set... GS At 10V, for a portion of the pn junction MOSFET structure located in the left half, a complete electron conduction channel is formed in the region of the semiconductor layer adjacent to the gate insulating film 51 between the drain electrode 11 and the source electrode 12. The electron concentration in the entire conduction channel is ≥1.5 x 10⁻⁶. 18 cm -3 The widths of the regions are as follows: 3 nm in the p-type semiconductor layer 31b, 6.25 nm in the n-type semiconductor layer 21b, and 3 nm to 6.25 nm in the depletion region of the pn junction formed by the p-type semiconductor layer 31b and the n-type semiconductor layer 21b. With a complete and highly concentrated electron conduction channel between the drain and source of the pn junction MOSFET, the pn junction MOSFET can conduct when a positive voltage is applied between the drain and source.

[0127] In the appendix Figure 3a In the modeling schematic shown, when the voltage V between the gate electrode 13 and the source electrode 12 is set... GSAt 10V, for a portion of the Schottky junction MOSFET structure located in the right half, a complete and high-concentration electron conduction channel is not formed in the region adjacent to the gate insulating film 51 in the n-type semiconductor layer 21b located between the drain electrode 11 and the Schottky source electrode 12b. A high-concentration electron conduction channel is formed in the region adjacent to the gate insulating film 51 in the n-type semiconductor layer 21b below the Schottky source electrode 12b (below the dashed box). However, in the region adjacent to the gate insulating film 51 in the n-type semiconductor layer 21b within the range of 0-10nm below the Schottky source electrode 12b (the range circled by the dashed box), due to the existence of the Schottky barrier formed between the Schottky source electrode 12b and the n-type semiconductor layer 21, the electron concentration in this 0-10nm range is low. 18 cm -3 The magnitude dropped sharply to 10 3 cm -3 The electron conduction channel was not formed at a high concentration, resulting in a failure to form a complete and high-concentration electron conduction channel between the drain electrode 11 and the source electrode 12, even under a positive bias applied to the gate electrode. This resulted in only a small portion of electron carriers forming current through tunneling, leading to a very low concentration of electron carriers participating in conduction. According to conductivity σ = nqu (where n is the concentration of electron carriers participating in conduction, q is the electron charge, and u is the mobility under a certain carrier concentration), the lower the concentration of electron carriers n, the lower the conductivity σ. Furthermore, according to current density J = σE (where E represents the electric field strength), the lower the conductivity σ, the lower the current density J (the on-state current is positively correlated with the current density). This explains why the on-state current of a Schottky source-drain MOSFET is smaller than that of a pn junction MOSFET under the same conditions.

[0128] Combined with appendix Figure 3a Analysis shows that the low on-state current of the Schottky source-drain MOSFET is due to the existence of the Schottky barrier between the source electrode and the n-type semiconductor layer.

[0129] The present invention improves the source electrode of a Schottky source-drain MOSFET by maintaining a Schottky barrier between the first part of the source electrode and the n-type semiconductor layer, forming an ohmic contact between the second part of the source electrode and the n-type semiconductor layer, and positioning the second part of the source electrode between the first part of the source electrode and the gate insulating film. Based on this concept, the present invention was modeled and simulated using semiconductor process and device simulation software (TCAD). The following detailed explanation is provided in conjunction with the modeling schematic diagram shown in Figure 3. Figure 3b These are schematic diagrams of a portion of a conventional pn junction MOSFET structure and a portion of a MOSFET structure based on the present invention.

[0130] Appendix Figure 3b Modeling structure and attachment Figure 3a The difference in the modeling structure is that a portion of the area adjacent to the gate insulating film 51 of the Schottky source electrode 12b is changed to an ohmic source electrode 12a. The width of the ohmic source electrode 12a can be set to the range of 3nm to 200nm. In this structure, the width of the ohmic source electrode 12a is set to 80nm, and the ohmic source electrode 12a forms an ohmic contact with the n-type semiconductor layer 21b.

[0131] In the appendix Figure 3b In the schematic diagram shown, for a portion of the MOSFET structure based on the present invention located in the right half, when the voltage V between the gate electrode 13 and the source electrode 12 is set... GS At 10V, a complete and highly concentrated electron conduction channel is formed in the region adjacent to the gate insulating film 51 in the n-type semiconductor layer 21b located between the drain electrode 11 and the Schottky source electrode 12b, compared to the adjacent... Figure 3a Modeling and simulation in V GS The case at 10V is attached. Figure 3b In the n-type semiconductor layer 21b, in the region adjacent to the right side of the gate insulating film 51, the concentration of electron carriers in the electron conduction channel between the drain and source is all above 10. 17 ~10 19 cm -3 Magnitude range. Compared to the attached Figure 3a The existing Schottky junction MOSFET shown (electron concentration from 10) 18 cm -3 The magnitude dropped sharply to 10 3 cm -3 The electron carrier concentration of the MOSFET of this invention is significantly increased (on the order of magnitude). This is comparable to the electron carrier concentration in the electronic conduction channel of a pn junction MOSFET under the same conditions. According to the conductivity σ = nqu, when the concentration of carriers n participating in conduction increases significantly, the conductivity will increase significantly; according to the current density J = σE (where E represents the electric field strength), when the conductivity σ increases significantly, the current density J will increase significantly. Therefore, it can be seen that after structural optimization based on the present invention, the current carrying capacity of existing Schottky junction MOSFETs can be significantly improved to be comparable to that of pn junction MOSFETs of the same area. The MOSFET based on the present invention can completely solve the problem of low on-state current of existing Schottky junction MOSFETs.

[0132] In the appendix Figure 3bIn the schematic diagram shown, while solving the problem of low on-state current in existing Schottky junction MOSFETs, the MOSFET based on this invention also has a normally-off function. With a reasonable design of the width of the ohmic source electrode 12a, the MIS junction formed by the gate electrode 13, gate insulating film 51, and n-type semiconductor layer 21 on its left side depletes the electron carriers in the n-type semiconductor layer 21, and the Schottky source electrode 12b on its right side also depletes the electron carriers in the n-type semiconductor layer 21. Under the combined effect of these two depletions, the MOSFET of this invention can achieve a normally-off state. (See attached diagram.) Figure 3b As shown in the modeling diagram, when the set width of the ohmic source electrode is in the range of 3nm to 120nm, the MOSFETs of the present invention can be normally turned off.

[0133] Appendix Figure 4 This is a vertical cross-sectional view of an embodiment of a conventional Schottky junction vertical planar gate MOSFET. From bottom to top, this MOSFET has: a drain electrode 11, an n+ type semiconductor layer 21a, an n- type semiconductor layer 21b, and a trench located in the n- type semiconductor layer 21b, a Schottky source electrode 12b located in the trench, and a source electrode 12 connected thereto, a gate insulating film 51, and a gate electrode 13 located thereon.

[0134] Appendix Figure 4 The Schottky junction MOSFET shown in the diagram, due to the existence of the Schottky barrier formed by the Schottky source electrode 12b and the n-type semiconductor layer 21b, fails to form a complete and high-concentration electron conduction channel when a positive voltage is applied between the gate electrode 13 and the source electrode 12. When a positive voltage is applied between the drain electrode 11 and the source electrode 12, the Schottky barrier reverse-biases, causing the depletion region to continue to widen, resulting in only a small number of electron carriers forming a very small on-state current through the tunneling effect.

[0135] Appendix Figure 5aThis is a vertical cross-sectional view of a first embodiment of a vertical planar gate MOSFET according to an embodiment of the present invention. The vertical planar gate MOSFET, from bottom to top, includes: a drain electrode 11, an n+ type semiconductor layer 21a, an n- type semiconductor layer 21b, and a trench located in the n- type semiconductor layer 21b, a source electrode 12, a gate insulating film 51, and a gate electrode 13 located thereon; wherein, the source electrode 12 includes a first portion 12b, a second portion 12a, and a third portion 12c, the first portion 12b of the source electrode contacts the n- type semiconductor layer 21b to form a Schottky barrier contact, and the first portion 12b of the source electrode... Defined as Schottky source electrode 12b; the second part 12a of the source electrode contacts the n-type semiconductor layer 21b to form an ohmic contact, and the second part 12a of the source electrode is defined as ohmic source electrode 12a; Schottky source electrode 12b and ohmic source electrode 12a are located in a trench, and ohmic source electrode 12a is located on the upper surface of Schottky source electrode 12b, and ohmic source electrode 12a is located between Schottky source electrode 12b and gate insulating film 51, and ohmic source electrode 12a is connected to the third part 12c of source electrode 12.

[0136] In this embodiment, the work function of the material corresponding to the ohmic source electrode 12a is lower than that of the materials corresponding to the n-type semiconductor layer 21b and the n+type semiconductor layer 21a, respectively. The distance between the end of the ohmic source electrode 12a away from the gate insulating film 51 and the gate insulating film 51 is in the range of 3nm to 200nm, preferably in the range of 3nm to 100nm. The ohmic source electrode 12a and the Schottky source electrode 12b are metals or alloys with different work functions. The n+type semiconductor layer 21a and the n-type semiconductor layer 21b can be composed of one of the following materials: oxide semiconductor, compound semiconductor, or elemental semiconductor. In other embodiments, the region in the n-type semiconductor layer 21b that contacts the Schottky source electrode 12b to form a Schottky contact can be formed by implanting ions to form several p-type regions that are spaced apart from each other. The p-type regions and the n-type semiconductor layer form a pn junction.

[0137] Appendix Figure 5a The MOSFET structure shown is in the attached Figure 4 Based on the existing Schottky junction MOSFET structure shown, the metal contact properties with the n-type semiconductor layer 21b are locally modified, and the attached... Figure 4 The pure Schottky contact Schottky source electrode 12b in the design has been changed to an attached... Figure 5a The ohmic source electrode 12a and the Schottky source electrode 12b are a combination of ohmic and Schottky contacts, with the ohmic source electrode 12a being closer to the gate insulating film 51 than the Schottky source electrode 12b. When the voltage V between the gate electrode 13 and the source electrode 12... GS Greater than the turn-on voltage V GS(th)At this time, a complete and highly concentrated electron channel is formed in the region adjacent to the gate insulating film 51 in the n-type semiconductor layer 21. When a positive voltage is applied between the drain electrode 11 and the source electrode 12, a current will flow between the drain and the source. When the voltage V between the gate electrode 13 and the source electrode 12... GS When = 0, due to the simultaneous depletion of electron carriers in the n-type semiconductor layer 21b by the MIS junction and Schottky junction located on the upper and lower sides of the ohmic source electrode 12a, the angle region in the n-type semiconductor layer 21b that is both adjacent to the gate insulating film 51 and the ohmic source electrode 12a (see appendix) Figure 5a The area enclosed by the dashed circle is the depletion region of electron carriers. This depletion region blocks the electron conduction path between the drain electrode 11 and the source electrode 12, therefore the MOSFET based on the present invention is a normally off device; thus, the MOSFET based on the present invention can be designed as a normally off device with a large on-state current capability.

[0138] Appendix Figure 5b This is a vertical cross-sectional view of a second embodiment of a vertical planar gate MOSFET according to an embodiment of the present invention. The vertical planar gate MOSFET in this embodiment is... Figure 5a Based on the MOSFET structure shown, the region adjacent to the ohmic source electrode 12a in the n-type semiconductor layer 21b is designed as a high-resistivity semiconductor region 41, while the rest of the structure remains unchanged. Figure 5b When the material of the n-type semiconductor layer 21b is a material with a bandgap of 3 eV or more, such as gallium oxide, it can be nitrogen-doped to form a high-resistivity doped region. When the voltage V between the gate electrode 13 and the source electrode 12... GS When V > 0, as V GS As the voltage increases, a high-concentration electron accumulation layer forms not only in the region adjacent to the gate insulating film 51 in the n-type semiconductor layer 21b, but also in the region adjacent to the gate insulating film 51 in the high-resistivity semiconductor layer 41. When a positive voltage is applied between the drain electrode 11 and the source electrode 12, current flows between the drain and source. When the voltage V between the gate electrode 13 and the source electrode 12... GS When the resistance is 0, the design of this high-resistivity doped region cleverly blocks the conductive path between the drain electrode 11 and the source electrode 12. Therefore, the MOSFET based on the present invention is a normally off device. Thus, the MOSFET based on the present invention can be designed as a normally off device with a large on-state current capability.

[0139] Appendix Figure 6a This is a vertical cross-sectional view of a first embodiment of a vertical trench gate MOSFET according to an embodiment of the present invention. The vertical trench gate MOSFET in this embodiment is... Figure 2Based on the existing Schottky junction MOSFET shown, the source electrode 12b, which forms a pure Schottky contact with the n-type semiconductor layer 21b, is redesigned as an ohmic source electrode 12a and a Schottky source electrode 12b. (See attached...) Figure 6a In the MOSFET shown, the ohmic source electrode 12a forms an ohmic contact with the n-type semiconductor layer 21b, the Schottky source electrode 12b forms a Schottky contact with the n-type semiconductor layer 21b, and the ohmic source electrode 12a is closer to the gate insulating film 51 than the Schottky source electrode 12b.

[0140] Appendix Figure 6a In the MOSFET shown, when the voltage V between the gate electrode 13 and the source electrode 12... GS Greater than V GS(th) At this time, a complete and highly concentrated electron channel is formed in the region adjacent to the right side of the gate insulating film 51 in the n-type semiconductor layer 21b. When a positive voltage is applied between the drain electrode 11 and the source electrode 12, a current will flow between the drain and the source. When the voltage V between the gate electrode 13 and the source electrode 12... GS When = 0, due to the simultaneous depletion of electron carriers in the n-type semiconductor layer 21b by the MIS junction and Schottky junction located on both sides of the ohmic source electrode 12a, the angle region in the n-type semiconductor layer 21b that is adjacent to both the gate insulating film 51 and the ohmic source electrode 12a (see appendix) Figure 6a The area enclosed by the dashed circle is the depletion region of electron carriers. This depletion region blocks the electron conduction path between the drain electrode 11 and the source electrode 12, therefore the MOSFET based on the present invention is a normally off device; thus, the MOSFET based on the present invention can be designed as a normally off device with a large on-state current capability.

[0141] Appendix Figure 6b This is a vertical cross-sectional view of a second embodiment of a vertical trench gate MOSFET according to an embodiment of the present invention. The vertical trench gate MOSFET in this embodiment is based on the first embodiment of a vertical trench gate MOSFET (see attached diagram). Figure 6a Based on the vertical trench gate MOSFET in the example, the region adjacent to the ohmic source electrode 12a in the n-type semiconductor layer 21b is designed as a high-resistivity semiconductor region 41, while the rest of the structure remains unchanged. When the voltage V between the gate electrode 13 and the source electrode 12... GS When V > 0, as V GSAs the voltage increases, a high-concentration electron accumulation layer forms not only in the region adjacent to the gate insulating film 51 in the n-type semiconductor layer 21b, but also in the region adjacent to the gate insulating film 51 in the high-resistivity semiconductor layer 41. When a positive voltage is applied between the drain electrode 11 and the source electrode 12, current flows between the drain and source. When the voltage V between the gate electrode 13 and the source electrode 12... GS When the resistance is 0, the design of this high-resistivity doped region cleverly blocks the conductive path between the drain electrode 11 and the source electrode 12. Therefore, the MOSFET based on the present invention is a normally off device. Thus, the MOSFET based on the present invention can be designed as a normally off device with a large on-state current capability.

[0142] Appendix Figure 6c This is a vertical cross-sectional view of a third embodiment of a vertical trench gate MOSFET according to an embodiment of the present invention. The vertical trench gate MOSFET in this embodiment is an improvement upon the first embodiment of a vertical trench gate MOSFET (see attached diagram). Figure 6a Based on the vertical trench gate MOSFET in the model, the structure of the Schottky contact region was locally optimized. By designing the Schottky source electrode 12b to be recessed, that is, the bottom surface of the Schottky source electrode 12b is lower than the bottom surface of the Ohm source electrode 12a, the lateral depletion effect of the Schottky source electrode 12b on the carriers in the n-type semiconductor layer 21b on both sides can further reduce the off-state leakage current.

[0143] Appendix Figure 6d This is a vertical cross-sectional view of the fourth embodiment of the vertical trench gate MOSFET according to the present invention. The vertical trench gate MOSFET in this embodiment is an improvement upon the first embodiment of the vertical trench gate MOSFET (see attached figure). Figure 6a Based on the vertical trench gate MOSFET in [the original text is missing], the structure of the Schottky contact region is locally optimized. A groove is designed in the region where the n-type semiconductor layer 21b forms a Schottky contact with the Schottky source electrode 12b. The inner wall of the groove is covered with an insulating film layer 52 (dielectric layer), and the groove is filled with a conductive material. The conductive material is separated from the n-type semiconductor layer 21b by the insulating film layer 52, and is connected to the Schottky source electrode 12b. The conductive material can be the same as or a different material from the Schottky source electrode 12b. In this embodiment, the conductive material is the same as the Schottky source electrode 12b, and the conductive material is integrally formed with the Schottky source electrode 12b. Through this groove composite structure design, the off-state leakage current can be reduced.

[0144] Appendix Figure 6eThis is a vertical cross-sectional view of the fifth embodiment of the vertical trench gate MOSFET according to the present invention. The vertical trench gate MOSFET in this embodiment is based on the third embodiment of the vertical trench gate MOSFET (see attached diagram). Figure 6c Based on the vertical trench gate MOSFET in the model, the n-type semiconductor layer in contact with the ohmic source electrode 12a is locally adjusted. The n-type semiconductor layer 21b in contact with the ohmic source electrode 12a is adjusted to an n+ type semiconductor layer 21a. This adjustment can reduce the contact resistance between the ohmic source electrode 12a and the semiconductor layer, thereby reducing conduction losses.

[0145] Appendix Figure 7a This is a vertical cross-sectional view of a first embodiment of a vertically shielded gate MOSFET according to an embodiment of the present invention. The vertically shielded gate MOSFET, from bottom to top, has: a drain electrode 11, an n+ type semiconductor layer 21a, an n- type semiconductor layer 21b, and a trench located in the n- type semiconductor layer 21b; a gate electrode 13 located in the trench and wrapped by a gate insulating film 51; a portion of a source electrode 12; an ohmic source electrode 12a forming an ohmic contact with the n- type semiconductor layer 21b; a Schottky source electrode 12b forming a Schottky contact with the n- type semiconductor layer 21b; and another portion of the source electrode 12 located thereon.

[0146] Appendix Figure 7a The structural design shown can also be a normally-off device with a large on-state current capability. Compared to the attached... Figure 6a The structural design shown is attached. Figure 7a The structure shown further reduces the off-state leakage current by embedding a portion of the source electrode 12 into the bottom of the trench, through the lateral depletion effect of the source electrode 12 embedded in the bottom of the trench on the surrounding carriers when the MOSFET is in the off state.

[0147] Appendix Figure 7b This is a vertical cross-sectional view of a second embodiment of a vertically shielded gate MOSFET according to an embodiment of the present invention. The vertically shielded gate MOSFET in this embodiment is the same as the vertically shielded gate MOSFET in the first embodiment (see attached diagram). Figure 7a Based on this, the adjacent region of the n-type semiconductor layer 21b that is in contact with the ohmic source electrode 12a is designed as a high-resistivity semiconductor region 41, while the rest of the structure remains unchanged.

[0148] When the voltage V between the gate electrode 13 and the source electrode 12 GS When V > 0, as V GSAs the voltage increases, a high-concentration electron accumulation layer forms not only in the region adjacent to the gate insulating film 51 in the n-type semiconductor layer 21b, but also in the region adjacent to the gate insulating film 51 in the high-resistivity semiconductor layer 41. When a positive voltage is applied between the drain electrode 11 and the source electrode 12, current flows between the drain and source. When the voltage V between the gate electrode 13 and the source electrode 12... GS When the resistance is 0, the design of this high-resistivity doped region cleverly blocks the conductive path between the drain electrode 11 and the source electrode 12. Therefore, the MOSFET based on the present invention is a normally off device. Thus, the MOSFET based on the present invention can be designed as a normally off device with a large on-state current capability.

[0149] Appendix Figure 7c This is a vertical cross-sectional view of a third embodiment of a vertically shielded gate MOSFET according to an embodiment of the present invention. The vertically shielded gate MOSFET in this embodiment is the same as the vertically shielded gate MOSFET in the first embodiment (see attached diagram). Figure 7a Based on this, the structure of the Schottky contact region was locally optimized. By designing the Schottky source electrode 12b to be recessed, i.e., the bottom surface of the Schottky source electrode 12b is lower than the bottom surface of the Ohm source electrode 12a, the lateral depletion effect of the Schottky source electrode 12b on the carriers in the n-type semiconductor layer 21b on both sides can further reduce the off-state leakage current.

[0150] Appendix Figure 7d This is a vertical cross-sectional view of the fourth embodiment of the vertically shielded gate MOSFET according to the present invention. The vertically shielded gate MOSFET in this embodiment is the same as the vertically shielded gate MOSFET in the first embodiment (see attached diagram). Figure 7a Based on this, the structure of the Schottky contact region was locally optimized. A groove was designed in the region where the n-type semiconductor layer 21b forms a Schottky contact with the Schottky source electrode 12b. The inner wall of the groove is covered with an insulating film layer 52, and the groove is filled with a conductive material. The conductive material is separated from the n-type semiconductor layer 21b by the insulating film layer 52, and is connected to the Schottky source electrode 12b. The conductive material can be the same as or a different material than the Schottky source electrode 12b. This trench composite structure design reduces the off-state leakage current.

[0151] Appendix Figure 7e This is a vertical cross-sectional view of the fifth embodiment of the vertically shielded gate MOSFET according to the present invention. The vertically shielded gate MOSFET in this embodiment is the same as the vertically shielded gate MOSFET in the third embodiment (see attached diagram). Figure 7cBased on this, the structure of the shielding gate region was locally optimized. The gate electrode 13 located in the trench was placed on both sides of the source electrode 12 in the trench, and the gate electrode 13 and the source electrode 12 were separated by the gate insulating film 51. (Compared to the attached...) Figure 7c The vertically shielded gate MOSFET shown has... Figure 7e The vertically shielded gate MOSFET in the middle can improve the MOSFET's voltage withstand performance and reduce the off-state leakage current through the optimization of the structure design of this region.

[0152] Appendix Figure 7f This is a vertical cross-sectional view of the sixth embodiment of the vertically shielded gate MOSFET according to the present invention. The vertically shielded gate MOSFET in this embodiment is the same as the vertically shielded gate MOSFET in the third embodiment (see attached diagram). Figure 7c Based on this, the structure of the shielding gate region was locally optimized. The gate electrode 13 located in the trench was placed on both sides of the source electrode 12 in the trench, and the gate electrode 13 and the source electrode 12 were separated by the gate insulating film 51. (Compared to the attached...) Figure 7c The vertically shielded gate MOSFET shown has... Figure 7e The vertically shielded gate MOSFET in the middle can improve the MOSFET's voltage withstand performance and reduce the off-state leakage current through the optimization of the structure design of this region.

[0153] Appendix Figure 8a This is a vertical cross-sectional view of the first embodiment of the vertical superjunction MOSFET according to an embodiment of the present invention. Figure 8a The vertical superjunction MOSFET structure shown is in the attached Figure 5a Based on the vertical planar gate MOSFET shown, a trench is provided in the region adjacent to the Schottky source electrode 12b of the n-type semiconductor layer 21b. The interior of the trench is covered by an insulating film layer 52, and the trench is filled with a conductive material. The conductive material is separated from the n-type semiconductor layer 21b by the insulating film layer 52, and the conductive material is connected to the Schottky source electrode 12b. (See attached diagram.) Figure 8a In the superjunction MOSFET shown, by adding a superjunction structure below the Schottky source electrode 12b, the lateral depletion effect of the superjunction structure on the electron carriers in the n-type semiconductor layer 21b can reduce the off-state leakage current and further improve the withstand voltage capability when the MOSFET is in the off state.

[0154] Appendix Figure 8b This is a vertical cross-sectional view of a second embodiment of a vertical superjunction MOSFET according to an embodiment of the present invention. Figure 8bThe superjunction MOSFET structure shown has a trench in the n-type semiconductor layer 21 filled with a p-type conductive material, which can form a pn junction with the n-type semiconductor layer 21b. When the MOSFET is in the off state, the superjunction structure can reduce the off-state leakage current and further improve the withstand voltage by laterally depleting the electron carriers in the n-type semiconductor layer 21b.

[0155] Appendix Figure 9 This is a vertical cross-sectional view of one embodiment of the insulated gate bipolar transistor according to an embodiment of the present invention, corresponding to one of the MOSFETs of the present invention (see attached diagram). Figure 6a Based on the existing structure, a p-type semiconductor layer 31a is added between the n-type semiconductor layer 21a and the drain electrode 11 to form an insulated gate bipolar transistor. (See attached diagram) Figure 9 In the insulated-gate bipolar transistor shown, when a voltage V is applied between the gate electrode 13 and the source electrode 12... GS At that time, with V GS As the voltage increases, a complete and highly concentrated electron channel is formed in the region adjacent to the right side of the gate insulating film 51 in the n-type semiconductor layer 21b. Outside the electron channel formed in the region adjacent to the right side of the gate insulating film 51 in the n-type semiconductor layer 21b, a hole accumulation region of a certain concentration is formed. At this time, a certain positive voltage V is applied between the drain electrode 11 and the source electrode 12. DS At this time, a current flows between the drain and the source. This current consists of two parts: one part is the electron current flowing from the ohmic source electrode 12a to the drain electrode 11, and the other part is the hole current flowing from the drain electrode 11 to the ohmic source electrode 12a. This insulated-gate bipolar transistor has a greater current-carrying capacity than the MOSFET described in this invention.

[0156] Appendix Figure 10This is a vertical cross-sectional view of one embodiment of a trench MOS diode according to an embodiment of the present invention. The trench MOS diode includes: a cathode electrode 61, an anode electrode 62, an n+ type semiconductor layer 21a (a first n-type semiconductor layer), an n- type semiconductor layer 21b (a second n-type semiconductor layer), a trench located in the n- type semiconductor layer 21b, and a trench MOS gate 63 disposed within the trench and enclosed by a gate insulating film 51; wherein the trench opens from the side of the n- type semiconductor layer 21b opposite to the n+ type semiconductor layer 21a; the cathode electrode 61 is formed on the side of the n+ type semiconductor layer 21a opposite to the n- type semiconductor layer 21b. On one side of the surface; the anode electrode is formed on the side of the n-type semiconductor layer 21b opposite to the n+ type semiconductor layer 21a. The anode electrode 62 has a first part 62b and a second part 62a. The first part 62b of the anode electrode 62 contacts the n-type semiconductor layer 21b to form a Schottky barrier contact. The first part of the anode electrode 62 is defined as the Schottky anode 62b. The second part 62a of the anode electrode 62 contacts the n-type semiconductor layer 21b to form an ohmic contact. The second part of the anode electrode 62 is defined as the ohmic anode 62a.

[0157] In the appendix Figure 10 In the trench MOS diode shown, when a forward voltage is applied between the anode electrode 62 and the cathode electrode 61, current flows between the anode and cathode, and the diode is forward-biased. There are two current paths: the first path is along the anode electrode 62—ohmic anode 62a—the region adjacent to the gate insulating film 51 in the n-type semiconductor layer 21b—n+ type semiconductor layer 21a—cathode 61; the second path is along the anode electrode 62—Schottky anode 62b—n-type semiconductor layer 21b—n+ type semiconductor layer 21a—cathode 61. In the first current path, there is no contact barrier between the ohmic anode 62a and the n-type semiconductor layer 21b; in the second current path, there is a Schottky barrier between the Schottky anode 62b and the n-type semiconductor layer 21b. When the diode is forward-biased, because the first current path has relatively less resistance and requires a lower turn-on voltage than the second current path, the current preferentially flows through the first current path. Compared to traditional trench MOS Schottky diodes, it is obvious that the trench MOS diode based on the present invention has a lower turn-on voltage and thus lower conduction loss.

[0158] In the appendix Figure 10In the trench MOS diode shown, when a reverse voltage is applied between the anode electrode 62 and the cathode electrode 61, two types of electron carrier depletion occur: First, the Schottky barrier formed by the Schottky anode 62b and the n-type semiconductor layer 21b is reverse-biased, causing longitudinal depletion of electron carriers in the n-type semiconductor layer 21b. Second, the MIS (metal-insulator-semiconductor) junction formed by the trench MOS gate 63, the gate insulating film 51, and the n-type semiconductor layer 21b causes lateral depletion of electron carriers in the n-type semiconductor layer 21b. Under the combined effect of longitudinal depletion caused by the reverse bias of the Schottky barrier and lateral depletion formed by the MIS junction, the electron carriers in the n-type semiconductor layer 21b located between the trenches are depleted, resulting in only a small leakage current flowing between the anode electrode 62 and the cathode electrode 61, thus reversing the diode and causing it to be cut off.

[0159] In the appendix Figure 10 In the trench MOS diode shown, an insulating layer can be added between the anode electrode 62 and the trench MOS gate 63, so that the trench gate 63 and the anode electrode 62 do not directly contact each other. In the packaging process, the trench gate 63 and the anode electrode 62 can be electrically connected outside the chip by means of mature wire bonding technology. With this design, the trench MOS diode can also perform its function.

[0160] Appendix Figure 11 This is a vertical cross-sectional view of an embodiment of a vertical trench gate MOSFET associated with a p-type semiconductor layer according to an embodiment of the present invention. From bottom to top, the vertical trench gate MOSFET has: a drain electrode 11, a p+ type semiconductor layer 31a, a p- type semiconductor layer 31b stacked thereon, a trench in the p- type semiconductor layer 31b filled with a gate electrode 13 and a gate insulating film 51 located between the gate electrode 13 and the p- type semiconductor layer 31b, an ohmic source electrode 12a and a Schottky source electrode 12b located on the upper surface of the p-type semiconductor layer 31b, and a topmost source electrode 12. The ohmic source electrode 12a contacts the p-type semiconductor layer 31b to form an ohmic contact, and the Schottky source electrode 12b contacts the p-type semiconductor layer 31b to form a Schottky contact. (See attached diagram.) Figure 11 In the MOSFET shown, when a negative voltage is applied between the gate electrode 13 and the source electrode 12, a high-concentration hole carrier accumulation layer is formed in the region of the p-type semiconductor layer 31b adjacent to the gate insulating film 51. At this time, a complete and high-concentration hole channel is formed between the source electrode 12 and the drain electrode 11. When a positive voltage is then applied between the source electrode 12 and the drain electrode 11, current flows between the source and drain. When the voltage V between the gate electrode 13 and the source electrode 12... GSWhen the value is 0, due to the simultaneous depletion of hole carriers in the p-type semiconductor layer 31b by the MIS junction and Schottky junction located on both sides of the ohmic source electrode 12a, the angle region in the p-type semiconductor layer 31b that is adjacent to both the gate insulating film 51 and the ohmic source electrode 12a (see appendix) Figure 11 The area circled in dashed lines represents the depletion region of hole carriers. This depletion region blocks the hole conduction path between the drain electrode 11 and the source electrode 12. Even when a positive voltage is applied between the source electrode 12 and the drain electrode 11, only a small leakage current flows between the source and drain, and the MOSFET is in the off state. Therefore, the MOSFET based on this invention is a normally-off device. Thus, the MOSFET based on this invention can be designed as a normally-off device with a large on-state current capability.

[0161] An n-type semiconductor and a Schottky source / drain electrode can form a Schottky source / drain MOSFET (n-type Schottky source / drain MOSFET), and a p-type semiconductor and a Schottky source / drain electrode can also form a Schottky source / drain MOSFET (p-type Schottky source / drain MOSFET). Both n-type and p-type Schottky source / drain MOSFETs suffer from low on-state current. (See appendix) Figure 5a ~Attached Figure 8b The illustrated embodiment demonstrates how the design concept of this invention, when combined with n-type semiconductors, can produce an n-channel MOSFET with a large on-state current capability, completely solving the problem of low on-state current in n-type Schottky source-drain MOSFETs. Its on-state current carrying capacity is comparable to that of an n-channel pn junction MOSFET. Similarly, when the design concept of this invention is combined with p-type semiconductors, a p-channel MOSFET with a large on-state current capability can also be produced, completely solving the problem of low on-state current in p-type Schottky source-drain MOSFETs. Its on-state current carrying capacity is comparable to that of a p-channel pn junction MOSFET.

[0162] The spatial relative terms used herein, such as “above,” “below,” “upper,” “above,” and “lower,” are used for the convenience of describing the relationship between one element or feature and another shown in the figures. It will be understood that, in addition to the directions described in the figures, the spatial relative terms are intended to include different orientations of the device in use. For example, if the device in the figure is reversed, the technical description would be that an element “below” or “under” other elements or features would be “above” other elements or features. Therefore, terms such as “below” can include orientations below or above. The device may also be otherwise oriented (rotated 90 degrees or in other orientations), and the spatial relative description used herein will be interpreted accordingly.

[0163] It should be understood that the above-described embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention, and should all be included within the protection scope of the present invention.

Claims

1. A field-effect transistor, comprising: n-type semiconductor layer; The electrodes include a drain electrode, a source electrode, and a gate electrode; A gate insulating film is disposed between the gate electrode and the n-type semiconductor layer; The source electrode is characterized in that: the source electrode includes a first part and a second part, the second part of the source electrode and the first part of the source electrode are metals or alloys with different work functions, the first part of the source electrode forms a Schottky barrier with the n-type semiconductor layer, and the second part of the source electrode forms an ohmic contact with the n-type semiconductor layer; the second part of the source electrode is closer to the gate insulating film than the first part of the source electrode.

2. The field-effect transistor according to claim 1, characterized in that, A dielectric layer is provided between the first part of the source electrode and a portion of the n-type semiconductor layer, and the first part of the source electrode, the dielectric layer, and the n-type semiconductor layer form a metal-insulator-semiconductor junction.

3. The field-effect transistor according to claim 1, characterized in that, The second portion of the source electrode is located between the first portion of the source electrode and the gate insulating film.

4. The field-effect transistor according to claim 1, characterized in that, The work function of the material corresponding to the second part of the source electrode is lower than the work function of the material corresponding to the n-type semiconductor layer.

5. The field-effect transistor according to claim 1, characterized in that, The distance between the end of the second portion of the source electrode and the gate insulating film is in the range of 3 nm to 200 nm.

6. The field-effect transistor according to claim 1, characterized in that, The distance between the end of the second portion of the source electrode and the gate insulating film is in the range of 3 nm to 100 nm.

7. The field-effect transistor according to claim 1, characterized in that, The source electrode further includes a third part. The first part of the source electrode is defined as a Schottky source electrode, and the second part of the source electrode is defined as an ohmic source electrode. The ohmic source electrode and the Schottky source electrode are metals or alloys with different work functions. The Schottky source electrode contacts the n-type semiconductor layer to form a Schottky contact, and the ohmic source electrode contacts the n-type semiconductor layer to form an ohmic contact. The ohmic source electrode is connected to the third part of the source electrode.

8. The field-effect transistor according to claim 1, characterized in that, The first portion and the second portion of the source electrode are coplanar.

9. The field-effect transistor according to claim 1, characterized in that, The bottom surface of the first portion of the source electrode is lower than the bottom surface of the second portion of the source electrode.

10. The field-effect transistor according to claim 1, characterized in that, The n-type semiconductor layer comprises multiple semiconductor layers, each with a different donor concentration.

11. The field-effect transistor according to claim 1, characterized in that, The donor concentration in the region where the n-type semiconductor layer contacts the second part of the source electrode to form an ohmic contact is ≥1.0x10¹⁸ cm⁻³.

12. The field-effect transistor according to claim 2, characterized in that, The region in the n-type semiconductor layer that forms a Schottky contact with the first part of the source electrode has a groove. The inner wall of the groove is covered with an insulating film layer, and the groove is also filled with a conductive material. The conductive material is separated from the n-type semiconductor layer by the insulating film layer.

13. The field-effect transistor according to claim 1, characterized in that, The region of the n-type semiconductor layer that contacts the first part of the source electrode to form a Schottky contact is used to form a plurality of p-type regions that are spaced apart by ion implantation, and the p-type regions form a pn junction with the n-type semiconductor layer.

14. The field-effect transistor according to claim 1, characterized in that, The field-effect transistor is a horizontal MOSFET or a vertical MOSFET.

15. The field-effect transistor according to claim 14, characterized in that, The vertical MOSFET is a vertical planar gate MOSFET, a vertical trench gate MOSFET, a vertical shielded gate MOSFET, or a vertical superjunction MOSFET.

16. The field-effect transistor according to claim 1, characterized in that, The n-type semiconductor layer is composed of compound semiconductors or elemental semiconductors.

17. The field-effect transistor according to claim 1, characterized in that, The n-type semiconductor layer is an oxide semiconductor.

18. A field-effect transistor having: A semiconductor layer comprising an n-type conductive region and a high-resistivity doped region; The electrodes include a drain electrode, a source electrode, and a gate electrode; A gate insulating film is disposed between the gate electrode and the n-type conductive region; Its features are: The source electrode includes a first part and a second part. The second part of the source electrode and the first part of the source electrode are metals or alloys with different work functions. The first part of the source electrode forms a Schottky barrier with the n-type conductive region of the semiconductor layer. The second part of the source electrode forms an ohmic contact with the n-type conductive region. The second part of the source electrode also forms a contact with the high-resistivity doped region of the semiconductor layer. The second part of the source electrode is closer to the gate insulating film than the first part of the source electrode.

19. The field-effect transistor according to claim 18, characterized in that, A dielectric layer is further provided between the first part of the source electrode and a portion of the n-type conductive region, and the first part of the source electrode, the dielectric layer, and the n-type conductive region together form a metal-insulator-semiconductor junction.

20. The field-effect transistor according to claim 18, characterized in that, The second portion of the source electrode is located between the first portion of the source electrode and the gate insulating film.

21. The field-effect transistor according to claim 18, characterized in that, The work function of the material corresponding to the second part of the source electrode is lower than the work function of the material corresponding to the semiconductor layer.

22. The field-effect transistor according to claim 18, characterized in that, The n-type conductive region in the semiconductor layer that forms a Schottky contact with the source electrode has a groove. The inner wall of the groove is covered with an insulating film layer, and the groove is also filled with a conductive material. The conductive material is separated from the semiconductor layer by the insulating film layer.

23. The field-effect transistor according to claim 18, characterized in that, The n-type conductive region in the semiconductor layer that forms a Schottky contact barrier in contact with the source electrode forms a plurality of p-type regions spaced apart by ion implantation, and the p-type regions and the n-type conductive region form a pn junction.

24. The field-effect transistor according to claim 18, characterized in that, The field-effect transistor is a horizontal MOSFET or a vertical MOSFET.

25. The field-effect transistor according to claim 24, characterized in that, The vertical MOSFET is a vertical planar gate MOSFET, a vertical trench gate MOSFET, a vertical shielded gate MOSFET, or a vertical superjunction MOSFET.

26. A field-effect transistor, having: p-type semiconductor layer; The electrodes include a drain electrode, a source electrode, and a gate electrode; A gate insulating film, which is located between the gate electrode and the p-type semiconductor layer; Its features are: The source electrode includes a first part and a second part. The second part of the source electrode and the first part of the source electrode are metals or alloys with different work functions. The first part of the source electrode forms a Schottky barrier with the p-type semiconductor layer, and the second part of the source electrode forms an ohmic contact with the p-type semiconductor layer. The second part of the source electrode is closer to the gate insulating film than the first part of the source electrode.

27. The field-effect transistor according to claim 26, characterized in that, A dielectric layer is provided between the first part of the source electrode and a portion of the p-type semiconductor layer, and the first part of the source electrode, the dielectric layer, and the p-type semiconductor layer form a metal-insulator-semiconductor junction.

28. An insulated-gate bipolar transistor, comprising: A semiconductor layer, comprising a p-type semiconductor layer and an n-type semiconductor layer stacked on top of the p-type semiconductor layer; The electrode includes a collector, an emitter, and a gate electrode; A gate insulating film is disposed between the gate electrode and the n-type semiconductor layer; Its features are: The emitter includes a first part and a second part. The second part of the emitter and the first part of the emitter are metals or alloys with different work functions. The first part of the emitter forms a Schottky barrier with the n-type semiconductor layer, and the second part of the emitter forms an ohmic contact with the n-type semiconductor layer. The second part of the emitter is closer to the gate insulating film than the first part of the emitter.

29. The insulated-gate bipolar transistor according to claim 28, characterized in that, The second portion of the emitter is located between the first portion of the emitter and the gate insulating film.

30. A trench MOS diode, comprising: A semiconductor layer includes a first n-type semiconductor layer and a second n-type semiconductor layer, the second n-type semiconductor layer being stacked on top of the first n-type semiconductor layer, the second n-type semiconductor layer having a trench that opens from a surface of the second n-type semiconductor layer opposite to the first n-type semiconductor layer, and the donor concentration of the second n-type semiconductor layer being less than that of the first n-type semiconductor layer. An anode electrode is formed on the side of the second n-type semiconductor layer opposite to the first n-type semiconductor layer; A cathode electrode is formed on the side of the first n-type semiconductor layer opposite to the second n-type semiconductor layer; A trench MOS gate is buried in the trench of the second n-type semiconductor layer and is separated from the second n-type semiconductor layer by an insulating film; Its features are: The anode electrode includes a first part and a second part. The second part of the anode electrode and the first part of the anode electrode are metals or alloys with different work functions. The first part of the anode electrode contacts the second n-type semiconductor layer to form a Schottky contact, and the second part of the anode electrode contacts the second n-type semiconductor layer to form an ohmic contact. The second part of the anode electrode is closer to the insulating film than the first part of the anode electrode.

31. The trench MOS diode according to claim 30, characterized in that, The work function of the material corresponding to the second part of the anode electrode is lower than the work function of the material corresponding to the second n-type semiconductor layer.

32. The trench MOS diode according to claim 30, characterized in that, The distance between the end of the second part of the anode electrode and the insulating film is in the range of 3nm to 200nm.

33. The trench MOS diode according to claim 30, characterized in that, The distance between the end of the second part of the anode electrode and the insulating film is in the range of 3 nm to 150 nm.

34. The trench MOS diode according to claim 30, characterized in that, The trench MOS gate is in direct contact with the anode electrode, or the trench MOS gate is separated from the anode electrode by an insulating layer.

Images