Graphical real-time system test strategy editing and execution method, device, equipment and medium

Abstract

The present invention discloses a graphical real-time system test strategy editing and execution method, device, equipment and medium, which belongs to the field of automated testing, and includes: a timeline setting step: adding one or more timelines according to the test strategy, and setting the timeline attributes; a test sequence adding step: adding one or more test steps in the one or more timelines, each test step including one or more test actions; a test strategy editing step: performing time estimation for each test action; a test strategy execution step, wherein the test strategy execution step includes executing the test actions on the timeline in parallel according to the edited test strategy. The present invention comprehensively considers various tests and execution situations in the time dimension, can realize the editing and execution of high-precision real-time system test strategies, and meets the automated testing requirements of semi-physical simulation and high real-time simulation systems.

Description

Technical Field

[0001] The present invention relates to the field of automated testing technology, and in particular to a graphical real-time system testing strategy editing and execution method, device, equipment and medium. Background Art

[0002] The development of test programs varies according to different development languages. There are two main ways to develop test strategies at present. One is to directly edit using text languages, such as Python, C++, etc. The other is to use graphical editing methods, such as secondary development based on Visio. Especially in terms of graphical test strategy editing, due to the lack of time dimension, it cannot adapt to semi-physical simulation and real-time simulation systems with high requirements for time accuracy.

[0003] In the prior art, patent 202110083636.7 discloses a distributed aircraft in-situ test system and method, and describes the functions of the test strategy editing unit, including basic editing, process control editing and business editing, but the specific method of strategy editing is not described in its scheme and embodiment. For example, patent 201911356330.3 discloses a signal-driven general automated test development system and system establishment method, and mentions a visual development method in the test strategy development module. In the editor, each primitive has public attributes and private attributes, but none of them contains time attributes. The master's degree thesis "Design of Missile Automated Test and Display Control System Based on ATML" and "Implementation of Graphical Resource Modeling and Test Description Tool for Automatic Test System" both use test description configuration files for workflow configuration, and carry out secondary development of interfaces based on ActiveX drawing controls and supporting APIs provided by Visio. The flowchart in Visio form can clearly represent the entire test judgment and logical process, but there is no time dimension, and the relative time of each operation cannot be accurately controlled. It is only suitable for steady-state or test scenarios with low requirements for time accuracy. Summary of the invention

[0004] In order to meet the needs of semi-physical simulation testing and automated testing of real-time simulation systems with high requirements for time accuracy, the present invention proposes a graphical real-time system test strategy editing and execution method, device, equipment and medium with a time dimension to achieve efficient, convenient and intuitive test strategy development.

[0005] In order to achieve the above-mentioned object of the invention, the technical solution of the present invention is as follows:

[0006] A graphical real-time system test strategy editing and execution method, comprising:

[0007] A timeline setting step, wherein the timeline setting step includes adding one or more timelines according to the test strategy and setting timeline attributes;

[0008] A test sequence adding step, wherein the test sequence adding step includes adding one or more test steps to the one or more time axes, each test step including one or more test actions;

[0009] A test strategy editing step, wherein the test strategy editing step includes estimating the time for each test action: if a test action on a certain time axis is an action that does not require judgment and waiting, then its execution time is assumed to be equal to the real-time hardware simulation step length; if a test action on a certain time axis is an action that requires judgment and waiting, then the actual execution time is calculated during the execution of the real-time system of the lower computer, and fed back to the upper computer;

[0010] The test strategy execution step includes executing the test steps on the timeline according to the edited test strategy.

[0011] Furthermore, in the test strategy editing step, it also includes: for the situation where there is variable transfer between test actions in different test steps on the same timeline, the start time of the test step with a later time is set to be greater than the completion time of the test step with an earlier time.

[0012] Furthermore, the test strategy editing step also includes: when there is variable transfer between different test actions on different time axes, and there is a judgment waiting situation in the test step with an earlier execution time, the starting time of the test action in the test step with a later execution time is determined according to the completion time of the test action in the test step with an earlier execution time.

[0013] Furthermore, in the process of determining the starting time of the test action in the test step with a later execution time, a flag is set when the test step with an earlier execution time starts to execute, and a judgment is made as to whether the transferred variable is updated. If the transferred variable is not updated, the test step with a later execution time waits; if it is updated, it is directly used; other processes are consistent with the handling method of the situation on the same timeline.

[0014] Furthermore, in the timeline setting step, the timeline attributes include the starting time and time accuracy. By default, the starting time of each timeline is the same, and the time corresponding to the same position of different timelines is the same; the time accuracy of the test strategy editing is determined based on the real-time hardware simulation step.

[0015] Furthermore, the test strategy editing step also includes: setting different test actions in the same test step to be executed synchronously, and no parameters are passed between different test actions in the same test step.

[0016] The present invention also proposes a graphical real-time system test strategy editing and execution device, comprising:

[0017] A timeline setting module, which is used to add one or more timelines according to the test strategy and set the timeline attributes;

[0018] A test sequence adding module, the test sequence adding module is used to add one or more test steps in one or more timelines in the timeline setting module, each test step includes one or more test actions;

[0019] A test strategy editing module, which is used to edit the test strategy, including time estimation for each test action: if a test action on a certain time axis is an action that does not require judgment and waiting, its execution time is assumed to be equal to the real-time hardware simulation step length; if a test action on a certain time axis is an action that requires judgment and waiting, the actual execution time is calculated during the execution of the real-time system of the lower computer, and fed back to the upper computer;

[0020] A test strategy execution module, wherein the test strategy execution module is used to execute the test actions on the timeline according to the test content edited by the test strategy editing module.

[0021] Furthermore, the test strategy editing module is also used for: in the case where there is variable transfer between test actions in different test steps on the same timeline, the start time of the test step with a later execution time is set to be greater than the completion time of the test step with an earlier execution time; in the case where there is variable transfer between different test actions on different timelines, and there is judgment waiting in the test step with an earlier execution time, the start time of the test action in the test step with a later execution time is determined according to the completion time of the test action in the test step with an earlier execution time.

[0022] The present invention also proposes a graphical real-time system test strategy editing and execution device, comprising:

[0023] Memory for storing computer programs;

[0024] The processor is used to implement the steps in the above-mentioned graphical real-time system test strategy editing and execution method when executing the computer program.

[0025] The present invention also proposes a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the steps in the above-mentioned graphical real-time system test strategy editing and execution method are implemented.

[0026] In summary, the present invention has the following advantages:

[0027] The graphical test strategy editing and execution method proposed in the present invention comprehensively considers various test and execution situations in the time dimension, and provides an efficient solution. It can realize the editing and execution of high-precision real-time system test strategies, meet the automated testing requirements of semi-physical simulation and high real-time simulation systems, and has wide scalability. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Figure 1 It is a schematic diagram of the test strategy hierarchy;

[0029] Figure 2 It is the basic structure diagram of the test;

[0030] Figure 3 is a schematic diagram of the test strategy in Example 2;

[0031] Figure 4 Schematic diagram of the test strategy in Example 3. DETAILED DESCRIPTION

[0032] In order to explain the present invention more clearly, the present invention is further described below in conjunction with preferred embodiments and drawings. It should be understood by those skilled in the art that the content described below is illustrative rather than restrictive, and should not be used to limit the scope of protection of the present invention.

[0033] Example 1

[0034] The present invention provides a graphical real-time system test strategy editing and execution method, such as Figure 1 As shown, the test strategy of the present invention mainly includes the following three levels:

[0035] 1) Timeline (Seq);

[0036] 2) Test steps (Step);

[0037] 3) Test action (Act).

[0038] The basic structure of the test is as follows Figure 2 As shown, multiple timelines are included, and the timelines are used to clearly show that multiple test sequences are executed in parallel.

[0039] The implementation process of this method is as follows:

[0040] 1) Timeline and test sequence adding steps

[0041] Add one or more timelines, add one or more test steps to each timeline, and each test step contains one or more test actions. The types of test actions include: send, read, pop-up, conditional judgment, loop, jump, etc.

[0042] In this embodiment, the starting time of each time axis is the same by default (generally set to 0s), the starting time can be adjusted forward or backward, the time corresponding to the same position in different time axes is the same, and the attributes of the time axis include at least: time axis number, starting time, and time accuracy.

[0043] Regarding time accuracy, assuming that the real-time hardware simulation step is ΔTs and the operating cycle of the product under test is ΔTu (ΔTs≤ΔTu), the time accuracy of strategy editing is ΔTt≤ΔTs to meet the test needs, otherwise the parameters cannot be accurately set and collected.

[0044] 2) Test strategy editing steps

[0045] Regarding the time estimation of each action, if the action is not a conditional judgment, loop, jump, etc., that is, an action that does not require judgment or waiting, the default execution time is ΔTs; if it is a test step that requires judgment or waiting, no execution time estimation is performed, and ΔT is used to represent the actual execution time of the test step. This time is unknown when editing the strategy and needs to be calculated during the execution of the real-time system of the lower computer and fed back to the upper computer for dynamic display and evaluation in a timely manner to ensure that the sequence is executed in the correct timing.

[0046] At the same time, ΔT≯ΔTmax, ΔTmax is the maximum timeout time for each test action, which can be set uniformly or individually.

[0047] In order to improve editing efficiency, reduce editing complexity, and ensure that different test actions in the same test step are executed synchronously, it is required that no parameters are passed between different test actions in the same test step.

[0048] Regarding the variable transfer between test actions in different test steps on the same timeline, the start time t2 of the test step with a later execution time needs to be greater than the completion time t1+ΔT of the test step with an earlier execution time. If there is no test action of the waiting type in the previous test step, its execution time ΔT=ΔTs; if there is a test action of the waiting type in the previous test step, t2>t1+ΔT.

[0049] Regarding different test actions on different timelines, variables need to be passed between them, and there is a judgment waiting situation during the execution of the previous test step, it is necessary to determine the starting time of the test action in the later test step based on the completion time of the test action in the earlier test step.

[0050] Specifically, let's assume that after Act1 in Step1 on the Seq1 timeline is completed, variable a is passed to Act2 in Step2 on the Seq2 timeline. Since Step1 and Step2 are on different timelines and there is a judgment wait in the execution of the previous Step, the order of Step1 and Step2 cannot be determined. In this case, it is necessary to set the flag when Step1 starts to execute to determine whether the passed variable is updated. If it is not updated, Step2 waits, and if it is updated, it is directly used. The other processes are handled in the same way as on the same timeline (i.e., the start time of the test step with a later execution time is greater than the completion time of the test step with an earlier execution time).

[0051] 3) Test strategy execution steps

[0052] Execute the test steps on the timeline according to the test strategy edited in step 2).

[0053] Through the above method, the present invention can realize the editing and execution of high-precision real-time system test strategies, meet the automated testing requirements of semi-physical simulation and high real-time simulation systems, and has wide scalability.

[0054] Example 2

[0055] This embodiment uses a specific example to illustrate a graphical real-time system test strategy editing and execution method of the present invention, regarding the situation where variables are transferred between test actions in different test steps on the same timeline.

[0056] like Figure 3 As shown, the operating cycle of the tested product is 80ms, and the real-time hardware simulation step is 10ms. The test strategy time accuracy can be set to 5ms, that is, the time can be set at 0ms, 5ms, 10ms, 15ms, etc. with 5ms as the base.

[0057] The test strategy contains the time axis Seq1, and parameters are passed between Act1.1.1 and Act1.2.1.

[0058] The starting time of Seq1 axis is t10=0s, the starting time of Step1.1 is t11=1s, and Act1.1.1~Act1.1.3 do not need to be judged and waited, so the default execution time is 10ms, that is, the end time of Step1.1 is 10ms, the starting time of Step1.2 is t12=15ms, and Act1.2.1 is a judgment and waiting type, which is described by variable Δt12 during editing. During actual execution, the lower computer records the execution time Δt12=40ms≯ΔTmax=1s.

[0059] Example 3

[0060] This embodiment uses specific examples to illustrate a graphical real-time system test strategy editing and execution method of the present invention, regarding the need for variable transfer between different test actions on different time axes, and the existence of judgment waiting in the execution of the previous test steps.

[0061] like Figure 4 As shown, the operating cycle of the tested product is 80ms, and the real-time hardware simulation step is 10ms. The test strategy time accuracy can be set to 5ms, that is, the time can be set at 0ms, 5ms, 10ms, 15ms, etc. with 5ms as the base.

[0062] The test strategy contains time axes Seq1 and Seq2. Act2.2.1 needs to use parameter a after Act1.2.1 is executed.

[0063] When editing the test sequence, Δt12 cannot be known, so the relationship between the completion time t12+Δt12 of Act1.2.1 and t22 cannot be determined. The flag of parameter a needs to be set at time t12. When executing on the lower computer, the time t12+Δt12 when parameter a changes in Act1.2.1 is determined, and then t22>t12+Δt12 and t22>t21+Δt21 is set, and Act2.2.1 is executed from t22.

[0064] Example 4

[0065] Corresponding to Example 1, this embodiment further provides a graphical real-time system test strategy editing and execution device, including: a timeline setting module, a test sequence adding module, a test strategy editing module and a test strategy execution module.

[0066] The timeline setting module is used to add one or more timelines according to the test strategy and set the timeline properties; the timeline properties include at least: timeline number, start time, time precision, the start time of each timeline is the same by default (generally set to 0s), the start time can be adjusted forward or backward, and the time corresponding to the same position of different timelines is the same; the time precision of strategy editing ΔTt≤ΔTs, ΔTs is the real-time hardware simulation step size.

[0067] The test sequence adding module is used to add one or more test steps to one or more timelines in the timeline setting module. Each test step contains one or more test actions. The types of test actions include: sending, reading, pop-up, conditional judgment, loop, jump, etc.

[0068] A test strategy editing module, which is used for editing the test strategy, including: estimating the time for each test action. If a test action on a certain time axis is an action that does not require judgment and waiting, its execution time is assumed to be equal to the real-time hardware simulation step length; if a test action on a certain time axis is an action that requires judgment and waiting, the actual execution time is calculated during the execution of the real-time system of the lower computer, and fed back to the upper computer;

[0069] Furthermore, the test strategy editing module is also used to set the following test strategies: different test actions in the same test step are executed synchronously, and there is no parameter transfer between different test actions in the same test step; for the situation where variable transfer exists between test actions in different test steps on the same timeline, the start time of the test step with a later execution time must be set to be greater than the completion time of the test step with an earlier execution time; for the situation where variable transfer exists between different test actions on different timelines, and there is judgment waiting in the test step with an earlier execution time, the start time of the test action in the test step with a later execution time is determined according to the completion time of the test action in the test step with an earlier execution time.

[0070] A test strategy execution module, wherein the test strategy execution module is used to execute the test actions on the timeline according to the test content edited by the test strategy editing module.

[0071] The functions of the above functional modules correspond to the contents of each step in Example 1, and the unexplained parts will not be repeated.

[0072] Example 5

[0073] Corresponding to Embodiment 1, this embodiment further provides a graphical real-time system test strategy editing and execution device, including:

[0074] Memory for storing computer programs;

[0075] The processor is used to implement the steps of a graphical real-time system test strategy editing and execution method as described in the above embodiment 1 when executing the computer program.

[0076] Preferably, the computer program can be divided into one or more modules / units, which are stored in the memory and executed by the processor to complete the present invention. The one or more modules / units can be a series of computer program instruction segments that can complete specific functions, and the instruction segments are used to describe the execution process of the computer program in the device.

[0077] The processor can be a central processing unit, or other general-purpose processors, digital signal processors, application-specific integrated circuits, off-the-shelf programmable gate arrays or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor can be a microprocessor, or the processor can also be any conventional processor. The processor is the control center of the device, and various parts of the device are connected using various interfaces and lines.

[0078] The memory mainly includes a program storage area and a data storage area, wherein the program storage area can store an operating system, an application required for at least one function, etc., and the data storage area can store related data, etc. In addition, the memory can be a high-speed random access memory, or a non-volatile memory, such as a plug-in hard disk, a smart memory card, a secure digital card, and a flash memory card, etc., or the memory can also be other volatile solid-state storage devices.

[0079] Example 6

[0080] An embodiment of the present invention further provides a computer-readable storage medium on which a computer program is stored. When the computer program is executed by a processor, the steps in a graphical real-time system test strategy editing and execution method as described in the above-mentioned embodiment 1 are implemented.

[0081] Computer storage media may be tangible media that can contain or store programs for use by or in connection with an instruction execution system, apparatus, or device.

[0082] The above description is only a preferred embodiment of the present invention and does not limit the present invention in any form. Any simple modification or equivalent change made to the above embodiment based on the technical essence of the present invention shall fall within the protection scope of the present invention.

Claims

1. A graphical real-time system test strategy editing and execution method, characterized in that: include: A timeline setting step, wherein the timeline setting step includes adding one or more timelines according to the test strategy and setting timeline attributes; A test sequence adding step, wherein the test sequence adding step includes adding one or more test steps to the one or more time axes, each test step including one or more test actions; A test strategy editing step, wherein the test strategy edited in the test strategy editing step includes time estimation for each test action: if a test action on a certain time axis is an action that does not require judgment and waiting, its execution time is assumed to be equal to the real-time hardware simulation step length; if a test action on a certain time axis is an action that requires judgment and waiting, the actual execution time is calculated during the execution of the real-time system of the lower computer, and fed back to the upper computer; and for the situation where there is variable transfer between test actions in different test steps on the same time axis, the start time of the test step with a later time is set to be greater than the completion time of the test step with an earlier time; for the situation where there is variable transfer between different test actions on different time axes, and there is judgment and waiting in the test step with an earlier execution time, the start time of the test action in the test step with a later execution time is determined according to the completion time of the test action in the test step with an earlier execution time; at the same time, different test actions in the same test step are set to be executed synchronously, and there is no parameter transfer between different test actions in the same test step; The test strategy execution step includes executing the test steps on the timeline according to the edited test strategy.

2. A graphical real-time system test strategy editing and execution method as claimed in claim 1, characterized in that: In the process of determining the start time of the test action in the test step with a later execution time, the flag is set when the test step with an earlier execution time starts to execute, and whether the transferred variable is updated is judged. If the transferred variable is not updated, the test step with a later execution time waits, and if it is updated, it is directly used; The rest of the process is consistent with the situation on the same timeline.

3. A graphical real-time system test strategy editing and execution method as claimed in claim 1, characterized in that: In the timeline setting step, the timeline attributes include the starting time and time accuracy. By default, the starting time of each timeline is the same, and the time corresponding to the same position of different timelines is the same; the time accuracy of the test strategy editing is determined according to the real-time hardware simulation step.

4. A graphical real-time system test strategy editing and execution device, characterized in that: include: A timeline setting module, which is used to add one or more timelines according to the test strategy and set the timeline attributes; A test sequence adding module, the test sequence adding module is used to add one or more test steps in one or more timelines in the timeline setting module, each test step includes one or more test actions; A test strategy editing module, which is used to edit test strategies, including time estimation for each test action: if a test action on a certain time axis is an action that does not require judgment and waiting, its execution time is assumed to be equal to the real-time hardware simulation step length; if a test action on a certain time axis is an action that requires judgment and waiting, the actual execution time is calculated during the execution of the lower computer real-time system and fed back to the upper computer; and for the situation where there is variable transfer between test actions in different test steps on the same time axis, the start time of the test step with a later time is set to be greater than the completion time of the test step with an earlier time; for the situation where there is variable transfer between different test actions on different time axes, and there is judgment and waiting in the test step with an earlier execution time, the start time of the test action in the test step with a later execution time is determined according to the completion time of the test action in the test step with an earlier execution time; at the same time, different test actions in the same test step are set to be executed synchronously, and there is no parameter transfer between different test actions in the same test step; A test strategy execution module, wherein the test strategy execution module is used to execute the test actions on the timeline according to the test content edited by the test strategy editing module.

5. A graphical real-time system test strategy editing and execution device, characterized in that: include: Memory for storing computer programs; A processor, configured to implement the steps in a graphical real-time system test strategy editing and execution method as described in any one of claims 1 to 3 when executing the computer program.

6. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps in the graphical real-time system test strategy editing and execution method as described in any one of claims 1 to 3 are implemented.

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