Memory management method, device, storage medium and chip

Abstract

The present disclosure relates to a memory management method, device, storage medium and chip, wherein the memory includes a temporary cache of a target channel and a formal cache of the target channel, wherein the method includes: receiving first message data through the target channel, the first message data being data collected by a data engine to be stored in the temporary cache of the target channel; determining whether to support the storage of the first message data based on the respective sizes of the temporary cache and the formal cache; and storing the first message data in the temporary cache of the target channel when it is determined that the storage of the first message data is supported. In this way, the technical problems such as limiting the further optimization of memory resources caused by using a circular cache for data management in the related technology can be solved.

Description

Technical Field

[0001] The present disclosure relates to the field of storage technology, and in particular to a memory management method, device, storage medium and chip. Background Art

[0002] In recent years, the amount of memory data required by computing systems has continued to grow, so there is a need to provide more memory space for memory data computing technology. For example, in the field of intelligent driving, both the data engine and the algorithm module run in the intelligent driving controller, and the two share the controller's computing, memory, and storage resources. Because the data engine needs to record data from a period of time before the event is triggered, it generally needs to cache some historical data in memory; and the algorithm module needs to perform large-scale data processing, such as filtering, convolution, dynamic programming, etc., which also requires a large amount of memory. It can be seen that memory resources are the focus of competition between the data engine and the algorithm module.

[0003] In the related technology, most of them currently use circular cache for historical data management, but this method controls the memory size occupied by the data engine within a limited range, making it difficult to expand more management measures and limiting the further optimization of memory resources. Therefore, it is urgent to propose a better memory management method. Summary of the invention

[0004] In order to overcome the problems existing in the related art, the present disclosure provides a memory management method, device, storage medium and chip to solve the technical problems such as limiting the further optimization of memory resources caused by using a circular cache for data management in the above-mentioned related art.

[0005] According to a first aspect of an embodiment of the present disclosure, a memory management method is provided, wherein the memory includes a temporary cache of a target channel and a formal cache of the target channel, and the method includes:

[0006] receiving first message data through the target channel, where the first message data is data collected by a data engine and to be stored in a temporary cache of the target channel;

[0007] Determining whether to support storing the first message data based on the respective sizes of the temporary buffer and the formal buffer;

[0008] When it is determined that the first message data can be stored, the first message data is stored in a temporary buffer of the target channel.

[0009] In some embodiments, the determining whether to support storing the first message data based on the respective sizes of the temporary buffer and the formal buffer comprises:

[0010] When the sizes of the temporary buffer and the formal buffer meet a preset condition, determining to support storing the first message data;

[0011] Among them, the preset conditions include: the size of the temporary cache does not exceed a preset first threshold, and the size of the formal cache does not exceed a preset second threshold; and / or the sum of the sizes of the temporary cache and the formal cache does not exceed the preset first threshold, and the preset first threshold is greater than the preset second threshold.

[0012] In some embodiments, the method further comprises:

[0013] When the size of the temporary cache exceeds the preset first threshold, randomly deleting the second message data stored in the temporary cache until the size of the temporary cache does not exceed the preset first threshold, and the second message data is stored preferentially over the first message data; and / or,

[0014] When the size of the formal cache exceeds the preset second threshold, the third message data stored in the formal cache is deleted until the size of the formal cache does not exceed the preset second threshold, and the third message data is data whose storage time in the formal cache is less than the preset first time.

[0015] In some embodiments, the method further comprises:

[0016] The message data stored in the temporary buffer is processed based on the frame rate of the data stored in the temporary buffer.

[0017] In some embodiments, the processing of the message data stored in the temporary buffer based on the frame rate of the data stored in the temporary buffer includes:

[0018] When the frame rate of the data stored in the temporary cache does not exceed a preset frame rate threshold, storing the message data stored in the temporary cache in the formal cache within a preset second time; and / or,

[0019] When the frame rate of the data stored in the temporary cache exceeds the preset frame rate threshold, the fourth message data stored in the temporary cache is randomly deleted until the frame rate of the data stored in the temporary cache does not exceed the preset frame rate threshold.

[0020] In some embodiments, the memory includes a temporary cache and a formal cache of m channels, respectively, the target channel is one of the m channels, and the method further includes:

[0021] Memory monitoring processing is performed on the temporary cache and the formal cache of each of the m channels within a preset third time.

[0022] In some embodiments, the performing memory monitoring processing on the temporary cache and the formal cache of each of the m channels includes:

[0023] When the total memory amount corresponding to the m channels exceeds a preset third threshold, a data cleaning calculation is performed based on the respective priorities of the m channels, the respective cache data amounts of the m channels, and the size of each message data to obtain the amount of data to be cleaned;

[0024] Performing data cleaning based on the amount of data to be cleaned;

[0025] Among them, the total amount of memory includes the size of the temporary cache of each of the m channels and the size of the formal cache of each of the m channels, the amount of data to be cleared includes the channel to be cleared and the message data to be cleared in the channel to be cleared, the channel to be cleared is a channel among the m channels, and the amount of cache data includes the size of the temporary cache of the corresponding channel and the size of the formal cache.

[0026] In some embodiments, performing data cleaning calculation based on the priorities of the m channels, the cache data volumes of the m channels, and the size of each message data to obtain the amount of data to be cleaned includes:

[0027] Based on the respective priorities of the m channels, the fifth message data in each channel is determined as the amount of data to be cleared in descending order of the priorities;

[0028] The fifth message data is message data whose storage time in the corresponding channel is less than the preset fourth time.

[0029] In some embodiments, the method further comprises:

[0030] In response to the recording instruction, the message data to be recorded is read from the formal buffer of the target channel, and the message data to be recorded is written into a preset file.

[0031] According to a second aspect of an embodiment of the present disclosure, a memory management device is provided, wherein the memory includes a temporary cache of a target channel and a formal cache of the target channel, and the memory management device includes:

[0032] a transceiver module, configured to receive first message data through the target channel, wherein the first message data is data collected by the data engine and to be stored in a temporary cache of the target channel;

[0033] A processing module, configured to determine whether to support storing the first message data based on the respective sizes of the temporary buffer and the formal buffer;

[0034] The processing module is further configured to store the first message data in a temporary buffer of the target channel when it is determined that the first message data can be stored.

[0035] For the contents not introduced or described in the embodiments of the present disclosure, please refer to the relevant introduction in the aforementioned method embodiments, and the embodiments of the present disclosure are not limited thereto.

[0036] According to a third aspect of an embodiment of the present disclosure, another memory management device is provided, comprising: a processor; a memory for storing processor executable instructions; wherein the processor is configured to execute the executable instructions to implement the steps of the above-mentioned memory management method.

[0037] In some embodiments, the memory management device may include at least one of the following: a storage device, an electronic device, and a server.

[0038] According to a fourth aspect of an embodiment of the present disclosure, a computer-readable storage medium is provided, on which computer program instructions are stored. When the program instructions are executed by a processor, the steps of the memory management method provided in the first aspect of the present disclosure are implemented.

[0039] According to a fifth aspect of an embodiment of the present disclosure, a chip is provided, comprising: a processor and an interface; the processor is used to read instructions to execute the steps of the above-mentioned memory management method.

[0040] The technical solution provided by the embodiment of the present disclosure may include the following beneficial effects: the memory in the memory management device includes a temporary cache of the target channel and a formal cache of the target channel, the memory management device receives the first message data through the target channel, the first message data is the data collected by the data engine to be stored in the temporary cache of the target channel; based on the respective sizes of the temporary cache and the formal cache, it is determined whether to support the storage of the first message data; when it is determined that the storage of the first message data is supported, the first message data is stored in the temporary cache of the target channel. In this way, the newly received first message data can be stored based on the respective sizes of the two-level caches (the size of the temporary cache and the size of the formal cache), which can avoid the data engine and the algorithm module from occupying memory resources, and when the memory resources are occupied less, it is helpful for the data engine to collect more useful message data, thereby improving the availability of the data engine. In addition, it can also solve the technical problems brought about by the use of a circular cache for data management in the related art, such as controlling the memory size occupied by the data engine within a limited range, making it difficult to expand more management measures, and limiting the further optimization of memory resources.

[0041] It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present disclosure and, together with the description, serve to explain the principles of the present disclosure.

[0043] Figure 1 The figure is a flowchart of a memory management method according to an exemplary embodiment.

[0044] Figure 2 The present invention is a schematic diagram of a determination process of storing first message data according to an exemplary embodiment.

[0045] Figure 3 The figure is a flowchart of another memory management method according to an exemplary embodiment.

[0046] Figure 4 is a detailed schematic diagram showing memory management according to an exemplary embodiment.

[0047] Figure 5 The figure is a flowchart of another memory management method according to an exemplary embodiment.

[0048] Figure 6 The figure is a schematic diagram showing the structure of a memory management device according to an exemplary embodiment.

[0049] Figure 7 It is a schematic diagram showing the structure of another memory management device according to an exemplary embodiment.

[0050] Figure 8 The figure is a schematic diagram showing the structure of a server according to an exemplary embodiment.

[0051] Fig. 9 The figure is a schematic diagram showing the structure of a chip according to an exemplary embodiment. DETAILED DESCRIPTION

[0052] Exemplary embodiments will be described in detail herein, examples of which are shown in the accompanying drawings. When the following description refers to the drawings, the same numbers in different drawings represent the same or similar elements unless otherwise indicated. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present disclosure. Instead, they are merely examples of devices and methods consistent with some aspects of the present disclosure as detailed in the appended claims.

[0053] It should be noted that all actions of acquiring signals, information or data in the present disclosure are performed with the authorization given by the owner of the corresponding device.

[0054] With the rapid development of science and technology, intelligent driving has become an important development direction of the automotive industry. Applying artificial intelligence technology to intelligent driving through data collection, labeling, training, deployment and evaluation, and promoting the rapid and efficient iteration of intelligent driving algorithms are the key to the implementation of intelligent driving technology. Data collection is the prerequisite for data application. The automotive industry generally adopts a rule-based trigger mechanism on mass-produced vehicles to return data fragments of specific scenarios, such as emergency braking events triggered in collision scenarios with a high probability. The data engine can collect the calculation results or status information output by the algorithm module. The data engine and the algorithm module communicate frequently; at the same time, they both run in the intelligent driving controller, and the two share the controller's computing, memory, storage and other resources. Because the data engine needs to record the data of the period before the event is triggered, it generally needs to cache some historical data in the memory; and the algorithm module needs to perform large-scale data processing, such as filtering, convolution, dynamic programming, etc., which also requires a large amount of memory. Therefore, memory resources are the focus of competition between the data engine and the algorithm module. In the related technologies, most of them use circular cache for historical data management, but this method controls the memory size occupied by the data engine within a limited range, making it difficult to expand more management measures, and limiting the further optimization of memory resources.

[0055] To solve the above problems, the present disclosure proposes a memory management method, device, storage medium and chip. Figure 1 FIG. 1 is a flow chart showing a memory management method according to an exemplary embodiment. Figure 1 The method shown can be applied to a memory management device, which may include m channels, each channel is configured with a two-level cache, specifically, each channel is configured with a temporary cache and a formal cache, and m is a positive integer that the system customizes according to actual conditions. For the convenience of description, the present disclosure takes the target channel among the m channels as an example to explain the relevant content. Figure 1 The method shown may include the following implementation steps:

[0056] S101. Receive first message data through the target channel, where the first message data is data collected by a data engine and to be stored in a temporary cache of the target channel.

[0057] In the present disclosure, the first message data may refer to data received by the data engine through the target channel, and the data will be cached / stored in the temporary cache of the target channel. For example, the first message data may include but is not limited to the calculation result data output by the algorithm module, or the status information data, etc., which is not limited or described in detail in the present disclosure.

[0058] S102: Determine whether to support storing the first message data based on the sizes of the temporary buffer and the formal buffer.

[0059] The memory management device can judge / determine whether the first message data is currently supported for storage based on the size of the temporary cache and the size of the formal cache of the target channel. If it is judged that the first message data is currently supported for storage, step S102 can be continued; otherwise, the process can be continued to wait or terminated.

[0060] The size of the temporary cache involved in the present disclosure may refer to the amount of data stored in the temporary cache, or the size of the temporary cache that has been used / occupied. The size of the formal cache involved in the present disclosure may refer to the amount of data stored in the formal cache, or the size of the formal cache that has been used / occupied.

[0061] S103: When it is determined that the first message data can be stored, the first message data is stored in a temporary buffer of the target channel.

[0062] When the memory management device determines that the first message data is currently supported for storage, the first message data may be stored in a temporary cache of the target channel to adapt to data frame rate fluctuations caused by dynamic changes in the system.

[0063] The memory management device involved in the present disclosure may include, but is not limited to, for example, any one or more of the following combinations: storage devices, electronic devices, servers or other devices with memory management mechanisms, etc. The storage device may include, but is not limited to, for example, random access memory (Random Access Memory, RAM), dynamic random access memory (dynamic RAM, DRAM), static random access memory (static RAM, SRAM) or other devices with memory cache functions, etc. The electronic device may also be called a terminal device (terminal), user equipment (user equipment, UE), mobile station (Mobile Station, MS), mobile terminal device (Mobile Terminal, MT), etc. The electronic device may be a car with communication function, a smart car, a mobile phone, a wearable device, a tablet computer, a computer with wireless transceiver function, a virtual reality (VR) terminal device, an augmented reality (AR) terminal device, a wireless terminal device in industrial control, a wireless terminal device in self-driving, a wireless terminal device in remote medical surgery, a wireless terminal device in smart grid, a wireless terminal device in transportation safety, a wireless terminal device in smart city, a wireless terminal device in smart home, etc. The embodiments of the present disclosure do not limit the specific technology and specific device form adopted by the above-mentioned memory management device.

[0064] By implementing the disclosed embodiment, the memory in the memory management device includes a temporary cache of the target channel and a formal cache of the target channel. The memory management device receives the first message data through the target channel. The first message data is the data collected by the data engine to be stored in the temporary cache of the target channel; based on the respective sizes of the temporary cache and the formal cache, it is determined whether to support the storage of the first message data; when it is determined that the storage of the first message data is supported, the first message data is stored in the temporary cache of the target channel. In this way, the newly received first message data can be stored based on the respective sizes of the two-level caches (the size of the temporary cache and the size of the formal cache), which can avoid the data engine and the algorithm module from occupying memory resources, and when the memory resources are occupied less, it is helpful for the data engine to collect more useful message data, thereby improving the availability of the data engine. In addition, it can also solve the technical problems brought about by the use of a circular cache for data management in the related art, such as controlling the memory size occupied by the data engine within a limited range, making it difficult to expand more management measures, and limiting the further optimization of memory resources.

[0065] In one embodiment, the present disclosure does not limit the specific implementation of the above step S102. Figure 2 FIG. 1 is a schematic diagram of a determination process for storing first message data according to an exemplary embodiment. Figure 2 The process shown may include the following implementation steps:

[0066] S201: Determine whether the sizes of the temporary cache and the formal cache meet preset conditions.

[0067] When the memory management device determines that the size of the temporary cache and the size of the formal cache both meet the preset conditions, it can continue to execute step S202 to determine that the storage of the first message data is currently supported; otherwise, it can continue to execute step S203 to determine that the storage of the first message data is not currently supported.

[0068] The above-mentioned preset conditions in the present disclosure may be conditions pre-customized and set by the system or the user, which are used to judge / determine whether the storage of the newly received first message data is currently supported. For example, the above-mentioned preset conditions may include at least one of the following: the size of the above-mentioned temporary cache does not exceed the preset first threshold, and the size of the above-mentioned formal cache does not exceed the preset second threshold; or, the sum of the size of the above-mentioned temporary cache and the size of the above-mentioned formal cache does not exceed the preset first threshold. Among them, the above-mentioned preset first threshold and the above-mentioned preset second threshold are cache thresholds pre-customized and configured by the system or the user according to actual conditions, which are usually related to the corresponding channels. For example, different channels can be configured with the same or different preset first thresholds or preset second thresholds according to actual conditions, etc., and the present disclosure does not make too many restrictions and descriptions on this. Usually, the above-mentioned preset first threshold is greater than the above-mentioned preset second threshold, and the above-mentioned preset second threshold may be the difference between the above-mentioned preset first threshold and the size of the above-mentioned temporary cache, etc.

[0069] The present disclosure does not limit the specific order of implementation of the judgment of the above-mentioned preset conditions. For example, the present disclosure may first determine whether the size of the above-mentioned temporary cache exceeds the preset first threshold. If not, it may continue to determine whether the size of the above-mentioned formal cache exceeds the preset second threshold; or it may continue to determine whether the sum of the size of the above-mentioned temporary cache and the size of the above-mentioned formal cache exceeds the preset first threshold, etc. The present disclosure does not make too many limitations and descriptions on this.

[0070] S202: Determine whether to support storing the first message data.

[0071] S203: Determine that storage of the first message data is not supported.

[0072] When the memory management device determines that the size of the temporary cache and the size of the formal cache do not meet the preset conditions, it can determine that the first message data is not currently supported for storage. Further, the memory management device can also perform optional steps such as the following steps S204 and / or S205.

[0073] S204. When the size of the temporary cache exceeds the preset first threshold, randomly delete the second message data stored in the temporary cache until the size of the temporary cache does not exceed the preset first threshold, and the second message data is stored in priority to the first message data.

[0074] When the memory management device determines that the size of the temporary cache exceeds the preset first threshold, it can be determined that a large amount of message data is received in the temporary cache in a short period of time. Usually, the message data received in a short period of time often has a large degree of repetition. Therefore, the present disclosure can randomly delete the excessive message data stored in the temporary cache, such as deleting the second message data, until the size of the temporary cache does not exceed the preset first threshold. The second message data refers to any message data stored in the temporary cache in priority to the first message data.

[0075] S205. When the size of the formal cache exceeds the preset second threshold, delete the third message data stored in the formal cache until the size of the formal cache does not exceed the preset second threshold, and the third message data is data stored in the formal cache for a time shorter than the preset first time.

[0076] When the memory management device determines that the size of the formal cache exceeds the preset second threshold, or determines that the size of the temporary cache does not exceed the preset first threshold, and the sum of the size of the temporary cache and the size of the formal cache exceeds the preset first threshold, it can be determined that there are too many message data stored in the formal cache, and the present disclosure can delete the third message data stored in the formal cache. The third message data can refer to the message data stored in the formal cache for a time less than the preset first time, such as the message data with the earliest / oldest storage time in the formal cache.

[0077] It should be noted that the order of implementation of the steps in the above embodiments of the present disclosure is not limited. For example, the present disclosure may first execute step S205 and then execute step S204, etc., which can be determined based on actual conditions, and the present disclosure does not make too many limitations and descriptions here.

[0078] Some optional embodiments of the present disclosure are described below.

[0079] In an optional embodiment, the present disclosure may process the message data stored in the temporary cache. For example, the present disclosure may first determine the frame rate of the data stored in the temporary cache, and then process the message data stored in the temporary cache based on the frame rate of the data stored in the temporary cache, and the processing includes migration storage processing and / or deletion processing. Among them, the frame rate involved in the present disclosure may refer to the frame rate of the message data stored in the temporary cache, and the frame rate may refer to the amount of data stored / transmitted in the temporary cache per unit time. The present disclosure does not limit the specific implementation method of the above data processing, for example, please refer to Figure 3 FIG. 1 is a flow chart of another memory management method according to an exemplary embodiment. Figure 3 The method shown may include the following implementation steps:

[0080] S301: Determine the frame rate of the data stored in the temporary buffer.

[0081] The frame rate involved in the present disclosure may refer to the frame rate of the message data stored in the above-mentioned temporary buffer, and the frame rate may refer to the amount of data stored / transmitted in the above-mentioned temporary buffer per unit time.

[0082] The present disclosure does not limit the implementation method for determining the above frame rate. For example, the memory management device can periodically calculate the above frame rate based on the amount of message data stored in the above temporary cache within a fixed time.

[0083] S302: Determine whether the frame rate of the data stored in the temporary buffer exceeds a preset frame rate threshold.

[0084] When the memory management device determines that the frame rate of the data stored in the temporary cache does not exceed the preset frame rate threshold, it can continue to execute step S303; otherwise, when it determines that the frame rate of the data stored in the temporary cache exceeds the preset frame rate threshold, it can continue to execute step S304.

[0085] Among them, the above-mentioned preset frame rate threshold can be a frame rate threshold pre-customized and set by the system or the user according to actual conditions. For example, it can be an empirical value set according to user experience, or it can be a statistical value calculated based on a series of experimental data, etc. The present disclosure does not make too many limitations and descriptions on this.

[0086] S303: When the frame rate of the data stored in the temporary cache does not exceed a preset frame rate threshold, the message data stored in the temporary cache is stored in the formal cache within a preset second time.

[0087] When the memory management device determines that the frame rate of the data stored in the temporary cache does not exceed the preset frame rate threshold, it can migrate and store the message data stored in the temporary cache to the formal cache at a scheduled time within the preset second time. The preset second time is a time pre-defined and set by the system or the user according to actual conditions, such as 1 second.

[0088] S304. When the frame rate of the data stored in the temporary cache exceeds the preset frame rate threshold, randomly delete the fourth message data stored in the temporary cache until the frame rate of the data stored in the temporary cache does not exceed the preset frame rate threshold.

[0089] When the memory management device determines that the frame rate of the data stored in the above-mentioned temporary cache exceeds the preset frame rate threshold, it can be determined that there are too many messages stored in the temporary cache in a short period of time. The present invention can randomly delete the excessive message data stored in the above-mentioned temporary cache, such as deleting the fourth message data, etc., until the frame rate of the data stored in the above-mentioned temporary cache does not exceed the above-mentioned preset frame rate threshold, and optionally further migrate the message data stored in the temporary cache to the formal cache.

[0090] It can be seen that the disclosed embodiment can process the message data stored in the temporary cache at regular intervals, such as calculating the frame rate, deleting excessive invalid data, etc., and then migrate the processed message data to the formal cache to trigger subsequent data recording. The use of a temporary cache cleaning mechanism based on the frame rate helps to adapt to / meet the diverse needs of the data engine for data collection and improves the availability of data collection.

[0091] In another optional embodiment, when the present disclosure detects / receives a recording instruction, it can respond to the recording instruction, read the message data to be recorded from the official cache of the corresponding channel (e.g., the target channel), and write the message data to be recorded into a preset file, such as a preset acquisition file. The above-mentioned recording instruction refers to an instruction for triggering data recording, and the present disclosure does not limit the implementation method for obtaining the instruction. For example, the memory management device can generate the above-mentioned recording instruction after detecting the user's preset operation on the recording button, or the memory management device can generate the above-mentioned recording instruction after receiving the recording instruction from the upper layer or other devices (such as a terminal or server).

[0092] In another optional embodiment, the present disclosure can monitor and clean up the memory. Figure 4 FIG. 1 is a detailed schematic diagram of memory management according to an exemplary embodiment. Figure 4 As shown, the memory involved in the present disclosure may include m channels, each channel is configured with a temporary cache and a formal cache; that is, the memory involved in the present disclosure may include a temporary cache and a formal cache of each of the m channels, and m is a positive integer customized according to actual conditions. The memory management involved in the present disclosure may include, but is not limited to, for example, data processing of the temporary cache, monitoring processing of the temporary cache and the formal cache, and data recording of the formal cache, etc., which may refer to the corresponding description of the present disclosure, and will not be repeated here.

[0093] The present disclosure does not limit the implementation method of the monitoring and clearing of the above memory. For example, the present disclosure can perform memory monitoring processing on the temporary cache and the formal cache of each of the above m channels at a preset third time. The above preset third time is a time pre-defined and set by the system or the user according to actual conditions, for example, it can be an empirical value set according to user experience or a statistical value calculated based on a series of experimental data, such as 10 seconds.

[0094] The present disclosure does not limit the specific implementation of the above memory monitoring process. For example, see Figure 5 FIG. 1 is a flow chart of another memory management method according to an exemplary embodiment. Figure 5 The method shown may include the following implementation steps:

[0095] S501: Determine a total amount of memory corresponding to the m channels, where the total amount of memory includes a size of a temporary cache of each of the m channels and a size of a formal cache of each of the m channels.

[0096] The total amount of memory involved in the present disclosure may include the size of the temporary cache of each of the m channels and the size of the formal cache of each of the m channels, and specifically may refer to the sum of the size of the temporary cache of each of the m channels and the size of the formal cache of each of the m channels. The present disclosure does not limit the implementation method for determining the above total amount of memory, for example, it can be directly read from a local database, or directly calculated by summing the size of the temporary cache of each of the m channels and the size of the formal cache of each of the m channels, etc.

[0097] S502: Determine whether the total amount of memory corresponding to the m channels exceeds a preset third threshold.

[0098] When the memory management device determines that the total memory amount corresponding to the above m channels exceeds the preset third threshold, it can determine that the amount of memory data is too much and can continue to execute step S503; otherwise, it can continue to wait or end the process.

[0099] The preset third threshold is a cache threshold pre-defined by the system or user according to actual conditions, for example, it can be an empirical value set according to user experience or a statistical value calculated based on a series of experimental data, etc. Usually, the preset third threshold is greater than the preset first threshold.

[0100] S503. When the total amount of memory corresponding to the m channels exceeds a preset third threshold, data cleaning calculation is performed within a preset fourth time based on the respective priorities of the m channels, the respective cached data amounts of the m channels, and the size of each message data to obtain the amount of data to be cleaned; wherein, the amount of data to be cleaned includes the channels to be cleaned and the message data to be cleaned in the channels to be cleaned, the channels to be cleaned are channels among the m channels, and the cached data amount includes the size of the temporary cache of the corresponding channel and the size of the formal cache.

[0101] When the memory management device determines that the total amount of memory corresponding to the above-mentioned m channels exceeds the preset third threshold, it can calculate the amount of data that needs to be cleared for each channel based on the respective priorities of the m channels, the amount of cached data of the m channels, and the size of each message data, that is, calculate the above-mentioned amount of data to be cleared. The amount of cached data involved in the present disclosure may include the size of the temporary cache of the corresponding channel and the size of the formal cache of the corresponding channel, and specifically may refer to the sum of the size of the temporary cache of the corresponding channel and the size of the formal cache. The above-mentioned amount of data to be cleared may include the channels to be cleared and the message data to be cleared that needs to be cleared in the channels to be cleared.

[0102] The present disclosure does not limit the specific implementation methods of the above-mentioned data cleaning calculation. For example, in one implementation method, the present disclosure can use a preset rule formula to calculate the priority of each of the above-mentioned m channels, the cache data volume of each of the above-mentioned m channels, and the size of each message data, so as to obtain the above-mentioned amount of data to be cleaned, for example, the above-mentioned amount of data to be cleaned = f (the priority of each of the m channels, the cache data volume of each of the m channels, the size of the message data), etc., where f() represents the preset rule formula.

[0103] As another example, in another embodiment, the present disclosure may repeatedly execute the following steps until the total amount of memory corresponding to the above-mentioned m channels does not exceed the above-mentioned preset third threshold value, and the process can be terminated: based on the respective priorities of the m channels, the fifth message data in each channel is determined as the above-mentioned amount of data to be cleaned in order from high to low priority, and the data to be cleaned is cleaned, such as directly deleted. If the total amount of memory corresponding to the above-mentioned m channels after data cleaning still exceeds the above-mentioned preset third threshold value, the above-mentioned process steps may be repeatedly executed until the total amount of memory corresponding to the above-mentioned m channels after data cleaning does not exceed the above-mentioned preset third threshold value, and the process is terminated. Among them, the above-mentioned fifth message data may refer to message data whose storage data in the corresponding channel is less than the preset fourth time, such as message data with the earliest / oldest storage time in the corresponding channel, etc.

[0104] The above-mentioned preset first time and the above-mentioned preset fourth time are both time thresholds pre-customized and configured by the system or the user according to actual needs. For example, they can be empirical values ​​set according to user experience; or statistical values ​​calculated based on a series of experimental data, etc. The above-mentioned preset first time and the above-mentioned preset fourth time can be the same or different, which can be determined according to actual conditions, and the present disclosure does not make too many restrictions and details on this.

[0105] S504: Perform data cleaning based on the amount of data to be cleaned.

[0106] The present disclosure can directly delete the message data to be cleaned up in the channel to be cleaned up based on the amount of data to be cleaned up.

[0107] It can be seen that the present disclosure proposes a more reliable memory management mechanism, which can effectively monitor the total memory of the data engine and avoid the data engine and algorithm module from competing for memory resources, thereby helping to improve the stability of the intelligent driving system. In a specific implementation, when the total memory exceeds the preset third threshold, a formal cache cleanup mechanism based on priority and data volume is introduced to adapt to / meet the diverse needs of the data engine for data collection, thereby improving the availability of data collection. At the same time, with less memory resources occupied, the data engine can collect more useful data, which is conducive to improving the availability of the data engine.

[0108] Based on the above examples, see Figure 6 FIG. 1 is a schematic diagram showing the structure of a memory management device according to an exemplary embodiment. Figure 6 In the device shown, the memory may include a temporary cache of the target channel and a formal cache of the target channel, and the device may include a transceiver module 601 and a processing module 602. Among them:

[0109] The transceiver module 601 is configured to receive first message data through the target channel, where the first message data is data collected by the data engine and to be stored in a temporary cache of the target channel;

[0110] The processing module 602 is configured to determine whether to support storing the first message data based on the respective sizes of the temporary buffer and the formal buffer;

[0111] The processing module 602 is further configured to store the first message data in a temporary buffer of the target channel when it is determined that the first message data can be stored.

[0112] In some embodiments, the processing module 602 is configured to:

[0113] When the sizes of the temporary buffer and the formal buffer meet a preset condition, determining to support storing the first message data;

[0114] Among them, the preset conditions include: the size of the temporary cache does not exceed a preset first threshold, and the size of the formal cache does not exceed a preset second threshold; and / or the sum of the sizes of the temporary cache and the formal cache does not exceed the preset first threshold, and the preset first threshold is greater than the preset second threshold.

[0115] In some embodiments, the processing module 602 is further configured to:

[0116] When the size of the temporary cache exceeds the preset first threshold, randomly deleting the second message data stored in the temporary cache until the size of the temporary cache does not exceed the preset first threshold, and the second message data is stored preferentially over the first message data; and / or,

[0117] When the size of the formal cache exceeds the preset second threshold, the third message data stored in the formal cache is deleted until the size of the formal cache does not exceed the preset second threshold, and the third message data is data whose storage time in the formal cache is less than the preset first time.

[0118] In some embodiments, the processing module 602 is further configured to:

[0119] The message data stored in the temporary buffer is processed based on the frame rate of the data stored in the temporary buffer.

[0120] In some embodiments, the processing module 602 is configured to:

[0121] When the frame rate of the data stored in the temporary cache does not exceed a preset frame rate threshold, storing the message data stored in the temporary cache in the formal cache within a preset second time; and / or,

[0122] When the frame rate of the data stored in the temporary cache exceeds the preset frame rate threshold, the fourth message data stored in the temporary cache is randomly deleted until the frame rate of the data stored in the temporary cache does not exceed the preset frame rate threshold.

[0123] In some embodiments, the memory includes a temporary cache and a formal cache of m channels, the target channel is one of the m channels, and the processing module 602 is further configured to:

[0124] Memory monitoring processing is performed on the temporary cache and the formal cache of each of the m channels within a preset third time.

[0125] In some embodiments, the processing module 602 is configured to:

[0126] When the total memory amount corresponding to the m channels exceeds a preset third threshold, a data cleaning calculation is performed based on the respective priorities of the m channels, the respective cache data amounts of the m channels, and the size of each message data to obtain the amount of data to be cleaned;

[0127] Performing data cleaning based on the amount of data to be cleaned;

[0128] Among them, the total amount of memory includes the size of the temporary cache of each of the m channels and the size of the formal cache of each of the m channels, the amount of data to be cleared includes the channel to be cleared and the message data to be cleared in the channel to be cleared, the channel to be cleared is a channel among the m channels, and the amount of cache data includes the size of the temporary cache of the corresponding channel and the size of the formal cache.

[0129] In some embodiments, the processing module 602 is configured to:

[0130] Based on the respective priorities of the m channels, the fifth message data in each channel is determined as the amount of data to be cleared in descending order of the priorities;

[0131] The fifth message data is message data whose storage time in the corresponding channel is less than the preset fourth time.

[0132] In some embodiments, the processing module 602 is further configured to:

[0133] In response to the recording instruction, the message data to be recorded is read from the formal buffer of the target channel, and the message data to be recorded is written into a preset file.

[0134] By implementing the disclosed embodiment, the memory in the memory management device includes a temporary cache of the target channel and a formal cache of the target channel. The memory management device receives the first message data through the target channel. The first message data is the data collected by the data engine to be stored in the temporary cache of the target channel; based on the respective sizes of the temporary cache and the formal cache, it is determined whether to support the storage of the first message data; when it is determined that the storage of the first message data is supported, the first message data is stored in the temporary cache of the target channel. In this way, the newly received first message data can be stored based on the respective sizes of the two-level caches (the size of the temporary cache and the size of the formal cache), which can avoid the data engine and the algorithm module from occupying memory resources, and when the memory resources are occupied less, it is helpful for the data engine to collect more useful message data, thereby improving the availability of the data engine. In addition, it can also solve the technical problems brought about by the use of a circular cache for data management in the related art, such as controlling the memory size occupied by the data engine within a limited range, making it difficult to expand more management measures, and limiting the further optimization of memory resources.

[0135] The present disclosure also provides a computer-readable storage medium on which computer program instructions are stored. When the program instructions are executed by a processor, the steps of the memory management method provided by the present disclosure are implemented.

[0136] Figure 77 is a schematic diagram of another memory management device according to an exemplary embodiment. For example, the memory management device 700 may be a mobile phone, a computer, a digital broadcast terminal, a message transceiver device, a game console, a tablet device, a medical device, a fitness device, a personal digital assistant, etc.

[0137] Reference Figure 7 , the memory management device 700 may include one or more of the following components: a processing component 702 , a memory 704 , a power component 706 , a multimedia component 708 , an audio component 710 , an input / output interface 712 , a sensor component 714 , and a communication component 716 .

[0138] The processing component 702 generally controls the overall operation of the device 700, such as operations associated with display, phone calls, data communications, camera operations, and recording operations. The processing component 702 may include one or more processors 720 to execute instructions to complete all or part of the steps of the above-mentioned memory management method. In addition, the processing component 702 may include one or more modules to facilitate the interaction between the processing component 702 and other components. For example, the processing component 702 may include a multimedia module to facilitate the interaction between the multimedia component 708 and the processing component 702.

[0139] The memory 704 is configured to store various types of data to support operations on the device 700. Examples of such data include instructions for any application or method operating on the device 700, contact data, phone book data, messages, pictures, videos, etc. The memory 704 can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic memory, flash memory, magnetic disk or optical disk.

[0140] The power supply component 706 provides power to the various components of the device 700. The power supply component 706 may include a power management system, one or more power supplies, and other components associated with generating, managing, and distributing power for the device 700.

[0141] The multimedia component 708 includes a screen that provides an output interface between the device 700 and the user. In some embodiments, the screen may include a liquid crystal display (LCD) and a touch panel (TP). If the screen includes a touch panel, the screen may be implemented as a touch screen to receive input signals from the user. The touch panel includes one or more touch sensors to sense touch, slide, and gestures on the touch panel. The touch sensor may not only sense the boundary of the touch or slide action, but also detect the duration and pressure associated with the touch or slide operation. In some embodiments, the multimedia component 708 includes a front camera and / or a rear camera. When the memory management device 700 is in an operating mode, such as a shooting mode or a video mode, the front camera and / or the rear camera may receive external multimedia data. Each of the front camera and the rear camera may be a fixed optical lens system or have focal length and optical zoom capabilities.

[0142] The audio component 710 is configured to output and / or input audio signals. For example, the audio component 710 includes a microphone (MIC), and when the device 700 is in an operating mode, such as a call mode, a recording mode, and a speech recognition mode, the microphone is configured to receive an external audio signal. The received audio signal can be further stored in the memory 704 or sent via the communication component 716. In some embodiments, the audio component 710 also includes a speaker for outputting audio signals.

[0143] The input / output interface 712 provides an interface between the processing component 702 and the peripheral interface modules, which may be keyboards, click wheels, buttons, etc. These buttons may include but are not limited to: a home button, a volume button, a start button, and a lock button.

[0144] The sensor assembly 714 includes one or more sensors for providing various aspects of status assessment for the device 700. For example, the sensor assembly 714 can detect the open / closed state of the device 700, the relative positioning of components, such as the display and keypad of the device 700, the sensor assembly 714 can also detect the position change of the device 700 or a component of the device 700, the presence or absence of user contact with the device 700, the orientation or acceleration / deceleration of the device 700, and the temperature change of the device 700. The sensor assembly 714 may include a proximity sensor configured to detect the presence of nearby objects without any physical contact. The sensor assembly 714 may also include an optical sensor, such as a CMOS or CCD image sensor, for use in imaging applications. In some embodiments, the sensor assembly 714 may also include an accelerometer, a gyroscope sensor, a magnetic sensor, a pressure sensor, or a temperature sensor.

[0145] The communication component 716 is configured to facilitate wired or wireless communication between the device 700 and other devices. The device 700 can access a wireless network based on a communication standard, such as WiFi, 2G or 3G, or a combination thereof. In an exemplary embodiment, the communication component 716 receives a broadcast signal or broadcast-related information from an external broadcast management system via a broadcast channel. In an exemplary embodiment, the communication component 716 also includes a near field communication (NFC) module to facilitate short-range communication. For example, the NFC module can be implemented based on radio frequency identification (RFID) technology, infrared data association (IrDA) technology, ultra-wideband (UWB) technology, Bluetooth (BT) technology and other technologies.

[0146] In an exemplary embodiment, the apparatus 700 may be implemented by one or more application specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field programmable gate arrays (FPGAs), controllers, microcontrollers, microprocessors or other electronic components to perform the above-mentioned memory management method.

[0147] In an exemplary embodiment, a non-transitory computer-readable storage medium including instructions is also provided, such as a memory 704 including instructions, and the instructions can be executed by a processor 720 of the device 700 to complete the above-mentioned upper memory management method. For example, the non-transitory computer-readable storage medium can be a ROM, a random access memory (RAM), a CD-ROM, a magnetic tape, a floppy disk, an optical data storage device, etc.

[0148] In addition to being an independent electronic device, the above-mentioned device can also be a part of an independent electronic device. For example, in one embodiment, the device can be an integrated circuit (IC) or a chip, wherein the integrated circuit can be an IC or a collection of multiple ICs; the chip can include but is not limited to the following types: GPU (Graphics Processing Unit), CPU (Central Processing Unit), FPGA (Field Programmable Gate Array), DSP (Digital Signal Processor), ASIC (Application Specific Integrated Circuit), SOC (System on Chip, SoC), etc. The above-mentioned integrated circuit or chip can be used to execute executable instructions (or codes) to implement the above-mentioned memory management method. The executable instructions can be stored in the integrated circuit or chip, or can be obtained from other devices or equipment, for example, the integrated circuit or chip includes a processor, a memory, and an interface for communicating with other devices. The executable instruction can be stored in the memory, and when the executable instruction is executed by the processor, the above-mentioned memory management method is implemented; alternatively, the integrated circuit or chip can receive the executable instruction through the interface and transmit it to the processor for execution, so as to implement the above-mentioned memory management method.

[0149] In another exemplary embodiment, a computer program product is further provided. The computer program product includes a computer program that can be executed by a programmable device. The computer program has a code portion for executing the above memory management method when executed by the programmable device.

[0150] Figure 8 is a schematic diagram of a server structure according to an exemplary embodiment. For example, the memory management device can be provided as a server. Figure 8 , the memory management device 800 includes a second processing component 822, which further includes one or more processors, and a memory resource represented by a third memory 832, for storing instructions that can be executed by the second processing component 822, such as an application. The application stored in the third memory 832 may include one or more modules, each corresponding to a set of instructions. In addition, the second processing component 822 is configured to execute instructions to perform the above-mentioned memory management method.

[0151] The device 800 may further include a second power supply component 826 configured to perform power management of the device 800, a wired or wireless network interface 850 configured to connect the device 800 to a network, and a second input / output interface 858. The device 800 may operate based on an operating system stored in the third memory 832, such as Windows Server 2000. TM , MacOS X TM , Unix TM , Linux TM , FreeBSD TM or similar.

[0152] By implementing the disclosed embodiment, the memory in the memory management device includes a temporary cache of the target channel and a formal cache of the target channel. The memory management device receives the first message data through the target channel. The first message data is the data collected by the data engine to be stored in the temporary cache of the target channel; based on the respective sizes of the temporary cache and the formal cache, it is determined whether to support the storage of the first message data; when it is determined that the storage of the first message data is supported, the first message data is stored in the temporary cache of the target channel. In this way, the newly received first message data can be stored based on the respective sizes of the two-level caches (the size of the temporary cache and the size of the formal cache), which can avoid the data engine and the algorithm module from occupying memory resources, and when the memory resources are occupied less, it is helpful for the data engine to collect more useful message data, thereby improving the availability of the data engine. In addition, it can also solve the technical problems brought about by the use of a circular cache for data management in the related art, such as controlling the memory size occupied by the data engine within a limited range, making it difficult to expand more management measures, and limiting the further optimization of memory resources.

[0153] See also Fig. 9 FIG. 1 is a schematic diagram showing the structure of a chip according to an exemplary embodiment. Fig. 9 The chip 900 shown includes a processor 901 and an interface 902. Optionally, it may also include a memory 903. The number of the processor 901 may be one or more, and the number of the interface 902 may be multiple.

[0154] In one embodiment, for a case where a chip is used to implement the method embodiment of the present disclosure:

[0155] The interface 902 is used to receive or output signals;

[0156] The processor 901 is used to execute part or all of the content in the memory management method embodiment.

[0157] It is understandable that the processor in the embodiment of the present disclosure can be an integrated circuit chip with signal processing capabilities. In the implementation process, each step of the above method embodiment can be completed by an integrated logic circuit of hardware in the processor or instructions in the form of software. The above processor can be a general-purpose processor, a digital signal processor (DigitalSignal Processor, DSP), an application-specific integrated circuit (Application Specific Integrated Circuit, ASIC), a field programmable gate array (Field Programmable Gate Array, FPGA) or other programmable logic devices, discrete gates or transistor logic devices, discrete hardware components.

[0158] It is understandable that the memory in the embodiments of the present disclosure may be a volatile memory or a non-volatile memory, or may include both volatile and non-volatile memories. Among them, the non-volatile memory may be a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), or a flash memory. The volatile memory may be a random access memory (RAM), which is used as an external cache. By way of example but not limitation, many forms of RAM are available, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link DRAM (SLDRAM), and direct RAM bus RAM (DR RAM). It should be noted that the memory of the systems and methods described herein is intended to include, but is not limited to, these and any other suitable types of memory.

[0159] It should be noted here that the description of the above storage medium, device and chip embodiments is similar to the description of the above method embodiments, and has similar beneficial effects as the method embodiments. For technical details not disclosed in the storage medium, storage medium and device embodiments of the present disclosure, please refer to the description of the method embodiments of the present disclosure for understanding.

[0160] Those skilled in the art will readily appreciate other embodiments of the present disclosure after considering the specification and practicing the present disclosure. The present disclosure is intended to cover any variations, uses or adaptations of the present disclosure that follow the general principles of the present disclosure and include common knowledge or customary techniques in the art that are not disclosed in the present disclosure. The description and examples are to be considered as exemplary only, and the true scope and spirit of the present disclosure are indicated by the following claims.

[0161] It should be understood that the present disclosure is not limited to the exact structures that have been described above and shown in the drawings, and that various modifications and changes may be made without departing from the scope thereof. The scope of the present disclosure is limited only by the appended claims.

Claims

1. A memory management method, characterized in that: The memory includes a temporary cache of the target channel and a formal cache of the target channel, and the method includes: receiving first message data through the target channel, where the first message data is data collected by a data engine and to be stored in a temporary cache of the target channel; Determining whether to support storing the first message data based on the respective sizes of the temporary buffer and the formal buffer; When it is determined that the first message data can be stored, storing the first message data in a temporary buffer of the target channel; The determining whether to support storing the first message data based on the respective sizes of the temporary buffer and the formal buffer includes: When the sizes of the temporary buffer and the formal buffer meet a preset condition, determining to support storing the first message data; Among them, the preset conditions include: the size of the temporary cache does not exceed a preset first threshold, and the size of the formal cache does not exceed a preset second threshold; and / or the sum of the sizes of the temporary cache and the formal cache does not exceed the preset first threshold, and the preset first threshold is greater than the preset second threshold.

2. The method according to claim 1, characterized in that The method further comprises: When the size of the temporary cache exceeds the preset first threshold, randomly deleting the second message data stored in the temporary cache until the size of the temporary cache does not exceed the preset first threshold, and the second message data is stored preferentially over the first message data; and / or, When the size of the formal cache exceeds the preset second threshold, the third message data stored in the formal cache is deleted until the size of the formal cache does not exceed the preset second threshold, and the third message data is data whose storage time in the formal cache is less than the preset first time.

3. The method according to claim 1, characterized in that The method further comprises: The message data stored in the temporary buffer is processed based on the frame rate of the data stored in the temporary buffer.

4. The method according to claim 3, characterized in that: The processing of the message data stored in the temporary buffer based on the frame rate of the data stored in the temporary buffer comprises: When the frame rate of the data stored in the temporary cache does not exceed a preset frame rate threshold, storing the message data stored in the temporary cache in the formal cache within a preset second time; and / or, When the frame rate of the data stored in the temporary cache exceeds the preset frame rate threshold, the fourth message data stored in the temporary cache is randomly deleted until the frame rate of the data stored in the temporary cache does not exceed the preset frame rate threshold.

5. The method according to claim 1, characterized in that The memory includes a temporary cache and a formal cache of m channels, m is a positive integer, the target channel is one of the m channels, and the method further includes: Memory monitoring processing is performed on the temporary cache and the formal cache of each of the m channels within a preset third time.

6. The method according to claim 5, characterized in that The memory monitoring process for the temporary cache and the formal cache of each of the m channels includes: When the total memory amount corresponding to the m channels exceeds a preset third threshold, a data cleaning calculation is performed based on the respective priorities of the m channels, the respective cache data amounts of the m channels, and the size of each message data to obtain the amount of data to be cleaned; Performing data cleaning based on the amount of data to be cleaned; Among them, the total amount of memory includes the size of the temporary cache of each of the m channels and the size of the formal cache of each of the m channels, the amount of data to be cleared includes the channel to be cleared and the message data to be cleared in the channel to be cleared, the channel to be cleared is a channel among the m channels, and the amount of cache data includes the size of the temporary cache of the corresponding channel and the size of the formal cache.

7. The method according to claim 6, characterized in that The data cleaning calculation is performed based on the priorities of the m channels, the cache data volumes of the m channels, and the size of each message data to obtain the amount of data to be cleaned up, including: Based on the respective priorities of the m channels, the fifth message data in each channel is determined as the amount of data to be cleared in descending order of the priorities; The fifth message data is message data whose storage time in the corresponding channel is less than the preset fourth time.

8. The method according to any one of claims 1 to 7, characterized in that The method further comprises: In response to the recording instruction, the message data to be recorded is read from the formal buffer of the target channel, and the message data to be recorded is written into a preset file.

9. A memory management device, characterized in that: The memory includes a temporary cache of the target channel and a formal cache of the target channel, including: a transceiver module, configured to receive first message data through the target channel, wherein the first message data is data collected by the data engine and to be stored in a temporary cache of the target channel; A processing module, configured to determine whether to support storing the first message data based on the respective sizes of the temporary buffer and the formal buffer; The processing module is further configured to store the first message data in a temporary buffer of the target channel when it is determined that the storage of the first message data is supported; The determining whether to support storing the first message data based on the respective sizes of the temporary buffer and the formal buffer includes: When the sizes of the temporary buffer and the formal buffer meet a preset condition, determining to support storing the first message data; Among them, the preset conditions include: the size of the temporary cache does not exceed a preset first threshold, and the size of the formal cache does not exceed a preset second threshold; and / or the sum of the sizes of the temporary cache and the formal cache does not exceed the preset first threshold, and the preset first threshold is greater than the preset second threshold.

10. A memory management device, characterized in that: include: processor; a memory for storing processor-executable instructions; The processor is configured to execute the executable instructions to implement the steps of the method described in any one of claims 1 to 8.

11. The device according to claim 10, characterized in that The memory management device includes at least one of the following: a storage device, an electronic device and a server.

12. A computer-readable storage medium having computer program instructions stored thereon, characterized in that: When the computer program instructions are executed by a processor, the steps of the method described in any one of claims 1 to 8 are implemented.

13. A chip, characterized in that: The method comprises a processor and an interface; the processor is used to read instructions to execute the method according to any one of claims 1 to 8.

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