Display circuit and display device

Abstract

This application provides a display circuit and a display device. The display circuit comprises a first control transistor and a second control transistor. The gate of the first control transistor is connected to a second scan line, and the first electrode of the first control transistor is connected to the positive electrode of a light-emitting device. The gate of the second control transistor is connected to a third scan line, and the first electrode of the second control transistor is connected to a data acquisition module. A read signal line is connected to the second electrode of the first control transistor in each level of pixel driving circuit, and the read signal line is connected to the second electrode of the second control transistor in each level of pixel driving circuit. The read signal line is also electrically connected to an analog-to-digital conversion module. When the display circuit is configured for the compensation stage, the first and second scan lines input valid levels, and the third scan line inputs an invalid level. When the display circuit is configured for the data acquisition stage, the second scan line inputs an invalid level, and the third scan line inputs a valid level. This reduces the complexity and cost of the display device.

Description

Technical Field

[0001] This application relates to the field of display technology, and in particular to a display circuit and display device. Background Technology

[0002] With the development of display technology, micro-LED (MLED) display devices have been widely used due to their advantages such as high brightness, fast response speed, and long lifespan. In MLED display devices, to prevent display unevenness caused by threshold voltage drift and mobility of transistors, threshold voltage and mobility compensation is required. This is specifically achieved through external circuitry that collects data and performs compensation. Simultaneously, MLED display devices require another external circuit for fingerprint recognition, resulting in an excessive number of external circuits and traces, thus increasing the complexity of MLED display devices.

[0003] Therefore, existing MLED display devices suffer from the technical problem of requiring excessive external circuitry and wiring, resulting in high complexity. Summary of the Invention

[0004] This application provides a display circuit and a display device to solve the technical problem that existing MLED display devices require too many external circuits and wirings, resulting in high complexity.

[0005] This application embodiment provides a display circuit, the display circuit comprising:

[0006] A multi-level pixel driving circuit, each level of the pixel driving circuit includes a switching transistor, a driving transistor and a first control transistor, the gate of the switching transistor is connected to a first scan line, the first electrode of the switching transistor is connected to the gate of the driving transistor at a first node, the driving transistor is electrically connected to the positive electrode of the light-emitting device, the gate of the first control transistor is connected to a second scan line, and the first electrode of the first control transistor is connected to the positive electrode of the light-emitting device.

[0007] A multi-stage acquisition circuit, each stage of the acquisition circuit including a second control transistor and an acquisition module, wherein the gate of the second control transistor is connected to a third scan line, and the first electrode of the second control transistor is connected to the acquisition module;

[0008] The compensation circuit includes a read signal line and an analog-to-digital conversion module. The read signal line is connected to the second electrode of the first control transistor of each stage of the pixel driving circuit, the read signal line is connected to the second electrode of the second control transistor of each stage of the acquisition circuit, and the read signal line is electrically connected to the analog-to-digital conversion module.

[0009] Specifically, when the display circuit is configured for the compensation phase, the first and second scan lines are input with valid levels, and the third scan line is input with an invalid level; when the display circuit is configured for the acquisition phase, the second scan line is input with an invalid level, and the third scan line is input with a valid level.

[0010] In some embodiments, the acquisition circuit includes one of a temperature sensor acquisition circuit and an optical sensor acquisition circuit.

[0011] In some embodiments, the acquisition module includes a first acquisition transistor and a second acquisition transistor. The gate and the first electrode of the first acquisition transistor are connected to a first high-potential power line. The second electrodes of the first acquisition transistor and the second acquisition transistor are connected to the first electrode of a second control transistor. The gate of the second acquisition transistor is connected to a first control line. The first electrode of the second acquisition transistor is connected to a first low-potential power line.

[0012] In some embodiments, the acquisition module includes a thermistor and a fixed resistor. One end of the thermistor is connected to a first high-potential power line, and the other end of the thermistor is connected to the first electrode of the second control transistor. One end of the fixed resistor is connected to a first low-potential power line, and the other end of the fixed resistor is connected to the first electrode of the second control transistor.

[0013] In some embodiments, the acquisition module includes a third acquisition transistor, a fourth acquisition transistor, a first capacitor, a second capacitor, a first frequency-type ring oscillator, and a second frequency-type ring oscillator. The gate of the third acquisition transistor is connected to one end of the first frequency-type ring oscillator, one end of the second frequency-type ring oscillator, and one end of the first capacitor. The first electrode of the third acquisition transistor is connected to a second high-potential power line. The second electrode of the third acquisition transistor is connected to one end of the second capacitor, the other end of the first frequency-type ring oscillator, and the first electrode of the fourth acquisition transistor. The gate of the fourth acquisition transistor is connected to a second control line. The second electrode of the fourth acquisition transistor is connected to a second low-potential signal line. The other plates of the first capacitor and the second capacitor are connected to the second low-potential signal line. The other end of the second frequency-type ring oscillator is connected to the first electrode of the second control transistor.

[0014] In some embodiments, the acquisition module includes a fifth acquisition transistor, a sixth acquisition transistor, a first current source, a second current source, and a differential circuit. The first electrode of the fifth acquisition transistor is connected to a third high-potential power supply line. The gate and the second electrode of the fifth acquisition transistor are connected to one input terminal of the first current source and the differential circuit. The first electrode of the sixth acquisition transistor is connected to the third high-potential power supply line. The gate and the second electrode of the sixth acquisition transistor are connected to the other input terminal of the second current source and the differential circuit. The output terminal of the differential circuit is connected to the first electrode of the second control transistor.

[0015] In some embodiments, the acquisition module includes a photodiode, the positive electrode of which is connected to the first electrode of the second control transistor, and the second electrode of which is connected to a first low-potential power line.

[0016] In some embodiments, the display circuit includes a plurality of acquisition circuits arranged in an array, wherein the number of read signal lines is greater than or equal to the number of columns of the acquisition circuits.

[0017] In some embodiments, the compensation circuit further includes a first switch, a second switch, and a reset signal line. One end of the first switch is connected to the reset signal line, and the other end of the first switch is connected to the read signal line. One end of the second switch is connected to the analog-to-digital conversion module, and the other end of the second switch is connected to the read signal line.

[0018] Meanwhile, this application provides a display device, which includes a display circuit as described in any of the above embodiments, the display device comprising:

[0019] First substrate;

[0020] A display panel is disposed on one side of the first substrate;

[0021] A liquid crystal layer is disposed on the side of the display panel away from the first substrate;

[0022] A control electrode layer is disposed on the side of the liquid crystal layer away from the display panel;

[0023] The second substrate is disposed on the side of the control electrode layer away from the liquid crystal layer.

[0024] In some embodiments, the display panel includes a photodiode and a light-emitting unit, the display panel includes multiple partitions, each partition is provided with multiple light-emitting units and a photodiode, and the control electrode layer includes multiple control electrodes arranged at intervals, each control electrode being provided corresponding to a partition.

[0025] In some embodiments, the display panel includes a first electrode layer, a second electrode layer, and a third electrode layer. The first electrode layer is disposed on the side of the second electrode layer close to the liquid crystal layer, and the third electrode layer is disposed on the side of the second electrode layer away from the first electrode layer. The first electrode layer includes a common electrode.

[0026] In some embodiments, the photodiode is disposed on the side of the third electrode layer near the second electrode layer, and the third electrode layer includes a light-shielding metal, which is disposed corresponding to the photodiode.

[0027] Beneficial Effects: This application provides a display circuit and a display device. The display circuit, by setting a first control transistor and a second control transistor, connects the gate of the first control transistor to a second scan line and the first electrode of the first control transistor to the positive electrode of a light-emitting device. The gate of the second control transistor is connected to a third scan line, and the first electrode of the second control transistor is connected to a data acquisition module. A read signal line is connected to the second electrode of the first control transistor in each level of the pixel driving circuit, and the second electrode of the second control transistor in each level of the pixel driving circuit is connected to the analog-to-digital conversion module. When the display circuit is configured for the compensation stage, the first and second scan lines input valid levels, and the third scan line inputs an invalid level. When the display circuit is configured for the acquisition stage, the second scan line inputs an invalid level, and the third scan line inputs a valid level. Therefore, in the compensation stage, the first control transistor is turned on and the second control transistor is turned off to compensate the pixel driving circuit. In the acquisition stage, the second control transistor is turned on and the first control transistor is turned off to acquire signals from the acquisition circuit. This allows the pixel circuit and the acquisition circuit to share a single compensation circuit, thereby reducing the number of compensation circuits and lowering the complexity and cost of the display device. Attached Figure Description

[0028] The technical solution and other beneficial effects of this application will become apparent from the following detailed description of specific embodiments in conjunction with the accompanying drawings.

[0029] Figure 1 This is a first circuit diagram of a display circuit provided in an embodiment of this application.

[0030] Figure 2 for Figure 1 The timing diagram corresponding to the circuit diagram of the display circuit in the image.

[0031] Figure 3 This is a second circuit diagram of the display circuit provided in an embodiment of this application.

[0032] Figure 4 This is a third circuit diagram of the display circuit provided in the embodiments of this application.

[0033] Figure 5 This is a fourth circuit diagram of the display circuit provided in the embodiments of this application.

[0034] Figure 6 This is a fifth circuit diagram of a display circuit provided in an embodiment of this application.

[0035] Figure 7 This is a sixth circuit diagram of a display circuit provided in an embodiment of this application.

[0036] Figure 8 This is a schematic diagram of a display device provided in an embodiment of this application.

[0037] Figure 9 This is a schematic diagram of the display panel and control electrode layer provided in an embodiment of this application.

[0038] Figure 10 This is a schematic diagram of the first type of film layer of the display panel provided in the embodiments of this application.

[0039] Figure 11 This is a schematic diagram of the second film layer of the display panel provided in the embodiments of this application. Detailed Implementation

[0040] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the scope of protection of this application.

[0041] In the description of this application, it should be understood that the terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," and "counterclockwise," etc., indicating orientation or positional relationships based on the orientation or positional relationships shown in the accompanying drawings, are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, features defined with "first" and "second" may explicitly or implicitly include one or more of the stated features. In the description of this application, "a plurality of" means two or more, unless otherwise explicitly specified.

[0042] In the description of this application, it should be noted that, unless otherwise expressly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection, an electrical connection, or a connection that allows communication between them; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication between two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances.

[0043] In this application, unless otherwise expressly specified and limited, "above" or "below" the second feature can include direct contact between the first and second features, or contact between the first and second features through another feature between them. Furthermore, "above," "over," and "on top" of the second feature includes the first feature being directly above or diagonally above the second feature, or simply indicates that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature includes the first feature being directly below or diagonally below the second feature, or simply indicates that the first feature is at a lower horizontal level than the second feature.

[0044] The following disclosure provides many different embodiments or examples for implementing different structures of this application. To simplify the disclosure, specific examples of components and arrangements are described below. Of course, these are merely examples and are not intended to limit the scope of this application. Furthermore, reference numerals and / or letters may be repeated in different examples; such repetition is for simplification and clarity and does not in itself indicate a relationship between the various embodiments and / or arrangements discussed. In addition, various specific examples of processes and materials are provided in this application, but those skilled in the art will recognize the application of other processes and / or the use of other materials.

[0045] This application addresses the technical problem of existing MLED display devices requiring excessive external circuitry and wiring, leading to high complexity. It provides a display circuit and display device to solve the aforementioned technical problem.

[0046] like Figure 1 , Figure 2As shown, this application embodiment provides a display circuit 1, which includes a multi-level pixel driving circuit 11, a multi-level acquisition circuit 12, and a compensation circuit 13. Each pixel driving circuit 11 includes a switching transistor T2, a driving transistor T1, and a first control transistor T3. The gate of the switching transistor T2 is connected to the first scan line WR, and the first electrode of the switching transistor T2 is connected to the gate of the driving transistor T1 at a first node Q. The driving transistor T1 is electrically connected to the positive electrode of the light-emitting device LED. The gate of the first control transistor T3 is connected to the second scan line RD1, and the first electrode of the first control transistor T3 is connected to the positive electrode of the light-emitting device LED at a second node A. The acquisition circuit 12 includes a second control transistor T4 and an acquisition module 121. The gate of the second control transistor T4 is connected to the third scan line RD2, and the first electrode of the second control transistor T4 is connected to the acquisition module 121. The compensation circuit 13 includes a read signal line Sensing and an analog-to-digital converter (ADC). The read signal line Sensing is connected to the second electrode of the first control transistor T3 of each pixel driving circuit 11. The read signal line Sensing is connected to the second electrode of the second control transistor T4 of each acquisition circuit 12 at a third node B. The read signal line Sensing is electrically connected to the analog-to-digital converter (ADC).

[0047] Specifically, when the display circuit 1 is configured for the compensation stage, the first scan line WR and the second scan line RD1 are input with valid levels, and the third scan line RD2 is input with invalid levels. When the display circuit 1 is configured for the acquisition stage, the second scan line RD1 is input with invalid levels, and the third scan line RD2 is input with valid levels.

[0048] This application provides a display circuit that includes a first control transistor and a second control transistor. The gate of the first control transistor is connected to a second scan line, and the first electrode of the first control transistor is connected to the positive electrode of a light-emitting device. The gate of the second control transistor is connected to a third scan line, and the first electrode of the second control transistor is connected to a data acquisition module. A read signal line is connected to the second electrode of the first control transistor in each level of the pixel driving circuit, and the second control transistor in each level of the pixel driving circuit is connected to the second electrode of the second control transistor in each level of the pixel driving circuit. The read signal line is also electrically connected to an analog-to-digital conversion module. When the display circuit is configured for the compensation stage, the first and second scan lines input valid voltage levels, while the third scan line inputs an invalid voltage level. When the display circuit is configured for the acquisition stage, the second scan line inputs an invalid voltage level, while the third scan line inputs a valid voltage level. This allows the first control transistor to be turned on and the second control transistor to be turned off during the compensation stage, thus compensating the pixel driving circuit. Conversely, the second control transistor is turned on and the first control transistor is turned off during the acquisition stage, enabling the acquisition of signals from the acquisition circuit. This allows the pixel circuit and the acquisition circuit to share a single compensation circuit, thereby reducing the number of compensation circuits and lowering the complexity and cost of the display device.

[0049] Specifically, the display device includes an array of pixel units, each pixel unit having a corresponding pixel driving circuit. Therefore, each column of pixel units has a corresponding column of pixel driving circuits. When the compensation circuit collects data from the pixel driving circuits, it uses one compensation circuit to collect data from one or more columns of pixel driving circuits. Therefore, a read signal line in one compensation circuit is connected to the second electrode of the first control transistor in the multi-level pixel driving circuit. By controlling the first control transistor in each level of the pixel driving circuit, the data of the pixel driving circuit corresponding to each pixel unit is collected separately, and threshold voltage and mobility compensation are performed.

[0050] Specifically, an effective level refers to an electrical signal that can turn on a transistor, while an ineffective level refers to an electrical signal that cannot turn on a transistor. For example, when a high-potential electrical signal is input to the gate of a switching transistor, the switching transistor can turn on. Therefore, for the switching transistor, the high-potential electrical signal output from its connected traces is an effective level, and correspondingly, the low-potential electrical signal output from its connected traces is an ineffective level.

[0051] Specifically, in the embodiments of this application, "level" and "potential" have the same meaning.

[0052] Specifically, with Figure 1For example, when the switching transistor, the first control transistor, and the second control transistor are all turned on when a high-potential electrical signal is input to their gates, the effective levels of the first scan line, the second scan line, and the third scan line are all high, and the ineffective levels of the first scan line, the second scan line, and the third scan line are low. However, the embodiments of this application are not limited to this. When the switching transistor, the first control transistor, and the second control transistor are turned on when a low-potential electrical signal is input to their gates, the effective levels of the first scan line, the second scan line, and the third scan line can be low.

[0053] In some embodiments, such as Figure 1 As shown, the pixel driving circuit 11 further includes a data line Data, a first scan line WR, a second scan line RD1, a first high-potential power line OVDD, a first low-potential power line OVSS, and a storage capacitor Cst. The gate of the switching transistor T2 is connected to the first scan line WR. The first electrode of the switching transistor T2 is connected to the data line Data. The second electrode of the switching transistor T2, the gate of the driving transistor T1, and one plate of the storage capacitor Cst are connected to the first node Q. The first electrode of the driving transistor T1 is connected to the first high-potential power line OVDD. The second electrode of the driving transistor T1, the other plate of the storage capacitor Cst, and the positive electrode of the light-emitting device LED are connected to the second node A. The gate of the first control transistor T3 is connected to the second scan line RD1. The light-emitting device LED is connected to the first low-potential power line OVSS.

[0054] Specifically, the principle of the compensation process for the pixel driving circuit is as follows: In order to avoid the compensation process from affecting the display, the compensation stage is generally during the power-on or power-off stage of the display device. During the compensation stage, the first control transistor is turned on, and the first scan line of each pixel driving circuit is sequentially input with a high potential to turn on the switching transistor. The data line is at a high potential, so that the compensation circuit can collect the voltage value output by each pixel driving circuit to the positive terminal of the light-emitting device. According to different voltage values, the data signal output by the data line can be adjusted during the display stage, thereby compensating for the threshold voltage and mobility of the transistor and avoiding uneven display.

[0055] Specifically, such as Figure 2As shown, when the display device is configured in the compensation stage, the first scan lines WR and second scan lines RD1 of each stage are sequentially at high potentials. For example, the nth first scan line WR(n) in the nth-level pixel driving circuit and the (n+1)th first scan line WR(n+1) in the (n+1)th-level pixel driving circuit are sequentially at high potentials. Correspondingly, the nth second scan line RD1(n) in the nth-level pixel driving circuit and the (n+1)th second scan line RD1(n+1) in the (n+1)th-level pixel driving circuit are sequentially at high potentials. At this time, all third scan lines RD2 are at low potentials. For example, the nth third scan line RD2 in the nth-level pixel driving circuit is at a low potential. When the RD2(n) line and the (n+1)th third scan line RD2(n+1) in the (n+1)th pixel driving circuit are at a low potential, the second control transistor is turned off, the first control transistor is turned on, and the switching transistor is turned on. At the same time, the first switch S1 is closed and the second switch S2 is open, so that a reset signal can be input to the positive terminal of the light-emitting device LED. Then, the first switch S1 is opened and the second switch S2 is closed, so that the compensation circuit can collect the signal of the second node A, thereby compensating the threshold voltage and mobility of the transistor. Then, the first switch S1 is closed and the second switch S2 is opened, so that a reset signal can be input to the positive terminal of the light-emitting device LED again.

[0056] Specifically, when the display device is configured for the acquisition phase, the pixel driving circuit can operate normally. At this time, the pixels can be either lit or not displayed. Figure 2 Taking pixel illumination as an example, at this time, the first scan line WR of each level is sequentially input with a high potential, all second scan lines RD1 are input with an invalid level, and the third scan lines RD2 of each level are sequentially at a high potential. For example, the nth third scan line RD2(n) in the nth level pixel driving circuit and the n+1th third scan line RD2(n+1) in the n+1th level pixel driving circuit are sequentially at a high potential, which makes the second control transistor turn on, the first control transistor turn off, and the switching transistor turn on. At the same time, the first switch S1 is closed and the second switch S2 is open, so a reset signal can be input to the acquisition module. Then the first switch S1 is open and the second switch S2 is closed, so that the compensation circuit can acquire the signal of the acquisition module and perform corresponding processing according to the signal of the acquisition module. Then the first switch S1 is closed and the second switch S2 is open, so a reset signal is input to the acquisition module again, thus completing the compensation of the transistors of the pixel driving circuit and the signal acquisition of the acquisition circuit.

[0057] Specifically, the reset signal can be different in the compensation phase and the acquisition phase.

[0058] Specifically, the above embodiments are illustrated using a pixel driving circuit including a switching transistor, a driving transistor, and a storage capacitor as an example. However, the embodiments of this application are not limited to this, and the pixel driving circuit may also have other structures.

[0059] Specifically, it is understood that the embodiments of this application do not limit the type of thin-film transistor. When the thin-film transistor is an N-type thin-film transistor, it turns on when the gate is at a high potential; when the thin-film transistor is a P-type thin-film transistor, it turns on when the gate is at a low potential. The potential of the trace connected to the gate of the thin-film transistor can be adjusted accordingly. For example... Figure 1 Taking an N-type thin-film transistor as an example, the switching transistor turns on when the first scan line is at a high potential. However, the embodiments of this application are not limited to this. The switching transistor can be a P-type transistor, and correspondingly, the switching transistor turns on when the first scan line is at a low potential.

[0060] In some embodiments, such as Figure 1 As shown, the compensation circuit 13 further includes a first switch S1, a second switch S2, and a reset signal line Vref. One end of the first switch S1 is connected to the reset signal line Vref, and the other end of the first switch S1 is connected to the read signal line Sensing. One end of the second switch S2 is connected to the analog-to-digital converter (ADC), and the other end of the second switch S2 is connected to the read signal line Sensing. By setting the first switch, the second switch, and the reset signal line, the positive electrode of the light-emitting device can be reset before acquiring data from the pixel driving circuit, avoiding interference with the acquisition results caused by voltage at the positive electrode of the light-emitting device.

[0061] Specifically, when the compensation circuit acquires and compensates for the data from the pixel driving circuit, a high potential is input to the first scan line to turn on the switching transistor, turn on the first control transistor, close the first switch, and reset the positive terminal of the light-emitting device. Then, the first switch is opened, and the second switch is closed, so that the analog-to-digital conversion module can compensate for the threshold voltage of the thin-film transistor using the data acquired by the analog-to-digital conversion module.

[0062] In some embodiments, the acquisition circuit includes one of a temperature sensor acquisition circuit and an optical sensor acquisition circuit. When an acquisition circuit is provided in the display device, the acquisition circuit may include a temperature sensor acquisition circuit and an optical sensor acquisition circuit. Correspondingly, the temperature sensor acquisition circuit and / or the optical sensor acquisition circuit can be multiplexed with the pixel driving circuit to reduce the number of compensation circuits and signal lines in the display device, reduce circuit complexity and space occupation, increase the screen-to-body ratio of the display device, and reduce the complexity and cost of the display device.

[0063] In some embodiments, such as Figure 3As shown, the acquisition module 121 includes a first acquisition transistor M1 and a second acquisition transistor M2. The gate and first electrode of the first acquisition transistor M1 are connected to a first high-potential power line OVDD. The second electrodes of the first acquisition transistor M1 and the second electrode of the second acquisition transistor M2 are connected to the first electrode of the second control transistor T4 at a fourth node C. The gate of the second acquisition transistor M2 is connected to a first control line Gate1, and the first electrode of the second acquisition transistor M2 is connected to a first low-potential power line OVSS. By including a first acquisition transistor and a second acquisition transistor in the acquisition circuit, when the temperature changes, the electrical property of one of the first and second acquisition transistors changes, thus changing the electrical signal input to the first electrode of the first control transistor. This causes a change in the signal acquired by the compensation circuit, thereby determining the temperature change and processing it accordingly. This achieves the multiplexing of the compensation circuit between the temperature sensor acquisition circuit and the pixel driving circuit.

[0064] Specifically, the first acquisition transistor M1 is a low-temperature polycrystalline silicon thin-film transistor, and the second acquisition transistor M2 is a metal-oxide-slim thin-film transistor. By making the first acquisition transistor a low-temperature polycrystalline silicon thin-film transistor and the second acquisition transistor a metal-oxide-slim thin-film transistor, the electrical properties of the metal-oxide-slim thin-film transistor change when the temperature changes. This causes a change in the electrical signal input to the first electrode of the first control transistor, which in turn causes a change in the signal acquired by the compensation circuit. This allows the temperature change to be determined and processed accordingly, thus realizing the multiplexing of the compensation circuit between the temperature sensor acquisition circuit and the pixel driving circuit.

[0065] Specifically, since the electrical properties of metal oxide thin-film transistors change when the temperature changes, the potential of the connection node between the first and second acquisition transistors changes. The compensation circuit can then determine the temperature change based on the potential change, thereby acquiring temperature information and performing corresponding processing.

[0066] Specifically, metal oxide thin-film transistors can be indium gallium zinc oxide thin-film transistors.

[0067] Specifically, the gate and first electrode of the first acquisition transistor are connected to the first high-potential power supply line, and the first acquisition transistor will be turned on to a certain extent. At the same time, the first control line can turn on the second acquisition transistor, so that the first acquisition transistor and the second acquisition transistor perform voltage division. When the temperature does not change, the voltage between the first acquisition transistor and the second acquisition transistor will be different after the temperature changes. This can determine whether the temperature has changed and determine the amount of temperature change when the temperature changes. This realizes the compensation of the pixel driving circuit in the compensation stage and the acquisition of temperature information in the acquisition stage.

[0068] In some embodiments, such as Figure 4 As shown, the acquisition module 121 includes a thermistor R1 and a fixed resistor R2. One end of the thermistor R1 is connected to the first high-potential power line OVDD, and the other end of the thermistor R1 is connected to the first electrode of the second control transistor RD2. One end of the fixed resistor R2 is connected to the first low-potential power line OVSS, and the other end of the fixed resistor R2 is connected to the first electrode of the second control transistor T4. By setting the thermistor and the fixed resistor to be connected to the first electrode of the second control transistor, when the temperature changes, the resistance of the thermistor changes, and the electrical signal at the connection node of the thermistor, the fixed resistor, and the second control transistor changes. The compensation circuit can then acquire the changed electrical signal and determine the temperature change and its magnitude accordingly.

[0069] Specifically, the thermistor can be formed using a metal layer in the display device, while the fixed resistor can be formed using a polysilicon layer in the display device. When the temperature changes, the resistivity of the metal changes, while the resistance of the fixed resistor does not change. Thus, the electrical signal can be changed by altering the resistance of the thermistor, thereby determining the amount of temperature change.

[0070] In some embodiments, such as Figure 5As shown, the acquisition module 121 includes a third acquisition transistor M3, a fourth acquisition transistor M4, a first capacitor C1, a second capacitor C2, a first frequency-type ring oscillator D1, and a second frequency-type ring oscillator D2. The gate of the third acquisition transistor M3 is connected to one end of the first frequency-type ring oscillator D1, one end of the second frequency-type ring oscillator D2, and one end of the first capacitor C1. The first electrode of the third acquisition transistor M3 is connected to the second high-potential power supply line VDD. The second electrode of the third acquisition transistor M3 is connected to one end of the second capacitor C2, the other end of the first frequency-type ring oscillator D1, and the first electrode of the fourth acquisition transistor M4. The gate of the fourth acquisition transistor M4 is connected to the second control line Gate2. The second electrode of the fourth acquisition transistor M4 is connected to the second low-potential signal line VSS. The other plates of the first capacitor C1 and the second capacitor C2 are connected to the second low-potential signal line VSS. The other end of the second frequency-type ring oscillator D2 is connected to the first electrode of the second control transistor T4. By setting a fourth acquisition transistor, the electrical properties of the fourth acquisition transistor change when the temperature changes, causing the output signals of the first frequency ring oscillator and the second frequency ring oscillator to change. This determines the temperature change and the amount of temperature change, and performs corresponding processing. This achieves compensation of the pixel driving circuit in the compensation stage and acquisition of temperature information in the acquisition stage.

[0071] Specifically, the fourth acquisition transistor can be a transistor whose electrical properties change when the temperature changes. When the temperature changes, the potential of the second electrode of the fourth acquisition transistor changes, and correspondingly, the outputs of the first frequency ring oscillator and the second frequency ring oscillator change, so that the compensation circuit can determine the temperature change by the change in the signal.

[0072] Specifically, the fourth acquisition transistor can be a metal oxide thin-film transistor, and the fourth acquisition transistor can be an indium gallium zinc oxide thin-film transistor.

[0073] Specifically, the second high-potential power line can be routed on the same path as the first high-potential power line, and the second low-potential power line can be routed on the same path as the first low-potential power line.

[0074] In some embodiments, such as Figure 6 As shown, the acquisition module 121 includes a fifth acquisition transistor M5, a sixth acquisition transistor M6, and a first current source I. D(n+1) Second current source I D(n)The differential converter D3, the first electrode of the fifth acquisition transistor M5 is connected to the third high-potential power line ELVDD, and the gate and second electrode of the fifth acquisition transistor M5 are connected to the first current source I. D(n+1) The sixth acquisition transistor M6 is connected to one input terminal of the differential D3, and its first electrode is connected to the third high-potential power line ELVDD. The gate and second electrode of the sixth acquisition transistor M6 are connected to the second current source I. D(n) The differential transistor D3 is connected to another input terminal, and its output terminal is connected to the first electrode of the second control transistor T4. By setting the fifth and sixth acquisition transistors, their electrical properties change when the temperature changes, causing a change in the output signal of the differential transistor. This determines the temperature change and the amount of change, allowing for corresponding processing. This achieves compensation for the pixel driving circuit during the compensation stage and acquisition of temperature information during the acquisition stage. Furthermore, the differential transistor can eliminate errors caused by other interference factors, improving the accuracy of the acquired data.

[0075] Specifically, the fifth and sixth acquisition transistors can be transistors whose electrical properties change when the temperature changes. When the temperature changes, the potentials of the second electrodes of the fifth and sixth acquisition transistors change, and correspondingly, the output of the differential changes, allowing the acquisition circuit to determine the temperature change through the signal change.

[0076] Specifically, the fifth and sixth acquisition transistors can be metal oxide thin-film transistors, specifically indium gallium zinc oxide thin-film transistors.

[0077] Specifically, the fifth and sixth acquisition transistors can be replaced with transistors.

[0078] Specifically, the other ends of the first and second current sources can be grounded.

[0079] Specifically, the third high-potential power line can share the same routing as the first high-potential power line.

[0080] In some embodiments, such as Figure 7As shown, the acquisition module 121 includes a photodiode PD. The positive electrode of the photodiode PD is connected to the first electrode of the second control transistor T4, and the second electrode of the photodiode PD is connected to the first low-potential power line OVSS. By including a photodiode in the acquisition circuit, the impedance of the photodiode changes when the light changes, and the electrical signal at the node connected to the first electrode of the second control transistor changes. The changing electrical signal can then be acquired by a compensation circuit and processed accordingly.

[0081] Specifically, by including a photodiode in the acquisition circuit, ambient light detection can be achieved, enabling fingerprint acquisition and recognition, and the acquisition circuit and pixel driving circuit can share a compensation circuit.

[0082] Specifically, the acquisition circuit may also include an infrared sensor, which can be used for distance and biometric identification.

[0083] In some embodiments, the display circuit includes a plurality of acquisition circuits arranged in an array, and the number of read signal lines is greater than or equal to the number of columns of the acquisition circuits. Considering that the acquisition circuits are connected to the read signal lines, in order to reuse the read signal lines, the number of columns connected to the acquisition circuits is less than or equal to the number of read signal lines, thereby allowing the acquisition circuits and pixel driving circuits to reuse the read signal lines.

[0084] Specifically, it can be understood that a single acquisition circuit can include multiple acquisition circuits, and a single acquisition circuit can be connected to the same read signal line. The second control transistors in each acquisition circuit are sequentially activated via a third scan line, thereby acquiring signals from each acquisition circuit. Therefore, when setting up the acquisition circuit, the number of acquisition circuits should be less than or equal to the number of read signal lines, so that the read signal lines can be multiplexed with the pixel driving circuit.

[0085] In some embodiments, this application provides a display device that includes a display circuit as described in any of the above embodiments.

[0086] In some embodiments, the display device includes a first substrate, a display panel, a liquid crystal layer, a control electrode layer, and a second substrate. The display panel is disposed on one side of the first substrate, the liquid crystal layer is disposed on the side of the display panel away from the first substrate, the control electrode layer is disposed on the side of the liquid crystal layer away from the display panel, and the second substrate is disposed on the side of the control electrode layer away from the liquid crystal layer.

[0087] In some embodiments, such as Figure 8As shown, the display device 2 includes a first substrate 21, a first polarizer 22, a display panel 23, a liquid crystal layer 25, a control electrode layer 26, a second polarizer 27, and a second substrate 28. The first polarizer 22 is disposed on one side of the first substrate 21; the display panel 23 is disposed on the side of the first polarizer 22 away from the first substrate 21; the liquid crystal layer 25 is disposed on the side of the display panel 23 away from the first polarizer 22; the control electrode layer 26 is disposed on the side of the liquid crystal layer 25 away from the display panel 23; the second polarizer 27 is disposed on the side of the control electrode layer 26 away from the liquid crystal layer 25; and the second substrate 28 is disposed on the side of the second polarizer 27 away from the control electrode layer 26. By including a display panel, a liquid crystal layer, and a polarizer, the display device can perform normal display through the display panel, or achieve light-transmitting display through the liquid crystal layer and the polarizer.

[0088] Specifically, such as Figure 8 As shown, the display panel 23 includes a display substrate 231, a photodiode 232, and a light-emitting unit 233. Specifically, as... Figure 8 As shown, the display device 2 also includes a frame adhesive 24, which is disposed on both sides of the liquid crystal layer 25.

[0089] Specifically, the first substrate and the second substrate can be regarded as the inner and outer glass of a car window, thereby realizing the transparent display of the car window or the display of images through the display panel.

[0090] Specifically, the control electrode layer can be disposed on a substrate.

[0091] In some embodiments, such as Figure 9 As shown, the display panel 23 includes a photodiode 232 and a light-emitting unit 233. The display panel includes multiple partitions, and each partition is provided with multiple light-emitting units 233 and a photodiode 232. The control electrode layer 26 includes multiple control electrodes 33 arranged at intervals, and each control electrode 33 is correspondingly arranged with a partition 32.

[0092] Specifically, such as Figure 9 As shown, in Figure 9 As shown in (a), the display panel 23 can be divided into multiple partitions 32. Each partition 32 contains multiple pixel units and a photodiode PD. Each pixel unit includes a first sub-pixel unit 311, a second sub-pixel unit 312, and a third sub-pixel unit 313. Each sub-pixel unit can be a light-emitting unit, and ambient light can be detected through the photodiodes in each partition 32. Figure 9As shown in (b), the control electrode layer 26 can be divided into multiple control electrodes 33, so that the electrodes 33 correspond to the partitions 32, thereby controlling the liquid crystal in each region and controlling the light transmittance.

[0093] Specifically, it is understandable that Figure 9 The diagram shows the boundaries of each partition to illustrate the design, but in actual design, these boundaries do not exist.

[0094] Specifically, it is understandable that Figure 9 The control electrodes are spaced apart and do not contact each other.

[0095] Specifically, the display panel may include multiple electrode layers. The electrode layer in the display panel that is close to the liquid crystal layer can be reused as the electrode layer for controlling the liquid crystal layer, so that the electrode layer transmits a low potential signal, that is, the control electrode layer is used as the pixel electrode of the liquid crystal layer, and one of the electrode layers in the display panel is used as the common electrode of the liquid crystal layer.

[0096] Specifically, such as Figure 10 As shown, the display panel 23 includes a first electrode layer 411, a first insulating layer 412, a second electrode layer 413, a second insulating layer 414, and a third electrode layer 415. The first electrode layer 411 is disposed on the side of the second electrode layer 413 closest to the liquid crystal layer, and the third electrode layer 415 is disposed on the side of the second electrode layer 413 away from the first electrode layer 411. The first electrode layer 411 is disposed between the first insulating layer 412 and the liquid crystal layer, and includes a common electrode. By including a common electrode in the first electrode layer, the first electrode layer can be reused as both a common electrode of the liquid crystal layer and an electrode of the display panel, reducing the thickness of the display device.

[0097] Specifically, the display substrate 231 can be disposed between the first electrode layer 411 and the liquid crystal layer.

[0098] Specifically, the first electrode layer can be a mesh structure, which can transmit signals from low-potential power lines, while the second electrode layer can transmit signals from high-potential power lines.

[0099] Specifically, the material of each electrode layer can be metal or indium tin oxide, and the material of the control electrode layer can be indium tin oxide.

[0100] Specifically, the working principle of the display device is as follows: the acquisition circuit senses the intensity, direction and area of ​​the external ambient light, and then adjusts the deflection direction of the liquid crystal in the liquid crystal layer according to the sensed intensity, direction and area of ​​the external ambient light to achieve different light transmittance in different areas. Then, the display panel adjusts the brightness and color temperature according to the ambient light transmission state.

[0101] Specifically, when displaying on a display device, all areas can use light-transmitting display, all areas can use display panels for display, or some areas can use light-transmitting display and some areas can use display panels for display.

[0102] Specifically, the photodiode can be placed at the bottom of the display panel, allowing it to sense light from the bottom. Meanwhile, the side of the photodiode that is not sensitive to light can be shielded with metal to prevent interference from the light-emitting unit.

[0103] In some embodiments, the photodiode PD is disposed on the side of the third electrode layer 415 near the second electrode layer 413. The third electrode layer 415 includes a light-shielding metal, which is disposed correspondingly to the photodiode PD. By aligning the photodiode with the light-shielding metal of the third electrode layer, the side of the photodiode closest to the liquid crystal layer can be photosensitive, while the side of the photodiode closest to the third electrode layer is shielded from light, preventing internal light emission from the display device from affecting the photosensitive effect.

[0104] Specifically, such as Figure 11 As shown, the display panel 23 includes a metal layer 41 and a photodiode PD, with the non-photosensitive side of the photodiode PD corresponding to the metal layer 41. It can be understood that the metal layer 41 can be one of the aforementioned electrode layers; for example, the metal layer 41 can be the third electrode layer.

[0105] Specifically, the light-emitting unit can be a miniature light-emitting diode.

[0106] In some embodiments, the display device includes a plurality of acquisition circuits arranged in an array, wherein the number of read signal lines is greater than or equal to the number of columns of the acquisition circuits. Considering that the acquisition circuits are connected to the read signal lines, in order to reuse the read signal lines, the number of columns connected to the acquisition circuits is less than or equal to the number of read signal lines, thereby allowing the acquisition circuits and pixel driving circuits to reuse the read signal lines.

[0107] Specifically, it can be understood that a single acquisition circuit can include multiple acquisition circuits, and a single acquisition circuit can be connected to the same read signal line. The second control transistors in each acquisition circuit are sequentially activated via a third scan line, thereby acquiring signals from each acquisition circuit. Therefore, when setting up the acquisition circuit, the number of acquisition circuits should be less than or equal to the number of read signal lines, so that the read signal lines can be multiplexed with the pixel driving circuit.

[0108] In some embodiments, the display device further includes a driver chip, the driver chip including a plurality of output channels, one of the output channels being connected to a read signal line or a plurality of read signal lines.

[0109] Specifically, it can be understood that each read signal line drives the chip's output channel connection. This can be a single read signal line connecting to one output channel of the driver chip, or multiple read signal lines connecting to one output channel of the driver chip.

[0110] Specifically, the compensation circuit can be located inside the driver chip, while the acquisition circuit and pixel driving circuit are located inside the display panel.

[0111] In the above embodiments, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions in other embodiments.

[0112] The above provides a detailed description of a display circuit and display device provided in the embodiments of this application. Specific examples have been used to illustrate the principles and implementation methods of this application. The description of the above embodiments is only for the purpose of helping to understand the technical solutions and core ideas of this application. Those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. These modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this application.

Claims

1. A display circuit, characterized in that, include: A multi-level pixel driving circuit, each level of the pixel driving circuit includes a switching transistor, a driving transistor and a first control transistor, the gate of the switching transistor is connected to a first scan line, the first electrode of the switching transistor is connected to the gate of the driving transistor at a first node, the driving transistor is electrically connected to the positive electrode of the light-emitting device, the gate of the first control transistor is connected to a second scan line, and the first electrode of the first control transistor is connected to the positive electrode of the light-emitting device. A multi-stage acquisition circuit, each stage of which includes a second control transistor and an acquisition module, wherein the gate of the second control transistor is connected to a third scan line and the first electrode of the second control transistor is connected to the acquisition module, and the acquisition circuit is used to realize at least one of ambient light detection, fingerprint acquisition and recognition, distance, and biometric identification; The compensation circuit includes a read signal line and an analog-to-digital conversion module. The read signal line is connected to the second electrode of the first control transistor of each stage of the pixel driving circuit, the read signal line is connected to the second electrode of the second control transistor of each stage of the acquisition circuit, and the read signal line is electrically connected to the analog-to-digital conversion module. Specifically, when the display circuit is configured for the compensation phase, the first scan line and the second scan line input valid levels, and the third scan line inputs invalid levels; when the display circuit is configured for the acquisition phase, the second scan line inputs invalid levels, and the third scan line inputs valid levels. When the display circuit is configured for the compensation stage, the first and second scan lines of each stage are sequentially input with valid levels. That is, the nth first scan line in the nth-level pixel driving circuit and the (n+1)th first scan line in the (n+1)th-level pixel driving circuit are sequentially input with valid levels, the nth second scan line in the nth-level pixel driving circuit and the (n+1)th second scan line in the (n+1)th-level pixel driving circuit are sequentially input with valid levels, all third scan lines RD2 are input with invalid levels, and the nth third scan line in the nth-level pixel driving circuit and the (n+1)th third scan line in the (n+1)th-level pixel driving circuit are input with invalid levels. When the display circuit is configured for the acquisition phase, the first scan lines of each level are sequentially input with valid levels, all second scan lines are input with invalid levels, and the third scan lines of each level are sequentially input with valid levels. That is, the nth third scan line in the nth level pixel driving circuit and the n+1th third scan line in the n+1th level pixel driving circuit are sequentially input with valid levels.

2. The display circuit as described in claim 1, characterized in that, The acquisition circuit includes one of a temperature sensor acquisition circuit and an optical sensor acquisition circuit.

3. The display circuit as described in claim 2, characterized in that, The acquisition module includes a first acquisition transistor and a second acquisition transistor. The gate and the first electrode of the first acquisition transistor are connected to a first high-potential power line. The second electrodes of the first acquisition transistor and the second acquisition transistor are connected to the first electrode of a second control transistor. The gate of the second acquisition transistor is connected to a first control line. The first electrode of the second acquisition transistor is connected to a first low-potential power line.

4. The display circuit as described in claim 2, characterized in that, The acquisition module includes a thermistor and a fixed resistor. One end of the thermistor is connected to a first high-potential power line, and the other end of the thermistor is connected to the first electrode of the second control transistor. One end of the fixed resistor is connected to a first low-potential power line, and the other end of the fixed resistor is connected to the first electrode of the second control transistor.

5. The display circuit as described in claim 2, characterized in that, The acquisition module includes a third acquisition transistor, a fourth acquisition transistor, a first capacitor, a second capacitor, a first frequency-type ring oscillator, and a second frequency-type ring oscillator. The gate of the third acquisition transistor is connected to one end of the first frequency-type ring oscillator, one end of the second frequency-type ring oscillator, and one end of the first capacitor. The first electrode of the third acquisition transistor is connected to a second high-potential power line. The second electrode of the third acquisition transistor is connected to one end of the second capacitor, the other end of the first frequency-type ring oscillator, and the first electrode of the fourth acquisition transistor. The gate of the fourth acquisition transistor is connected to a second control line. The second electrode of the fourth acquisition transistor is connected to a second low-potential signal line. The other plates of the first and second capacitors are connected to the second low-potential signal line. The other end of the second frequency-type ring oscillator is connected to the first electrode of the second control transistor.

6. The display circuit as described in claim 2, characterized in that, The acquisition module includes a fifth acquisition transistor, a sixth acquisition transistor, a first current source, a second current source, and a differential circuit. The first electrode of the fifth acquisition transistor is connected to a third high-potential power supply line. The gate and the second electrode of the fifth acquisition transistor are connected to the first current source and one input terminal of the differential circuit. The first electrode of the sixth acquisition transistor is connected to the third high-potential power supply line. The gate and the second electrode of the sixth acquisition transistor are connected to the second current source and the other input terminal of the differential circuit. The output terminal of the differential circuit is connected to the first electrode of the second control transistor.

7. The display circuit as described in claim 2, characterized in that, The acquisition module includes a photodiode, the positive electrode of which is connected to the first electrode of the second control transistor, and the second electrode of which is connected to the first low-potential power line.

8. The display circuit as described in claim 1, characterized in that, The display circuit includes multiple acquisition circuits arranged in an array, and the number of read signal lines is greater than or equal to the number of columns of the acquisition circuits.

9. The display circuit as described in any one of claims 1 to 8, characterized in that, The compensation circuit further includes a first switch, a second switch, and a reset signal line. One end of the first switch is connected to the reset signal line, and the other end of the first switch is connected to the read signal line. One end of the second switch is connected to the analog-to-digital conversion module, and the other end of the second switch is connected to the read signal line.

10. A display device, characterized in that, The display device includes the display circuit as described in any one of claims 1 to 9, and comprises: First substrate; A display panel is disposed on one side of the first substrate; A liquid crystal layer is disposed on the side of the display panel away from the first substrate; A control electrode layer is disposed on the side of the liquid crystal layer away from the display panel; The second substrate is disposed on the side of the control electrode layer away from the liquid crystal layer.

11. The display device as claimed in claim 10, characterized in that, The display panel includes a photodiode and a light-emitting unit. The display panel includes multiple partitions. Each partition is provided with multiple light-emitting units and a photodiode. The control electrode layer includes multiple control electrodes arranged at intervals. Each control electrode is arranged corresponding to a partition.

12. The display device as claimed in claim 11, characterized in that, The display panel includes a first electrode layer, a second electrode layer, and a third electrode layer. The first electrode layer is disposed on the side of the second electrode layer close to the liquid crystal layer, and the third electrode layer is disposed on the side of the second electrode layer away from the first electrode layer. The first electrode layer includes a common electrode.

13. The display device as claimed in claim 12, characterized in that, The photodiode is disposed on the side of the third electrode layer close to the second electrode layer. The third electrode layer includes a light-shielding metal, which is disposed corresponding to the photodiode.

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