Display drive system, information configuration method and computer device

Abstract

The present application relates to a display drive system, an information configuration method and a computer device; data receiving ends of N drive controllers are connected in parallel to the data output ends of the main control end to form a data transmission channel; clock receiving ends of the N drive controllers are respectively connected to the N clock output ends of the main control end to form N independent clock channels; the drive controller is used to receive information configuration data and an independent clock signal when in an information configuration state; determine the state of the independent clock signal; if the independent clock signal is in a valid state, obtain the corresponding target data information from the information configuration data; perform information configuration according to the target data information, which lays a foundation for realizing communication control of the drive controller without the need for the main control end to know the corresponding address of the drive controller in advance; and based on the independent clock signal corresponding to each drive controller, it is possible to perform separate communication with a specific drive controller.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a display driving system, an information configuration method and a computer device. Background Art

[0002] At present, in the LED display drive system, the data transmission and control authority of the entire system are mainly managed by the main controller, and the drive circuit can only passively receive and execute the instructions issued by the main controller, and return relevant status information or data according to the requirements of the main controller. The multiple drive circuits in the existing LED display drive system are usually connected in series. In order to realize the separate communication for the specified drive circuit, the drive circuit needs to have an independent communication address built in in advance, so that the main controller can know the corresponding communication address of each drive circuit in advance, and then send information to the specified drive circuit based on the communication address.

[0003] Therefore, the display driving system in the prior art has the problem that the main controller must rely on the communication address corresponding to each driving circuit to communicate with the driving circuit. Summary of the invention

[0004] Based on this, it is necessary to provide a display driving system, an information configuration method and a computer device to address the above technical problems.

[0005] In a first aspect, the present application provides a display driving system, the display driving system comprising a main control end and N driving controllers, N≥2; the main control end is provided with a data output end and at least N clock output ends; the driving controller is provided with a data receiving end and a clock receiving end, wherein:

[0006] The N data receiving ends of the drive controllers are connected in parallel to the data output end of the main control end to form a data transmission channel; the N clock receiving ends of the drive controllers are respectively connected to the N clock output ends of the main control end to form N independent clock channels;

[0007] The main control end is used to send information configuration instructions to the N drive controllers via the data transmission channel to control the N drive controllers to enter the information configuration state; and is also used to send information configuration data to the N drive controllers via the data transmission channel when the N drive controllers are all in the information configuration state, and to send corresponding independent clock signals to the N drive controllers via the N independent clock channels respectively;

[0008] The drive controller is used to receive information configuration data and an independent clock signal when in an information configuration state; determine the state of the independent clock signal; if the independent clock signal is in a valid state, obtain corresponding target data information from the information configuration data; and perform information configuration according to the target data information.

[0009] In a second aspect, the present application provides an information configuration method, which is applied to a drive controller of a display drive system described in the embodiment of the first aspect, and the method includes:

[0010] When in the information configuration state, receiving information configuration data and an independent clock signal;

[0011] determining a state of the independent clock signal;

[0012] If the independent clock signal is in a valid state, obtaining corresponding target data information from the information configuration data;

[0013] Information configuration is performed according to the target data information.

[0014] In one embodiment, determining the state of the independent clock signal includes:

[0015] If the independent clock signal is in a level-valid phase or a clock-edge-valid phase, determining that the independent clock signal is in a valid state;

[0016] If the independent clock signal is in a level invalid stage or a clock edge invalid stage, it is determined that the independent clock signal is in an invalid state.

[0017] In one embodiment, determining the state of the independent clock signal includes:

[0018] If the independent clock signal is in a continuous level valid stage or a continuous clock edge valid stage, determining that the independent clock signal is in a valid state;

[0019] If the independent clock signal is in a continuous level invalid phase or a continuous clock edge invalid phase, it is determined that the independent clock signal is in an invalid state.

[0020] In one embodiment, the information configuration data includes a plurality of standard coding groups; the standard coding group includes a plurality of sub-codings; if the independent clock signal is in a valid state, obtaining corresponding target data information from the information configuration data includes:

[0021] For each standard coding group in the plurality of standard coding groups, if the valid time period corresponding to when the independent clock signal is in a valid state matches the receiving time period corresponding to any one of the sub-codes in the standard coding group, the corresponding sub-code is used as the target code;

[0022] According to a plurality of target codes, target data information is determined.

[0023] In one embodiment, the information configuration data includes a plurality of preset data packets, and the preset data packets carry target information encoding; if the independent clock signal is in a valid state, obtaining corresponding target data information from the information configuration data includes:

[0024] If the valid time period corresponding to when the independent clock signal is in a valid state matches the receiving time period corresponding to any one of the preset data packets, the target information carried in the corresponding preset data packet is encoded as the target data information.

[0025] In a third aspect, the present application further provides an information configuration method, which is applied to the main control end of the display driving system described in the embodiment of the first aspect above, and the method includes:

[0026] Sending information configuration instructions to N drive controllers to control the N drive controllers to enter an information configuration state;

[0027] When the N drive controllers are all in the information configuration state, information configuration data is sent to the N drive controllers, and corresponding independent clock signals are sent to the N drive controllers respectively.

[0028] In one embodiment, before sending the information configuration data to the N drive controllers, the method further includes:

[0029] Obtain target configuration information corresponding to N of the drive controllers;

[0030] Determine the number of encoding bits corresponding to the target configuration information;

[0031] According to the number of coding bits, a corresponding plurality of standard coding groups are generated; the standard coding groups include a plurality of sub-codings;

[0032] A plurality of the standard encoding groups are loaded into the information configuration data.

[0033] In one embodiment, before sending the information configuration data to the N drive controllers, the method further includes:

[0034] Obtain target configuration information corresponding to N of the drive controllers;

[0035] Generate corresponding N preset data packets according to the N target configuration information;

[0036] The N preset data packets are sequentially loaded into the information configuration data in a preset order.

[0037] In one embodiment, before sending the corresponding independent clock signals to the N driving controllers respectively, the method further includes:

[0038] For each of the N drive controllers,

[0039] According to the target configuration information corresponding to the drive controller and the sending time period corresponding to each of the standard coding groups, the independent clock signal corresponding to the drive controller is generated by setting the corresponding level valid phase or clock edge valid phase.

[0040] In one embodiment, before sending the corresponding independent clock signals to the N driving controllers respectively, the method further includes:

[0041] For each of the N drive controllers,

[0042] According to the sending time period of the preset data packet corresponding to the driving controller, the independent clock signal of the driving controller is generated by setting the corresponding continuous level valid phase or continuous clock edge valid phase.

[0043] In a fourth aspect, the present application further provides an information configuration method, which is applied to the display driving system described in the embodiment of the first aspect above, and the method includes:

[0044] The main control end sends information configuration instructions to the N drive controllers via the data transmission channel to control the N drive controllers to enter the information configuration state;

[0045] N of the drive controllers enter an information configuration state according to the information configuration instruction;

[0046] When the N drive controllers are all in the information configuration state, the main control end sends information configuration data to the N drive controllers via the data transmission channel, and sends corresponding independent clock signals to the N drive controllers via the N independent clock channels;

[0047] When each of the drive controllers is in an information configuration state, it receives information configuration data and an independent clock signal; determines the state of the independent clock signal; if the independent clock signal is in a valid state, obtains corresponding target data information from the information configuration data; and performs information configuration according to the target data information.

[0048] In a fifth aspect, the present application further provides a computer device, comprising a memory and a processor, wherein the memory stores a computer program, and when the processor executes the computer program, the steps of the method described in any one of the embodiments of the second aspect, the third aspect and the fourth aspect are implemented.

[0049] In a sixth aspect, the present application further provides a computer-readable storage medium having a computer program stored thereon, and when the computer program is executed by a processor, the steps of the method described in any one of the embodiments of the second aspect, the third aspect and the fourth aspect are implemented.

[0050] In the seventh aspect, the present application also provides a computer program product, including a computer program, which, when executed by a processor, implements the steps of the method described in any one of the embodiments of the second aspect, the third aspect and the fourth aspect.

[0051] The above-mentioned display drive system, information configuration method and computer equipment, the display drive system includes a main control end and N drive controllers; the data receiving ends of the N drive controllers are connected in parallel to the data output ends of the main control end to form a data transmission channel; the clock receiving ends of the N drive controllers are respectively connected to the N clock output ends of the main control end to form N independent clock channels; based on the N independent clock channels, a corresponding independent clock signal can be provided for each drive controller, and then when the independent clock signal is in a valid state, the corresponding target data information can be obtained from the information configuration data; information configuration is performed according to the target data information, which lays a foundation for realizing communication control of the drive controller without the need for the main control end to know the corresponding address of the drive controller in advance; at the same time, based on the independent clock signal corresponding to each drive controller, separate communication can be performed for one or more specific drive controllers. BRIEF DESCRIPTION OF THE DRAWINGS

[0052] In order to more clearly illustrate the technical solutions in the embodiments of the present application or related technologies, the drawings required for use in the embodiments of the present application or related technical descriptions will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.

[0053] Figure 1 A schematic diagram showing the structure of a driving system in one embodiment;

[0054] Figure 2 A schematic diagram of a flow chart of an information configuration method in an embodiment;

[0055] Figure 3A timing diagram of information configuration data and an independent clock signal in one embodiment;

[0056] Figure 4 A timing diagram of information configuration data and an independent clock signal in another embodiment;

[0057] Figure 5 A schematic diagram of a process for determining information configuration data in one embodiment;

[0058] Figure 6 A schematic diagram of a process for determining information configuration data in another embodiment;

[0059] Figure 7 A schematic diagram of a flow chart of an information configuration method in an embodiment;

[0060] Figure 8 FIG. 4 is a diagram showing the internal structure of a computer device in one embodiment. DETAILED DESCRIPTION

[0061] In order to make the purpose, technical solution and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0062] In one embodiment, Figure 1 As shown, Figure 1 Schematic diagram of the structure of a display driving system in an embodiment; the display driving system includes a main control terminal and N driving controllers, N≥2; the main control terminal is provided with a data output terminal DATA and at least N clock output terminals CLK; the driving controller is provided with a data receiving terminal a and a clock receiving terminal b, wherein:

[0063] The data receiving terminals a of the N driving controllers are connected in parallel to the data output terminal DATA of the main control terminal to form a data transmission channel; the clock receiving terminals b of the N driving controllers are respectively connected to the N clock output terminals CLK of the main control terminal to form N independent clock channels;

[0064] The main control end is used to send information configuration instructions to N drive controllers via the data transmission channel to control the N drive controllers to enter the information configuration state; it is also used to send information configuration data to the N drive controllers via the data transmission channel when the N drive controllers are all in the information configuration state, and send corresponding independent clock signals to the N drive controllers via N independent clock channels;

[0065] The drive controller is used to receive information configuration data and an independent clock signal when in an information configuration state; determine the state of the independent clock signal; if the independent clock signal is in a valid state, obtain corresponding target data information from the information configuration data; and perform information configuration according to the target data information.

[0066] It should be noted that the N mentioned above is a natural number greater than or equal to 2.

[0067] The main control terminal may be, but is not limited to, a control chip, a control device, etc., which are not specifically limited here. The data output terminal DATA of the main control terminal is used to output control instructions or communication data; the control instructions may include, but are not limited to, information configuration instructions, exit configuration instructions, and display control instructions; information configuration instructions are used to control the drive controller to enter the information configuration state; exit configuration instructions are used to control the drive controller to exit the information configuration state; display control instructions are used to control the drive controller to perform corresponding actions related to the display; communication data may include, but are not limited to, information configuration data, which includes configuration parameters or data required by the drive controller, such as address information. The clock terminal CLK of the main control terminal is used to provide a corresponding independent clock signal for the drive controller.

[0068] It should be noted that, in an exemplary embodiment, the main control end is also used to set the corresponding safety time according to the number of drive controllers; wherein the safety time is used to ensure that all drive controllers have entered the information configuration state. For example, when the cumulative time after the main control end sends the information configuration instruction meets the safety time, it is determined that all drive controllers have entered the information configuration state.

[0069] The drive controller may include, but is not limited to, a communication control unit and a storage unit; the communication control unit is used to perform communication control according to the control instructions and independent clock signals sent by the main control end, for example, to perform information configuration; the storage unit is used to store communication data sent by the main control end, for example, to store data related to information configuration. The data receiving end a of the drive controller is used to receive control instructions or communication data transmitted via a data transmission channel; the clock receiving end b of the drive controller is used to receive an independent clock signal transmitted via an independent clock channel.

[0070] It should be noted that the driving controller is connected to at least one LED lamp bead to control the LED lamp bead to perform corresponding actions; the LED lamp bead is a light-emitting element.

[0071] For example, see Figure 1The display driving system includes a main control end and N driving controllers, namely driving controller 1, driving controller 2, ..., driving controller N, wherein N≥2, and N is a natural number; the main control end is provided with a data output end DATA and N clock output ends CLK, namely CLK 1, CLK2, ..., CLK N; the driving controller is provided with a data receiving end a and a clock receiving end b; the data receiving ends a of driving controller 1 to driving controller N are connected in parallel to the data output end DATA of the main control end to form a data transmission channel; the clock receiving end b of driving controller 1 is connected to the clock output end CLK1 of the main control end, the clock receiving end b of driving controller 2 is connected to the clock output end CLK2 of the main control end, and so on, the clock receiving ends b of the N driving controllers are respectively connected to the N clock output ends CLK of the main control end to form N independent clock channels.

[0072] In this embodiment, based on N independent clock channels, a corresponding independent clock signal can be provided for each drive controller, and then when the independent clock signal is in a valid state, the corresponding target data information can be obtained from the information configuration data transmitted through the data transmission channel; information configuration is performed according to the target data information, which lays a foundation for realizing communication control of the drive controller without the need for the main control end to know the corresponding address of the drive controller in advance; at the same time, based on the independent clock signal corresponding to each drive controller, separate communication can be performed for one or more specific drive controllers.

[0073] In one embodiment, Figure 2 As shown, Figure 2 1 is a flow chart of an information configuration method in an embodiment; the information configuration method is applied to a drive controller of a display drive system, and the method comprises the following steps:

[0074] Step S201, when in the information configuration state, receiving information configuration data and an independent clock signal.

[0075] Among them, the working state of the drive controller includes an information configuration state and a normal communication state; wherein, in the information configuration state, the drive controller is used to implement information configuration according to the information configuration data and the independent clock signal sent by the main control end; in the normal communication state, the drive controller is used to implement normal communication according to the display control data and the independent clock signal sent by the main control end; wherein, the information configuration data includes the configuration parameters or data required by the drive controller; for example, address information; display control data is related to the actual display requirements and is not specifically limited here.

[0076] It should be noted that after the data receiving end of the drive controller receives the information configuration instruction sent by the main control end through the data transmission channel, the drive controller will enter the information configuration state; among them, the information configuration instruction can be a field customized by the main control end, which is specifically used to instruct the drive controller to enter the information configuration state, and is not specifically limited here.

[0077] The independent clock signal is used to control the drive controller to extract target data information related to the drive controller from the information configuration data. It should be noted that the drive controller receives the corresponding independent clock signal through an independent clock channel connected to the clock receiving end.

[0078] Step S202, determining the state of the independent clock signal.

[0079] Among them, the state of the independent clock signal includes a valid state and an invalid state; among them, in the valid state, the independent clock signal can trigger an information reading operation; for example, obtain the corresponding target data information from the information configuration data; in the invalid state, the independent clock signal cannot trigger an information reading operation, that is, the corresponding target data information cannot be obtained from the information configuration data.

[0080] Step S203: if the independent clock signal is in a valid state, the corresponding target data information is obtained from the information configuration data.

[0081] Wherein, the target data information includes the target configuration information corresponding to the drive controller; wherein, the target configuration information needs to be set according to the actual configuration requirements, which is not specifically limited here. The target data information may include, but is not limited to, a preset data packet and a target code, which is not specifically limited here. Wherein, the preset data packet carries the target information code corresponding to the target configuration information corresponding to the drive controller; wherein, the target information code is a binary code group corresponding to the target configuration information; for example, assuming that the target configuration information corresponding to the drive controller is "0101", the target information code carried by the preset data packet is "0101"; the target code is each binary code in the target configuration information corresponding to the drive controller; for example, assuming that the target configuration information corresponding to the drive controller is "0101", the target code is "0", "1", "0", "1".

[0082] It should be noted that the effective state of the independent clock signal is set corresponding to the target configuration information corresponding to the driving controller in the information configuration data; it can be understood that when the effective time period corresponding to the effective state of the independent clock signal matches the sending time period corresponding to the target configuration information corresponding to the driving controller in the information configuration data, the corresponding target data information can be obtained from the information configuration data.

[0083] Step S204: performing information configuration according to the target data information.

[0084] Exemplarily, when the drive controller is in the information configuration state, it receives information configuration data through the data receiving end and receives an independent clock signal through the clock receiving end; further, it determines the state of the independent clock signal; if the independent clock signal is in a valid state, it obtains the corresponding target data information from the information configuration data; if the independent clock signal is in an invalid state, it does not perform any operation; further, it stores the target data information as the designated configuration information corresponding to the drive controller to realize the information configuration of the drive controller.

[0085] In this embodiment, based on the independent clock signal, when the independent clock signal is in a valid state, the corresponding target data information can be obtained from the information configuration data; information configuration is performed according to the target data information, thereby realizing communication control of the drive controller without the need for the main control end to know the corresponding address of the drive controller in advance. At the same time, based on the independent clock signal, a specific drive controller can be individually communicated and controlled, thereby improving the flexibility of communication between the main control end and the drive controller.

[0086] In one embodiment, determining the state of the independent clock signal includes:

[0087] If the independent clock signal is in a level-valid phase or a clock-edge-valid phase, the independent clock signal is determined to be in a valid state;

[0088] If the independent clock signal is in a level invalid stage or a clock edge invalid stage, the independent clock signal is determined to be in an invalid state.

[0089] Among them, the level-valid phase refers to the phase in which the independent clock signal is considered valid at a certain fixed logic level; the level-valid phase can be a high-level phase or a low-level phase, which needs to be set according to the performance of the drive controller and is not specifically limited here. The level-invalid phase refers to the phase in which the independent clock signal is considered invalid at a certain fixed logic level. For example, if the level-valid phase is a high-level phase, the level-invalid phase is a low-level phase.

[0090] The clock edge valid phase refers to the phase that is considered valid at the rising edge or falling edge of the independent clock signal. The clock edge invalid phase refers to the phase between two clock edge valid phases of the independent clock signal.

[0091] Exemplarily, when the state of the independent clock signal is characterized by a logic level, it is determined whether the independent clock signal is in a level-valid stage. If the independent clock signal is in a level-valid stage, the independent clock signal is determined to be in a valid state; if the independent clock signal is in a level-invalid stage, the independent clock signal is determined to be in an invalid state. When the state of the independent clock signal is characterized by a clock edge, it is determined whether the independent clock signal is in a clock edge-valid stage. If the independent clock signal is in a clock edge-valid stage, the independent clock signal is determined to be in a valid state; if the independent clock signal is in a clock edge-invalid stage, the independent clock signal is determined to be in an invalid state.

[0092] In this embodiment, based on the level valid stage or the clock edge valid stage, it can be accurately determined whether the independent clock signal is in a valid state; based on the level invalid stage or the clock edge invalid stage, it can be accurately determined whether the independent clock signal is in an invalid state; based on this, it can be ensured that the driving controller performs information reading operations when the independent clock signal is in a valid state to avoid misoperation or communication confusion.

[0093] In another embodiment, determining a state of an independent clock signal includes:

[0094] If the independent clock signal is in a continuous level valid stage or a continuous clock edge valid stage, the independent clock signal is determined to be in a valid state;

[0095] If the independent clock signal is in a continuous level invalid phase or a continuous clock edge invalid phase, the independent clock signal is determined to be in an invalid state.

[0096] Among them, the continuous level effective stage refers to the continuous level effective stage; the continuous clock edge effective stage refers to the continuous clock edge effective stage. For example, the continuous level effective stage can be a continuous multiple high level pulse stage. The continuous clock edge effective stage can be a continuous rising edge effective stage or a continuous falling edge effective stage.

[0097] The continuous level invalid phase refers to a continuous level invalid phase; the continuous clock edge invalid phase refers to a continuous clock edge invalid phase.

[0098] Exemplarily, when the state of the independent clock signal is characterized by a logic level, it is determined whether the independent clock signal is in a continuous level valid stage. If the independent clock signal is in a continuous level valid stage, the independent clock signal is determined to be in a valid state; if the independent clock signal is in a continuous level invalid stage, the independent clock signal is determined to be in an invalid state. When the state of the independent clock signal is characterized by a clock edge, it is determined whether the independent clock signal is in a continuous clock edge valid stage. If the independent clock signal is in a continuous clock edge valid stage, the independent clock signal is determined to be in a valid state; if the independent clock signal is in a continuous clock edge invalid stage, the independent clock signal is determined to be in an invalid state.

[0099] In this embodiment, based on the continuous level valid stage or the continuous clock edge valid stage, it can be accurately determined whether the independent clock signal is in a valid state; based on the continuous level invalid stage or the continuous clock edge invalid stage, it can be accurately determined whether the independent clock signal is in an invalid state; based on this, it can be ensured that the driving controller performs information reading operations when the independent clock signal is in a valid state to avoid misoperation or communication confusion.

[0100] It can be understood that the two methods of determining the state of the independent clock signal recorded in the above embodiments need to be selected according to the actual information reading strategy, and are not specifically limited here; for example, if the information configuration data includes a preset data packet, the state of the independent clock signal can be determined by a continuous level valid stage and a continuous level invalid stage, or, the state of the independent clock signal can be determined by a continuous clock edge valid stage and a continuous clock edge invalid stage; if the information configuration data includes a standard coding group, the state of the independent clock signal can be determined by a level valid stage and a level invalid stage, or, the state of the independent clock signal can be determined by a clock edge valid stage and a clock edge invalid stage.

[0101] In one embodiment, the information configuration data includes a plurality of standard coding groups; the standard coding groups include a plurality of sub-codings.

[0102] Among them, the standard coding group is composed of multiple sub-codes; the sub-code is a binary code; for example, the standard coding group can be "01" or "10", where "0" and "1" are sub-codes; it should be noted that the standard coding group needs to be set according to actual needs, and no specific limitation is made here, but it is necessary to ensure that multiple standard coding groups in the information configuration data remain the same.

[0103] Preferably, if the independent clock signal is in a valid state, obtaining corresponding target data information from the information configuration data includes the following steps:

[0104] Step 1: for each standard coding group in multiple standard coding groups, if the valid time period corresponding to when the independent clock signal is in a valid state matches the receiving time period corresponding to any sub-coding in the standard coding group, the corresponding sub-coding is used as the target coding.

[0105] Step 2: Determine target data information based on multiple target codes.

[0106] Among them, the effective time period refers to the time range corresponding to when the independent clock signal is in a valid state; the receiving time period corresponding to the sub-code refers to the time range corresponding to when the drive controller receives the sub-code.

[0107] For example, see Figure 3 , taking the information configuration as address configuration as an example, it is assumed that the display driving system includes a main control end and three driving controllers, the main control end is provided with a data output end DATA and three clock output ends, and the three clock output ends are CLK 1, CLK 2 and CLK 3 respectively; and it is assumed that the three driving controllers need to be configured with a 4-bit address respectively, that is, the target configuration information corresponding to the driving controller is 4 bits. It should be noted that before the address configuration, the main control end will generate the corresponding information configuration data according to the target configuration information, and the information configuration data includes 4 standard coding groups.

[0108] Furthermore, when performing address configuration, the master control end sends information configuration instructions to the three drive controllers through the data output end DATA and the data transmission channel to control the three drive controllers to enter the information configuration state; when the three drive controllers are in the information configuration state, the master control end sends information configuration data, namely, four standard coding groups "10", to the three drive controllers through the data output end DATA and the data transmission channel, and sends corresponding independent clock signals to the three drive controllers through the clock output ends CLK 1, CLK 2 and CLK 3. Next, take the clock output end CLK 2 as an example to explain. The clock output end CLK 2 is connected to the drive controller 2. When the independent clock signal is in the level-valid stage (i.e., high level valid) or the edge-valid stage (i.e., rising edge valid or falling edge valid), the independent clock signal is in a valid state; it can be obtained from Figure 3As can be seen from the figure, for the first standard coding group "10", the valid time period corresponding to the independent clock signal corresponding to the clock output terminal CLK 2 is in a valid state, which matches the receiving time period corresponding to the sub-code "0" in the standard coding group, and the sub-code "0" is used as the first target code; for the second standard coding group "10", the valid time period corresponding to the independent clock signal corresponding to the clock output terminal CLK 2 is in a valid state, which matches the receiving time period corresponding to the sub-code "0" in the standard coding group, and the sub-code "0" is used as the second target code; for the third standard coding group "10", the clock output terminal CLK 2 is in a valid state, the corresponding valid time period matches the receiving time period corresponding to the sub-code "0" in the standard coding group, then the sub-code "0" is used as the third target code; for the fourth standard coding group "10", the corresponding valid time period when the independent clock signal corresponding to the clock output terminal CLK2 is in a valid state matches the receiving time period corresponding to the sub-code "1" in the standard coding group, then the sub-code "1" is used as the fourth target code; according to the four target sub-codes, namely "0", "0", "0", and "1", it can be concluded that the target data information is "0001", then the target data information "0001" is stored as the address of the drive controller 2; and so on, the address corresponding to each drive controller can be determined, and the specific process will not be repeated here.

[0109] Optionally, after all drive controllers have received the corresponding target sub-codes, the main control end sends an exit configuration instruction to the three drive controllers via the data output end DATA and the data transmission channel to control the three drive controllers to exit the information configuration state.

[0110] It can be understood that when the information configuration is other types of information configuration, the specific information configuration process is the same as the method principle recorded in the above embodiment, and will not be repeated here.

[0111] In this embodiment, when the information configuration data includes multiple standard coding groups, the valid time period corresponding to when the independent clock signal is in a valid state is matched with the receiving time period corresponding to the sub-code in the standard coding group, so that the corresponding target code can be accurately determined; and then based on the multiple target codes, the target data information can be determined, thereby improving the reliability and accuracy of the information configuration of the drive controller.

[0112] In one embodiment, the information configuration data includes a plurality of preset data packets, and the preset data packets carry target information codes.

[0113] Among them, the preset data packet carries the target information code corresponding to the target configuration information; the target information code is a binary code group corresponding to the target configuration information; among them, the target configuration information can be preset address information, preset configuration parameters or preset data information, which needs to be set according to actual information configuration requirements, and is not specifically limited here.

[0114] Preferably, if the independent clock signal is in a valid state, obtaining corresponding target data information from the information configuration data includes:

[0115] If the valid time period corresponding to when the independent clock signal is in a valid state matches the receiving time period corresponding to any preset data packet, the target information carried in the corresponding preset data packet is encoded as the target data information.

[0116] The receiving time period corresponding to the preset data packet refers to the time range corresponding to when the driving controller receives the preset data packet.

[0117] For example, see Figure 4 , taking the information configuration as the address configuration as an example for explanation, it is assumed that the display driving system includes a main control end and three driving controllers, the main control end is provided with a data output end DATA and three clock output ends, and the three clock output ends are CLK 1, CLK 2 and CLK 3 respectively; and it is assumed that the target configuration information corresponding to the driving controller 1, the driving controller 2 and the driving controller 3, that is, the preset address information, are ID1, ID2 and ID3 respectively. It should be noted that before the address configuration, the main control end will generate corresponding information configuration data according to the target configuration information corresponding to each of the three driving controllers, and the information configuration data includes three preset data packets, and the three preset data packets are ID1, ID2 and ID3 respectively.

[0118] Further, when performing address configuration, the main control end sends information configuration instructions to the three drive controllers through the data output end DATA and the data transmission channel to control the three drive controllers to enter the information configuration state; when the three drive controllers are all in the information configuration state, the main control end sends information configuration data, namely, three preset data packets, namely, ID1, ID2 and ID3, to the three drive controllers through the data output end DATA and the data transmission channel, and sends corresponding independent clock signals to the three drive controllers through the clock output ends CLK 1, CLK2 and CLK 3 respectively; the following takes the clock output end CLK 2 as an example for explanation, the clock output end CLK 2 is connected to the drive controller 2, and when the independent clock signal is in the continuous level valid stage (i.e., the continuous high level pulse valid stage) or the continuous edge valid stage (i.e., the continuous rising edge valid stage or the continuous falling edge valid stage), the independent clock signal is in the valid state; it can be obtained from Figure 4It can be seen that the effective time period corresponding to the independent clock signal corresponding to the clock output terminal CLK 2 is in the effective state, which matches the receiving time period corresponding to the preset data packet ID2, and the target information carried in the preset data packet ID2 is encoded as the target data information; and the target data information is stored as the address of the drive controller 2; and so on, the address corresponding to each drive controller can be determined, and the specific process will not be repeated here.

[0119] Optionally, after all the drive controllers have received the corresponding preset data packets, the main control end sends an exit configuration instruction to the three drive controllers through the data output end DATA via the data transmission channel to control the three drive controllers to exit the information configuration state.

[0120] It can be understood that when the information configuration is other types of information configuration, the specific information configuration process is the same as the method principle recorded in the above embodiment, and will not be repeated here.

[0121] In this embodiment, when the information configuration data includes multiple preset data packets, the effective time period corresponding to when the independent clock signal is in a valid state is matched with the receiving time period corresponding to the preset data packet, so that the corresponding target data information can be accurately determined, thereby improving the reliability and accuracy of the information configuration of the drive controller.

[0122] In one embodiment, the information configuration method is applied to a main control terminal of a display driving system, comprising the following steps:

[0123] Step 1: Send information configuration instructions to N drive controllers to control the N drive controllers to enter the information configuration state.

[0124] Step 2: When the N drive controllers are all in the information configuration state, information configuration data is sent to the N drive controllers, and corresponding independent clock signals are sent to the N drive controllers respectively.

[0125] Exemplarily, the main control end outputs information configuration instructions through the data output end, and sends the information configuration instructions to N drive controllers through the data transmission channel to control the N drive controllers to enter the information configuration state; after the cumulative time after the information configuration instruction is output reaches the safety time, it is determined that the N drive controllers have entered the information configuration state. At this time, the information configuration data is output through the data output end, and the information configuration data is sent to the N drive controllers through the data transmission channel, and N independent clock signals are output through N clock output ends, and the N independent clock signals are respectively transmitted to the corresponding drive controllers through N independent clock channels.

[0126] In this embodiment, based on the main control end, N drive controllers can be accurately controlled to enter the information configuration state, and then when the N drive controllers are in the information configuration state, information configuration data is sent to the N drive controllers, and corresponding independent clock signals are sent to the N drive controllers respectively, laying the foundation for realizing the information configuration of the drive controllers.

[0127] In one embodiment, Figure 5 As shown, Figure 5 The flowchart of determining information configuration data in one embodiment is shown; before sending the information configuration data to N drive controllers, the following steps are also included:

[0128] Step S501, obtaining target configuration information corresponding to N drive controllers.

[0129] The target configuration information includes preset address information, preset configuration parameters, or preset data information corresponding to the drive controller. The target configuration information needs to be set according to actual configuration requirements and is not specifically limited here.

[0130] It should be noted that, when the target configuration information is preset address information, the target configuration information corresponding to each drive controller is independent of each other, that is, each drive controller has unique corresponding target configuration information.

[0131] Step S502: determine the number of coding bits corresponding to the target configuration information.

[0132] Exemplarily, if the target configuration information is "0000", the number of encoding bits corresponding to the target configuration information is 4 bits.

[0133] Step S503: Generate a plurality of corresponding standard coding groups according to the number of coding bits.

[0134] The standard coding group includes multiple sub-codings.

[0135] Step S504, loading multiple standard coding groups into the information configuration data.

[0136] Exemplarily, assuming that the target configuration information is "0010", the number of coding bits corresponding to the target configuration information is 4; based on the number of coding bits, four corresponding standard coding groups are generated; wherein the standard coding group can be "01" or "10", as long as the four standard coding groups are exactly the same; further, the four standard coding groups are loaded into the information configuration data to obtain the information configuration data.

[0137] In this embodiment, based on the number of coding bits corresponding to the target configuration information corresponding to the drive controller, a corresponding standard coding group is generated, and then multiple standard coding groups are loaded into the information configuration data, which can ensure the reliability of the information configuration data and lay the foundation for configuring the corresponding specified information for each drive controller.

[0138] In one embodiment, Figure 6 As shown, Figure 6 This is a flow chart of determining information configuration data in another embodiment; before sending the information configuration data to N drive controllers, the following steps are also included:

[0139] Step S601, obtaining target configuration information corresponding to N drive controllers.

[0140] Step S602: Generate corresponding N preset data packets according to N target configuration information.

[0141] The preset data packet carries a target information code, which is a binary code group corresponding to the target configuration information; for example, assuming that the target configuration information corresponding to the drive controller is "0101", the target information code carried by the preset data packet is "0101".

[0142] Step S603: Load N preset data packets into the information configuration data in sequence according to a preset order.

[0143] The preset order needs to be set according to actual needs and is not specifically limited here. For example, the preset order can be the physical arrangement order of the drive controller.

[0144] Exemplarily, assuming that the display system includes three drive controllers, the target configuration information corresponding to the three drive controllers is obtained, and the target configuration information is "0000", "0001" and "0010", respectively. According to the three target configuration information "0000", "0001" and "0010", three corresponding preset data packets are generated, and the target information codes carried by the three preset data packets are "0000", "0001" and "0010", respectively. The three preset data packets are loaded into the information configuration data in a preset order to obtain the information configuration data.

[0145] In this embodiment, based on the target configuration information corresponding to the drive controller, corresponding multiple preset data packets can be generated, and then the multiple preset data packets are loaded into the information configuration data, which can ensure the reliability of the information configuration data and lay the foundation for configuring the corresponding specified information for each drive controller.

[0146] In one embodiment, before sending the corresponding independent clock signals to the N driving controllers respectively, the following steps are also included:

[0147] For each of the N drive controllers,

[0148] According to the target configuration information corresponding to the drive controller and the sending time period corresponding to each standard coding group, an independent clock signal corresponding to the drive controller is generated by setting the corresponding level effective phase or clock edge effective phase.

[0149] The sending time period refers to the time range corresponding to the main control end sending the standard code group to the drive controller.

[0150] It should be noted that the specific type of the level-valid phase or the clock edge-valid phase needs to be set accordingly according to the trigger type of the internal register corresponding to the drive controller, and is not specifically limited here.

[0151] Exemplarily, when the information configuration data includes multiple standard coding groups, and the standard coding group is "01" or "10", that is, the sub-coding in the standard coding group includes "0" and "1", assuming that the target configuration information corresponding to the drive controller is "0000", then according to the target configuration information "0000" corresponding to the drive controller, the corresponding level valid phase or clock edge valid phase is set in the sending time period corresponding to the sub-coding "0" in each standard coding group to generate an independent clock signal corresponding to the drive controller.

[0152] In this embodiment, based on the target configuration information corresponding to the drive controller and the sending time period corresponding to each standard coding group, the independent clock signal corresponding to the drive controller can be accurately set. Based on the independent clock signal, the drive controller can be controlled to obtain multiple target codes corresponding to itself, and then the target data information can be obtained according to the multiple target codes, and the target data information can be used as the information corresponding to the drive controller to realize information configuration.

[0153] In another embodiment, before sending the corresponding independent clock signals to the N driving controllers respectively, the following steps are also included:

[0154] For each of the N drive controllers,

[0155] According to the sending time period of the preset data packet corresponding to the driving controller, the independent clock signal of the driving controller is generated by setting the corresponding continuous level valid phase or continuous clock edge valid phase.

[0156] Exemplarily, when the information configuration data includes multiple preset data packets, assuming that the preset data packet corresponding to the driving controller is "0000", a corresponding continuous level valid phase or continuous clock edge valid phase is set in the sending time period corresponding to the preset data packet "0000" to generate an independent clock signal corresponding to the driving controller.

[0157] In this embodiment, based on the preset data packet corresponding to the drive controller and the sending time period corresponding to the preset data packet, the independent clock signal corresponding to the drive controller can be accurately set, and the drive controller can be controlled to obtain its own corresponding target data information based on the independent clock signal, and the target data information is used as the information corresponding to the drive controller to implement information configuration.

[0158] It is understandable that the two independent clock signal generation methods recorded in the above embodiments need to be selected in combination with actual needs and are not specifically limited here.

[0159] In one embodiment, Figure 7 As shown, Figure 7 1 is a flow chart of an information configuration method in an embodiment; the information configuration method is applied to a display drive system, comprising the following steps:

[0160] Step S701: the main control end sends information configuration instructions to N drive controllers via the data transmission channel to control the N drive controllers to enter the information configuration state.

[0161] Step S702: N drive controllers enter an information configuration state according to the information configuration instruction.

[0162] Step S703, when the N drive controllers are all in the information configuration state, the main control end sends information configuration data to the N drive controllers via the data transmission channel, and sends corresponding independent clock signals to the N drive controllers via N independent clock channels.

[0163] Step S704, each drive controller receives information configuration data and an independent clock signal when in an information configuration state; determines the state of the independent clock signal; if the independent clock signal is in a valid state, obtains corresponding target data information from the information configuration data; and performs information configuration according to the target data information.

[0164] Optionally, after all drive controllers have completed information configuration, that is, after step S704, the following further includes:

[0165] The main control end sends an exit configuration instruction to the N drive controllers via the data transmission channel to control the N drive controllers to exit the information configuration state.

[0166] The above-mentioned information configuration method is based on an independent clock signal. When the independent clock signal is in a valid state, the corresponding target data information can be obtained from the information configuration data; information configuration is performed according to the target data information, thereby realizing communication control of the drive controller without the need for the main control end to know the corresponding address of the drive controller in advance. At the same time, based on the independent clock signal, a specific drive controller can be individually communicated and controlled, thereby improving the flexibility of communication between the main control end and the drive controller.

[0167] It should be understood that, although the various steps in the flowcharts involved in the above-mentioned embodiments are displayed in sequence according to the indication of the arrows, these steps are not necessarily executed in sequence according to the order indicated by the arrows. Unless there is a clear explanation in this article, the execution of these steps does not have a strict order restriction, and these steps can be executed in other orders. Moreover, at least a part of the steps in the flowcharts involved in the above-mentioned embodiments can include multiple steps or multiple stages, and these steps or stages are not necessarily executed at the same time, but can be executed at different times, and the execution order of these steps or stages is not necessarily to be carried out in sequence, but can be executed in turn or alternately with other steps or at least a part of the steps or stages in other steps.

[0168] In an exemplary embodiment, a computer device is provided. The computer device may be a server, and its internal structure diagram may be as shown in FIG. Figure 8 As shown. The computer device includes a processor, a memory, an input / output interface (Input / Output, referred to as I / O) and a communication interface. The processor, the memory and the input / output interface are connected through a system bus, and the communication interface is connected to the system bus through the input / output interface. The processor of the computer device is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system, a computer program and a database. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The database of the computer device is used to store information configuration related data. The input / output interface of the computer device is used to exchange information between the processor and an external device. The communication interface of the computer device is used to communicate with an external terminal through a network connection. When the computer program is executed by the processor, an information configuration method is implemented.

[0169] Those skilled in the art will understand that Figure 8 The structure shown in the figure is only a block diagram of a part of the structure related to the solution of the present application, and does not constitute a limitation on the computer device to which the solution of the present application is applied. The specific computer device may include more or fewer components than those shown in the figure, or combine certain components, or have a different arrangement of components.

[0170] In one embodiment, a computer device is further provided, including a memory and a processor, wherein a computer program is stored in the memory, and the processor implements the steps in the above method embodiments when executing the computer program.

[0171] In one embodiment, a computer-readable storage medium is provided, on which a computer program is stored. When the computer program is executed by a processor, the steps in the above-mentioned method embodiments are implemented.

[0172] In one embodiment, a computer program product is provided, including a computer program, which implements the steps in the above method embodiments when executed by a processor.

[0173] A person of ordinary skill in the art can understand that all or part of the processes in the above-mentioned embodiment method can be completed by instructing the relevant hardware through a computer program, and the computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to the memory, database or other medium used in the embodiments provided in the present application can include at least one of non-volatile memory and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetic random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. As an illustration and not limitation, RAM can be in various forms, such as static random access memory (SRAM) or dynamic random access memory (DRAM). The database involved in each embodiment provided in this application may include at least one of a relational database and a non-relational database. Non-relational databases may include distributed databases based on blockchains, etc., but are not limited to this. The processor involved in each embodiment provided in this application may be a general-purpose processor, a central processing unit, a graphics processor, a digital signal processor, a programmable logic unit, a data processing logic unit based on quantum computing, an artificial intelligence (AI) processor, etc., but are not limited to this.

[0174] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this application.

[0175] The above-described embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the present application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the attached claims.

Claims

1. A display driving system, characterized in that: The display driving system comprises a main control terminal and N driving controllers, N≥2; the main control terminal is provided with a data output terminal and at least N clock output terminals; the driving controller is provided with a data receiving terminal and a clock receiving terminal, wherein: The N data receiving ends of the drive controllers are connected in parallel to the data output end of the main control end to form a data transmission channel; the N clock receiving ends of the drive controllers are respectively connected to the N clock output ends of the main control end to form N independent clock channels; The master control end is used to send information configuration instructions to the N drive controllers via the data transmission channel to control the N drive controllers to enter the information configuration state; it is also used to send information configuration data to the N drive controllers via the data transmission channel when the N drive controllers are all in the information configuration state, and send corresponding independent clock signals to the N drive controllers via the N independent clock channels; the effective time period corresponding to the effective state of the independent clock signal is set corresponding to the sending time period corresponding to the target configuration information corresponding to the drive controller in the information configuration data; The drive controller is used to receive information configuration data and an independent clock signal when in an information configuration state; determine the state of the independent clock signal; if the independent clock signal is in a valid state, obtain the corresponding target data information from the information configuration data; perform information configuration according to the target data information; the target data information includes a preset data packet or a target code; the preset data packet carries a target information code corresponding to the target configuration information corresponding to the drive controller; the target information code is a binary code group corresponding to the target configuration information; the target code is each binary code in the target configuration information corresponding to the drive controller.

2. An information configuration method, characterized in that: The driving controller applied to the display driving system of claim 1, wherein the method comprises: In the case of being in the information configuration state, receiving information configuration data and an independent clock signal; the information configuration data is generated by the main control end according to the configuration parameters or data required by the drive controller; the independent clock signal is set by the main control end according to the target configuration information corresponding to the drive controller; determining a state of the independent clock signal; If the independent clock signal is in a valid state, obtaining corresponding target data information from the information configuration data; Information configuration is performed according to the target data information; the target data information includes a preset data packet or a target code; the preset data packet carries a target information code corresponding to the target configuration information corresponding to the drive controller; the target information code is a binary code group corresponding to the target configuration information; the target code is each binary code in the target configuration information corresponding to the drive controller.

3. The method according to claim 2, characterized in that The determining the state of the independent clock signal comprises: If the independent clock signal is in a level-valid phase or a clock-edge-valid phase, determining that the independent clock signal is in a valid state; If the independent clock signal is in a level invalid stage or a clock edge invalid stage, it is determined that the independent clock signal is in an invalid state.

4. The method according to claim 2, characterized in that: The determining the state of the independent clock signal comprises: If the independent clock signal is in a continuous level valid stage or a continuous clock edge valid stage, determining that the independent clock signal is in a valid state; If the independent clock signal is in a continuous level invalid phase or a continuous clock edge invalid phase, it is determined that the independent clock signal is in an invalid state.

5. The method according to claim 2, characterized in that: The information configuration data includes a plurality of standard coding groups; the standard coding group includes a plurality of sub-codings; if the independent clock signal is in a valid state, obtaining corresponding target data information from the information configuration data, including: For each standard coding group in the plurality of standard coding groups, if the valid time period corresponding to when the independent clock signal is in a valid state matches the receiving time period corresponding to any one of the sub-codes in the standard coding group, the corresponding sub-code is used as the target code; According to a plurality of target codes, target data information is determined.

6. The method according to claim 2, characterized in that The information configuration data includes a plurality of preset data packets, and the preset data packets carry target information encoding; if the independent clock signal is in a valid state, obtaining corresponding target data information from the information configuration data includes: If the valid time period corresponding to when the independent clock signal is in a valid state matches the receiving time period corresponding to any one of the preset data packets, the target information carried in the corresponding preset data packet is encoded as the target data information.

7. An information configuration method, characterized in that: Applied to the main control terminal of the display driving system of claim 1, the method comprises: Sending information configuration instructions to N drive controllers to control the N drive controllers to enter an information configuration state; When the N drive controllers are all in the information configuration state, sending information configuration data to the N drive controllers, and sending corresponding independent clock signals to the N drive controllers respectively; The information configuration data is generated by the main control end according to the configuration parameters or data required by the drive controller; the independent clock signal is set by the main control end according to the target configuration information corresponding to the drive controller; The independent clock signal is used to control the drive controller to obtain corresponding target data information from the information configuration data when the independent clock signal is in a valid state, and perform information configuration according to the target data information.

8. The method according to claim 7, characterized in that Before sending the information configuration data to the N drive controllers, the method further includes: Obtain target configuration information corresponding to N of the drive controllers; Determine the number of encoding bits corresponding to the target configuration information; According to the number of coding bits, a corresponding plurality of standard coding groups are generated; the standard coding groups include a plurality of sub-codings; A plurality of the standard encoding groups are loaded into the information configuration data.

9. The method according to claim 7, characterized in that: Before sending the information configuration data to the N drive controllers, the method further includes: Obtain target configuration information corresponding to N of the drive controllers; Generate corresponding N preset data packets according to the N target configuration information; The N preset data packets are sequentially loaded into the information configuration data in a preset order.

10. The method according to claim 8, characterized in that Before sending the corresponding independent clock signals to the N driving controllers respectively, the method further includes: For each of the N drive controllers, According to the target configuration information corresponding to the drive controller and the sending time period corresponding to each of the standard coding groups, the independent clock signal corresponding to the drive controller is generated by setting the corresponding level valid phase or clock edge valid phase.

11. The method according to claim 9, characterized in that Before sending the corresponding independent clock signals to the N driving controllers respectively, the method further includes: For each of the N drive controllers, According to the sending time period of the preset data packet corresponding to the driving controller, the independent clock signal of the driving controller is generated by setting the corresponding continuous level valid phase or continuous clock edge valid phase.

12. An information configuration method, characterized in that: Applied to the display driving system of claim 1, the method comprising: The main control end sends information configuration instructions to the N drive controllers via the data transmission channel to control the N drive controllers to enter the information configuration state; N of the drive controllers enter an information configuration state according to the information configuration instruction; When the N drive controllers are all in the information configuration state, the master control end sends information configuration data to the N drive controllers via the data transmission channel, and sends corresponding independent clock signals to the N drive controllers via N independent clock channels; the effective time period corresponding to the effective state of the independent clock signal is set corresponding to the sending time period corresponding to the target configuration information corresponding to the drive controller in the information configuration data; Each of the drive controllers receives information configuration data and an independent clock signal when it is in an information configuration state; determines the state of the independent clock signal; if the independent clock signal is in a valid state, obtains the corresponding target data information from the information configuration data; performs information configuration according to the target data information; the target data information includes a preset data packet or a target code; the preset data packet carries a target information code corresponding to the target configuration information corresponding to the drive controller; the target information code is a binary code group corresponding to the target configuration information; the target code is each binary code in the target configuration information corresponding to the drive controller.

13. A computer device comprising a memory and a processor, wherein the memory stores a computer program, wherein: When the processor executes the computer program, the steps of the method according to any one of claims 2 to 12 are implemented.

14. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the method according to any one of claims 2 to 12 are implemented.

15. A computer program product comprising a computer program, characterized in that When the computer program is executed by a processor, the steps of the method according to any one of claims 2 to 12 are implemented.

Images