Image display method and electronic device

Abstract

The present application provides an image display method and an electronic device, relating to the field of display technologies. When the duration of displaying an image on the display screen of the electronic device exceeds the time limit, resulting in a delay in the image displayed on the display screen, the frequency of the Vsync signal output by the display screen is increased. After receiving the display data of the next frame of the image, the image display driver writes the display data of the next frame of the image to the display screen in response to the Vsync signal with an increased frequency fed back by the display screen, thereby driving the display screen to instantaneously display the next frame of the image, which can reduce the degree of delay that occurs during the process of the display screen displaying an image and make it difficult for users to perceive the delay in the display screen of the device.

Description

[0001] This application is a divisional application. The application number of the original application is 202480001796.4, and the original application date is January 9, 2024. The entire content of the original application is incorporated herein by reference. Technical Field

[0002] Embodiments of this application relate to the field of display technologies, and in particular, to an image display method and an electronic device. Background Art

[0003] Vertical synchronization (Vsync) technology synchronizes the frame rate of a graphics processing unit (GPU) with the refresh rate of a display screen, thereby avoiding the phenomenon of display screen tearing caused by the display screen starting to refresh and display the next frame of image before the refresh and display of the previous frame of image are completed when the GPU frame rate is different from the refresh rate of the display screen.

[0004] However, in the actual application of Vsync technology in an electronic device, based on the specifications of the display driver integrated circuit (DDIC) used in the electronic device and the vertical synchronization response mechanism of the Vsync technology, once the upper layer of the system of the electronic device times out during image processing, the DDIC will miss the Vsync signal and thus be unable to send an image to the display screen (that is, unable to write the display data of the image to the display screen). In this way, the display screen will perform timeout display of the currently displayed image for at least two consecutive refresh cycles. At this time, the user of the electronic device will obviously feel that there is a delay in the display screen of the device.

[0005] Currently, some means of improving the software control logic of the upper layer of the system still cannot avoid the DDIC missing the Vsync signal, and thus it is difficult to effectively solve the problem that the display screen displays the first image for a long time, making the user feel that there is a delay in the display screen of the device. Summary of the Invention

[0006] Embodiments of this application provide an image display method and an electronic device, which are used to reduce the duration of timeout display of an image by the display screen, so that the user is less likely to perceive a delay in the display screen of the device.

[0007] To achieve the above object, the embodiments of the present application adopt the following technical solutions: When there is a timeout in the display of an image on the display screen of an electronic device, the image display driver of the electronic device immediately increases the frequency of the output Vsync signal, and then sends the image display (write the display data of the image to the display screen) by responding to the Vsync signal with an increased frequency. That is, when the display screen times out to display an image, the present application enables the image display driver to respond to the Vsync signal with an increased frequency to send the image display, which can effectively reduce the duration of the timeout display of the image on the display screen, so that the user is less likely to notice the delay in the display screen of the device.

[0008] In a first aspect, the present application provides an image display method, which is applied to an electronic device. At a first moment, the electronic device generates a first vertical synchronization Vsync signal, and in response to the first Vsync signal, the display screen of the electronic device starts to display a first image. At a second moment after the first moment, the electronic device generates a second Vsync signal, and in response to the second Vsync signal, the display screen starts to display a second image. At a third moment, in response to the second display duration of the second image displayed on the display screen being greater than the first display duration of the first image displayed on the display screen, the electronic device generates a third Vsync signal.

[0009] In the present application, the first Vsync signal generated by the electronic device at the first moment corresponds to a first Vsync period, and the first Vsync period corresponds to the first display duration of the first image. The second Vsync signal generated by the electronic device at the second moment corresponds to a second Vsync period, and the second Vsync period is equal to the first Vsync period. The third Vsync signal generated by the electronic device at the third moment corresponds to a third Vsync period, and the third Vsync period is less than the first Vsync period. It can be understood that the third Vsync signal is the above-mentioned Vsync signal with an increased frequency.

[0010] In the present application, by increasing the frequency of the output Vsync signal when the display of the second image on the display screen of the electronic device times out, the image display driver of the electronic device can respond to the Vsync signal with an increased frequency fed back by the display screen, and write the display data of the next frame of the second image to the display screen within a short time when the display screen times out to display the second image, so as to drive the display screen to immediately display the next frame of the image. In this way, the image immediate display performance of the electronic device during the image display process can be effectively improved. Compared with the traditional solution, the image display driver of the electronic device responds to the Vsync signal with an increased frequency to send the next frame of the second image, which can effectively reduce the duration of the timeout display of the second image on the display screen, so that the user is less likely to notice the delay in the display screen of the device.

[0011] In a possible implementation of the first aspect, the second image is the next frame image of the first image.

[0012] In a possible implementation of the first aspect, the second display duration is less than twice the first display duration.

[0013] In this application, when the second display duration of the second image on the display screen is greater than the first display duration, but the second duration is less than twice the first display duration, the frequency of the output Vsync signal is increased, so that when the second display duration is less than twice the first display duration, the image display driver drives the display screen to start displaying the next frame image of the second image, so that the display screen does not display the second image for a long time in two consecutive first Vsync cycles, and thus the phenomenon of device display screen delay similar to the traditional solution will not occur.

[0014] In a possible implementation of the first aspect, in response to the third Vsync signal, the display screen displays a third image that is the next frame of the second image.

[0015] In this application, when the image display driver of the electronic device receives the display data of the third image that is the next frame of the second image, in response to the third Vsync signal triggered by the display screen at the third moment, it writes the third image display data to the display screen, so as to drive the display screen to refresh and display the third frame image after a short-time timeout display of the second image. In this way, the display screen does not need to refresh and display the third image after at least two consecutive Vsync cycles of timeout display of the second image, thereby effectively reducing the timeout display duration of the display screen for the second image, and making it difficult for the user to perceive that there is a delay in the device display screen.

[0016] In a possible implementation of the first aspect, the third display duration of the display screen for displaying the third image is less than the first display duration corresponding to the first Vsync cycle.

[0017] In a possible implementation of the first aspect, the third display duration of the display screen for displaying the third image is the same as the first display duration corresponding to the first Vsync cycle.

[0018] In this application, by making the display duration of the display screen for displaying the third image the same as the first display duration corresponding to the above first Vsync cycle, the stability of displaying each frame of image during the image refresh display process of the display screen can be ensured.

[0019] In a possible implementation of the first aspect, the electronic device generates a fourth Vsync signal at a fourth moment after the second moment and before the third moment.

[0020] In a possible implementation of the first aspect, in response to the fourth Vsync signal, the display screen continues to display the second image with an extended timeout.

[0021] In a possible implementation of the first aspect, when the display screen generates the first Vsync signal at a frequency of 120 Hz at the first moment, the first Vsync period corresponding to the first Vsync signal is approximately 8.3 (1 / 120 ≈ 8.3) ms. Subsequently, when the frequency of the Vsync signal output by the display screen is increased to 360 Hz, the third Vsync period corresponding to the third Vsync signal output by the display screen at the third moment is approximately 2.8 (1 / 360 ≈ 2.8) ms.

[0022] In a possible implementation of the first aspect, when the first Vsync period is approximately 8.3 ms and the third Vsync period is approximately 2.8 ms, the first display duration corresponding to the first Vsync period is approximately 8.3 ms, while the second display duration for the display screen to display the second image is approximately 8.3 ms + 2.8 ms = 11.1 ms.

[0023] In a possible implementation of the first aspect, at the fifth moment after the third moment, the electronic device generates the fifth Vsync signal. Herein, the fifth Vsync signal corresponds to the fifth Vsync period, and the fifth Vsync period is equal to the first Vsync period.

[0024] In a possible implementation of the first aspect, the display duration of the fourth image is greater than the preset interval duration; the fourth image is the image displayed in the previous frame at the fifth moment, and the preset interval duration is the interval duration between the fifth moment and the sixth moment minus the time consumed to reduce the output frequency of the Vsync signal, and the sixth moment is the moment when the fourth image is written to the display screen.

[0025] In this application, after the display screen starts to display the third image, in response to the display duration of the fourth image being greater than the time interval between the fifth moment and the sixth moment minus the time consumed to reduce the frequency of the output Vsync signal, the electronic device reduces the frequency of the output Vsync signal. Then, at the fifth moment after the third moment, the electronic device generates a fifth Vsync signal whose Vsync period is equal to the first Vsync period. Herein, the fourth image is the third image itself or a frame of image after the third image. The sixth moment is the moment when the fourth image is written into the display screen. That is, when the fourth image is the third image itself, the sixth moment is the third moment when the display screen starts to display the third image in response to the third Vsync signal (at this time, the third image is written into the display screen by the display screen starting to display), and when the fourth image is a frame of image after the third image, the sixth moment is the moment when the display screen starts to display a frame of image after the third image (at this time, a frame of image after the third image is written into the display screen by the display screen starting to display). The time interval between the fifth moment and the sixth moment is the first display duration corresponding to the above first Vsync period.

[0026] Exemplarily, as Figure 20 shown, taking the fourth image as the third image itself and the sixth moment as the third moment itself as an example, after the display screen starts to display the third image (image 2) at the third moment (t5), the electronic device calculates the third display duration of image 2 in real time. When the third display duration is greater than the time interval of 8.3 ms between the fifth moment (t6) and t5 minus the time consumed to reduce the frequency of the output Vsync signal (the time consumed is the duration between the moment shown by the vertical dotted line on the right side of the figure and t6), the electronic device reduces the frequency of the output Vsync signal at the moment shown by the vertical dotted line on the right side of the figure. Thus, at the t6 moment, the electronic device generates a fifth Vsync signal (Vsync signal 6) whose fifth Vsync period is 8.3 ms (equal to the first Vsync period).

[0027] In this application, by reducing the frequency of the output Vsync signal, it is possible to avoid the waste of device power consumption caused by the display screen outputting the Vsync signal (the third Vsync signal) with an increased frequency for a long time, thereby achieving the purpose of saving device power consumption.

[0028] In a possible implementation manner of the first aspect, the fifth moment is N 8.3 ms away from the third moment, where N is a positive integer greater than or equal to 1.

[0029] In a possible implementation of the first aspect, after the display screen of the electronic device displays the third image, the image display driver of the electronic device determines whether the display data of the next frame of the third image has been received within the third display duration when the display screen displays the third image. Moreover, when the determination result is yes, the image display driver reduces the frequency of the Vsync signal output by the display screen.

[0030] In this application, after determining that the display of the third image on the display screen tends to be stable, the frequency of the output Vsync signal is reduced. In this way, it is possible to avoid waste of device power consumption caused by the display screen outputting the Vsync signal with an increased frequency for a long time, thereby achieving the purpose of saving device power consumption.

[0031] In another possible implementation of the first aspect, after the display screen of the electronic device displays the third image, the electronic device can also detect whether the display data of the Nth frame of the image after the third image has been received within the display duration of the (N - 1)th frame of the image after the display screen displays the third image. Herein, N is a positive integer greater than 1.

[0032] In this way, when it is detected that the display data of the Nth frame of the image after the third image has been received within the display duration of the (N - 1)th frame of the image after the display screen displays the third image, the image display driver reduces the frequency of the Vsync signal output by the display screen.

[0033] In this application, after determining that the display of the (N - 1)th frame of the image after the third image on the display screen tends to be stable, the frequency of the output Vsync signal is reduced. This can also avoid waste of device power consumption caused by the display screen still outputting the Vsync signal with an increased frequency after the display of the image tends to be stable.

[0034] Moreover, by reducing the frequency of the output Vsync signal after the display of the (N - 1)th frame of the image after the third image on the display screen tends to be stable, it is also possible to avoid the phenomenon of frequently increasing and decreasing the frequency of the output Vsync signal, thereby further saving the power consumption required for the device to frequently adjust the frequency of the output Vsync signal.

[0035] In another possible implementation of the first aspect, the electronic device further includes an image display driver. In response to the display screen displaying the second image, the image display driver calculates a second display duration for the display screen to display the second image. And, the image display driver compares the magnitude of the second display duration with the above-mentioned first display duration. In the case where the second display duration is greater than the first display duration, the image display driver, in response to the second display duration being greater than the first display duration, sends a control instruction to the display screen. The display screen, in response to the control instruction, increases the frequency of the output Vsync signal and generates a third Vsync signal with an increased frequency at a third moment after the second moment.

[0036] Exemplarily, by configuring a delay detection module in the image display driver of the electronic device and detecting whether the second display duration is greater than the first display duration through the delay detection module, to increase the frequency of the output Vsync signal when the delay detection module detects that the second display duration is greater than the first display duration. Thus, since the image display driver is located in the kernel layer of the entire system of the electronic device, therefore, whether it is caused by the upper layer of the system (such as the application layer, the application framework layer, or the hardware abstraction layer) that the second display duration is greater than the first display duration, or whether it is caused by the kernel layer itself that the second display duration is greater than the first display duration, it can be detected by the newly added delay detection module in the kernel layer. That is, the comprehensiveness and accuracy of detecting whether the second display duration is greater than the first display duration are improved.

[0037] In another possible implementation of the first aspect, when the image display driver of the electronic device detects whether the second display duration is greater than the first display duration through the delay detection module, the electronic device can first detect whether the image display driver responds to the second Vsync signal. Then, when it is detected that the image display driver responds to the second Vsync signal, thereby determining that the electronic device is displaying the second image and is not in a state where the display screen delays the display of the first image, the image display driver then detects through the delay detection module whether the second display duration for the display screen to display the second image is greater than the first display duration.

[0038] In this application, by first detecting whether the image display driver responds to the second Vsync signal before the delay detection module detects whether the second display duration is greater than the first display duration, to determine that the electronic device is currently displaying the second image and is not in a state where the display screen delays the display of the first image when it is detected that the image display driver responds to the second Vsync signal, and then detecting whether the second display duration is greater than the first display duration through the delay detection module. In this way, it can be ensured that the frequency of the output Vsync signal is increased only when the electronic device enters the state of delayed display of the image (the display screen displays the image for an overtime) from the state of non-delayed display of the image, so as to achieve a fixed-point reduction in the degree of delay in the display screen of the device caused by long-term display of the image.

[0039] In another possible implementation of the first aspect, when the image display driver of the electronic device increases the frequency of the output Vsync signal, it can control the display screen to increase the frequency of the output Vsync signal to M times the original frequency. Here, M is a positive integer greater than 1; the original frequency is the frequency at which the display screen feeds back the Vsync signal to the image display driver and other software and hardware modules in the upper layer of the electronic device system when displaying images at the current refresh rate. For example, when the display screen supports a base frequency of 360Hz, the original frequency can be 60Hz, 90Hz, or 120Hz.

[0040] In another possible implementation of the first aspect, when the image display driver of the electronic device controls the display screen to increase the frequency of the output Vsync signal to M times the original frequency, the image display driver can receive the display data of the third image sent by the upper layer of the system before the display screen outputs the i-th Vsync signal after the frequency increase. Here, i is a positive integer and i is less than M. Based on this, in response to the i-th Vsync signal after the frequency increase, the image display driver writes the display data of the third image to the display screen to drive the display screen to display the third image.

[0041] In this application, the image display driver of the electronic device receives the display data of the third image before the display screen outputs the i-th Vsync signal after the frequency increase, and then in response to the i-th Vsync signal after the frequency increase, writes the display data of the third image to the display screen to drive the display screen to display the third image. In this way, it can be ensured that the image display driver of the electronic device responds to the Vsync signal after the frequency increase triggered by the display screen within a short time when the display screen times out and displays the second image, and sends the third image of the next frame of the second image for display, rather than, like the traditional solution, displaying the second image in at least two consecutive Vsync cycles, resulting in a long-time timeout display of the second image and then sending the third image for display in response to the Vsync signal triggered by the display screen at the original frequency. That is, it ensures the stability of reducing the timeout display duration of the second image on the display screen.

[0042] In another possible implementation of the first aspect, after the image display driver of the electronic device starts writing the display data of the third image to the display screen to drive the display screen to start displaying the third image, in order to prevent the image display driver from directly responding to the newly increased-frequency Vsync signal and prematurely sending the next frame image of the third image for display, resulting in the display screen displaying the third image in a short time. The image display driver also stops responding to any Vsync signal with an increased frequency triggered by the display screen during the third display duration of the display screen displaying the third image, thereby rejecting writing the display data of the next frame image of the third image to the display screen during the third display duration.

[0043] After that, when the third display duration is greater than the difference between the first display duration and the third Vsync period, the image display driver resumes responding to the Vsync signal with an increased frequency triggered by the display screen, so that after ensuring that the third display duration reaches the first display duration, it responds to the Vsync signal with an increased frequency and writes the display data of the next frame of the third image to the display screen.

[0044] In this application, by not responding to the Vsync signal with an increased frequency within the third display duration, it is possible to avoid the phenomenon that the image display driver sends the next frame of the third image to the display in advance during the display of the third image on the display screen, resulting in the display screen only briefly displaying the third image. Thus, the stability of the electronic device in displaying the third image and subsequent images is further improved.

[0045] In a second aspect, this application provides an electronic device, which has the function of implementing the method described in the first aspect above. This function can be implemented by hardware or by hardware executing corresponding software. The hardware or software includes one or more modules corresponding to the above functions.

[0046] In a third aspect, this application provides an electronic device, including: a processor and a memory; the memory is used to store computer program code, and the computer program code includes computer execution instructions. When the electronic device runs, the processor executes the computer execution instructions so that the electronic device executes the method described in the first aspect above.

[0047] In a fourth aspect, this application provides an electronic device, including: a processor; the processor is used to be coupled with the memory and, after reading the instructions in the memory, execute the method described in the first aspect above according to the instructions.

[0048] In a fifth aspect, this application provides a computer-readable storage medium, in which computer instructions are stored. When it runs on an electronic device, it enables the electronic device to execute the method described in the first aspect above.

[0049] In a sixth aspect, this application provides a computer program product containing instructions. When it runs on a computer, it enables the computer to execute the method described in the first aspect above.

[0050] In a seventh aspect, a device (for example, the device can be a display system) is provided. The device includes a processor for supporting the electronic device to implement the functions involved in the first aspect above. In a possible design, the device further includes a memory for storing the necessary program instructions and data of the electronic device.

[0051] Among them, for the technical effects brought by any one of the design methods in the second aspect to the seventh aspect, reference can be made to the technical effects brought by different implementation methods in the first aspect, which will not be elaborated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0052] Figure 1 FIG. is a schematic diagram of the hardware structure of an electronic device provided by an embodiment of the present application;

[0053] Figure 2 FIG. is a schematic diagram of the system architecture of an electronic device in the conventional technology;

[0054] Figure 3 FIG. is a schematic diagram of the principle of layer drawing, rendering, composition, and image frame display of an electronic device in the conventional technology;

[0055] Figure 4 FIG. is a schematic diagram of the principle of layer drawing, rendering, composition, and image frame display of another electronic device in the conventional technology;

[0056] Figure 5 FIG. is a schematic diagram of the system architecture of an electronic device in an embodiment of the present application;

[0057] Figure 6 FIG. is a schematic diagram of the principle of layer drawing, rendering, composition, and image frame display of an electronic device in an embodiment of the present application;

[0058] Figure 7 FIG. is a schematic diagram of the principle of layer drawing, rendering, composition, and image frame display of another electronic device in an embodiment of the present application;

[0059] Figure 8 FIG. is a flowchart of an image display method provided by an embodiment of the present application Figure 1 ;

[0060] Figure 9 FIG. is a waveform diagram of the Vsync signal output by the display screen using the 120Hz-TE standard frequency synchronization scheme in an embodiment of the present application;

[0061] Figure 10 FIG. is a waveform diagram of the Vsync signal output by the display screen using the 360Hz-TE high-frequency synchronization scheme in an embodiment of the present application;

[0062] Figure 11 FIG. is a schematic diagram of the duration of the display screen displaying an image in a case involved in an embodiment of the present application;

[0063] Figure 12 FIG. is a schematic diagram of the duration of the display screen displaying an image in another case involved in an embodiment of the present application;

[0064] Figure 13Schematic diagram of the principle for an electronic device to display an image in response to a Vsync signal after the response frequency is increased in a case related to an embodiment of the present application;

[0065] Figure 14 Schematic diagram of the principle for an electronic device to display an image in response to a Vsync signal after the response frequency is increased in another case related to an embodiment of the present application;

[0066] Figure 15 Schematic diagram of the principle for an electronic device to display an image in response to a Vsync signal after the response frequency is increased in yet another case related to an embodiment of the present application;

[0067] Figure 16 Schematic diagram of the system architecture and data signal flow direction of an electronic device related to an embodiment of the present application;

[0068] Figure 17 Schematic diagram of the control logic for an electronic device to display an image related to an embodiment of the present application;

[0069] Figure 18 Flow schematic of an image display method provided by an embodiment of the present application Figure 2 ;

[0070] Figure 19 Schematic diagram of the principle for an electronic device to extend the image display duration related to an embodiment of the present application;

[0071] Figure 20 Schematic diagram of the principle for an electronic device to reduce the frequency of the output Vsync signal in a case related to an embodiment of the present application;

[0072] Figure 21 Schematic diagram of the principle for an electronic device to reduce the frequency of the output Vsync signal in another case related to an embodiment of the present application. Detailed implementation manners

[0073] An embodiment of the present application provides an image display method. This method can be applied to an electronic device including a display screen. When the image display on the display screen times out, the frequency of the vertical synchronization signal output by the display screen is increased so that the image display driver of the electronic device displays the image in response to the vertical synchronization signal with a higher frequency. In this way, the duration of the display screen for displaying the image overtime can be effectively reduced, so that the user is not easily aware of the delay in the display screen of the device.

[0074] It should be noted that the above-mentioned electronic device can be a mobile phone, a tablet computer, a desktop / laptop / handheld computer, a notebook computer, an ultra-mobile personal computer (UMPC), a netbook, and a personal digital assistant (PDA), an augmented reality (AR) / virtual reality (VR) device, etc., which are electronic devices with a display screen. The embodiments of the present application do not impose special restrictions on the specific form of the electronic device.

[0075] The following will describe in detail the implementation manners of the embodiments of the present application with reference to the accompanying drawings.

[0076] Please refer to Figure 1 , Figure 1 which is a schematic structural diagram of an electronic device 100 provided by an embodiment of the present application. As Figure 1 shown, the electronic device 100 may include a processor 110, an external memory interface 120, an internal memory 121, a universal serial bus (USB) interface 130, a charging management module 111, a power management module 112, a battery 113, an antenna 1, an antenna 2, a mobile communication module 140, a wireless communication module 150, an audio module 170, a speaker 170A, a receiver 170B, a microphone 170C, a headphone jack 170D, a sensor module 180, a button 190, a motor 191, an indicator 192, a camera 193, a display screen 194, and a subscriber identification module (SIM) card interface 195, etc.

[0077] It can be understood that the structure schematically shown in the embodiments of the present invention does not constitute a specific limitation on the electronic device 100. In other embodiments of the present application, the electronic device 100 may include more or fewer components than those shown in the figure, or combine certain components, or split certain components, or have different component arrangements. The components shown in the figure may be implemented in hardware, software, or a combination of software and hardware.

[0078] The processor 110 may include one or more processing units. For example, the processor 110 may include an application processor (AP), a modem processor, a graphics processing unit (GPU), an image signal processor (ISP), a controller, a memory, a video codec, a digital signal processor (DSP), a baseband processor, and / or a neural-network processing unit (NPU), etc. Among them, different processing units may be independent devices or integrated in one or more processors. Among them, the controller may be the nerve center and command center of the electronic device 100. The controller may generate operation control signals according to the instruction operation code and timing signal to complete the control of fetching and executing instructions.

[0079] A memory may also be provided in the processor 110 for storing instructions and data. In some embodiments, the memory in the processor 110 is a cache memory. This memory may save the instructions or data that the processor 110 has just used or recycled. If the processor 110 needs to use the instruction or data again, it can be directly called from the memory. This avoids repeated accesses, reduces the waiting time of the processor 110, and thus improves the efficiency of the system.

[0080] In some embodiments, the processor 110 may include one or more interfaces. The interfaces may include an inter-integrated circuit (I2C) interface, an inter-integrated circuit sound (I2S) interface, a pulse code modulation (PCM) interface, a universal asynchronous receiver / transmitter (UART) interface, a mobile industry processor interface (MIPI), a general-purpose input / output (GPIO) interface, a subscriber identity module (SIM) interface, and / or a universal serial bus (USB) interface, etc.

[0081] It can be understood that the interface connection relationships among the modules illustrated in the embodiments of the present invention are only illustrative descriptions and do not constitute a structural limitation on the electronic device 100. In other embodiments of the present application, the electronic device 100 may also adopt different interface connection methods in the above embodiments, or a combination of multiple interface connection methods.

[0082] The charging management module 111 is used to receive a charging input from a charger. While charging the battery 113, the charging management module 111 can also supply power to the electronic device through the power management module 112. The wireless communication function of the electronic device 100 can be implemented through antenna 1, antenna 2, the mobile communication module 140, the wireless communication module 150, the modulation and demodulation processor, and the baseband processor, etc.

[0083] Antenna 1 and antenna 2 are used to transmit and receive electromagnetic wave signals. Each antenna in the electronic device 100 can be used to cover a single or multiple communication frequency bands. Different antennas can also be multiplexed to improve the utilization rate of the antennas. For example: Antenna 1 can be multiplexed as a diversity antenna for a wireless local area network. In some other embodiments, the antenna can be used in combination with a tuning switch.

[0084] The mobile communication module 140 can provide solutions for wireless communications including 2G / 3G / 4G / 5G / 6G, etc. applied to the electronic device 100. The modulation and demodulation processor can include a modulator and a demodulator. The wireless communication module 150 can provide solutions for wireless communications including wireless local area networks (WLAN) (such as wireless fidelity (Wi-Fi) networks), Bluetooth (BT), global navigation satellite system (GNSS), frequency modulation (FM), near field communication (NFC), infrared technology (IR), etc. applied to the electronic device 100.

[0085] The electronic device 100 realizes the display function through the GPU, the display screen 194, and the application processor, etc. The GPU is a microprocessor for image processing, connected to the display screen 194 and the application processor. The GPU is used to perform mathematical and geometric calculations for graphics rendering. The processor 110 may include one or more GPUs, which execute program instructions to generate or change display information.

[0086] The display screen (or simply screen) 194 is used to display images, videos, etc. The display screen 194 includes a display panel. The display panel may include, but is not limited to, a liquid crystal display (LCD), an organic light-emitting diode (OLED), an active-matrix organic light-emitting diode (AMOLED), a flexible light-emitting diode (FLED), a mini organic light-emitting diode (MINILED), a micro organic light-emitting diode (MicroLed), a quantum dot light-emitting diode (QLED), etc. In some embodiments, the electronic device 100 may include one or N display screens 194, where N is a positive integer greater than 1.

[0087] The electronic device 100 can implement the shooting function through the ISP, the camera 193, the video codec, the GPU, the display screen 194, the application processor, etc.

[0088] The external memory interface 120 can be used to connect an external memory card, such as a Micro SD card, to expand the storage capacity of the electronic device 200.

[0089] The internal memory 121 can be used to store computer-executable program code, and the executable program code includes instructions.

[0090] The processor 110 executes various functional applications and data processing of the electronic device 100 by running the instructions stored in the internal memory 121. The internal memory 121 may include a program storage area and a data storage area. Among them, the program storage area can store the operating system, application programs required for at least one function (such as the sound playback function, the image playback function, etc.). The data storage area can store the data created during the use of the electronic device 100 (such as audio data, phone book, etc.). In addition, the internal memory 121 may include high-speed random access memory, and may also include non-volatile memory, such as at least one disk storage device, a flash memory device, a universal flash storage (UFS), etc.

[0091] The electronic device 100 can implement audio functions through the audio module 170, the speaker 170A, the receiver 170B, the microphone 170C, the headphone jack 170D, and the application processor, etc. For example, music playback, recording, etc.

[0092] The keys 190 include a power-on key, volume keys, etc. The indicator 192 can be an indicator light.

[0093] The sensor module 180 can include a folding angle detection sensor, a pressure sensor, a gyroscope sensor, a barometric pressure sensor,

[0094] a magnetic sensor, an acceleration sensor, a distance sensor, a proximity light sensor, a fingerprint sensor, a temperature sensor, a touch sensor, an ambient light sensor, a bone conduction sensor, etc.

[0095] It should be noted that in the embodiments of the present application, the display screen of the electronic device applying the image display method provided in the embodiments of the present application belongs to the screen type that supports the refresh interruption of the source chip (Source IC). Among them, the Source IC refresh interruption is: when the Source IC of the display screen is in the non-refresh state, it can be interrupted by driving at any time (abbreviated as Source refresh interruption), and then re-enter the refresh state to start working. The work performed by the Source IC in the refresh state can be: refreshing the display data of the image to make the display screen start to display the image, or, in response to a frame switching instruction, switching the refresh rate of the display screen.

[0096] Exemplarily, the display screen of the electronic device can be a display screen that uses low temperature polysilicon oxide (LTPO) transistors, and thus supports Source refresh interruption based on the characteristic of low leakage power of LTPO. And the display screen of the electronic device usually cannot be a display screen that uses low temperature poly-silicon (LTPS) transistors. Because as the leakage power of the transistors increases, even if it can still support Source refresh interruption, the overall display effect of the display screen will be seriously affected. Thus, due to the characteristic of serious leakage of LTPS, the display screen using LTPS usually does not support the function of Source refresh interruption. Therefore, it can be understood that as long as the display screen of the electronic device uses transistors with the characteristic of low leakage power, it can support Source refresh interruption.

[0097] Based on different design requirements of actual applications, the transistor type that can be adopted for the display of an electronic device can of course be other types than LTPO. However, regardless of the specific type of transistor used in the display screen, nor whether the transistor has the characteristic of low leakage power to support Source refresh interruption, as long as the display screen of the electronic device belongs to the screen type that supports source refresh interruption, it should be included in the protection scope of the image display method provided in the embodiments of the present application.

[0098] In the embodiments of the present application, the base frequency supported by the display screen of the electronic device can be 60 Hertz (Hz), 70Hz, 75Hz, 80Hz, 90Hz, 120Hz, or 360Hz, etc. And the refresh rate (abbreviated as image refresh rate or display frame rate) used for image display by the display screen is less than or equal to the base frequency supported by the display screen. Moreover, the image refresh rate supported by the display screen is usually less than or equal to 120Hz. For example, the image refresh rate of the display screen can usually be configured as 60 Hertz (Hz), 70Hz, 75Hz, 80Hz, 90Hz, or 120Hz.

[0099] When the display screen supports an image refresh rate of 120Hz, the display screen can achieve increasing the image refresh rate from 60Hz, 70Hz, 75Hz, 80Hz, 90Hz to 120Hz, or decreasing it from 120Hz to 90Hz, 80Hz, 75Hz, 70Hz, or 60Hz. The image refresh rate of the electronic device in the embodiments of the present application is the image refresh rate currently used by the display screen of the electronic device. Therefore, in some feasible embodiments of the present application, the image refresh rate of the electronic device or the image refresh rate of the display screen of the electronic device can also be referred to as the current refresh rate.

[0100] It should be noted that in the embodiments of the present application, the Vsync signal is a periodic discrete signal involved in the process of the electronic device applying the Vsync technology. That is, there is a Vsync signal triggered by hardware drive every other Vsync period (which can also be called a refresh period or refresh duration, etc.).

[0101] It should be noted that in the embodiments of the present application, the Vsync signal is used to trigger the hardware to refresh the display image frame. The Vsync signal can be generated and fed back to the APP, modem processor, GPU, ISP, and controller, etc. by the display screen. Therefore, the Vsync signal can also be regarded as a type of tearing effect (TE) signal fed back from the display screen 194 to the processor 110.

[0102] In an embodiment of the present application, when the display screen supports a base frequency of 360 Hz, the display screen can adaptively switch the frequency of the output Vsync signal to 60 Hz, 90 Hz, 120 Hz, or 360 Hz based on the control of image display driving in the electronic device, so as to trigger and output Vsync signals with different Vsync periods at different times.

[0103] In different systems or architectures, the name of the Vsync signal may be different. For example, in some systems or architectures, the Vsync signal may specifically be VSYNC_APP, or it may be VSYNC_SF or VSYNC_HW. However, regardless of the name of the Vsync signal, as long as it is a synchronization signal with a similar function and conforms to the technical concept of the method provided in the embodiment of the present application, it should be covered within the protection scope of the present application. Moreover, in different systems or architectures, the definition of the Vsync signal may also be different. However, regardless of the definition of the Vsync signal, as long as it is a synchronization signal with a similar function and conforms to the technical concept of the method provided in the embodiment of the present application, it should also be covered within the protection scope of the present application.

[0104] It should be noted that the software system of the above-mentioned electronic device can adopt a layered architecture, an event-driven architecture, a microkernel architecture, a microservices architecture, or a cloud architecture. For the sake of easy understanding, in an embodiment of the present application, the Android system with a layered architecture is taken as an example to detail the image display method provided in the embodiment of the present application applied to the electronic device.

[0105] The following will be combined with Figure 2 , taking the example of an electronic device sending (or writing) an image to the display screen in response to the Vsync signal for display, to introduce the software and hardware processing flow of the electronic device in the Android system during this process.

[0106] As Figure 2As shown in the figure, the software and hardware architecture of the electronic device adopts a hierarchical design. Among them, the software layer includes the Application Layer (APP Layer), the Application Framework Layer (FWK Layer), the Hardware Abstraction Layer (HAL), and the Kernel Layer, and the hardware layer includes the display screen (panel). Among them, the Application Layer can include various application programs running in the electronic device, such as: Gallery, Browser, Theme Application, and Wallpaper Application, etc. The Application Framework Layer is mainly involved in services for graphics processing, such as: the image rendering service (surface flinger, SF) for rendering the to-be-displayed images given by the application, and the image composition service (GPU) for compositing multiple layers of the to-be-displayed images. The Kernel Layer mainly includes the image display driver, which is mainly used to send the to-be-displayed images processed and sent down by the upper layer of the system (other system levels above the Kernel Layer where the image display driver is located, such as the Application Layer, the Application Framework Layer, and the Hardware Abstraction Layer) to the display screen. The hardware layer mainly includes the display screen (panel) that refreshes and displays the to-be-displayed images based on the call of the image display driver.

[0107] In the system framework of the electronic device as Figure 2 shown in the figure, the drawing and display of images need to be cooperatively completed by each system level based on the Vsync signal output by the display screen. That is, when the application programs APP such as Gallery, Browser, Theme Application, or Wallpaper Application in the Application Layer receive the Vsync signal output by the display screen, they perform image drawing in response to the Vsync signal. Then, when the next Vsync signal output by the display screen arrives, the APP sends the drawn image to the Application Framework Layer in response to the Vsync signal, so that the SF and GPU in the Application Framework Layer respectively perform image rendering and layer composition processing on the drawn image to obtain the display data of the to-be-displayed image, and the display data of the to-be-displayed image is transmitted to the image display driver in the Kernel Layer through the Hardware Abstraction Layer. Furthermore, when the display screen outputs a new Vsync signal again, the image display driver responds to the new Vsync signal to call the display module serial interface (DSI) through the smart display engine (SDE), write the display data of the to-be-displayed image into the DDIC of the display screen, and the DDIC of the display screen can store the image data sent from the software side in the buffer, so as to control the display panel to complete the refresh display (display) of the image by scanning (or reading) the display data in the buffer.

[0108] In the processing flow of image display by the above-mentioned electronic device, since each system layer in the software layer of the electronic device coordinates based on the Vsync signal output by the display screen to achieve the final image display, the monitoring and response of each layer to the Vsync signal are crucial. However, in the actual application of the Vsync technology by the electronic device, based on the DDIC specification adopted by the electronic device and the vertical synchronization response mechanism of the Vsync technology, once the upper layer of the electronic device system times out during image processing, the image display driver will miss the Vsync signal and be unable to send the image to the display screen, and it needs to wait at least until the next Vsync signal is received before responding to send the image. In this way, the display screen will display the same frame of image for at least two consecutive refresh cycles with timeout. In this way, the user of the electronic device will clearly feel a delay in the displayed image of the device visually.

[0109] As Figure 3 shown, if the DDIC of the display screen of the electronic device supports an image refresh rate of 120Hz, when the DDIC outputs the vertical synchronization signal at a frequency of 120Hz, the Vsync period of the output vertical synchronization signal is about 8.3ms. Thus, the display duration for the display screen to display the image is also about 8.3ms. In this way, at time t1, the Vsync signal 1 output by the display screen arrives; the APP in the application layer of the electronic device responds to the Vsync signal 1 and starts to draw the image 1, and the SF in the application framework layer of the electronic device also responds to the Vsync signal 1, and renders the image 0 sent by the APP before through the rendering service render server (which can also be called the render thread), and after the SF completes the rendering of the image 0, it will further send the image 0 down to the GPU. Thus, after receiving the image 0, the GPU immediately starts to process the layer composition of the image 0. At this time, the display screen will also start to display the previous frame of the image -1 for 8.3ms until the time t2 arrives.

[0110] At time t2, the Vsync signal 2 output by the display screen arrives; the APP in the application layer of the electronic device responds to the Vsync step signal 2 and starts to draw Image 2. Similarly, the SF also responds to the Vsync signal 2 and renders the Image 1 sent by the APP at time t2. After the SF finishes rendering Image 1, it further sends Image 1 downward to the GPU. Then, after the GPU receives Image 1, it starts to perform the processing of layer composition on Image 1. At this time, since the GPU will synchronously send the display data of Image 1 to the image display driver in the system kernel layer of the electronic device after completing the composition of Image 1 (that is, the moment when the GPU completes the image composition also means that the image display driver receives the display data of the composed Image 1). Thus, after the GPU completes the composition of Image 0 and sends Image 0 to the image display driver before time t2, the image display driver writes the display data of Image 0 to the display screen in response to the Vsync signal 2 at time t2. As a result, the display screen refreshes and displays Image 0 from time t2 until time t3.

[0111] At time t3, the Vsync signal 3 output by the display screen arrives. However, if the electronic device is in a high-load scenario between time t2 and time t3, causing the APP in the application layer not to complete the drawing of Image 2 at this time, then neither the SF nor the GPU will perform any image processing actions until the next Vsync signal arrives because they do not receive Image 2 that should have been sent by the APP at time t3 at this time. At this time, since the GPU completed the composition of Image 1 and sent the display data of Image 1 to the image display driver before time t3, the image display driver writes the display data of Image 1 to the display screen in response to the Vsync signal 3 at time t3. The display screen starts to refresh and display Image 1 from time t3 until time t4.

[0112] At time t4, the Vsync signal 4 output by the display screen arrives. At this time, if the electronic device has no new image display requirements, the APP will not respond to the Vsync signal 4 to draw an image at this time. However, since the SF receives Image 2 that was drawn and sent by the APP before this at time t4, it will still respond to the Vsync signal 4 and start to render Image 2. After the SF finishes rendering Image 2, the GPU will further perform the processing of layer composition on the Image 2 sent by the SF and send the display data of the composed Image 2 to the image display driver. At this time, since the image display driver does not receive the display data of any image at time t4, it misses the Vsync signal 4 and does not write the display data of the image to the display screen. In this way, the display screen will continue to display Image 1 at time t4 until time t5.

[0113] At time t5, the Vsync signal 5 output by the display screen arrives, and the image display driver writes the display data of the image 2 received before this into the display screen in response to the Vsync signal 5. Thus, the display screen refreshes and displays the image 2 at time t5 until time t6. At time t6, since the APP has completed the original image display requirements of the electronic device before time t4, no new image drawing is performed, and the electronic device has not generated any new image display requirements from time t3 to time t6, the display screen will no longer continue to refresh the image after the display of image 2 ends at time t6. At this time, the display screen enters the sleep or off-screen state.

[0114] like Figure 4 As shown, the display screen of the electronic device still uses a refresh rate of 120Hz, outputs a Vsync signal with a Vsync period of 8.3ms, and also displays images with a display duration of 8.3ms. In this case, at time t4, the Vsync signal 4 output by the display screen arrives, but if the electronic device is in a high-load scenario between time t3 and time t4, resulting in the GPU not having completed the synthesis of image 2, the image display driver of the core layer of the electronic device will not receive the display data of the image 2 before time t4, and will miss the Vsync signal 4 without writing any image display data to the display screen, so that the display screen will continue to display the image 1 that was displayed at time t3 until time t5 at time t4.

[0115] In combination with the above, in some high-load scenarios, electronic devices may have an application layer APP drawing image timeout, an application framework layer SF rendering image timeout (not shown in the attached figure), or an application framework layer GPU synthesis image timeout, which causes the kernel layer image display driver to miss the Vsync signal to send the image to the display screen. Therefore, the display screen needs to display the image being displayed for two consecutive cycles (16.6ms), that is, the display screen shows that the current refresh rate drops directly from 120Hz to 60Hz. For users, the current refresh rate of the display screen drops directly from 120Hz to 60Hz, which will visually show that the display screen has a delay.

[0116] It should be noted that in the embodiments of the present application, the above-mentioned electronic device being in a high-load scenario may be a scenario where the available system resources allocated to the APP, SF, or GPU are reduced due to a relatively large number of simultaneously opened threads in the electronic device. It should be understood that in different systems or architectures, the definition of the high-load scenario that occurs in the electronic device may also be different. However, regardless of how the high-load scenario is defined, as long as this scenario affects the system's response to the vertical synchronization signal for image drawing, rendering, or composition, resulting in the display screen timing out in displaying the image, causing the user to feel a delay in the device's displayed image, it conforms to the technical concept of the method provided in the embodiments of the present application and should also be covered within the protection scope of the present application.

[0117] In view of the above situation, even though there are currently some means attempting to improve the above-mentioned user experience, these means are all through improving the software control logic of the upper layer of the electronic device system. For example, changing the algorithm processing logic for image drawing, rendering, or composition in the upper layer of the system to minimize the intermediate time consumption of image processing as much as possible. However, no matter how the software control logic of the upper layer of the system is adjusted, it is impossible to fundamentally avoid the phenomenon that the performance limitation of the hardware itself used by the electronic device causes the electronic device to time out in responding to the Vsync signal or directly miss the Vsync signal. That is to say, currently, only improving the software control logic of the upper layer of the electronic device system is difficult to effectively solve the problem that the display screen times out in displaying the image for a long time, causing the user to feel a delay in the device's displayed image.

[0118] In order to reduce the degree to which the display screen times out in displaying the image, causing the user to feel a delay in the device's displayed image, and achieve the purpose of effectively improving the user's poor visual experience of the device's displayed image, the present application proposes an image display method to reduce the duration of the display screen timing out in displaying the image, so that the user is less likely to notice a delay in the device's displayed image.

[0119] It should be noted that the method proposed in the embodiments of the present application can be considered as a separate improvement relative to the above-mentioned scheme of adjusting the software control logic of the upper layer of the electronic device system, or can also be considered as a further optimization and supplement to the scheme of adjusting the software control logic. That is, the image display method proposed in the embodiments of the present application has been improved separately at the software control level of the electronic device system. Moreover, the method proposed in the embodiments of the present application has also creatively been improved at the system hardware level. Thus, by combining the improvements at the two levels of the system software and hardware, the duration of the display screen timing out in displaying the image is further reduced, and to a great extent, the delay degree of the device's displayed image is weakened, making it difficult for the user to notice a delay in the device's displayed image.

[0120] In a feasible implementation manner of the embodiments of the present application, as Figure 5As shown in the figure, the method proposed in the embodiment of the present application can add a delay detection module in the system kernel layer of the electronic device to detect whether the duration of the display screen of the electronic device for displaying an image is greater than the image display duration corresponding to the current refresh rate adopted by the display screen during the process of the electronic device for image display. Based on this, when the delay detection module detects that the display of the image on the display screen times out, the image display driver of the electronic device immediately increases the frequency of the Vsync signal output by the display screen, so that by responding to the Vsync signal with the increased frequency, the display data of the next frame of the image is written into the display screen in a short time to drive the display screen to display the next frame of the image. That is, the method proposed in the embodiment of the present application can enable the display screen to quickly display the next frame of the image when there is a slight delay in the display of the image, rather than, as in the traditional solution, the display screen needs to display the image for at least two consecutive Vsync cycle corresponding image display durations before displaying the next frame of the image. In this way, the duration of the display screen for timeout display of the image can be effectively reduced, thereby greatly reducing the delay degree of the device display screen and making it difficult for the user to perceive the delay of the device display screen.

[0121] The method proposed in the embodiment of the present application configures the delay detection module in the image display driver of the kernel layer of the electronic device system. In this way, whether the timeout of the display of the image on the display screen is caused by the kernel layer where the delay detection module itself is located, or by the application layer, application framework layer or hardware abstraction layer of the system, it can be detected by the delay detection module. This also improves the comprehensiveness of detecting whether the display of the image on the display screen times out, and improves the accuracy of increasing the frequency of the Vsync signal to enable the image display driver to immediately send and display the next frame of the image.

[0122] Next, in combination with Figure 6 , a feasible specific implementation manner of the image display method provided in the embodiment of the present application will be described.

[0123] As Figure 6As shown, during the process of the display screen (supporting a base frequency of 360Hz) of an electronic device refreshing and displaying images at the current refresh rate of 120Hz, if at time t3, the APP in the system application layer for drawing images takes longer than the Vsync period of 8.3ms corresponding to the current refresh rate of 120Hz to draw the image 2 to be displayed, this APP will not respond to the Vsync signal 3 to send the display data of image 2 to the SF in the application framework layer at time t3, and as a result, the image display driver will miss this Vsync signal 3 and be unable to send the image to the display screen at time t3, thus resulting in the phenomenon that the display screen displays image 1 with a timeout. And the image display method provided by the embodiments of the present application, through a hardware module newly added in the system kernel layer of the electronic device - the delay detection module, when it monitors and recognizes at time t4 that the display of image 1 on the display screen has a timeout (exceeding 8.3ms), the image display driver of the electronic device will increase the frequency of the Vsync signal output by the display screen to 360Hz. Thus, the display screen outputs the Vsync signal a with an increased frequency at time t5 (the corresponding Vsync period is 2.8ms), and the image display driver in the system kernel layer for driving the display screen can, after receiving the Vsync signal a, in response to the Vsync signal a, write the display data of image 2 received just before time t5 into the display screen. In this way, when the display time of image 1 on the display screen only times out by about 2.8ms, the display screen starts to display image 2.

[0124] As Figure 7 As shown, during the process of the display screen (supporting a base frequency of 360Hz) of an electronic device refreshing and displaying images at the current refresh rate of 120Hz, if the GPU in the system application framework layer takes more than 8.3ms to synthesize and process image 2, then the GPU will send the display data of image 2 to the image display driver in the kernel layer after time t4, and as a result, the image display driver will miss this Vsync signal 4 and be unable to send the image to the display screen at time t4, thus resulting in the phenomenon that the display screen displays image 1 with a timeout. In response to this phenomenon, the image display method provided by the embodiments of the present application, when the electronic device detects that the display of image 1 on the display screen has a timeout through the delay detection module, increases the frequency of the Vsync signal output by the display screen to 360Hz. Thus, the display screen can output the Vsync signal a with an increased frequency at time t5 (the corresponding Vsync period is 2.8ms), and the image display driver responds to the Vsync signal a at time t5 and writes the display data of image 2 synthesized and sent to the image display driver by the GPU before time t5 into the display screen, so that the display screen starts to display image 2 when the display time of image 1 only times out by about 2.8ms.

[0125] Compared with the traditional solution, the image display method provided by the embodiments of the present application, through the newly added delay detection module, when it is found that the display of the image on the display screen times out due to the system at all levels of the electronic device missing the Vsync signal (also known as frame loss), immediately increases the frequency of the Vsync signal output by the display screen, so that the image display driver performs immediate image transmission and display based on the Vsync signal with the increased frequency. In this way, unlike the traditional solution, the display screen does not need to display the image for at least two consecutive Vsync cycles (for example, one Vsync cycle is 8.3 ms, and two Vsync cycles are 16.6 ms), resulting in a long-time (such as 8.3 ms) timeout display of the image, and then display the next frame of the image written by the image display driver. Instead, it can respond to the display of the next frame of the image by the image display driver after a very short-time (such as 2.8 ms) timeout display of the image. For users, the very short-time timeout display of the image by the display screen is almost imperceptible visually. That is, the present application can increase the frequency of the output Vsync signal when the display screen of the electronic device times out in displaying the image, so that the image display driver quickly transmits and displays the next frame of the image, thereby effectively reducing the duration of the timeout display of the image by the display screen and making it difficult for users to perceive the delay in the device display screen.

[0126] In addition, in the embodiments of the present application, by comparing Figure 3 with Figure 6 or comparing Figure 4 with Figure 7 it can be found that, compared with the traditional solution, the image display method provided by the embodiments of the present application has more image frames for the electronic device to respond to the Vsync signal for image display within the same unit time. That is, the method provided by the embodiments of the present application can also effectively increase the average frame rate of the electronic device to respond to the Vsync signal for image display. Moreover, the more times the system of the electronic device times out in displaying the image due to missing the Vsync signal, the more image frames the method provided by the embodiments of the present application will respond to and display within the same unit time, and thus the improvement of the average frame rate of the electronic device for image display will be more obvious and effective.

[0127] Based on the above overall overview of the image display method provided by the embodiments of the present application, the following will successively elaborate on the specific embodiments of the image display method provided by the embodiments of the present application.

[0128] Please refer to Figure 8 , Figure 8 which is a schematic flowchart of the image display method provided by the embodiments of the present application in a specific implementation. It should be understood that although Figure 8The execution order of some method steps is shown, but based on different design requirements of actual applications, the image display method provided in the embodiments of the present application may of course adopt an execution order different from that shown in the figure. That is, Figure 8 the order of the shown method steps does not constitute a limitation on the execution logic order of the image display method provided in the embodiments of the present application, and any reasonable variation based on Figure 8 the order of the shown method steps should be included in the protection scope of the image display method provided in the embodiments of the present application.

[0129] In a feasible embodiment of the image display method provided in the embodiments of the present application, when the image display method is executed by an electronic device, at a first moment, the electronic device generates a first Vsync signal, and in response to the first Vsync signal, the display screen of the electronic device starts to display a first image. At a second moment after the first moment, the electronic device generates a second Vsync signal. In response to the second Vsync signal, the display screen starts to display a second image. At a third moment after the second moment, in response to the second display duration of the display screen for displaying the second image being greater than the first display duration of the display screen for displaying the first image, the electronic device generates a third Vsync signal.

[0130] It should be noted that in the embodiments of the present application, the first Vsync signal generated by the electronic device at the first moment corresponds to a first Vsync period, and the first Vsync period corresponds to the first display duration of the first image, that is, the first Vsync period is equal to the first display duration. The second Vsync signal generated by the electronic device at the second moment corresponds to a second Vsync period, and the second Vsync period is equal to the first Vsync period. The third Vsync signal generated by the electronic device at the third moment corresponds to a third Vsync period, and the third Vsync period is less than the first Vsync period.

[0131] In the embodiments of the present application, the smaller the Vsync period, the higher the frequency of the output Vsync signal. The electronic device generates the third Vsync signal at the third moment in response to the second display duration being greater than the first display duration, which may be: the electronic device controls the display screen to increase the frequency of triggering the Vsync signal through its own image display driver when the second display duration is greater than the first display duration, so that the display screen outputs a third Vsync signal with an increased frequency at the third moment according to the increased frequency.

[0132] In the embodiments of the present application, by generating the third Vsync signal at the third moment, the display screen can start to display the next frame of the second image after a very short timeout display of the second image.

[0133] In a feasible embodiment, for the specific process of the electronic device to improve the frequency of the triggered Vsync signal by the image display driver controlling the display screen and the electronic device to generate the third Vsync signal at the third moment, reference can be made to Figure 8 S1 to S3 shown.

[0134] S1: Detect whether the second display duration is greater than the first display duration.

[0135] In the embodiment of the present application, the image display driver of the electronic device, after the display screen responds to the second Vsync signal to display the second image at the second moment, calculates in real time the second display duration of the display screen for displaying the second image, and detects whether the second display duration is greater than the first display duration of the display screen for displaying the first image.

[0136] It should be noted that in the embodiment of the present application, the second image displayed on the display screen is the next frame image of the first image displayed on the display screen.

[0137] Exemplarily, when the display screen refreshes and displays images at a current refresh rate of 60Hz and uses this 60Hz frequency as the frequency of the triggered Vsync signal, when the first Vsync signal is triggered at the first moment, the first Vsync period corresponding to the first Vsync signal is approximately 1 / 60≈16.6ms, that is, the display screen triggers a first Vsync signal every 16.6ms. At this time, the first display duration corresponding to the first Vsync period is also approximately 16.6ms, that is, the display screen refreshes and displays one frame of image every approximately 16.6ms. In this way, because the second Vsync period is equal to the first Vsync period, after the display screen responds to the second Vsync signal to display the second image at the second moment, the second display duration for the display screen to continuously display the second image is also approximately 16.6ms. Thus, if after the display screen displays the second image, the image display driver of the electronic device calculates the second display duration in real time and detects that the second display duration is greater than 16.6ms, it can be determined that the second display duration is greater than the first display duration.

[0138] S2: Increase the frequency of the output Vsync signal when the second display duration is greater than the first display duration.

[0139] In the embodiment of the present application, during the process of the display screen displaying the second image, the image display driver of the electronic device controls the display screen to increase the frequency of the output Vsync signal when it detects that the second display duration of the second image is greater than the first display duration.

[0140] Exemplarily, during the process of the image display driver of the electronic device displaying the second image with the current refresh rate of 60 Hz as the frequency of the output Vsync signal on the display screen, the image display driver determines that there is a delay problem in the display of the second image on the current display screen by calculating in real time the second display duration of the second image displayed on the display screen and detecting that the second display duration is greater than the first display duration of 16.6 ms. Thus, the image display driver immediately sends a control instruction to the display screen to control the display screen to increase the frequency of the currently used output Vsync signal of 60 Hz.

[0141] S3: Generate a third Vsync signal.

[0142] In the embodiment of the present application, after the image display driver of the electronic device controls the display screen to increase the frequency of the output Vsync signal, at the third moment after the second moment, the display screen outputs the third Vsync signal with an increased frequency to the image display driver and other software and hardware modules.

[0143] It should be noted that in the embodiment of the present application, since the higher the frequency of the output Vsync signal, the smaller the Vsync period, therefore, after the display screen increases the frequency of the output Vsync signal, the third Vsync period corresponding to the third Vsync signal triggered at the third moment is smaller than the above-mentioned first Vsync period and also smaller than the above-mentioned second Vsync period (when the display screen outputs the first Vsync signal at the first moment and the second Vsync signal at the second moment, the frequency of the output Vsync signal has not been increased).

[0144] Exemplarily, after the electronic device controls the display to increase the frequency of the currently used output Vsync signal from 60 Hz to 360 Hz, the display screen outputs the first third Vsync signal with an increased output frequency after about 2.8 ms according to the Vsync period of 1 / 360≈2.8 ms corresponding to the increased frequency of 360 Hz. At this time, the third Vsync period corresponding to the third Vsync signal is about 2.8 ms, which is smaller than the above-mentioned first Vsync period of about 16.6 ms.

[0145] In a feasible embodiment, the specific process of the display screen displaying the next frame of the second image in response to the third Vsync signal can be further referred to Figure 8 S4 shown below.

[0146] S4: Write the display data of the third image.

[0147] It should be noted that in the embodiment of the present application, the third image is the next frame of the above-mentioned second image.

[0148] In the embodiment of the present application, in response to the electronic device generating a third Vsync signal at a third moment, the display screen displays a third image. That is, after the image display driver of the electronic device has received the display data of the third image sent from the upper layer of the system, in response to the third Vsync signal with an increased frequency output by the display screen at the third moment, the display data of the third image is written to the display screen, so that the display screen displays the third image at the third moment.

[0149] Exemplarily, assuming that the display screen of the electronic device supports a base frequency of 360Hz, during the process of the display screen displaying an image with the image display duration corresponding to the current refresh rate of 120Hz, which is 8.3ms, the display screen uses this 120Hz frequency as the frequency for outputting the Vsync signal. After the display screen starts to display the second image in response to the second Vsync signal at the second moment, the image display driver of the electronic device continuously detects whether the second display duration of the display screen displaying the second image is greater than the first display duration of 8.3ms (the Vsync period corresponding to the 120Hz frequency is approximately 8.3ms). In this way, when the image display driver detects that the second display duration is greater than 8.3ms, it determines that there is a problem of delay in the current display of the second image on the display screen, and thus controls the display screen to turn on a pre-set 360Hz-TE high-frequency synchronization scheme to control the display screen to increase the frequency of the output Vsync signal to 360Hz. In this way, at the third moment, the display screen outputs a third Vsync signal with an increased frequency according to the Vsync period corresponding to the 360Hz frequency, which is 1 / 360≈2.8ms. After receiving the third Vsync signal, the image display driver responds to the third Vsync signal and writes the display data of the third image sent from the upper layer of the system before the third moment to the display screen. In this way, the display screen starts to refresh and display the third image at the third moment. At this time, the display screen only over-displays the second image for about 2.8ms.

[0150] In some other feasible embodiments, for the image display driving of the electronic device, in addition to receiving the display data of the third image before receiving the third Vsync signal, it is also possible to receive the display data of the third image sent by the upper layer of the system in response to the third Vsync signal at the same time as receiving the third Vsync signal. Moreover, when responding to the third Vsync signal itself, the display data of the third image is written into the display screen. For example, when the data volume of the display data of the third image is small, so that the upper layer of the system processes the display data of the third image and the time consumed for transmitting the display data of the third image between each software and hardware module is short, the situation where the image display driving cannot receive the display data before completing the response to the Vsync signal will not occur. In this way, the image display driving can receive the display data of the third image with a small data volume after receiving the third Vsync signal, and write the display data of the third image into the display screen while responding to the third Vsync signal.

[0151] It should be noted that in the embodiments of the present application, the 360Hz-TE high-frequency synchronization scheme can be a Vsync signal output control scheme pre-added to the display screen for the display screen to switch the frequency of the output Vsync signal as needed. It should be understood that based on different design requirements of actual applications, other Vsync signal output control schemes of the same type but with different frequency magnitudes can of course also be pre-added to the display screen, such as the 60Hz-TE low-frequency synchronization scheme and the 120Hz-TE standard-frequency synchronization scheme, etc.

[0152] When the display screen responds to enabling a synchronization scheme of a certain frequency, it outputs Vsync signals according to the Vsync period corresponding to that frequency. For example, when the display screen responds to enabling the 360Hz-TE high-frequency synchronization scheme, with a Vsync period of 2.8ms corresponding to a frequency of 360Hz, a Vsync signal is output every 2.8ms. When the display screen responds to enabling the 120Hz-TE standard-frequency synchronization scheme, with a Vsync period of 8.3ms corresponding to a frequency of 120Hz, a Vsync signal is output every 8.3ms. When the display screen responds to enabling the 60Hz-TE low-frequency synchronization scheme, with a Vsync period of 16.6ms corresponding to a frequency of 60Hz, a Vsync signal is output every 16.6ms.

[0153] In the embodiments of the present application, when the display screen of the electronic device uses 120Hz as the current refresh rate for image refresh display, it can default to using the 120Hz-TE standard-frequency synchronization scheme to output Vsync signals at an original frequency of 120Hz. In this way, Figure 9 the waveform diagram showing the Vsync signals refreshed and output by the display screen using the 120Hz-TE standard-frequency synchronization scheme, and Figure 10The waveform diagram of the Vsync signal refreshed and output by the display screen using the 360Hz-TE high-frequency synchronization scheme is shown. From the comparative analysis, when the display screen outputs the Vsync signal at a frequency of 120Hz ( Figure 9 and Figure 10 All the dotted arrows in the figure indicate the moments when the display screen outputs the Vsync signal), if the image display driver misses a Vsync signal and causes a delay in sending Image 1 to the display screen, the display screen will display Image 0, the previous frame of Image 1, for at least two consecutive Vsync cycles. If the image display driver misses the Vsync signal and causes a delay in sending Image 3 to the display screen, the display screen will also display Image 2, the previous frame of Image 3, for at least two consecutive Vsync cycles. If the display screen outputs the Vsync signal at a frequency of 360Hz, when the image display driver misses a Vsync signal (at this time, it is a high-frequency Vsync signal) and causes a delay in sending Image 1 to the display screen, the image display driver only needs to display Image 0 for a short Vsync cycle after the timeout, and then respond to the next high-frequency Vsync signal to send the image command to the display screen to start displaying Image 1. Even if the image display driver continuously misses two high-frequency Vsync signals and does not send Image 3 to the display screen, the display screen only needs to display Image 2 for two short Vsync cycles after the timeout. Even two short Vsync cycles (2.8ms + 2.8ms = 5.4ms) are shorter than one Vsync cycle (8.3ms) when the Vsync signal is output at a frequency of 120Hz.

[0154] Compared with the traditional scheme, the image display method provided by the embodiment of the present application can improve the frequency of the Vsync signal output by the display screen when the display of the image on the display screen times out, so that the image display driver can send the image for immediate display based on the high-frequency Vsync signal with the increased frequency. In this way, the display screen can respond to the image display driver to display the next frame of the image only after a very short timeout display of the image. And the user can hardly perceive the delay of the device display screen visually. That is, the method provided by the embodiment of the present application can effectively reduce the duration of the timeout display of the image on the display screen, so that the user is not likely to perceive the delay of the device display screen.

[0155] In a feasible embodiment, the second display duration of the display screen for the second image is less than twice the above first display duration.

[0156] In the embodiment of the present application, as long as the second display duration is greater than the first display duration but less than twice the first display duration, and the display screen starts to display the third image in response to the third Vsync signal with a smaller Vsync period, the display screen will not display the second image for two consecutive first Vsync periods for a long time, so that the phenomenon of device display screen delay similar to the traditional solution will not occur.

[0157] In this way, in addition to being able to control the display screen to increase the frequency of the output Vsync signal when it is initially detected that the second display duration is greater than the first display duration, the image display driver of the electronic device can also choose to control the display screen to increase the frequency of the output Vsync signal at any time when the second display duration is greater than the first display duration but less than twice the first display duration. At this time, the image display driver writes the display data of the third image to the display screen in response to the third Vsync signal with an increased frequency output by the display screen, so that the display screen displays the third image when the duration of the second image being displayed overtime does not exceed the first display duration.

[0158] In a feasible embodiment, the third display duration for the display screen to display the third image is less than the above-mentioned first display duration.

[0159] In the embodiment of the present application, since the display screen displays the third image in response to the third Vsync signal with an increased frequency when the second image is displayed overtime (the second display duration is greater than the first display duration), therefore, if the electronic device generates a new Vsync signal using the Vsync period corresponding to the third Vsync signal, and the image display driver of the electronic device also receives the display data of the next frame of the third image before (or at the same time as) the electronic device generates the new Vsync signal, then the image display driver will respond to the new Vsync signal and write the display data of the next frame of the third image to the display screen. That is, the display screen starts to refresh and display the next frame of the third image in response to the new Vsync signal. In this way, the third display duration for the display screen to display the third image (approximately from the third moment to the moment when the electronic device generates the new Vsync signal) will be less than the first display duration corresponding to the first Vsync period.

[0160] Exemplarily, such as Figure 11As shown, after time t4 (the time indicated by the vertical dotted line in the figure), when the image display driver controls the display screen to increase the frequency of the output Vsync signal from the original frequency of 120 Hz to 360 Hz, the display screen displays the third image (image 2) in response to the third Vsync signal a at the third time (t5). After that, if the display screen still triggers a new Vsync signal a at 360 Hz, at time t6, the display screen will start to refresh and display the next frame of image 3 of image 2 in response to the new Vsync signal a. At this time, the third display duration of the display screen for displaying the third image is only about 5.4 ms, which is less than the first display duration of 8.3 ms for the first image (image 0).

[0161] In another feasible embodiment, the third display duration of the display screen for displaying the third image can also be the same as the above-mentioned first display duration.

[0162] In the embodiment of the present application, since the display screen starts to display the third image in response to the third Vsync signal after the second image display times out, therefore, if the electronic device generates a new Vsync signal using the Vsync period corresponding to the third Vsync signal, and the image display driver of the electronic device receives the display data of the next frame of the third image before (or at the same time as) generating the (M + 1)-th new Vsync signal, then the image display driver responds to this new Vsync signal and writes the display data of the next frame of the third image to the display screen. That is, the display screen refreshes and displays the next frame of the third image in response to the new Vsync signal. In this way, the display duration of the display screen for displaying the third image will be equal to the first display duration corresponding to the first Vsync period.

[0163] It should be noted that in the embodiment of the present application, M is the multiple of the frequency of the Vsync signal output by the display screen after the increase compared to the frequency of the Vsync signal output by the display screen before the increase, and M is greater than 1.

[0164] Exemplarily, such as Figure 12As shown, after time t4 (the time indicated by the vertical dashed line in the figure), when the image display driver controls the display screen to increase the frequency of the output Vsync signal to M = 3 times the original frequency of 120 Hz (360 Hz), the display screen displays the third image (Image 2) in response to the third Vsync signal (the first Vsync signal a) with the increased frequency at the third time (t5). After that, the display screen continues to output the Vsync signal a with the increased frequency of 360 Hz. If the image display driver receives the display data of the next frame of Image 3 of Image 2 before the display screen triggers the fourth Vsync signal a at time t8, the image display driver will write the received display data of Image 3 into the display screen in response to the fourth Vsync signal a to drive the display screen to display Image 3. In this way, the third display duration of the display screen for displaying Image 2 is equal to the first display duration of 8.3 ms for the display screen to display the first image (Image 0).

[0165] It should be noted that Figure 12 the moments indicated by the dashed arrows in the figure are all the moments when the image display driver does not respond to the Vsync signal a to send images to the display screen.

[0166] In a feasible embodiment, at the fourth time after the above-mentioned second time and before the third time, the electronic device will also generate a fourth Vsync signal. At this time, if the image display driver of the electronic device has not received the display data of the next frame of the third image of the second image, the image display driver will not respond to the fourth Vsync signal to write any image display data into the display screen, so that the display screen will continue to perform timeout display on the second image that is currently being displayed in response to the fourth Vsync signal.

[0167] Exemplarily, such as Figure 11 or Figure 12As shown, after the display screen starts to display the second image (Image 1) in response to the second moment (t3), the display screen will continue to trigger a fourth Vsync signal at the fourth moment (t4) according to a second Vsync period of 8.3 ms equal to the first Vsync period. At this time, since the image display driver has not received the display data of the third image (Image 2) sent from the upper layer of the electronic device system, the image display driver will not respond to the fourth Vsync signal to write the display data of Image 2 to the display screen. Therefore, at the moment t4, the display screen can only continue to display Image 2 in response to the fourth Vsync signal. Since the second display duration of the second image on the display screen has reached 8.3 ms at this time, the display of the second image on the display screen after the moment t4 is an overtime display. After that, at the third moment (t5), since the display screen outputs a third Vsync signal (the first Vsync signal a) according to the increased Vsync signal output frequency of 360 Hz, and the image display driver has received the display data of Image 2 before t5, the image display driver can respond to the first Vsync signal a to write the display data of Image 2 to the display screen. And the display screen also starts to refresh and display Image 2 in response to the first Vsync signal a at t5.

[0168] In a feasible embodiment, when the display screen outputs the Vsync signal at an original frequency of 120 Hz, the first Vsync period corresponding to the first Vsync signal generated by the display screen of the electronic device at the first moment is approximately 8.3 (1 / 120 ≈ 8.3) ms. After that, if the electronic device increases the frequency of the Vsync signal output by the display screen to 3 times the original frequency of 120 Hz through the image display driver, that is, increases to 360 Hz, then the third Vsync period corresponding to the third Vsync signal generated by the display screen of the electronic device at the third moment after increasing the output frequency of the Vsync signal is approximately 2.8 (1 / 360 ≈ 2.8) ms.

[0169] In a feasible embodiment, when the first Vsync period is approximately 8.3 ms and the third Vsync period is approximately 2.8 ms, the first display duration corresponding to the first Vsync period is also approximately 8.3 ms, while the second display duration of the display screen for displaying the second image is approximately 8.3 ms + 2.78 ms = 11.1 ms.

[0170] Exemplarily, assume that a display screen supporting a base frequency of 360 Hz initially outputs a Vsync signal at an original frequency of 120 Hz. After the display screen displays the first image for a first display duration of 8.3 ms corresponding to the first Vsync period of 8.3 (1 / 120 ≈ 8.3) ms, it responds to the new Vsync signal to display the second image, which is the next frame of the first image. During the process of displaying the second image, if the display screen times out in displaying the second image (the second display duration is greater than the first display duration of 8.3 ms), the image display driver controls the display screen to increase the frequency of the output Vsync signal to 3 times the original frequency of 120 Hz, that is, to 360 Hz. In this way, the display screen outputs the Vsync signal at a frequency of 360 Hz, and the image display driver responds to this Vsync signal to write the display data of the third image, which is the next frame of the second image, to the display screen to drive the display screen to display the third image after only timing out in displaying the second image for about 2.8 ms. At this time, the complete second display duration of the display screen for displaying the second image is approximately 8.3 ms + 2.78 ms = 11.1 ms.

[0171] In some feasible embodiments, when the image display driver of the electronic device increases the frequency of the Vsync signal output by the display screen to M times the original frequency of the Vsync signal, the image display driver may receive the display data of the third image, which is the next frame of the second image displayed by the display screen, before the i-th frequency-increased Vsync signal output by the display screen at the increased frequency. Herein, i is a positive integer and i is less than M.

[0172] In this case, the image display driver writing the display data of the third image to the display screen in response to the frequency-increased Vsync signal may be: writing the display data of the third image to the display screen in response to the i-th frequency-increased Vsync signal.

[0173] Exemplarily, such as Figure 13As shown, after time t4 (the time indicated by the vertical dashed line in the figure), when the image display driver controls the display screen to increase the frequency of the output Vsync signal to M = 3 times the original frequency of 120 Hz (360 Hz), if the upper layer of the system of the electronic device sends the display data of the third image (image 2), which is the next frame of the second image (image 1) displayed on the display screen, to the image display driver before the display screen outputs the i = 1st Vsync signal a with an increased frequency of 360 Hz at the third time (t5), that is, the image display driver receives the display data of image 2 before time t5, then the image display driver will, in response to the i = 1st Vsync signal a at time t5, write the display data of image 2 into the display screen to drive the display screen to display image 2. In this way, the image display driver sends image 2 for display within 2.8 ms after the display screen times out to display image 1, thus realizing that the traditional solution requires the display screen to display image 1 for at least two consecutive Vsync cycles (8.3 ms + 8.3 ms = 16.6 ms) for a long time and then send image 2 for display, which is shortened to only require the display screen to display image 1 for 8.3 ms + 2.8 ms = 11.1 ms and then send image 2 for display. That is, it effectively reduces the duration of the display screen timing out to display image 1 (from about 16.6 ms of timeout in the traditional solution to only about 2.8 ms of timeout).

[0174] Exemplarily, as Figure 14 shown, if the upper layer of the system of the electronic device sends the display data of image 2 to the image display driver after the third time (t5), that is, the image display driver receives the display data of image 2 only before the display screen outputs the i = 2nd Vsync signal a with a frequency of 360 Hz. At this time, the image display driver will, in response to the i = 2nd Vsync signal a, write the received display data of image 2 into the display screen to drive the display screen to display image 2. At this time, the image display driver can also send image 2 for display after the display screen only times out to display image 1 for about 5.4 ms. Compared with the traditional solution that requires the display screen to display image 1 for about 16.6 ms for a long time, it can still shorten the display duration of the display screen for image 1 to about 8.3 ms + 5.4 ms = 13.9 ms. That is, it still effectively reduces the duration of the display screen timing out to display image 1 (from about 16.6 ms of timeout in the traditional solution to only about 5.4 ms of timeout).

[0175] It should be noted that Figure 13 and Figure 14 the moments indicated by the dashed arrows in

[0176] are all the moments when the image display driver does not respond to the Vsync signal a to send images to the display screen.

[0177] Exemplarily, as Figure 15 shown, after time t4 (such as Figure 13 the time indicated by the vertical dotted line in), the image display driver controls the display screen to increase the frequency of the output Vsync signal to M = 1.5 times (180 Hz) of the original frequency of 120 Hz. Thus, if the upper layer of the system of the electronic device issues the display data of the third image (image 2) of the next frame of the second image (image 1) displayed on the display screen before the display screen triggers the i = 1st Vsync signal a with a frequency increased to 180 Hz at the third time (t5), that is, the image display driver receives the display data of image 2 before time t5, then the image display driver responds to the i = 1st Vsync signal a at time t5 and writes the display data of image 2 into the display screen to drive the display screen to display image 2. In this way, the image display driver can send image 2 to the display screen about 5.5 ms after the display screen times out to display image 1. Compared with the traditional solution where the display screen displays image 1 for about 16.6 ms, the display duration of the display screen for image 1 can also be shortened by about 13.8 ms. That is, the duration of the display screen timing out to display image 1 is still effectively reduced.

[0178] In the embodiment of the present application, before the display screen outputs the i-th Vsync signal with an increased frequency, the image display driver of the electronic device receives the display data of the third image, and then responds to the received i-th Vsync signal with an increased frequency and writes the display data of the third image into the display screen to drive the display screen to display the third image. In this way, it can be ensured that the image display driver of the electronic device sends the next frame of image to the display screen in a short time after the display screen times out to display the image, that is, the duration of the display screen timing out to display the second image is effectively reduced.

[0179] In some feasible embodiments, in response to the display screen displaying the second image, the image display driver of the electronic device calculates the second display duration of the display screen for displaying the second image. And the image display driver compares the second display duration with the above-mentioned first display duration. When the second display duration is greater than the first display duration, the image display driver sends a control instruction to the display screen in response to the second display duration being greater than the first display duration. The display screen responds to the control instruction to increase the frequency of the output Vsync signal and generates a third Vsync signal with an increased frequency at the third time after the second time.

[0180] Exemplarily, by configuring a delay detection module in the image display driver of an electronic device and detecting whether the second display duration is greater than the first display duration through the delay detection module, the frequency of the output Vsync signal is increased when the delay detection module detects that the second display duration is greater than the first display duration. In this way, since the image display driver is located in the kernel layer of the entire system of the electronic device, whether the upper layer of the system (such as the application layer, the application framework layer, or the hardware abstraction layer) causes the second display duration to be greater than the first display duration, or the kernel layer itself causes the second display duration to be greater than the first display duration, it can be detected by the newly added delay detection module in the kernel layer. That is, the comprehensiveness and accuracy of detecting whether the second display duration is greater than the first display duration are improved.

[0181] In the embodiments of the present application, an electronic device can determine whether to increase the frequency of the output Vsync signal by combining improvements at the software level and the hardware level. That is, the electronic device newly adds a hardware module in the system kernel layer, and through this hardware module, it detects whether there is a delay in the display screen of the device (that is, detects whether the duration of the display screen showing an image times out), so as to increase the frequency of the Vsync signal output by the display screen when the hardware module detects that there is a delay in the display screen of the device, so as to achieve the purpose of reducing the delay degree of the display screen of the device. Among them, as Figure 16 shown, the electronic device newly configures a delay detection module in the image display driver of the kernel layer. Based on this, in response to the display screen starting to display the second image, the electronic device continuously calculates the second display duration of the display screen showing the second image through the delay detection module and detects whether the second display duration is greater than the first display duration. After that, when the delay detection module detects that the second display duration is greater than the first display duration, it is determined that there is a delay in the display screen of the device, and thus the image display driver issues a control instruction to the display screen to control the display screen to increase the frequency of the output Vsync signal.

[0182] It should be noted that in the embodiments of the present application, during the process of the display screen of the electronic device showing an image, the delay detection module continuously detects whether the duration of the display screen showing the image times out. Among them, the image display driver in the kernel layer of the electronic device, each application in the application layer, the image rendering framework and the image composition framework in the application framework layer, and the hardware abstraction layer, if they miss the Vsync signal triggered by the display screen at the original frequency, will all cause the second display duration to be greater than the first display duration, thus making the image shown on the display screen in a delayed state.

[0183] In the embodiment of the present application, when the image display driver of the electronic device detects whether the second display duration is greater than the first display duration, it can detect, through its newly added delay detection module, whether the second display duration of the display screen for displaying the second image is greater than the first display duration corresponding to the first Vsync during the process of the display screen displaying the second image. When the delay detection module detects that the second display duration is greater than the first display duration, the image display driver determines that the display of the second image on the display screen has timed out, so that the image displayed on the display screen is in a delayed state.

[0184] When the image display driver determines that the second display duration is greater than the first display duration and thus increases the frequency of the Vsync signal output by the display screen, it can send a control command to the display screen through the display module serial interface that establishes a communication connection between itself and the display screen. The display screen immediately responds after receiving the control command, so as to increase the frequency of the output Vsync signal from the original frequency to the frequency specified by the control command.

[0185] In the embodiment of the present application, when the delay detection module detects that the second display duration exceeds the first display duration, the image display driver of the electronic device immediately increases the frequency of the Vsync signal output by the display screen, and in response to the Vsync signal after the frequency increase, writes the display data of the third image into the display screen to drive the display screen to display the third image. In this way, it can not only effectively reduce the duration of the display screen's timeout display of the image, thereby reducing the delay degree of the device's display screen, but also improve the comprehensiveness of detecting whether the display screen times out when displaying the second image, and improve the accuracy of increasing the frequency of the output Vsync signal to enable the image display driver to immediately send and display the third image. Since the delay detection module is configured in the image display driver of the electronic device system kernel layer, whether the timeout of the display screen displaying the second image is caused by the kernel layer where the delay detection module itself is located, or by the application layer, application framework layer or hardware abstraction layer of the system, it can be detected by the delay detection module.

[0186] In some feasible embodiments, before the image display driver of the electronic device detects whether the second display duration is greater than the first display duration through the delay detection module, it detects whether the image display driver responds to the Vsync signal triggered by the display screen at the original frequency.

[0187] In an embodiment of the present application, during the process of the image display driver of the electronic device refreshing and displaying an image on the display screen each time through the delay detection module, it detects whether the display of the image on the display screen is in a delayed state. That is, in addition to detecting whether there is a delay in the display of the image on the display screen through the delay detection module when the display screen displays the second image (when the second display duration exceeds the first display duration, it indicates that there is a delay in the display of the second image on the display screen), when the display screen displays the first image, the image display driver also detects through the delay detection module whether the display of the first image on the display screen is in a delayed state. After that, when the image display driver detects through the delay detection module that the display of the first image on the display screen is not in a delayed state, it further detects through the delay detection module whether there is a delay in the display of the second image on the display screen, that is, it detects whether the second display duration exceeds the first display duration.

[0188] In an embodiment of the present application, the image display driver detecting whether the display of the first image on the display screen is in a delayed state through the delay detection module can be: detecting through the delay detection module whether the image display driver responds to the first Vsync signal triggered by the display screen at the first moment at the original frequency and writes the display data of the second image into the display screen, so that when the display screen does not display the first image for an overtime, it drives the display screen to display the second image. If it is detected that the image display driver responds to the first Vsync signal to drive the display screen to display the second image, it is determined that the display of the first image on the display screen is not in a delayed state. If it is detected that the image display driver does not respond to the first Vsync signal (or misses the first Vsync signal), resulting in the display screen displaying the first image for an overtime, it is determined that the display of the first image on the display screen is in a delayed state.

[0189] In some feasible embodiments, if the image display driver detects through the delay detection module that the image display driver responds to the first Vsync signal and writes the display data of the second image into the display screen, thereby determining that there is no delay in the display of the first image on the display screen, the image display driver then detects through the delay detection module whether the second display duration is greater than the first display duration, so as to determine whether there is a delay in the display of the second image on the display screen based on the detection result. When it is determined that there is a delay in the display of the second image on the display screen, the image display driver controls the display screen to increase the frequency of the output Vsync signal.

[0190] Exemplarily, in combination with Figure 16 the system framework of the shown electronic device and Figure 17The control logic for image display of the electronic device shown applies the method provided in the embodiments of the present application. Assuming that the display screen of the electronic device supports a base frequency of 360 Hz, when the display screen displays images according to the first Vsync period of 8.3 ms corresponding to a refresh rate of 120 Hz, during the process of the display screen displaying the second image, the browser application APP in the application layer of the electronic device system also synchronously draws the third image of the next frame of the second image, and sends the display data that has been drawn but needs to be rendered for the third image to the image rendering service in the application framework layer. After the image rendering service finishes rendering the display data, if the display data needs to be further synthesized, it further sends the rendered display data to the image synthesis service. After the image synthesis service synthesizes the display data, it sends the display data of the third image to be displayed to the hardware abstraction layer as the display data to be displayed, so that the hardware abstraction layer performs hardware matching to send the display data of the third image to the image display driver in the kernel layer, and the image display driver performs pre-sending preparation after receiving the display data of the third image.

[0191] At this time, the image display driver obtains the result detected in advance by the delay detection module. When the result is that the display screen is not in a delayed state when displaying the first image (the first display duration does not exceed 8.3 ms), the delay detection module is further used to detect whether the second display duration of the display screen when displaying the second image is greater than 8.3 ms. When it is detected that the second display duration is greater than 8.3 ms, the image display driver immediately sends an instruction 1 to control the activation of the high-frequency TE to the display screen through the display module serial interface (DSI) that establishes a communication connection with the display screen, so as to control the display screen to respond to the instruction 1 to activate the pre-set 360 Hz-TE high-frequency synchronization scheme, thereby increasing the frequency of the Vsync signal output by the display screen to 360 Hz.

[0192] Alternatively, when the image display driver obtains the result detected in advance by the delay detection module, but the result is that the display screen is already in a delayed state when displaying the first image (the first display duration exceeds 8.3 ms), it means that when the display screen displays the first image, the display screen has already experienced a delay caused by image display timeout, and in order to reduce the degree of delay, the image display driver has controlled the display screen to increase the frequency of the output Vsync signal to 360 Hz.

[0193] In some feasible embodiments, after the image display driver of the electronic device increases the frequency of the output Vsync signal and then drives the display screen to display an image in response to the Vsync signal with the increased frequency, to prevent the image display driver from sending the next frame of the image prematurely, resulting in the phenomenon that the display screen only briefly displays the image and then quickly displays the next frame, the electronic device can, within the display duration of the image on the display screen by the image display driver, not respond to the Vsync signal with the increased frequency output by the display screen, thereby forcibly extending the display duration of the image on the display screen.

[0194] In the embodiments of the present application, the electronic device can Figure 18 Forcibly extend the display duration of the third image on the display screen through steps S5 and S10 shown below. After the display screen displays the third image, step S5 is executed: feedback the Vsync signal with the increased frequency. When the image display driver receives the Vsync signal with the increased frequency feedback by the display screen, if the third display duration of the display screen for displaying the third image is not greater than the difference between the first display duration and the third Vsync period, step S6 is executed: stop responding to the Vsync signal with the increased frequency. Then, the display screen continues to execute step S7: feedback the Vsync signal with the increased frequency. After the image display driver receives the Vsync signal with the increased frequency feedback by the display screen, if the third display duration is greater than the difference between the first display duration and the third Vsync period at this time, the image display driver executes S8: resume responding to the Vsync signal with the increased frequency. Then, when the display screen executes step S9: feedback the Vsync signal with the increased frequency. After the image display driver receives this Vsync signal, step S10 is executed: respond to the Vsync signal with the increased frequency and write the display data of the next frame of the image to the display screen. Thus, the display screen starts to display the next frame of the image.

[0195] In the embodiments of the present application, after the image display driver of the electronic device writes the display data of the third image to the display screen to drive the display screen to display the third image, within the third display duration of the display screen for displaying the third image, the image display driver stops responding to the Vsync signal with the increased frequency output by the display screen within the third display duration, so as to refuse to write the display data of the next frame of the third image to the display screen within the third display duration.

[0196] After that, when the third display duration is greater than the difference between the first display duration and the third Vsync period, the image display driver resumes responding to the Vsync signal with the increased frequency output by the display screen, so as to realize writing the display data of the next frame of the third image to the display screen after the third display duration reaches the first display duration.

[0197] In the embodiment of the present application, within the third display duration for displaying the third image on the display screen by the image display driver, the Vsync signal with the increased frequency triggered by the display screen is not responded to, which can avoid the phenomenon that the display screen briefly displays the third image caused by the image display driver sending the next frame image of the third image for display in advance during the display process of the third image on the display screen. In this way, the stability of the electronic device for displaying the third image and subsequent images is further improved.

[0198] Exemplarily, as Figure 19 shown, it is assumed that after the t4 moment, the image display driver of the electronic device detects that the second display duration for the display screen to display the second image at a refresh rate of 120 Hz is greater than the first display duration corresponding to the first Vsync period (1 / 120 Hz), which is about 8.3 ms, and controls the display screen to increase the frequency of the output vertical synchronization signal from the original frequency of 120 Hz to 360 Hz at the moment shown by the dashed line between the t4 and t5 moments in the figure. Then, in response to the increased-frequency third Vsync signal (Vsync signal a) output by the display screen at the third moment (t5) corresponding to the third Vsync period (1 / 360 ≈ 2.8 ms) of the 360 Hz frequency, when the display screen only displays the second image (image 1) for about 2.8 ms in an overtime manner, the image display driver writes the third image (image 2) into the display screen to drive the display screen to display image 2.

[0199] After that, since the display screen increases the frequency of the output Vsync signal to 360 Hz, the display screen still continues to output a new Vsync signal a at the t6 moment after displaying image 2 for about 2.8 ms (represented by the dashed line where the t6 moment is located in the figure). At this time, since the display duration of the display screen for image 2 is only about 2.8 ms, the image display driver stops responding to the Vsync signal a received at the t6 moment (the moments pointed by the dashed arrows in the figure are all the moments when the image display driver does not respond to the Vsync signal a to send the image to the display screen) to reject writing the display data of the next frame image (image 3) of image 2 into the display screen at the t6 moment.

[0200] After that, the display screen continues to output a new Vsync signal a at the t7 moment after displaying image 2 for about 2.8 ms (represented by the dashed line where the t7 moment is located in the figure). At this time, since the second display duration of the display screen for image 2 is still only 5.4 ms, that is, the second display duration has not reached the first display duration of about 8.3 ms, the image display driver still does not respond to the Vsync signal a at the t7 moment to reject writing the display data of image 3 into the display screen at the t7 moment.

[0201] However, after that, when the second display duration is greater than 5.5 ms (the first display duration of 8.3 ms minus the third Vsync period of approximately 2.8 ms), the image display driver resumes responding to the Vsync signal a output by the display screen. Thus, at the moment t8 after the display screen further displays the image 2 for approximately 2.8 ms (at this time the second display duration has approximately reached 8.3 ms), the display screen continues to output a new Vsync signal a. At this time, since the second display duration has reached 8.3 ms, the image display driver writes the display data of the image 3 to the display screen in response to the Vsync signal a at the moment t8.

[0202] In this way, it can be ensured that the display duration of the display screen for the image 2 reaches approximately 8.3 ms. After that, as long as the display screen continues to trigger a new Vsync signal a at a frequency of 360 Hz, during the process of the display screen displaying the image 3 and subsequent images (if any), the image display driver refers to the same process of sending images to the display screen when the display screen displays the image 2, and responds to the Vsync signal a to send images to the display screen.

[0203] It should be noted that in the embodiments of the present application, such as Figure 19 the process in which the image display driver does not respond to the Vsync signal a to send images to the display screen during the process of the display screen displaying the image 2 can also be similarly applied to the above Figure 12 、 Figure 13 and Figure 14 shown example scenarios, and applied to the example scenarios described later in combination with Figure 21 That is, in the above Figure 12 、 Figure 13 and Figure 14 as well as the example scenarios shown later in Figure 21 during the process of the display screen displaying the third image and subsequent images (if any), the image display driver continues to respond to the Vsync signal a with an increased frequency, and the process of writing the display data of the next frame of the third image to the display screen is the same as the process in which the image display driver shown in Figure 19 sends the image 3 to the display screen in response to the Vsync signal a when the display screen displays the image 2, and will not be elaborated here too much.

[0204] In some feasible embodiments, when the image display method provided by the embodiments of the present application is executed by an electronic device, after the image display driver writes the display data of the third image to the display screen to drive the display screen to instantaneously display the third image, the image display driver can further adaptively reduce the frequency of the Vsync signal. In this way, it is possible to avoid power consumption waste caused by the display screen outputting the Vsync signal at an unnecessarily high frequency for a long time, thereby achieving the purpose of saving device power consumption.

[0205] In an embodiment of the present application, after the display screen of the electronic device displays a third image in response to a third Vsync signal, if the third display duration of the display screen for displaying the third image is greater than a preset interval duration, the electronic device reduces the frequency of the output Vsync signal. Herein, the preset interval duration is equal to the first display duration minus the duration consumed for reducing the frequency of the output Vsync signal, that is, the preset interval duration is the difference between the first display duration and the duration consumed for reducing the frequency of the output Vsync signal.

[0206] It should be noted that in an embodiment of the present application, the duration consumed for reducing the frequency of the output Vsync signal may be an empirical value pre-added to the image display driver for the image display driver to flexibly read. Alternatively, the consumed duration may also be a value temporarily determined by the electronic device based on its own real-time system resource occupancy and performance performance, etc., when it is necessary to determine the above preset interval duration. The value temporarily determined can be obtained by the image display driver at any time. It should be understood that based on different design requirements of actual applications, the duration consumed for reducing the frequency of the output Vsync signal may of course be different values. For example, the consumed duration may specifically be any value among 0.3ms, 0.5ms, 0.8ms, or even 1ms. That is, the method provided in the embodiment of the present application does not limit the specific value of the duration consumed for reducing the frequency of the output Vsync signal.

[0207] As Figure 16 and Figure 17 shown, after the image display driver of the electronic device has controlled the display screen to increase the frequency of the output Vsync signal of the display screen to 360Hz to reduce the delay caused by the display screen displaying an image for an extended period, in order to avoid waste of device power consumption caused by the display screen still triggering the Vsync signal at 360Hz, the image display driver calculates the interval duration b at the current moment from the moment when the image display driver writes the display data of the first image to the display screen, and compares the interval duration b with the duration of 7.3ms after subtracting the duration consumed for reducing the Vsync signal (assumed to be 1ms) from the first display duration of approximately 8.3ms. Thus, when it is found through comparison that the interval duration b is greater than or equal to 7.3ms, the image display driver determines that the operation of currently increasing the frequency of the output Vsync signal has reduced the delay that occurs when the display screen displays the second image, that is, the display of the third image on the display screen has become stable. Thus, the image display driver sends an instruction 2 to the display screen through DSI to control the display screen to turn off the preset 360Hz-TE high-frequency synchronization scheme in response to this instruction 2, and reduces the frequency of the output Vsync signal of the display screen from 360Hz back to 120Hz.

[0208] In some feasible embodiments, after the image display driver displays the third image on the display screen, it can obtain the current moment of the electronic device system, and subtract the image sending moment of the Vsync signal after the previous image display driver response frequency is increased (the moment when the display data of the third image is written to the display screen) from the current moment, so as to use the calculated duration as the third display duration for the display screen to display the third image. Then, compare the size of the third display duration with the preset interval duration.

[0209] Alternatively, in some other feasible embodiments, the image display driver can directly compare the size relationship between the duration obtained by subtracting the image sending moment from the current moment and the preset interval duration. Thus, when the duration obtained by subtracting the image sending moment from the current moment is greater than or equal to the preset interval duration, the frequency of the previously increased output Vsync signal is reduced.

[0210] In some feasible embodiments, after the image display driver of the electronic device starts to display the third image, if it receives the display data of the next frame of the third image within the third display duration for the display screen to display the third image, the frequency of the output Vsync signal is reduced. In this way, at the fifth moment after the third moment, the electronic device generates the fifth Vsync signal.

[0211] It should be noted that in the embodiments of the present application, the fifth Vsync signal corresponds to the fifth Vsync period, which is equal to the above-mentioned first Vsync period.

[0212] In some feasible embodiments, the display duration of the fourth image is greater than the preset interval duration; the fourth image is the image displayed in the previous frame at the fifth moment, the preset interval duration is the interval duration between the fifth moment and the sixth moment minus the consumption duration required to reduce the frequency of the output Vsync signal, and the sixth moment is the moment when the fourth image is written to the display screen.

[0213] In the embodiments of the present application, after the display screen starts to display the third image, in response to the display duration of the fourth image being greater than the interval duration between the fifth moment and the sixth moment minus the consumption duration required to reduce the frequency of the output Vsync signal, the electronic device reduces the frequency of the output Vsync signal. Then, at the fifth moment after the third moment, the electronic device generates the fifth Vsync signal whose Vsync period is equal to the first Vsync period.

[0214] It should be noted that in the embodiments of the present application, the fourth image is the third image itself or a frame of image after the third image. The sixth moment is the moment when the fourth image is written into the display screen. That is, when the fourth image is the third image itself, the sixth moment is the third moment when the display screen starts to display the third image in response to the third Vsync signal (at this time, the third image is written into the display screen by the display screen starting to display), and when the fourth image is a frame of image after the third image, the sixth moment is the moment when the display screen starts to display a frame of image after the third image (at this time, a frame of image after the third image is written into the display screen by the display screen starting to display). The interval length between the fifth moment and the sixth moment is the first display duration corresponding to the above first Vsync period.

[0215] Exemplarily, as Figure 20 shown, taking the fourth image as the third image itself and the sixth moment as the third moment itself as an example, after the display screen starts to display the third image (image 2) at the third moment (t5), the electronic device calculates the third display duration of image 2 in real time. When the third display duration is greater than the interval duration of 8.3 ms between the fifth moment (t6) and t5 minus the time consumed for reducing the frequency of the output Vsync signal (the time consumed is the duration between the moment shown by the vertical dotted line on the right side of the figure and t6), the electronic device reduces the frequency of the output Vsync signal at the moment shown by the vertical dotted line on the right side of the figure. Thus, at the moment t6, the electronic device generates a fifth Vsync signal (Vsync signal 6) with a fifth Vsync period of 8.3 ms (equal to the first Vsync period).

[0216] In some feasible embodiments, if the electronic device reduces the frequency of the Vsync signal output by the display screen during the process of displaying the third image through image display driving, then the fifth moment when the electronic device generates the fifth Vsync signal through the display screen is N = 1 8.3 ms away from the third moment when the display screen outputs the third Vsync signal.

[0217] Exemplarily, as Figure 20As shown, when the electronic device detects that the display of Image 1 on the display screen times out after time t4 through the delay detection module, it increases the frequency of the Vsync signal output by the display screen (the moment when the vertical long dashed line on the left side of the figure indicates the moment of increasing the output frequency of the Vsync signal). As a result, the display screen outputs the third Vsync signal (Vsync signal a) with an increased frequency at the third moment (t5). The image display driver responds to Vsync signal a at time t5 and writes the display data of the third image (Image 2) that the GPU has synthesized and sent to the image display driver into the display screen, so that the display screen starts to display Image 2 approximately 2.8 ms after the second display duration of the second image (Image 1) times out. After the display screen displays Image 2, if the image display driver receives the display data of Image 3 sent by the GPU within 8.3 ms of the display screen displaying Image 2 (i.e., receives the display data of Image 3 before time t6), it determines that the current display of the display screen for Image 2 has stabilized, and thus sends a control instruction to the display screen to reduce the frequency of the output Vsync signal (the moment when the vertical long dashed line on the right side of the figure indicates the moment of reducing the output Vsync signal). In this way, the display screen can feedback the fifth Vsync signal (Vsync signal 6 with the original frequency) to the image display driver, APP, SF, and GPU at the fifth moment (t6) approximately 8.3 ms after t5, and the image display driver can respond to Vsync signal 6 and write the display data of Image 3 into the display screen, thereby driving the display screen to display Image 3.

[0218] In the embodiment of the present application, for the method provided in the embodiment of the present application, after the image display driver receives the display data of the next frame of the third image within the third display duration of the display screen displaying the third image, and thus determines that the display of the display screen for the third image tends to be stable, the frequency of the Vsync signal output by the display screen is reduced. In this way, it is possible to avoid power consumption waste caused by the display screen still outputting the Vsync signal at a high frequency for a long time after the display of the third image stabilizes, thereby achieving the purpose of saving device power consumption.

[0219] It should be noted that the above Vsync signal of the original frequency is the Vsync signal triggered by the display screen at the original frequency before the image display driver of the display screen increases the frequency of the output Vsync signal. Exemplarily, it is assumed that the display screen initially triggers and feeds back the Vsync signal to the image display driver at a frequency of 120 Hz. After that, during the display of the second image on the display screen, since the display screen times out in displaying the second image, the image display driver increases the frequency of the output Vsync signal to 360 Hz, and sends an image to the display screen in response to the third Vsync signal triggered by the display screen at a frequency of 360 Hz at the third moment to drive the display screen to display the third image. At this time, the third Vsync signal triggered by the display screen at a frequency of 360 Hz is the Vsync signal after the frequency increase. After that, when the image display driver determines that the display of the third image on the display screen is stable, it sends a control instruction to the display screen to reduce the frequency of the output Vsync signal, that is, from 360 Hz to 120 Hz. Then, the fifth Vsync signal triggered by the display screen again at a frequency of 120 Hz at the fifth moment is the Vsync signal of the original frequency.

[0220] In some other feasible embodiments, after determining that the display of the above-mentioned third image on the display screen tends to be stable, the image display driver of the electronic device can not only immediately reduce the frequency of the output Vsync signal, but also reduce the frequency of the output Vsync signal after determining that the display of the third image and the subsequent consecutive multiple frames of images on the display screen tend to be stable. In this way, the continuous jamming situation that may exist during the image display process of the electronic device can be alleviated.

[0221] It should be noted that in the embodiments of the present application, the high temperature caused by the long-term operation of the electronic device or the insufficient system resources may cause the upper layer of the system and / or the image display driver to fail to respond to the vertical synchronization signal in time for image processing, thereby causing continuous jamming during the image display process of the display screen.

[0222] In the embodiments of the present application, if the electronic device reduces the frequency of the Vsync signal output by the display screen during the display of the (N - 1)-th image after the third image through the image display driver, then the time interval between the fifth moment when the electronic device generates the fifth Vsync signal through the display screen and the third moment when the display screen outputs the third Vsync signal will be only N * 8.3 ms. At this time, N is a positive integer greater than 1.

[0223] In the embodiment of the present application, after the image display driver of the electronic device starts to display the third image on the display screen, it can frame by frame detect whether the display data of the Nth image after the third image is received within the display duration of the (N - 1)th image after the third image is displayed on the display screen. In this way, when it is continuously detected that the display data of the Nth image is received within the display duration of the (N - 1)th image displayed on the display screen by the image display driver, the image display driver reduces the frequency of the Vsync signal output by the display screen.

[0224] It should be noted that in the embodiment of the present application, N is a positive integer greater than 1. Similar to the time consumed for reducing the Vsync signal, the specific value of N can also be an empirical value pre-added to the image display driver, or N can also be a value temporarily determined by the electronic device based on its own real-time system resource occupancy, device energy storage margin, performance performance, etc. It should be understood that based on different design requirements in actual applications, N can of course be different positive integers greater than 1. That is, the method provided in the embodiment of the present application does not limit the specific value of N either.

[0225] Exemplarily, as Figure 21 shown, when the electronic device detects that the display of image 0 on the display screen times out after time t1 through the delay detection module, it increases the frequency of the Vsync signal output by the display screen (the moment shown by the left vertical long dashed line in the figure is the moment when the output frequency of the Vsync signal is increased). After that, the display screen outputs the third Vsync signal (Vsync signal a) with an increased frequency at the third moment (t2). Thus, the image display driver writes the display data of the third image (image 1) to the display screen in response to Vsync signal a at time t2, so that the display screen displays image 1 after the display duration of image 0 times out by about 2.8 ms (1 / 360 Hz of the third Vsync period corresponding to the third Vsync). When the (N - 1)th image after image 1 (the (N - 1)th frame image after image 1) is displayed on the display screen, if the image display driver also receives the display data of image N sent by the GPU within 8.3 ms of the display of image N - 1 on the display screen, it is determined that the current continuous display of multiple frames of images on the display screen has been stabilized, and thus the frequency of the output Vsync signal is reduced (the moment shown by the right vertical long dashed line in the figure is the moment when the output frequency of the Vsync signal is reduced). In this way, the display screen can feedback the fifth Vsync signal to the image display driver, APP, SF, and GPU at the fifth moment (tN + 3) after the third moment, and the image display driver writes the display data of image N to the display screen in response to the fifth Vsync signal, thereby driving the display screen to display image N.

[0226] In the embodiment of the present application, after the image display driver of the electronic device displays the third image on the display screen, it continues to respond to the Vsync signal with an increased frequency triggered by the display screen, and writes the display data of the next frame of the third image to the display screen to drive the display screen to display the next frame of the image. Until when driving the display screen to display the (N - 1)-th frame of the image after the third image, the image display driver detects whether it receives the display data of the N-th frame of the image after the third image of the electronic device (the N-th frame of the image is after the (N - 1)-th frame of the image) within the display duration of the display screen for the (N - 1)-th frame of the image. And, after the image display driver detects that it receives the display data of the N-th frame of the image within the display duration of the display screen for the (N - 1)-th frame of the image, the image display driver determines that the current display of the (N - 1)-th frame of the image after the third image is stable, and thus reduces the frequency of the Vsync signal output by the display screen.

[0227] In the embodiment of the present application, by reducing the frequency of the output Vsync signal after determining that the display of the (N - 1)-th frame of the image after the third image on the display screen tends to be stable, the electronic device can avoid the power consumption waste caused by the display screen outputting the Vsync signal at a high frequency after the display of the image tends to be stable. And, by reducing the frequency of the output Vsync signal after the display of the (N - 1)-th frame of the image after the third image on the display screen tends to be stable, it can also avoid the phenomenon that the image display driver frequently increases and decreases the frequency of the output Vsync signal, further saving the power consumption required for the device to frequently adjust the frequency of the output Vsync signal.

[0228] In some other feasible embodiments, the image display driver of the electronic device can also detect whether it receives the display data of the next frame of the image displayed on the display screen within the single-frame display duration of each frame of the image after the third image on the display screen after the third image is displayed on the display screen. And during the process of continuously displaying each frame of the image from the third image to the (N - 1)-th frame of the image after the third image on the display screen, it is detected whether the image display driver receives the display data of the N-th frame of the image within the display duration of the display screen for the (N - 1)-th frame of the image, so that in the case where it is detected that the answer is yes (receiving the display data of the N-th frame of the image within the display duration of the display screen for the (N - 1)-th frame of the image), the image display driver reduces the frequency of the output Vsync signal. In this way, it can more accurately avoid the phenomenon that the image display driver frequently increases and decreases the frequency of the output Vsync signal, thereby realizing the saving of the device power consumption waste caused by frequently increasing and decreasing the frequency of the output Vsync signal.

[0229] In some embodiments, the embodiments of the present application provide an electronic device, which has the function of implementing the image display method described in each of the above embodiments. This function can be implemented by hardware or by hardware executing corresponding software. The hardware or software includes one or more modules corresponding to the above functions.

[0230] In some embodiments, the embodiments of the present application provide an electronic device, including: a processor and a memory; the memory is used to store computer program code, and the computer program code includes computer execution instructions. When the electronic device runs, the processor executes the computer execution instructions so that the electronic device executes the image display method described in each of the above embodiments.

[0231] In some embodiments, the embodiments of the present application provide an electronic device, including: a processor; the processor is used to be coupled with the memory, and after reading the instructions in the memory, execute the image display method described in each of the above embodiments according to the instructions.

[0232] In some embodiments, the embodiments of the present application provide a computer-readable storage medium, including computer instructions. When the computer instructions run on an electronic device, the electronic device is enabled to execute the wallpaper display method described above.

[0233] In some embodiments, the embodiments of the present application provide a computer program product. When the computer program product runs on an electronic device, the electronic device is enabled to execute the image display method described in each of the above embodiments.

[0234] In some embodiments, the embodiments of the present application provide a computer program product containing instructions. When it runs on a computer, the computer can execute the image display method described in each of the above embodiments.

[0235] In some embodiments, the embodiments of the present application provide a device (for example, the device can be a display system). The device includes a processor for supporting the electronic device to implement the function of the image display method described in each of the above embodiments. In a possible design, the device further includes a memory for storing necessary program instructions and data of the electronic device.

[0236] Through the description of the above embodiments, those skilled in the art can clearly understand that for the convenience and conciseness of description, only the above division of each functional module is used as an example. In practical applications, the above functions can be allocated to different functional modules according to needs, that is, the internal structure of the device is divided into different functional modules to complete all or part of the functions described above.

[0237] In several embodiments provided in the present application, it should be understood that the disclosed devices and methods can be implemented in other ways. For example, the device embodiments described above are merely illustrative. For example, the division of the modules or units is only a logical function division. In actual implementation, there may be other division methods. For example, multiple units or components can be combined or integrated into another device, or some features can be ignored or not executed. Another point is that the displayed or discussed coupling, direct coupling, or communication connection to each other can be through some interfaces. The indirect coupling or communication connection of the devices or units can be in electrical, mechanical, or other forms. The units described as separate components may or may not be physically separated. The components displayed as units can be one physical unit or multiple physical units, that is, they can be located in one place or distributed to multiple different places. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0238] In addition, each functional unit in various embodiments of the present application can be integrated in a processing unit, or each unit can exist physically alone, or two or more units can be integrated in one unit. The above-mentioned integrated units can be implemented in the form of hardware or in the form of software functional units. If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a readable storage medium. Based on such an understanding, the technical solution of the embodiments of the present application, in essence, or the part that contributes to the prior art, or all or part of this technical solution, can be embodied in the form of a software product. The software product is stored in a storage medium and includes several instructions to enable a device (which can be a single-chip microcomputer, a chip, etc.) or a processor to execute all or part of the steps of the methods described in various embodiments of the present application. The foregoing storage medium includes: USB flash drives, mobile hard disks, read only memory (ROM), random access memory (RAM), magnetic disks, or optical discs and other various media that can store program codes.

[0239] The above content is only the specific implementation manner of the present application, but the protection scope of the present application is not limited thereto. Any changes or substitutions within the technical scope disclosed in the present application should be covered by the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims.

Claims

1. An image display method, characterized in that: Applied to an electronic device, the electronic device includes a display screen, and the method includes: At a first moment, the electronic device generates a first Vsync signal, and in response to the first Vsync signal, starts to display a first image on the display screen, wherein the first Vsync signal corresponds to a first Vsync cycle, and a first display duration of displaying the first image is the same as a duration of the first Vsync cycle; At a second moment, the electronic device generates a second Vsync signal, and in response to the second Vsync signal, starts to display a second image on the display screen, wherein the second Vsync signal corresponds to a second Vsync cycle, the second Vsync cycle is the same as the first Vsync cycle, the second moment is after the first moment, and the second image is a next frame image of the first image; After starting to display the second image on the display screen, detect whether a second display time for displaying the second image is greater than the first display time; if the second display time is greater than the first display time, send a control instruction to the display screen, and the control instruction is used to control the frequency of generating the Vsync signal so that the frequency of the Vsync signal generated by the display screen is higher than the frequency of the Vsync signal generated by the current display screen.

2. The method according to claim 1, characterized in that The electronic device further includes an image display driver, and if the second display duration is greater than the first display duration, a control instruction is sent to the display screen, wherein the control instruction is used to control the frequency of generating a Vsync signal, specifically: If the second display duration is greater than the first display duration, the image display driver sends a control instruction to the display screen, and the control instruction is used to control the frequency of generating the Vsync signal so that the frequency of the Vsync signal generated by the display screen is higher than the current frequency of the Vsync signal generated by the display screen.

3. The method according to claim 1, characterized in that After sending the control instruction to the display screen, the method further includes: At a third moment, the electronic device generates a third Vsync signal, wherein the third Vsync signal corresponds to a third Vsync period, the third moment is after the second moment, and the third Vsync period is shorter than the first Vsync period.

4. The method according to claim 3, characterized in that The second display duration is less than twice the first display duration.

5. The method according to claim 3, characterized in that: The method further comprises: In response to the third Vsync signal, a third image starts to be displayed on the display screen, where the third image is a next frame image of the second image.

6. The method according to claim 5, characterized in that A third display time length for displaying the third image is shorter than the first display time length.

7. The method according to claim 5, characterized in that A third display time duration for displaying the third image is the same as the first display time duration.

8. The method according to claim 5, characterized in that The method further comprises: At a fourth moment, the electronic device generates a fourth Vsync signal and continues to display the second image on the display screen, wherein the fourth moment is after the second moment and before the third moment.

9. The method according to any one of claims 3 to 8, characterized in that The first Vsync period is 8.3 ms, and the third Vsync period is 2.8 ms.

10. The method according to any one of claims 1 to 8, characterized in that The first display time length is 8.3 ms, and the second display time length is 11.1 ms.

11. The method according to any one of claims 3 to 8, characterized in that The method further comprises: At a fifth moment, the electronic device generates a fifth Vsync signal, wherein the fifth Vsync signal corresponds to a fifth Vsync cycle, the fifth moment is after the third moment, and the fifth Vsync cycle is the same as the first Vsync cycle.

12. The method according to claim 11, characterized in that Before the fifth moment, the method further includes: comparing a fourth display duration of a fourth image displayed with a preset interval duration, wherein the fourth image is an image displayed in a frame before the fifth moment; If the comparison result meets the preset condition, a control instruction is sent to the display screen, and the control instruction is used to control the frequency of generating the Vsync signal.

13. The method according to claim 12, characterized in that The electronic device further includes an image display driver, which sends a control instruction to the display screen if the comparison result meets the preset conditions. The control instruction is used to control the frequency of generating the Vsync signal, specifically: If the comparison result meets the preset conditions, the image display driver sends a control instruction to the display screen, and the control instruction is used to control the frequency of generating the Vsync signal so that the frequency of the Vsync signal generated by the display screen is lower than the current frequency of the Vsync signal generated by the display screen.

14. The method according to claim 11, characterized in that The fifth moment is N 8.3 ms away from the third moment, where N is a positive integer greater than or equal to 1.

15. The method according to claim 1, characterized in that The method also includes: if the second display duration is less than or equal to the first display duration, then at a sixth moment, the electronic device generates a sixth Vsync signal, and in response to the sixth Vsync signal, starts to display a third image on the display screen, wherein the sixth moment is after the second moment, the third image is the next frame image of the second image, the sixth Vsync signal corresponds to a sixth Vsync cycle, the sixth Vsync cycle is the same as the first Vsync cycle, and the third display duration for displaying the third image is the same as the first display duration.

16. An electronic device, characterized in that: The electronic device comprises: a processor and a memory, wherein the processor is coupled to the memory; the memory is used to store computer program code; the computer program code comprises computer instructions, and when the processor executes the above-mentioned computer instructions, the electronic device executes the method as described in any one of claims 1-15.

17. A computer-readable storage medium, characterized in that: The computer-readable storage medium includes computer instructions, and when the computer instructions are executed on an electronic device, the electronic device executes the method according to any one of claims 1 to 15.

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