Ciphertext decryption method and related apparatus

Abstract

This invention discloses a quantum circuit construction method, a ciphertext decryption method, and related devices. The quantum circuit construction method involves performing LUP matrix decomposition on the matrix corresponding to a preset fixed polynomial to obtain L-type, U-type, and P-type matrices. Then, a quantum circuit is constructed based on the L-type, U-type, and P-type matrices obtained by decomposition and a preset modular arithmetic unit. The quantum circuit can calculate the multiplication operation between an arbitrary polynomial and a fixed polynomial in the finite field GF(p,k). The quantum circuit can be used to efficiently generate multiplication operation data in GF(p,k), and the generated multiplication operation data can be used to accelerate the cracking of ciphertext in classical encryption algorithms.

Description

Technical Field

[0001] This invention belongs to the field of quantum computing technology, specifically a quantum circuit construction method, a ciphertext decryption method, and related devices. Background Technology

[0002] A quantum computer is a physical device that performs high-speed mathematical and logical operations, stores and processes quantum information in accordance with the laws of quantum mechanics. When a device processes and calculates quantum information and runs quantum algorithms, it is a quantum computer. Because of its ability to process mathematical problems more efficiently than ordinary computers—for example, reducing the time to crack keys from hundreds of years to hours—quantum computers have become a key technology under research.

[0003] Finite fields, also known as Galois fields (GF), are a crucial concept in many disciplines, including abstract algebra and cryptography. Taking cryptography as an example, the discrete logarithm problem over finite fields is one of the two core difficult problems in classical public-key cryptography. Therefore, how to efficiently generate... The multiplication data in the algorithm can be used to accelerate the cracking of classic encryption algorithms. Summary of the Invention

[0004] The purpose of this invention is to provide a quantum circuit construction method, a ciphertext decryption method, and related devices, which efficiently generate quantum circuits. The multiplication data in the algorithm can be used to accelerate the cracking of classic encryption algorithms.

[0005] One embodiment of the present invention provides a method for constructing quantum circuits, the method comprising:

[0006] Perform LUP matrix decomposition on the matrix corresponding to a predefined fixed polynomial to obtain L-type, U-type, and P-type matrices;

[0007] A quantum circuit is constructed based on the L-type, U-type, and P-type matrices and a preset modular arithmetic unit to compute the multiplication operation between an arbitrary polynomial and a fixed polynomial, where both the fixed polynomial and the arbitrary polynomial belong to finite fields. .

[0008] Optionally, the quantum circuit for calculating the multiplication operation between an arbitrary polynomial and a fixed polynomial, constructed based on the L-type, U-type, and P-type matrices and a preset modular arithmetic unit, includes:

[0009] Quantum circuits corresponding to the L-type matrix are constructed based on the L-type matrix and the preset modular multiplier; quantum circuits corresponding to the U-type matrix are constructed based on the U-type matrix and the preset modular multiplier; and quantum circuits corresponding to the P-type matrix are constructed based on the P-type matrix and the SWAP gate.

[0010] The quantum circuits corresponding to the L-type matrix, U-type matrix, and P-type matrix are cascaded sequentially to obtain a quantum circuit for calculating the multiplication operation between an arbitrary polynomial and a fixed polynomial.

[0011] Optionally, the modular multiplication unit includes a modular addition unit and a modular multiplication unit, and the construction of the quantum circuit corresponding to the L-type matrix based on the L-type matrix and the preset modular multiplication unit includes:

[0012] Determine the non-zero elements in each row of the L-shaped matrix;

[0013] Based on the non-zero elements of each row, a quantum circuit corresponding to an L-shaped matrix is ​​constructed using the modular addition and modular multiplication operators.

[0014] Optionally, constructing the quantum circuit corresponding to the P-type matrix based on the P-type matrix and the SWAP gate includes:

[0015] Determine the non-zero elements in the P-type matrix excluding the diagonal. ;

[0016] If m is less than n, then the SWAP gate is applied to the m-th and n-th qubits;

[0017] If m is greater than n, then determine the non-zero elements. And applying the SWAP gate to the m-th and m-th... On each quantum bit, Less than m, and Greater than m;

[0018] If m equals n or If so, no operation will be performed;

[0019] Determine the quantum circuit corresponding to the P-type matrix.

[0020] Another embodiment of the present invention provides a ciphertext decryption method applied to ciphertext encrypted based on discrete logarithm encryption, the method comprising:

[0021] Obtain the public key and plaintext parameters corresponding to the ciphertext, where both the public key and plaintext parameters belong to a finite field. Middle element;

[0022] Determine the square matrix corresponding to the public key and plaintext parameters;

[0023] Construct the target quantum circuit based on the aforementioned array and the quantum circuit of any one of claims 1-4;

[0024] The private key corresponding to the ciphertext is determined based on the operation result of the target quantum circuit;

[0025] The ciphertext is decrypted based on the private key.

[0026] Optionally, constructing the target quantum circuit based on the array and the quantum circuit in any of the above method embodiments includes:

[0027] The square matrix corresponding to the public key is squared a predetermined number of times to obtain multiple first square matrices; and the square matrix corresponding to the plaintext parameters is squared a predetermined number of times to obtain multiple second square matrices.

[0028] Based on the quantum circuits in any of the above method embodiments, determine the square matrix corresponding to the public key and the first modular polynomial exponent operation quantum circuits corresponding to the first square matrix, and the second modular polynomial exponent operation quantum circuits corresponding to the square matrix corresponding to the plaintext parameters and the second square matrix.

[0029] The target quantum circuit is obtained by cascading the quantum Fourier transform circuit, the first modular polynomial exponentiation quantum circuit, the second modular polynomial exponentiation quantum circuit, and the quantum inverse Fourier transform circuit in sequence.

[0030] Optionally, the step of determining the square matrix corresponding to the public key and the first modular polynomial exponent operation quantum circuits corresponding to the plurality of first square matrices based on the quantum circuits in any of the above method embodiments includes:

[0031] The square matrix corresponding to the public key and the plurality of the first square matrices are respectively used as the fixed polynomial in any of the above method embodiments, and the first modular polynomial exponent operation quantum circuit is determined based on the fixed polynomial.

[0032] Another embodiment of the present invention provides a quantum circuit construction apparatus, the apparatus comprising:

[0033] The matrix decomposition unit is used to perform LUP matrix decomposition on the matrix corresponding to a preset fixed polynomial to obtain L-type, U-type, and P-type matrices.

[0034] The circuit construction unit is used to construct a quantum circuit for calculating the multiplication operation between an arbitrary polynomial and a fixed polynomial, based on the L-type, U-type, and P-type matrices and a preset modular arithmetic unit, wherein both the fixed polynomial and the arbitrary polynomial belong to a finite field. .

[0035] Another embodiment of the present invention provides a ciphertext decryption device applied to ciphertext encrypted based on discrete logarithm encryption, the device comprising:

[0036] The acquisition unit is used to acquire the public key and plaintext parameters corresponding to the ciphertext, wherein both the public key and plaintext parameters belong to a finite field. Middle element;

[0037] A determining unit is used to determine the square matrix corresponding to the public key and the plaintext parameters;

[0038] The construction unit is used to construct the target quantum circuit based on the array and the quantum circuit in any of the above method embodiments;

[0039] The determining unit is further configured to determine the private key corresponding to the ciphertext based on the operation result of the target quantum circuit;

[0040] A decryption unit is used to decrypt the ciphertext based on the private key.

[0041] Another embodiment of the present invention provides a storage medium storing a computer program, wherein the computer program is configured to execute the method described in any of the preceding claims when running.

[0042] Another embodiment of the present invention provides an electronic device including a memory and a processor, wherein the memory stores a computer program and the processor is configured to run the computer program to perform the method described in any of the preceding claims.

[0043] As can be seen, this invention performs LUP matrix decomposition on the matrix corresponding to a preset fixed polynomial to obtain L-type, U-type, and P-type matrices. Then, based on the obtained L-type, U-type, and P-type matrices and a preset modular arithmetic unit, a quantum circuit is constructed. This quantum circuit can compute finite fields. The multiplication of an arbitrary polynomial with a fixed polynomial can be achieved using this quantum circuit. The efficient generation of multiplication operation data can be used to accelerate the cracking of ciphertext in classic encryption algorithms. Attached Figure Description

[0044] Figure 1 A network block diagram of a quantum circuit construction system and a ciphertext decryption system provided in an embodiment of the present invention;

[0045] Figure 2 A schematic flowchart of a quantum circuit construction method provided in an embodiment of the present invention;

[0046] Figure 3 This is a schematic diagram of the structure of a quantum circuit corresponding to an L-shaped matrix, provided in an embodiment of the present invention.

[0047] Figure 4 This is a schematic diagram of the structure of a quantum circuit corresponding to a P-type matrix provided in an embodiment of the present invention;

[0048] Figure 5 This is a schematic diagram of the structure of a quantum circuit corresponding to another P-type matrix provided in an embodiment of the present invention;

[0049] Figure 6 A flowchart illustrating a method for decrypting ciphertext provided in an embodiment of the present invention;

[0050] Figure 7 This is a schematic diagram of the structure of a target quantum circuit provided in an embodiment of the present invention;

[0051] Figure 8 This is a schematic diagram of a quantum circuit construction device provided in an embodiment of the present invention;

[0052] Figure 9 This is a schematic diagram of the structure of a ciphertext decryption device provided in an embodiment of the present invention;

[0053] Figure 10 This is a schematic diagram of the structure of a computer device provided in an embodiment of the present invention. Detailed Implementation

[0054] The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and should not be construed as limiting the present invention.

[0055] Figure 1 This is a network block diagram of a quantum circuit construction system and a ciphertext decryption system provided in an embodiment of the present invention. The quantum circuit construction system or the ciphertext decryption system may include a network 110, a server 120, a wireless device 130, a client 140, storage 150, a classical computing unit 160, a quantum computing unit 170, and may also include additional memory, a classical processor, a quantum processor, and other devices not shown.

[0056] Network 110 is a medium used to provide communication links between various devices and computers connected together within a quantum circuit construction system or ciphertext decryption system, including but not limited to the Internet, corporate intranets, local area networks, mobile communication networks and combinations thereof, and the connection method can be wired, wireless communication links or fiber optic cables, etc.

[0057] Server 120, wireless device 130, and client 140 are conventional data processing systems that may contain data and application programs or software tools that perform conventional computational processes. Client 140 may be a personal computer or a network computer, so the data may also be provided by server 120. Wireless device 130 may be a smartphone, tablet, laptop, smart wearable device, etc. Storage unit 150 may include database 151, which can be configured to store data such as qubit parameters, quantum logic gate parameters, quantum circuits, and quantum programs.

[0058] The classical computing unit 160 (quantum computing unit 170) may include a classical processor 161 (quantum processor 171) for processing classical data (quantum data) and a memory 162 (memory 172) for storing classical data (quantum data). The classical data (quantum data) may be a boot file, an operating system image, and an application program 163 (application program 173). The application program 163 (application program 173) may be used to implement a quantum algorithm compiled by the quantum circuit construction method or ciphertext decryption method provided in the embodiments of the present invention.

[0059] Any data or information stored or generated in the classical computing unit 160 (quantum computing unit 170) can also be configured to be stored or generated in another classical (quantum) processing system in a similar manner, and any application executed therein can also be configured to be executed in another classical (quantum) processing system in a similar manner.

[0060] It should be noted that a true quantum computer has a hybrid structure, which includes at least... Figure 1 The system consists of two main parts: the classical computing unit 160, which is responsible for performing classical calculations and control; and the quantum computing unit 170, which is responsible for running quantum programs to achieve quantum computing.

[0061] The aforementioned classical computing unit 160 and quantum computing unit 170 can be integrated into a single device or distributed across two different devices. For example, a first device including the classical computing unit 160 runs a classical computer operating system, providing quantum application development tools and services, as well as the storage and network services required for quantum applications. Users develop quantum programs using the quantum application development tools and services on the second device, and send these quantum programs to a second device including the quantum computing unit 170 via the network services. The second device runs a quantum computer operating system, which parses and compiles the quantum program's code into instructions that the quantum processor 170 can recognize and execute. The quantum processor 170 then implements the quantum algorithm corresponding to the quantum program based on these instructions.

[0062] The computing units of the classic processor 161 within the classic computing unit 160 are based on CMOS transistors on a silicon chip. These computing units are not limited by time or coherence; that is, they are available at any time without time constraints. Furthermore, the number of such computing units in a silicon chip is sufficient; currently, a single classic processor 161 contains tens of thousands of computing units. Given this sufficient number of computing units and the fixed selectable computing logic of the CMOS transistors (e.g., AND logic), computational performance is achieved by combining a large number of CMOS transistors with a limited set of logic functions during operation.

[0063] In the quantum computing unit 170, the basic computing unit of the quantum processor 171 is the qubit. The input of a qubit is limited by coherence and coherence time; that is, a qubit is limited by its available usage time and is not always readily available. Making full use of qubits within their available usage time is a key challenge in quantum computing. Furthermore, the number of qubits in a quantum computer is one of the representative indicators of its performance. Each qubit performs computational functions through on-demand configured logical functions. Given the limited number of qubits and the diverse logical functions available in quantum computing, such as Hadamard gates (H gates), Pauli-X gates (X gates), Pauli-Y gates (Y gates), Pauli-Z gates (Z gates), X gates, RY gates, RZ gates, CNOT gates, CR gates, iSWAP gates, Tofoli gates, etc., quantum computing requires combining a limited number of qubits with diverse logical function combinations to achieve computational effects.

[0064] Based on these differences, the design of classical logic functions applied to CMOS transistors and the design of quantum logic functions applied to qubits are significantly and fundamentally different. The design of classical logic functions applied to CMOS transistors does not need to consider the individuality of CMOS transistors. For example, the representation of a CMOS transistor in a silicon chip is its individual identifier, location, and usable time of each CMOS transistor. Therefore, classical algorithms composed of classical logic functions only express the operational relationship of the algorithm, not the algorithm's dependence on individual CMOS transistors.

[0065] Quantum logic functions applied to qubits need to consider the individuality of each qubit, such as its position within the quantum chip, its relationship with surrounding qubits, and the duration of its usable time. Therefore, quantum algorithms composed of quantum logic functions not only express the computational relationships within the algorithm but also its dependence on the individual qubits.

[0066] For example:

[0067] Quantum Algorithm 1: H1, H2, CNOT(1,3), H3, CNOT(2,3);

[0068] Quantum Algorithm 2: H1, H2, CNOT(1,2), H3, CNOT(2,3);

[0069] Where 1 / 2 / 3 represent three sequentially connected qubits Q1, Q2, Q3 or interconnected qubits Q1, Q2, Q3, respectively;

[0070] An exemplary explanation of how quantum algorithms are affected by the coherence time of qubits is as follows:

[0071] Define the execution time of a single-qubit logic gate as t, and the execution time of two single-qubit logic gates operating on adjacent qubits as 2t; then:

[0072] When Q1, Q2, and Q3 are interconnected, the computation of Quantum Algorithm 1 requires 6t, which is divided into 4 time periods. The duration of each time period is t, 2t, t, and 2t, respectively. The operations performed in each time period are: H1, H2; CNOT(1,3); H3; CNOT(2,3);

[0073] The computation of Quantum Algorithm 1 requires 5t, which is divided into 3 time periods. The duration of each time period is t, 2t, and 2t respectively. The operations performed in each time period are: H1, H2, H3; CNOT(1,2); CNOT(2,3);

[0074] When Q1, Q2, and Q3 are connected sequentially, Quantum Algorithm 1 needs to be equivalent to: H1, H2; swap(1,2), CNOT(2,3), swap(1,2); H3; CNOT(2,3). The computation of the equivalent Quantum Algorithm 1 requires 10t, divided into 4 time periods, with each time period requiring durations of t, 6t, t, and 2t respectively. The operations performed in each time period are: H1, H2; swap(1,2), CNOT(2,3), swap(1,2); H3; CNOT(2,3).

[0075] Therefore, the application of quantum logic functions in the design of qubits (including the design of whether qubits are used and the design of the efficiency of each qubit) is key to improving the computational performance of quantum computers and requires special design. This is the unique characteristic of quantum algorithms based on quantum logic functions, and is fundamentally and significantly different from classical algorithms based on classical logic functions. The aforementioned design of qubits is a technical problem that ordinary computing devices do not need to consider or address. This invention proposes a quantum circuit construction method, a ciphertext decryption method, and related devices, which efficiently generate quantum circuits. The multiplication data in the algorithm can be used to accelerate the cracking of classic encryption algorithms.

[0076] See Figure 2 , Figure 2 This is a flowchart illustrating a quantum circuit construction method provided in an embodiment of the present invention. The method includes:

[0077] Step 201: Perform LUP matrix decomposition on the matrix corresponding to a preset fixed polynomial to obtain L-type, U-type and P-type matrices;

[0078] in, The elements in the set are polynomials with coefficients consisting of 0 and 1; more precisely, they are residue classes composed of polynomials. The equivalence relations within this set are characterized by modularly dividing (modular division refers to polynomial division and taking the remainder) an irreducible polynomial of degree k. An irreducible polynomial is one that, in the current number field, has no other polynomials as factors besides 1 and the polynomial itself.

[0079] Finite field and similar, It can also be described using polynomials, the difference being... The polynomial coefficients are taken from the set {0, 1, 2, ..., p-1}, where p is generally a prime number. (This is related to the construction...) same, Similarly, we need to first provide an irreducible polynomial of degree k, for example, for p=3, k=2. Assume the irreducible polynomial is:

[0080]

[0081] This irreducible polynomial can be equivalently written as:

[0082]

[0083] Assumption If it is a root of the polynomial above, then = All elements in can be represented as:

[0084] 1

[0085] Alternatively, you could use a different symbol:

[0086]

[0087] The elements listed above are multiplicative closed, and all non-zero elements have inverses, forming a finite field, denoted as . The number of non-zero elements is .

[0088] The fixed polynomial belongs to GF(p, k).

[0089] Decomposing a square matrix A into the product of a lower triangular matrix L and an upper triangular matrix U is called LU decomposition. LUP decomposition is based on LU decomposition by adding a permutation matrix P. The square matrix A is first subjected to the permutation matrix to obtain AP, and then the new matrix is ​​decomposed into LU, i.e., AP = LU.

[0090] Furthermore, before performing LUP matrix decomposition on the matrix corresponding to a preset fixed polynomial, the method includes:

[0091] Determine the degree corresponding to the highest term in a preset irreducible polynomial, wherein the preset irreducible polynomial is a modulus;

[0092] Determine the modular multiplication result of a pre-defined fixed polynomial with each term of lower degree than the highest term;

[0093] The matrix corresponding to the fixed polynomial is determined based on the result of the modular multiplication operation.

[0094] For example, the presupposed irreducible polynomial is:

[0095]

[0096] Right now

[0097]

[0098] The fixed polynomial The result of the modular multiplication with each term of lower degree than the highest term is:

[0099]

[0100]

[0101] =

[0102] Translate the above expression into the language of linear algebra:

[0103]

[0104]

[0105]

[0106] Writing the four equations together gives us:

[0107]

[0108] Therefore, the matrix corresponding to this fixed polynomial can be determined as follows:

[0109]

[0110] Here, we can verify:

[0111]

[0112] It can also be obtained using matrix calculations:

[0113]

[0114] Step 202: Based on the L-type, U-type, and P-type matrices and a preset modular arithmetic unit, construct a quantum circuit for calculating the multiplication operation between an arbitrary polynomial and a fixed polynomial, wherein both the fixed polynomial and the arbitrary polynomial belong to a finite field. .

[0115] The mathematical representation of a quantum logic gate is a matrix. Therefore, the matrix can be processed, such as decomposed, and then the quantum logic gate corresponding to the decomposed matrix can be constructed according to a preset modular arithmetic unit. Then, the quantum logic gate can be applied to the corresponding qubit to obtain a quantum circuit.

[0116] Here, an arbitrary polynomial is the input to the quantum circuit.

[0117] As can be seen, this invention performs LUP matrix decomposition on the matrix corresponding to a preset fixed polynomial to obtain L-type, U-type, and P-type matrices. Then, based on the obtained L-type, U-type, and P-type matrices and a preset modular arithmetic unit, a quantum circuit is constructed. This quantum circuit can compute finite fields. The multiplication of an arbitrary polynomial with a fixed polynomial can be achieved using this quantum circuit. The efficient generation of multiplication operation data can be used to accelerate the cracking of ciphertext in classic encryption algorithms.

[0118] Optionally, the quantum circuit for calculating the multiplication operation between an arbitrary polynomial and a fixed polynomial, constructed based on the L-type, U-type, and P-type matrices and a preset modular arithmetic unit, includes:

[0119] Quantum circuits corresponding to the L-type matrix are constructed based on the L-type matrix and the preset modular multiplier; quantum circuits corresponding to the U-type matrix are constructed based on the U-type matrix and the preset modular multiplier; and quantum circuits corresponding to the P-type matrix are constructed based on the P-type matrix and the SWAP gate.

[0120] The quantum circuits corresponding to the L-type matrix, U-type matrix, and P-type matrix are cascaded sequentially to obtain a quantum circuit for calculating the multiplication operation between an arbitrary polynomial and a fixed polynomial.

[0121] Specifically, the modular arithmetic unit includes a modular addition unit and a modular multiplication unit, and the construction of the quantum circuit corresponding to the L-type matrix based on the L-type matrix and the preset modular arithmetic unit includes:

[0122] Determine the non-zero elements in each row of the L-shaped matrix;

[0123] Based on the non-zero elements of each row, a quantum circuit corresponding to an L-shaped matrix is ​​constructed using the modular addition and modular multiplication operators.

[0124] Specifically, the step of constructing the quantum circuit corresponding to the L-type matrix based on the non-zero elements of each row and the modular addition and modular multiplication operators includes:

[0125] Determine the non-zero elements on the diagonal and non-zero elements on both sides of the diagonal in each row.

[0126] Based on the non-zero elements on the diagonal and the non-zero elements on the non-diagonal, as well as the modular addition and modular multiplication operators, a modular addition and modular multiplication operation circuit is determined. The multiplier of the modular addition and modular multiplication operation circuit is the non-zero element on the diagonal, and the addend of the modular addition and modular multiplication operation circuit is the product of the coefficients of the non-zero elements on the non-diagonal and the corresponding terms of the non-zero elements on the non-diagonal in any polynomial. The modulus of the modular addition and modular multiplication operation circuit is p.

[0127] Based on the modular addition and modular multiplication operation circuits corresponding to each row, construct the quantum circuits corresponding to the L-shaped matrix.

[0128] More specifically, for each non-zero element in a row, if the non-zero element is a diagonal element, it is multiplied by the element; if the non-zero element is not a diagonal element, it is added to the product of the element and the coefficient of the corresponding term in an arbitrary polynomial. After performing addition and multiplication operations on all non-zero elements in the row, the result is modulo p.

[0129] The number of data bits required is The number of auxiliary bits required depends on the modular adder and modular multiplier used. In one specific embodiment, the auxiliary bits... 2.

[0130] For example, the L-type matrix on GF(5,3) is:

[0131]

[0132] p=5, the non-zero element in row 0 is 1. Then the modular addition and modular multiplication operations are determined as ( C) mod 5, the logic gate corresponding to the modulo addition and modulo multiplication operations operates on the data bits and auxiliary bits corresponding to the first term of an arbitrary polynomial; the non-zero elements in the first row are... 1. Then the modular addition and modular multiplication operations are determined as ( 4C) mod 5, the logic gate corresponding to the modular addition and modular multiplication operations operates on the second term of an arbitrary polynomial. Data bits and 2 auxiliary bits; where an arbitrary polynomial is .

[0133] like Figure 3 As shown, Figure 3This is a schematic diagram of a quantum circuit corresponding to an L-shaped matrix, provided in an embodiment of the present invention. The quantum circuit includes 12 qubits, of which 9 are data bits used to encode an arbitrary polynomial. The corresponding quantum state, for example The corresponding quantum state is | | | The quantum state corresponding to B is | | | The quantum state corresponding to C is | | | The other four are auxiliary qubits, corresponding to the quantum state | | | | Used to assist in modular addition and modular multiplication operations, where the initial quantum state of these 4 qubits is | | | | After completing one operation, it will be reset to 0 for the next operation.

[0134] ( C) The quantum logic gate corresponding to mod 5 acts on | | | and | | | | The corresponding qubit, ( The quantum logic gate corresponding to 4C mod 5 acts on | | | and | | | | The corresponding qubit.

[0135] The specific implementation process of the quantum circuit corresponding to the U-shaped matrix is ​​similar to that of the quantum circuit corresponding to the L-shaped matrix, except that one is an upper triangular matrix and the other is a lower triangular matrix. For details, please refer to the specific implementation process of the quantum circuit corresponding to the L-shaped matrix mentioned above, which will not be repeated here.

[0136] In one embodiment of the present invention, the construction of the quantum circuit corresponding to the P-type matrix based on the SWAP gate, wherein the dimension of the P-type matrix is ​​k×k, includes:

[0137] The quantum states of k qubits corresponding to the row number are transferred to the quantum states of k qubits corresponding to the column number, and the non-zero elements in the P-type matrix except for the diagonal are determined. The m and n are the number of rows and columns of the P-type matrix, respectively.

[0138] By applying the SWAP gate to the m-th qubit of the k qubits corresponding to the row number and the n-th qubit of the k qubits corresponding to the column number, the quantum circuit corresponding to the P-type matrix is ​​obtained.

[0139] Further, the transfer of the quantum state of k qubits corresponding to the row number to the quantum state of k qubits corresponding to the column number includes:

[0140] The SWAP gate is applied to the qubits with the same row number and column number, where both the row number and column number correspond to k qubits.

[0141] For example, such as Figure 4 As shown, Figure 4 This is a schematic diagram of a quantum circuit corresponding to a P-type matrix, provided in an embodiment of the present invention. If t=4, the quantum circuit includes four qubits corresponding to the row number: , , , The four qubits corresponding to the column number: , , , You can first use SWAP ( , ), SWAP , ), SWAP , ), SWAP , The quantum state of the qubit corresponding to the row number is transferred to the quantum state of the qubit corresponding to the column number. Here, the four SWAP gates operate on different qubits, so their timing is not affected. Figure 4 This is just one example.

[0142] If the P-type matrix is:

[0143]

[0144] Then non-zero elements have , , , Therefore, SWAP exists. , ), SWAP , ), SWAP , ), SWAP , Similarly, the four SWAP gates here operate on different qubits, therefore their timing is not affected. Figure 4 This is just one example.

[0145] In another embodiment of the present invention, determining the quantum circuit corresponding to the P-type matrix based on the SWAP gate includes:

[0146] Determine the non-zero elements in the P-type matrix excluding the diagonal. ;

[0147] If m is less than n, then the SWAP gate is applied to the m-th and n-th qubits;

[0148] If m is greater than n, then determine the non-zero elements. And applying the SWAP gate to the m-th and m-th... On each quantum bit, Less than m, and Greater than m;

[0149] If m equals n or If so, no operation will be performed;

[0150] Determine the quantum circuit corresponding to the P-type matrix.

[0151] For example, such as Figure 5 As shown, Figure 5 This is a schematic diagram of another quantum circuit corresponding to a P-type matrix provided in an embodiment of the present invention.

[0152] If the P-type matrix is:

[0153]

[0154] Non-zero elements have , , , For non-zero elements If 0 < 3, then the SWAP gate will be applied to the 0th and 3rd qubits. and For non-zero elements If 1 > 0, then the search upwards will yield... m=1> =0 and =3>m=1, apply the SWAP gate to the 1st and 3rd qubits ( and Similarly, for non-zero elements... Apply the SWAP gate to the 2nd and 3rd qubits ( and For non-zero elements If no operation is performed, then no operation is performed; after all non-zero elements have been traversed, the quantum circuit corresponding to the P-type matrix is ​​determined.

[0155] As can be seen, in this embodiment of the invention, the required number of qubits is k, which is less than the 2k qubits required in the previous embodiment. The classical computation involved in the previous embodiment involves less computation and is more logically direct, but it calls up a larger number of qubits. The advantages and disadvantages of this embodiment are the opposite of those of the previous embodiment.

[0156] It should be noted that the maximum value of an element in an L-shaped or U-shaped matrix is ​​p-1, therefore each element needs to... Each data bit represents the number of quantum circuits required for k×k L-type and U-type matrices. 1 data bit; since all elements in the P-type matrix are 1, each element requires 1 data bit; Each data bit represents the number of quantum circuits required for a k×k P-type matrix. One or 2k data bits; when concatenating, the P-type matrix can be expanded to A quantum circuit with 10 data bits, i.e. Each data bit represents an element.

[0157] Discrete logarithms are considered one of the three fundamental disciplines of modern cryptography, their security relying on the computationally incomputable nature of discrete exponents over finite fields. The discrete logarithm problem is: given a prime number p and a positive integer b, know b... Given the value of x, we need to solve for x. In discrete logarithm-based encryption methods, x is the private key, a is the public key, and b is the plaintext parameter. Knowing a and b, it is very difficult to solve for x. Even using the most efficient number field sieve method to factor a 795-bit binary number would take over 3000 years. Furthermore, algorithms such as ELGamal encryption, DSA digital signature scheme, ECDSA signature algorithm, SM3 signature algorithm, identity-based cryptography (IBE, IBS), and SM9 identifier cryptography are all based on the assumption of the discrete logarithm difficulty problem. Therefore, how to achieve fast cracking of ciphertext encrypted using discrete logarithm-based methods in traditional cryptography based on the quantum circuits in the above embodiments remains a challenging problem.

[0158] This invention proposes a method for decrypting encrypted text, see [link to relevant documentation]. Figure 6 , Figure 6 This is a flowchart illustrating a method for decrypting ciphertext provided in an embodiment of the present invention. The method includes:

[0159] Step 601: Obtain the public key and plaintext parameters corresponding to the ciphertext, wherein both the public key and plaintext parameters belong to a finite field. Middle element;

[0160] Step 602: Determine the square matrix corresponding to the public key and plaintext parameters;

[0161] Specifically, both the public key and the plaintext parameter are in polynomial form. The polynomials corresponding to the public key and the plaintext parameter are respectively used as fixed polynomials, and then the square matrix corresponding to the public key and the plaintext parameter is determined by referring to the matrix determination method of the fixed polynomial.

[0162] Step 603: Construct the target quantum circuit based on the array and the quantum circuit in any of the above embodiments;

[0163] Optionally, constructing the target quantum circuit based on the array and the quantum circuit in any of the above embodiments includes:

[0164] The square matrix corresponding to the public key is squared a predetermined number of times to obtain multiple first square matrices; and the square matrix corresponding to the plaintext parameters is squared a predetermined number of times to obtain multiple second square matrices.

[0165] Based on the quantum circuits in any of the above embodiments, determine the square array corresponding to the public key and the first modular polynomial exponent operation quantum circuits corresponding to the first square arrays, as well as the square array corresponding to the plaintext parameters and the second modular polynomial exponent operation quantum circuits corresponding to the second square arrays.

[0166] The target quantum circuit is obtained by cascading the quantum Fourier transform circuit, the first modular polynomial exponentiation quantum circuit, the second modular polynomial exponentiation quantum circuit, and the quantum inverse Fourier transform circuit in sequence.

[0167] Specifically, the step of determining the square matrix corresponding to the public key and the first modular polynomial exponent operation quantum circuits corresponding to multiple first square matrices based on the quantum circuits in any of the above embodiments includes:

[0168] The square matrix corresponding to the public key and the plurality of the first square matrices are respectively used as the fixed polynomial in any of the above embodiments, and the first modular polynomial exponent operation quantum circuit is determined based on the fixed polynomial.

[0169] The preset number of iterations is k-1, thus yielding k-1 first square matrices and k-1 second square matrices. (Refer to...) Figure 2In this method implementation, the quantum circuit corresponding to each square matrix can be determined. By cascading the k quantum circuits constructed from the square matrix corresponding to the public key and k-1 first square matrices, the first modular polynomial exponentiation quantum circuit can be obtained; similarly, by cascading the k quantum circuits constructed from the square matrix corresponding to the plaintext parameters and k-1 second square matrices, the second modular polynomial exponentiation quantum circuit can be obtained.

[0170] Step 604: Determine the private key corresponding to the ciphertext based on the operation result of the target quantum circuit;

[0171] The target quantum circuit runs on a quantum computing unit, which can be a quantum computer or a quantum virtual machine. The classical computing unit sends the target quantum circuit to the quantum computing unit, which excites the qubits in the target quantum circuit to their initial states. Then, based on the quantum logic gates in the target quantum circuit, it applies corresponding analog signals to the qubits to cause the initial states of the qubits to evolve. Finally, it applies analog signals to measure the qubits, determines the result of the target quantum circuit's operation, and feeds the result back to the classical computing unit.

[0172] The quantum computing unit executes the target quantum circuit a specified number of times. The measured execution results can be in the form of an array. For example, for two qubits and 1024 executions, the measurement results could be "00":251, "01":213, "10":260, "11":300, where "00", "01", "10", and "11" are the measured quantum states, and "251", "213", "260", and "300" are the number of times the measured quantum states were executed.

[0173] Step 605: Decrypt the ciphertext based on the private key.

[0174] To determine the private key corresponding to the ciphertext based on the running results, and to decrypt the ciphertext based on the private key, please refer to the patent document with application number "202111365914.4" entitled "Ciphertext Decryption Method and Related Device"; or refer to the patent document with application number "202111365902.1" entitled "Ciphertext Decryption Method and Related Device".

[0175] As can be seen, this invention transforms the public key and plaintext parameters corresponding to the obtained ciphertext into a square matrix. The ciphertext is based on discrete logarithm encryption, and both the public key and plaintext parameters belong to a finite field. The elements are then used; then, based on the square matrix and the quantum circuit in the above method embodiment, the target quantum circuit is constructed and run, the private key is determined by the running result of the target quantum circuit, and the ciphertext is decrypted by the private key; even using the most efficient number field sieve method to decompose a binary number represented by 795 bits, the existing technology would take more than 3,000 years. Compared with the existing technology, the present invention greatly realizes the speed of cracking ciphertext based on discrete logarithm encryption by using the superposition and entanglement characteristics of quantum computing.

[0176] Optionally, the quantum Fourier transform circuit includes an H-gate acting on a first auxiliary bit and a second auxiliary bit, the first modular polynomial exponentiation quantum circuit is controlled by the second auxiliary bit, the second modular polynomial exponentiation quantum circuit is controlled by the first auxiliary bit, and the quantum inverse Fourier transform circuit includes quantum inverse Fourier transform modules acting on the first auxiliary bit and the second auxiliary bit.

[0177] Among them, the quantum circuits corresponding to L-type, U-type, and P-type matrices require at least Therefore, the quantum circuits for the first-modulus polynomial exponentiation operation and the second-modulus polynomial exponentiation operation also require at least [number] qubits. One quantum bit.

[0178] The first modular polynomial exponentiation quantum circuit is controlled by a second auxiliary bit. The first modular polynomial exponentiation quantum circuit includes k terms, each controlled by... A second auxiliary bit is needed for control, therefore... A second auxiliary bit controls the operation. Similarly, the second-modulus polynomial exponential quantum circuit requires... The first auxiliary bit controls.

[0179] Among them, the H gate is a single gate, and the H gate acts on the first auxiliary bit and the second auxiliary bit, therefore it is necessary to H doors.

[0180] Specifically, the quantum inverse Fourier transform circuit includes quantum inverse Fourier transform modules acting on the first auxiliary bit and the second auxiliary bit, including: the quantum inverse Fourier transform circuit includes two quantum inverse Fourier transform modules, one of which acts on the first auxiliary bit and the second auxiliary bit. One first auxiliary bit, the other acts on The second auxiliary bit.

[0181] like Figure 7 As shown, Figure 7 A schematic diagram of a target quantum circuit provided in an embodiment of the present invention. The target quantum circuit includes... The first auxiliary bit, The second auxiliary bit, One data bit. The first auxiliary bit and The initial quantum state of each of the second auxiliary bits is , The initial quantum state of the data bits excluding the least significant bit is: Besides, others The initial quantum state of each qubit is .

[0182] Wherein, the square matrix corresponding to public key 'a' is A, and the first square matrix is... , ··· , The quantum circuit corresponding to square array A is Mat A, and the quantum circuits corresponding to the first square array are respectively Mat ··· Mat Each square array or the quantum circuit corresponding to the first square array is controlled by the corresponding second auxiliary bit, together forming the first modular polynomial exponential operation quantum circuit.

[0183] Wherein, the square matrix corresponding to the plaintext parameter b is B, and the second square matrix is... , ··· , The quantum circuit corresponding to the first square array B is Mat B, and the quantum circuits corresponding to the second square array are respectively... Mat ··· Mat Each quantum circuit corresponding to a square matrix or a second square matrix is ​​controlled by the corresponding second auxiliary bit, together forming the second modular polynomial exponential operation quantum circuit.

[0184] The quantum Fourier transform operation is performed through an H-gate acting on each first auxiliary bit and each second auxiliary bit, which is a quantum inverse Fourier transform operation. Acting on One first auxiliary bit, another quantum inverse Fourier transform operation Acting on The second auxiliary bit.

[0185] Optionally, the private key corresponding to the ciphertext is determined based on the running result of the target quantum circuit, wherein the running result of the target quantum circuit includes good number pairs, including:

[0186] A first good number vector is determined based on one of the good number pairs, and a second good number vector is determined based on the other of the good number pairs;

[0187] Determine the inverse of each element in the second good number vector to obtain the third good number vector;

[0188] Determine the tensor product of the first good number vector and the third good number vector;

[0189] The private key corresponding to the ciphertext is determined from the tensor product.

[0190] Among them, the good number is the classical data obtained after decoding the good state of quantum data, the good state is the quantum state obtained by measuring the first auxiliary bit or the second auxiliary bit, and the good number pair includes two good numbers, which are the two good numbers corresponding to the two good states obtained by measuring the first auxiliary bit and the second auxiliary bit, respectively.

[0191] run Figure 7 The quantum circuit shown, for the quantum circuit The first auxiliary bit and By measuring the second auxiliary bit, we can obtain the good pairs s and t of the binary string and convert them to decimal. Then, the discrete logarithm problem can be transformed into solving congruence equations:

[0192]

[0193] The solution to the above equation is not necessarily unique, and considering measurement errors (s and t have errors), it is necessary to expand the calculation range of the polynomial size.

[0194] Neglecting errors, and assuming that the measured t is not even, then Since t and t are coprime, there exist integers t and t. ,satisfy:

[0195]

[0196] Therefore:

[0197]

[0198] The computational simulation can be performed using the Extended Euclidean Algorithm, with a time complexity of O(n log n). Even when calculating the modular inverse of a polynomial, the above complexity still ensures that the total time complexity remains at the polynomial level. Compared to traditional algorithms, its time complexity is significantly reduced.

[0199] Considering measurement errors (errors exist in s and t), it is necessary to expand the calculation range of the polynomial size. Specifically, determining the first good number vector based on one of the good number pairs includes: extending one of the good number pairs to both sides to obtain the first good number vector. For example, it can be extending s and t to both sides to obtain good number vectors. For example, the first good number vectors long s and long t are as follows:

[0200]

[0201]

[0202] Specifically, by determining the inverse of each element in the second good number vector long t, the third good number vector long is obtained. :

[0203]

[0204] and The tensor product is:

[0205]

[0206]

[0207] Finally, from the above tensor product... Select the appropriate element from the given elements as the private key x corresponding to the ciphertext.

[0208] See Figure 8 , Figure 8 This is a schematic diagram of a quantum circuit construction device provided in an embodiment of the present invention. The device includes:

[0209] The matrix decomposition unit 801 is used to perform LUP matrix decomposition on the matrix corresponding to a preset fixed polynomial to obtain L-type, U-type and P-type matrices.

[0210] Circuit construction unit 802 is used to construct a quantum circuit for calculating the multiplication operation of an arbitrary polynomial and a fixed polynomial based on the L-type, U-type, and P-type matrices and a preset modular arithmetic unit, wherein both the fixed polynomial and the arbitrary polynomial belong to a finite field. .

[0211] See Figure 9 , Figure 9 An ciphertext decryption device provided in this embodiment of the invention is applied to ciphertext encrypted based on discrete logarithm encryption. The device includes:

[0212] Acquisition unit 901 is used to acquire the public key and plaintext parameters corresponding to the ciphertext, wherein both the public key and plaintext parameters belong to a finite field. Middle element;

[0213] Determining unit 902 is used to determine the square matrix corresponding to the public key and plaintext parameters;

[0214] Construction unit 903 is used to construct a target quantum circuit based on the array and the quantum circuit of any one of claims 1-4;

[0215] The determining unit 902 is further configured to determine the private key corresponding to the ciphertext based on the operation result of the target quantum circuit;

[0216] The decryption unit 904 is used to decrypt the ciphertext based on the private key.

[0217] The specific functions and effects of the quantum circuit construction device and the ciphertext decryption device can be explained by referring to other embodiments in this specification, and will not be repeated here. Each module in the quantum circuit construction device and the ciphertext decryption device can be implemented entirely or partially through software, hardware, or a combination thereof. These modules can be embedded in or independent of the processor in a computer device in hardware form, or stored in the memory of a computer device in software form, so that the processor can call and execute the operations corresponding to each module.

[0218] Please see Figure 10 This specification also provides a computer device, including a memory and a processor, wherein the memory stores a computer program, and the processor, when executing the computer program, implements the quantum circuit construction method or the ciphertext decryption method in any of the above embodiments. Please refer to... Figure 10 The computer device can be a classical computer or a quantum computer.

[0219] This specification also provides a computer-readable storage medium storing a computer program thereon, which, when executed by a computer, causes the computer to perform the quantum circuit construction method or ciphertext decryption method in any of the above embodiments.

[0220] This specification also provides a computer program product containing instructions that, when executed by a computer, cause the computer to perform the quantum circuit construction method or ciphertext decryption method in any of the above embodiments.

[0221] It is understood that the specific examples in this specification are only intended to help those skilled in the art better understand the implementation methods described herein, and are not intended to limit the scope of the invention.

[0222] It is understood that in the various embodiments of this specification, the sequence number of each process does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not limit the implementation process of the embodiments of this specification in any way.

[0223] It is understood that the various implementation methods described in this specification can be implemented individually or in combination, and the implementation methods in this specification are not limited in this respect.

[0224] Unless otherwise stated, all technical and scientific terms used in the embodiments of this specification have the same meaning as commonly understood by one of ordinary skill in the art. The terminology used in this specification is for the purpose of describing particular embodiments only and is not intended to limit the scope of this specification. The term "and / or" as used in this specification includes any and all combinations of one or more of the associated listed items. The singular forms "a," "the," and "the" as used in the embodiments of this specification and the appended claims are also intended to include the plural forms unless the context clearly indicates otherwise.

[0225] It is understood that the processor in the embodiments of this specification can be an integrated circuit chip with signal processing capabilities. In implementation, each step of the above method embodiments can be completed by integrated logic circuits in the processor's hardware or by instructions in software form. The processor can be a general-purpose processor, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware components. It can implement or execute the methods, steps, and logic block diagrams disclosed in the embodiments of this specification. The general-purpose processor can be a microprocessor or any conventional processor. The steps of the methods disclosed in the embodiments of this specification can be directly implemented by a hardware decoding processor, or by a combination of hardware and software modules in the decoding processor. The software modules can reside in random access memory, flash memory, read-only memory, programmable read-only memory, electrically erasable programmable memory, registers, or other mature storage media in the art. This storage medium is located in memory; the processor reads information from the memory and, in conjunction with its hardware, completes the steps of the above methods.

[0226] It is understood that the memory in the embodiments of this specification may be volatile memory or non-volatile memory, or may include both volatile and non-volatile memory. Non-volatile memory may be read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), or flash memory. Volatile memory may be random access memory (RAM). It should be noted that the memory in the systems and methods described herein is intended to include, but is not limited to, these and any other suitable types of memory.

[0227] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this specification.

[0228] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working processes of the systems, devices, and units described above can be referred to the corresponding processes in the aforementioned method implementations, and will not be repeated here.

[0229] In the several embodiments provided in this specification, it should be understood that the disclosed systems, apparatuses, and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between devices or units may be electrical, mechanical, or other forms.

[0230] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment, depending on actual needs.

[0231] In addition, the functional units in the various embodiments of this specification can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit.

[0232] If the aforementioned functions are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solutions of this specification, in essence, or the parts that contribute to the prior art, or parts of the technical solutions, can be embodied in the form of software products. These computer software products are stored in a storage medium and include several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this specification. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0233] The above description is merely a specific embodiment of this specification, but the scope of protection of this invention is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this specification should be included within the scope of protection of this specification. Therefore, the scope of protection of this invention should be determined by the scope of the claims.

Claims

1. A method for decrypting encrypted text, characterized in that, The method, applied to ciphertext based on discrete logarithm encryption, includes: Obtain the public key and plaintext parameters corresponding to the ciphertext, where both the public key and plaintext parameters belong to a finite field. Middle element; Determine the square matrix corresponding to the public key and plaintext parameters; Constructing a target quantum circuit based on a square matrix and a quantum circuit constructed using a preset method; constructing a target quantum circuit based on a square matrix and a quantum circuit constructed using a preset method includes: performing a preset number of square operations on the square matrix corresponding to the public key to obtain multiple first square matrices; and performing a preset number of square operations on the square matrix corresponding to the plaintext parameters to obtain multiple second square matrices; determining the first modular polynomial exponentiation quantum circuit corresponding to the square matrix corresponding to the public key and the multiple first square matrices, and the second modular polynomial exponentiation quantum circuit corresponding to the square matrix corresponding to the plaintext parameters and the multiple second square matrices based on the quantum circuit constructed using the preset method; and converting the quantum Fourier transform circuit, the... The first modular polynomial exponentiation quantum circuit, the second modular polynomial exponentiation quantum circuit, and the quantum inverse Fourier transform circuit are cascaded sequentially to obtain the target quantum circuit. The process of constructing the quantum circuit based on a preset method is as follows: The square matrix corresponding to the public key and multiple first square matrices are respectively used as fixed polynomials. The matrix corresponding to the fixed polynomials is subjected to LUP matrix decomposition to obtain L-type, U-type, and P-type matrices. Based on the L-type, U-type, and P-type matrices and a preset modular arithmetic unit, a quantum circuit is constructed for calculating the multiplication operation between an arbitrary polynomial and one of the fixed polynomials. Both the fixed polynomial and the arbitrary polynomial belong to finite fields. ; The private key corresponding to the ciphertext is determined based on the operation result of the target quantum circuit; The ciphertext is decrypted based on the private key.

2. The method as described in claim 1, characterized in that, The quantum circuit constructed based on the L-type, U-type, and P-type matrices and a preset modular arithmetic unit for calculating the multiplication operation between an arbitrary polynomial and a fixed polynomial includes: Quantum circuits corresponding to the L-type matrix are constructed based on the L-type matrix and the preset modular multiplier; quantum circuits corresponding to the U-type matrix are constructed based on the U-type matrix and the preset modular multiplier; and quantum circuits corresponding to the P-type matrix are constructed based on the P-type matrix and the SWAP gate. The quantum circuits corresponding to the L-type matrix, U-type matrix, and P-type matrix are cascaded sequentially to obtain a quantum circuit for calculating the multiplication operation between an arbitrary polynomial and a fixed polynomial.

3. The method as described in claim 2, characterized in that, The modular multiplication unit includes a modular addition unit and a modular multiplication unit. The construction of the quantum circuit corresponding to the L-type matrix based on the L-type matrix and the preset modular multiplication unit includes: Determine the non-zero elements in each row of the L-shaped matrix; Based on the non-zero elements of each row, a quantum circuit corresponding to an L-shaped matrix is ​​constructed using the modular addition and modular multiplication operators.

4. The method as described in claim 2, characterized in that, The construction of the quantum circuit corresponding to the P-type matrix based on the P-type matrix and SWAP gates includes: Determine the non-zero elements in the P-type matrix excluding the diagonal. ; If m is less than n, then the SWAP gate is applied to the m-th and n-th qubits; If m is greater than n, then determine the non-zero elements. And applying the SWAP gate to the m-th and m-th... On each quantum bit, Less than m, and Greater than m; If m equals n or If so, no operation will be performed; Determine the quantum circuit corresponding to the P-type matrix.

5. A ciphertext decryption device, characterized in that, For use with ciphertext encrypted based on discrete logarithm encryption, the apparatus includes: The acquisition unit is used to acquire the public key and plaintext parameters corresponding to the ciphertext, wherein both the public key and plaintext parameters belong to a finite field. Middle element; A determining unit is used to determine the square matrix corresponding to the public key and the plaintext parameters; A construction unit is used to construct a target quantum circuit based on the square matrix and a quantum circuit constructed based on a preset method; wherein, constructing the target quantum circuit based on the square matrix and the quantum circuit constructed based on the preset method includes: performing a preset number of squaring operations on the square matrix corresponding to the public key to obtain multiple first square matrices; and performing a preset number of squaring operations on the square matrix corresponding to the plaintext parameters to obtain multiple second square matrices; determining, based on the quantum circuit constructed based on the preset method, a first modular polynomial exponentiation quantum circuit corresponding to the square matrix corresponding to the public key and the multiple first square matrices, and a second modular polynomial exponentiation quantum circuit corresponding to the square matrix corresponding to the plaintext parameters and the multiple second square matrices; and converting the quantum Fourier transform... The transformation circuit, the first modular polynomial exponentiation quantum circuit, the second modular polynomial exponentiation quantum circuit, and the quantum inverse Fourier transform circuit are cascaded sequentially to obtain the target quantum circuit. The process of constructing the quantum circuit based on a preset method is as follows: The square matrix corresponding to the public key and multiple first square matrices are respectively used as fixed polynomials. The matrix corresponding to the fixed polynomials is subjected to LUP matrix decomposition to obtain L-type, U-type, and P-type matrices. Based on the L-type, U-type, and P-type matrices and a preset modular arithmetic unit, a quantum circuit is constructed for calculating the multiplication operation between an arbitrary polynomial and one of the fixed polynomials. Both the fixed polynomial and the arbitrary polynomial belong to finite fields. ; The determining unit is further configured to determine the private key corresponding to the ciphertext based on the operation result of the target quantum circuit; A decryption unit is used to decrypt the ciphertext based on the private key.

6. A storage medium, characterized in that, The storage medium stores a computer program, wherein the computer program is configured to execute the method described in any one of claims 1 to 4 when it is run.

7. An electronic device comprising a memory and a processor, characterized in that, The memory stores a computer program, and the processor is configured to run the computer program to perform the method described in any one of claims 1 to 4.

Images