Voltage monitoring circuit and voltage monitoring method
By generating a periodically changing reference voltage in the voltage monitoring circuit and comparing it with the monitored voltage, the problem in the prior art is solved that the reason for the output level switching cannot be accurately determined, and the abnormal determination of voltage monitoring circuit without an external detection circuit is realized. Effective, reduces costs and improves accuracy.
Patent Information
- Application Number
- CN202280095701.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2022-05-12
- Publication Date
- 2024-12-13
AI Technical Summary
The existing voltage monitoring circuit cannot accurately determine whether the output level switching is caused by an abnormality of the monitored voltage or an abnormality of the voltage monitoring circuit itself, and setting an abnormal circuit to detect the abnormality of the voltage monitoring circuit will increase costs.
The reference voltage generation unit generates a periodically changing first reference voltage and a second reference voltage, and compares the variable reference voltage with the monitored voltage through the comparison unit, and switches the output level by changing the reference voltage and the monitored voltage, To determine whether the monitored voltage and voltage monitoring circuit are normal or abnormal.
The normal or abnormality of the monitored voltage and voltage monitoring circuit can be determined by the output of the voltage monitoring circuit. There is no need to set an external abnormal circuit for detecting the voltage monitoring circuit, which reduces the cost and improves the accuracy.
Smart Images
Figure CN119137487A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to a voltage monitoring circuit and a voltage monitoring method, which compare a reference voltage and a monitored voltage and switch an output level according to the magnitudes of the reference voltage and the monitored voltage. Background Art
[0002] For example, Patent Documents 1 and 2 describe voltage monitoring circuits.
[0003] Patent document 1 describes an abnormality detection device, which is set according to the battery block of a battery pack having multiple battery blocks, and has a comparison unit that compares a threshold value with the block voltage of the battery block and a control unit that controls the threshold value, and detects abnormalities of multiple voltage monitoring devices used to monitor the block voltage based on the comparison result of the comparison unit. The abnormality detection device has: an acquisition unit, a determination unit, an output unit, and a detection unit. The acquisition unit acquires the block voltage. The determination unit determines the threshold value based on the block voltage. The output unit outputs an indication signal indicating the signal level of the duty signal to the control unit so that the duty signal corresponding to the threshold value is output from the output terminal of the control unit. The detection unit detects the abnormality of the voltage monitoring device corresponding to the comparison result of the comparison unit based on the threshold value.
[0004] Patent document 2 describes a power supply voltage monitoring circuit having an abnormality detection unit and a voltage change unit. The abnormality detection unit detects a voltage corresponding to the power supply voltage, and detects an abnormality in the power supply voltage based on a comparison result between the detected voltage and a reference voltage. The voltage change unit changes the detected voltage or the reference voltage to a voltage capable of detecting an abnormality within the abnormality detection range of the abnormality detection unit.
[0005] Prior art literature
[0006] Patent Literature
[0007] Patent Document 1: Japanese Patent Application Publication No. 2019-60657
[0008] Patent Document 2: Japanese Patent Application Publication No. 2016-142597 Summary of the invention
[0009] Problems to be solved by the invention
[0010] A voltage monitoring circuit compares a reference voltage with a monitored voltage and switches the output level ("H" level and "L" level) according to the size of the reference voltage and the monitored voltage. For example, when the monitored voltage is below the reference voltage and the output level switches from "H" level to "L" level, the monitored voltage is judged to be abnormal.
[0011] However, switching of the output level of the voltage monitoring circuit may also occur due to an abnormality in the voltage monitoring circuit. Therefore, it is impossible to determine whether switching of the output level of the voltage monitoring circuit occurs due to an abnormality in the monitored voltage or due to an abnormality in the voltage monitoring circuit.
[0012] If a circuit for detecting abnormality of the voltage monitoring circuit is separately provided, the cost will increase.
[0013] Therefore, a voltage monitoring circuit and a voltage monitoring method are desired, which can determine the normality or abnormality of the monitored voltage and the voltage monitoring circuit through the output of the voltage monitoring circuit, without providing a circuit for detecting abnormalities of the voltage monitoring circuit outside the voltage monitoring circuit.
[0014] Means for solving problems
[0015] (1) A first aspect of the present disclosure is a voltage monitoring circuit having:
[0016] a reference voltage generating unit that generates a variable reference voltage that periodically changes into a first reference voltage and a second reference voltage, wherein the second reference voltage is smaller than the first reference voltage; and
[0017] The comparison unit compares the fluctuation reference voltage with the monitored voltage and switches the output level according to the magnitude of the fluctuation reference voltage and the monitored voltage.
[0018] (2) A second aspect of the present disclosure is a voltage monitoring method of a voltage monitoring circuit, wherein:
[0019] The switching element switches between a first reference voltage and a second reference voltage which is smaller than the first reference voltage, thereby inputting a periodically changing reference voltage into the comparison unit.
[0020] The comparison unit compares the fluctuation reference voltage with the monitored voltage, and switches an output level according to the magnitudes of the fluctuation reference voltage and the monitored voltage.
[0021] Effects of the Invention
[0022] According to each aspect of the present disclosure, the normality or abnormality of the monitored voltage and the voltage monitoring circuit can be determined based on the output of the voltage monitoring circuit, without providing a circuit for detecting abnormality of the voltage monitoring circuit separately from the voltage monitoring circuit. BRIEF DESCRIPTION OF THE DRAWINGS
[0023] Figure 1 1 is a block diagram showing a voltage monitoring circuit according to a first embodiment of the present disclosure.
[0024] Figure 2 2 is a waveform diagram showing the operation of the voltage monitoring circuit according to the first embodiment of the present disclosure.
[0025] Figure 3 : is a block diagram showing a voltage monitoring circuit serving as a comparative example.
[0026] Figure 4 : is a waveform diagram showing the operation of the voltage monitoring circuit of the comparative example.
[0027] Figure 5 This is a block diagram for explaining a failure that occurs in a voltage monitoring circuit of a comparative example.
[0028] Figure 6 : is a waveform diagram showing the operation of the voltage monitoring circuit of the comparative example when a failure occurs in the voltage monitoring circuit of the comparative example.
[0029] Figure 7 : is a waveform diagram showing the operation of the voltage monitoring circuit of the comparative example when a failure occurs in the voltage monitoring circuit of the comparative example.
[0030] Figure 8 This is a block diagram for explaining a failure that occurs in the voltage monitoring circuit according to the first embodiment of the present disclosure.
[0031] Fig. 9 : is a waveform diagram showing the operation of the voltage monitoring circuit according to the first embodiment of the present disclosure when a failure occurs in the voltage monitoring circuit according to the first embodiment.
[0032] Fig.10 : is a waveform diagram showing the operation of the voltage monitoring circuit according to the first embodiment of the present disclosure when a failure occurs in the voltage monitoring circuit according to the first embodiment.
[0033] Fig.11 : is a block diagram showing a voltage monitoring circuit according to a second embodiment of the present disclosure.
[0034] Fig.12 2 is a waveform diagram showing the operation of the voltage monitoring circuit according to the second embodiment of the present disclosure.
[0035] Fig.13 This is a block diagram showing a modified example of the voltage monitoring circuit according to the second embodiment of the present disclosure.
[0036] Fig.14 : is a block diagram showing a voltage monitoring circuit according to a third embodiment of the present disclosure.
[0037] Fig.15 It is a waveform diagram showing the operation of the voltage monitoring circuit according to the third embodiment of the present disclosure.
[0038] Fig.161 is a waveform diagram showing the operation of the voltage monitoring circuit according to the first embodiment of the present disclosure when the reference voltage Vref1 is set to a value exceeding the upper limit of the variation range of the monitored voltage Vx.
[0039] Fig.17 2 is a waveform diagram showing the operation of the voltage monitoring circuit according to the first embodiment of the present disclosure when the reference voltage Vref2 is set to a value lower than the lower limit of the variation range of the monitored voltage Vx. DETAILED DESCRIPTION
[0040] Hereinafter, embodiments of the present disclosure will be described in detail using the drawings.
[0041] (First Embodiment)
[0042] Figure 1 1 is a block diagram showing a voltage monitoring circuit according to a first embodiment of the present disclosure. Figure 2 2 is a waveform diagram showing the operation of the voltage monitoring circuit according to the first embodiment of the present disclosure.
[0043] The voltage monitoring circuit 10 includes a reference voltage generating unit 10A and a comparing unit 10B.
[0044] The reference voltage generating unit 10A includes a shunt regulator SR, resistors R1, R2, R3, and R4, and a MOS transistor Tr as a switching element. The comparing unit 20B includes a comparator CP and a resistor R5. The comparing unit 20B switches the output level by varying the magnitude of the reference voltage and the monitored voltage as described below.
[0045] The shunt regulator SR (shunt regulator) applies a voltage between the terminals of the two ends of the series-connected resistors R1 and R2 so that the terminal of the resistor R2 is GND and the terminal of the resistor R1 is a constant voltage Vr. The terminal of the resistor R1 to which the constant voltage Vr is applied is connected to one terminal of the resistor R4. The voltage V1 is applied to the other terminal of the resistor R4. The connection point between the resistor R1 and the resistor R2 is connected to one terminal of the resistor R3 and the inverting input terminal (-) of the comparator CP. The other terminal of the resistor R3 is connected to the drain of the MOS transistor Tr.
[0046] The source of the MOS transistor Tr is connected to GND. The MOS transistor Tr is controlled to be turned on or off by an oscillation signal input to a gate.
[0047] The varying reference voltage Vref input to the inverting input terminal (-) of the comparator CP is periodically switched between a reference voltage Vref1 as a first reference voltage and a reference voltage Vref2 as a second reference voltage by turning on and off the MOS transistor Tr, and changes periodically.
[0048] Specifically, when the MOS transistor Tr is in the off state, the reference voltage Vref1 is input to the inverting input terminal (-) of the comparator CP. The reference voltage Vref1 is a voltage generated by resistance-dividing the constant voltage Vr using the resistors R1 and R2.
[0049] When the MOS transistor Tr is in the on state, a reference voltage Vref2 (Vref2<Vref1) is input to the inverting input terminal (-) of the comparator CP. The reference voltage Vref2 is a voltage generated by resistance-dividing a constant voltage Vr using a combined resistance of the resistor R1 and the resistors R2 and R3 connected in parallel.
[0050] The reference voltage Vref1 and the reference voltage Vref2 are expressed by Math Formula 1 (hereinafter Math Formula 1). The reference voltage Vref1 and the reference voltage Vref2 are generated by changing the resistance division ratio of the constant voltage Vr.
[0051] [Mathematical formula 1]
[0052]
[0053] The comparator CP compares the variable reference voltage Vref input to the inverting input terminal (-) with the monitored voltage Vx input to the non-inverting input terminal (+). The output side of the comparator CP is connected to one terminal of the resistor R5, and the voltage V2 is applied to the other terminal of the resistor R5. The output voltage Vout is output from the comparator CP.
[0054] like Figure 2 As shown, when the monitored voltage Vx is between the reference voltage Vref1 and the reference voltage Vref2 (Vref1>Vx>Vref2), the output voltage Vout becomes a pulse waveform.
[0055] When the monitored voltage Vx is equal to or higher than the reference voltage Vref1 (Vx ≥ Vref1), the output voltage Vout becomes a fixed voltage at the “H” level.
[0056] When the monitored voltage Vx is lower than or equal to the reference voltage Vref2 (Vx≤Vref2), the output voltage Vout becomes a fixed voltage of the “L” level (GND).
[0057] In this embodiment, the voltage monitoring circuit 10 operates as follows: when the monitored voltage Vx and the voltage monitoring circuit are both normal, the output voltage Vout becomes a pulse waveform, and when an abnormality occurs in the monitored voltage Vx or an abnormality occurs in the voltage monitoring circuit itself, the output voltage Vout becomes a fixed voltage of "H" level or "L" level.
[0058] Hereinafter, the operation of the voltage monitoring circuit of this embodiment will be further described by comparing with a voltage monitoring circuit not provided with the resistor R3 and the MOS transistor Tr.
[0059] First, the operation of a voltage monitoring circuit which is a comparative example and does not include the resistor R3 and the MOS transistor Tr will be described.
[0060] Figure 3 : is a block diagram showing a voltage monitoring circuit serving as a comparative example. Figure 4 : is a waveform diagram showing the operation of the voltage monitoring circuit of the comparative example.
[0061] Figure 3 The voltage monitoring circuit 20 shown is Figure 1 The voltage monitoring circuit 10 shown is different in that Figure 1 The reference voltage generating section 10A shown is replaced with a reference voltage generating section 20A from which the resistor R3 and the MOS transistor Tr are removed, and the reference voltage becomes a fixed reference voltage VrefA.
[0062] In the voltage monitoring circuit 20, the comparator CP compares the reference voltage VrefA with the monitored voltage Vx. When the monitored voltage Vx is greater than the reference voltage VrefA, the comparison unit 10B outputs an output voltage Vout of the "H" level. When the monitored voltage Vx is less than the reference voltage VrefA, the comparison unit 10B outputs an output voltage Vout of the "L" level (GND). When the output voltage Vout is at the "H" level, the monitored voltage Vx is determined to be normal, and when it is at the "L" level (GND), the monitored voltage Vx is determined to be abnormal.
[0063] However, as described below, when a failure occurs in the voltage monitoring circuit 20, even when the monitored voltage Vx is lower than the reference voltage VrefA, the output voltage Vout becomes "H" level, and the monitored voltage Vx may be determined to be normal.
[0064] like Figure 5 As shown, a failure indicated by “×” in the figure may occur in the reference voltage generating unit 20A of the voltage monitoring circuit 20, and the reference voltage VrefA may become the reference voltage VrefB (VredB=0 V). Figure 5 This indicates that in the reference voltage generating unit 20A, an open circuit defect indicated by “×” in the figure occurs in the resistors R1 and R4 due to mounting error or open circuit damage, or a short circuit defect indicated by “×” in the figure occurs in the resistor R2 due to a solder bridge.
[0065] When the reference voltage VrefB is input to the inverting input terminal (-) of the comparator CP, Figure 6As shown, even if the monitored voltage Vx is lower than the reference voltage VrefA that should be set, the output voltage Vout becomes "H" level because it is equal to or higher than the reference voltage VrefB, and the monitored voltage Vx is determined to be normal.
[0066] In addition, if Figure 5 As shown, a failure indicated by “×” in the figure may occur in the comparison unit 10B of the voltage monitoring circuit 20, and the output voltage Vout may become “H” level. Figure 5 This shows a case where a welding failure occurs on the output side of the comparator CP of the comparison unit 10B, and an open circuit failure indicated by “×” in the figure occurs.
[0067] If an open circuit occurs at the output side of the comparator CP, Figure 7 As shown, regardless of the comparison result between the monitored voltage Vx and the reference voltage VrefA, the output voltage Vout becomes the "H" level, and the monitored voltage Vx is determined to be normal.
[0068] Next, the operation of the voltage monitoring circuit according to this embodiment will be described.
[0069] The voltage monitoring circuit 10 of this embodiment sets the reference voltage to a variable reference voltage Vref that periodically switches between the reference voltage Vref1 and the reference voltage Vref2, and sets the output voltage Vout to a pulse waveform when the monitored voltage Vx is within the normal range and the voltage monitoring circuit is normal. When the monitored voltage Vx is outside the normal range or the voltage monitoring circuit is abnormal, the output voltage Vout becomes a fixed waveform, and the abnormality of the monitored voltage Vx or the abnormality of the voltage monitoring circuit can be detected. Thus, the safe operation of the device can be guaranteed.
[0070] and Figure 5 The voltage monitoring circuit 20 of the comparative example shown in FIG. Figure 8 As shown, a failure indicated by “×” in the figure may occur in the reference voltage generating unit 10A of the voltage monitoring circuit 10, and the variation reference voltage Vref may become 0V. Figure 8 This indicates that in reference voltage generating unit 10A, an open circuit defect indicated by “×” in the figure occurs in resistors R1 and R4 due to mounting error or open circuit damage, or a short circuit defect indicated by “×” in the figure occurs in resistor R2 due to a solder bridge.
[0071] When a fault indicated by "×" in the figure occurs in the reference voltage generating section 10A of the voltage monitoring circuit 10, and the connection point between the resistors R1 and R2 becomes 0V, even if the MOS transistor Tr is turned on or off, 0V (GND) is applied to the inverting input terminal (-) of the comparator CP. Fig. 9As shown, the monitored voltage Vx exceeds 0 V, so the output voltage Vout becomes a fixed voltage of the "H" level, and the monitored voltage Vx is determined to be out of the normal range or the voltage monitoring circuit is abnormal.
[0072] In addition, as in the comparative example, Figure 8 As shown, a failure indicated by “×” in the figure may occur in the comparison unit 10B of the voltage monitoring circuit 10, and the output voltage Vout may become “H” level. Figure 8 This shows a case where a welding failure occurs on the output side of the comparator CP of the comparison unit 10B, and an open circuit failure indicated by “×” in the figure occurs.
[0073] If an open circuit occurs at the output side of the comparator CP, Fig.10 As shown, regardless of the comparison result between the monitored voltage Vx and the varying reference voltage Vref, the output voltage Vout becomes a fixed voltage at the "H" level, and the monitored voltage Vx is determined to be outside the normal range or the voltage monitoring circuit is abnormal.
[0074] exist Figure 8 In the case where the voltage monitoring circuit 10 is not faulty and the monitored voltage Vx becomes equal to or lower than the reference voltage Vref2, the output voltage Vout becomes a fixed voltage at the "L" level, and it is determined that the monitored voltage Vx is abnormal.
[0075] According to the voltage monitoring circuit of the present embodiment described above, an abnormality in the monitored voltage Vx or the voltage monitoring circuit can be detected, and safe operation of the equipment can be ensured.
[0076] In the voltage monitoring circuit of the present embodiment, a resistor and a switch element are added, and as an oscillation waveform, the periodic variation of the two reference voltages Vref1 and Vref2 can be realized by misappropriating a rectangular wave such as a switching power supply. Therefore, the comparison between the monitored voltage Vx and the two reference voltages Vref1 and Vref2 can be realized by one comparator. The voltage monitoring circuit of the present embodiment has an advantage of being able to reduce the number of comparators used, which can be a cause of failure, compared to the case where two comparators are used to compare the monitored voltage Vx, the two reference voltages Vref1, and the reference voltage Vref2.
[0077] Furthermore, the normal operation of the voltage monitoring circuit can be confirmed without adding a circuit for confirming the normal operation of the voltage monitoring circuit.
[0078] (Second Embodiment)
[0079] The voltage monitoring circuit 10 of the first embodiment operates as follows: when the monitored voltage Vx and the voltage monitoring circuit are both normal, the output voltage Vout becomes a pulse waveform, and when an abnormality occurs in the monitored voltage Vx or an abnormality occurs in the voltage monitoring circuit, the output voltage Vout becomes a fixed voltage at an "H" level or an "L" level.
[0080] The voltage monitoring circuit of the present embodiment includes a determination circuit that determines whether the output voltage Vout is a pulse waveform or a constant voltage.
[0081] Fig.11 : is a block diagram showing a voltage monitoring circuit according to a second embodiment of the present disclosure.
[0082] The voltage monitoring circuit 11 of this embodiment is Figure 1 The voltage monitoring circuit 10 shown has a determination circuit 10C at a subsequent stage of a comparison unit 10B, and the determination circuit 10C determines whether the output voltage Vout is a pulse waveform or a constant voltage.
[0083] The determination circuit 10C includes an AC coupling capacitor C1, a diode D, a resistor R6, and a smoothing capacitor C2. The AC coupling capacitor C1 has one terminal connected to the output terminal of the comparator CP and one terminal of the resistor R5, and the other terminal connected to the anode terminal of the diode D.
[0084] The cathode terminal of the diode D is connected to one terminal of the resistor R6 and one terminal of the smoothing capacitor C2. The other terminal of the resistor R6 and the other terminal of the smoothing capacitor C2 are connected to GND.
[0085] The AC coupling capacitor C1 allows a current to flow when the output voltage Vout changes, and the diode D allows a current to flow when the potential of the anode terminal becomes “H” level.
[0086] The output voltage Vout becomes a pulse waveform. When it changes from GND to "H" level, current flows through the AC coupling capacitor C1 and the diode D, and the voltage of one terminal of the smoothing capacitor C2 rises to "H" level. When the output voltage Vout is a fixed voltage, no current flows through the AC coupling capacitor C1, so one terminal of the smoothing capacitor C2 becomes GND via the resistor R6.
[0087] like Fig.12As shown, when the monitored voltage Vx and the voltage monitoring circuit are both normal, the output voltage Vout becomes a pulse waveform, and when an abnormality occurs in the monitored voltage Vx or the voltage monitoring circuit itself, the output voltage Vout becomes a fixed voltage of "H" level or "L" level. Therefore, the determination signal Vsig output from one terminal of the smoothing capacitor C2 becomes "H" level when the monitored voltage Vx and the voltage monitoring circuit are both normal, and becomes GND when an abnormality occurs in the monitored voltage Vx or the voltage monitoring circuit itself.
[0088] (Modification of determination circuit)
[0089] The determination circuit is not limited to Fig.11 The structure of the determination circuit 10C shown may be other structures.
[0090] Fig.13 This is a block diagram showing a modified example of the voltage monitoring circuit according to the second embodiment of the present disclosure.
[0091] The voltage monitoring circuit 12 of the present embodiment includes a determination circuit 10D instead of Fig.11 The determination circuit 10C of the voltage monitoring circuit 11 is shown.
[0092] The determination circuit 10D includes a counter IC100. The counter IC100 counts the pulses of the input output voltage Vout and resets when no pulses are input. The determination signal Vsig output from the counter IC100 becomes Fig.12 The determination signal Vsig shown has the same waveform.
[0093] (Third Embodiment)
[0094] The example in which the voltage monitoring circuit 10 according to the first embodiment inputs the monitored voltage Vx and the varying reference voltage Vref to the comparator CP has been described.
[0095] The voltage monitoring circuit 13 of the present embodiment inputs two different monitored voltages to the non-inverting input terminals (+) of two comparators, respectively, and inputs a common variable reference voltage Vref to the inverting input terminals (−) of the two comparators.
[0096] Fig.14 : is a block diagram showing a voltage monitoring circuit according to a third embodiment of the present disclosure. Fig.15 : is a waveform diagram showing the operation of the voltage monitoring circuit according to the third embodiment of the present disclosure. Fig.14 In the voltage monitoring circuit 13, Figure 1 The same components as those of the voltage monitoring circuit 10 are denoted by the same reference numerals, and description thereof will be omitted.
[0097] The voltage monitoring circuit 13 of the present embodiment includes a reference voltage generating unit 10A, a comparing unit 13B, and a monitored voltage generating unit 13C.
[0098] The comparison unit 13B includes a first comparison unit including a comparator CP1 and a resistor R11 , and a second comparison unit including a comparator CP2 and a resistor R12 .
[0099] The monitored voltage generating unit 13C includes resistors R7 and R8 for generating a monitored voltage Vx1 and resistors R9 and R10 for generating a monitored voltage Vx2.
[0100] The monitored voltage Vx1 is a voltage generated by resistor-dividing the monitored voltage Vx3 using resistors R7 and R8, and the monitored voltage Vx2 is a voltage generated by resistor-dividing the monitored voltage Vx4 using resistors R9 and R10.
[0101] The voltage monitoring circuit 13 inputs the monitored voltage Vx1 and the monitored voltage Vx2 to the non-inverting input terminal (+) of the comparator CP1 and the non-inverting input terminal (+) of the comparator CP2, respectively, and inputs the common variable reference voltage Vref to the inverting input terminal (-) of the comparator CP1 and the inverting input terminal (-) of the comparator CP2.
[0102] Comparator CP1 compares the variable reference voltage Vref input to the inverting input terminal (-) with the monitored voltage Vx1 input to the non-inverting input terminal (+). Comparator CP2 compares the variable reference voltage Vref input to the inverting input terminal (-) with the monitored voltage Vx2 input to the non-inverting input terminal (+).
[0103] The output side of the comparator CP1 is connected to one terminal of the resistor R11, and the voltage V2 is applied to the other terminal of the resistor R11. The output side of the comparator CP2 is connected to one terminal of the resistor R12, and the voltage V2 is applied to the other terminal of the resistor R12.
[0104] Output voltages Vout1 and Vout2 are output from the comparators CP1 and CP2, respectively.
[0105] like Fig.15 As shown, when the monitored voltage Vx1 is between the reference voltage Vref1 and the reference voltage Vref2 (Vref1>Vx1>Vref2), the output voltage Vout1 becomes a pulse waveform.
[0106] When the monitored voltage Vx1 is equal to or higher than the reference voltage Vref1 (Vx1 ≥ Vref1), the output voltage Vout1 becomes a fixed voltage at the “H” level.
[0107] When the monitored voltage Vx1 is lower than or equal to the reference voltage Vref2 (Vx1 ≤ Vref2), the output voltage Vout1 becomes a fixed voltage at the “L” level (GND).
[0108] In addition, if Fig.15 As shown, when the monitored voltage Vx2 is between the reference voltage Vref1 and the reference voltage Vref2 (Vref1>Vx2>Vref2), the output voltage Vout2 becomes a pulse waveform.
[0109] When the monitored voltage Vx2 is equal to or higher than the reference voltage Vref1 (Vx2 ≥ Vref1), the output voltage Vout2 becomes a fixed voltage at the “H” level.
[0110] When the monitored voltage Vx2 is lower than or equal to the reference voltage Vref2 (Vx2 ≤ Vref2), the output voltage Vout2 becomes a fixed voltage at the “L” level (GND).
[0111] In the present embodiment, the voltage monitoring circuit 13 only needs to set up one reference voltage generating unit in order to input the common variable reference voltage Vref to the inverting input terminal (-) of the comparator CP1 and the inverting input terminal (-) of the comparator CP2. This can reduce the number of components compared to the case where two reference voltage generating units are set up in order to input the reference voltage to the comparator CP1 and the comparator CP2.
[0112] The above-described embodiment is a preferred embodiment of the present invention. However, the scope of the present invention is not limited to the above-described embodiment, and the present invention can be implemented in various modified forms without departing from the spirit of the present invention.
[0113] For example, in the above embodiment, two thresholds of reference voltage Vref1 and reference voltage Vref2 are set as the threshold of the varying reference voltage Vref and compared with the monitored voltage Vx, but either reference voltage Vref1 or reference voltage Vref2 may be used as the threshold.
[0114] When the reference voltage Vref1 is set to a value exceeding the upper limit of the variation range of the monitored voltage Vx, the reference voltage Vref2 becomes a threshold value. Fig.16 1 is a waveform diagram showing the operation of the voltage monitoring circuit according to the first embodiment of the present disclosure when the reference voltage Vref1 is set to a value exceeding the upper limit of the variation range of the monitored voltage Vx. Fig.16 As shown, in the region of Vx>Vref2, the output voltage Vout becomes a pulse waveform, and becomes GND when the monitored voltage Vx is equal to or lower than the reference voltage Vref2.
[0115] When the reference voltage Vref2 is set to a value lower than the lower limit of the variation range of the monitored voltage Vx, the reference voltage Vref1 becomes a threshold value. Fig.17 1 is a waveform diagram showing the operation of the voltage monitoring circuit according to the first embodiment of the present disclosure when the threshold value of the reference voltage is set to the reference voltage Vref1. Fig.17 As shown, in the region of Vx<Vref1, the output voltage Vout has a pulse waveform, and becomes an "H" level when the monitored voltage Vx is equal to or lower than the reference voltage Vref1.
[0116] The voltage monitoring circuit and the voltage monitoring method according to the present disclosure can adopt various embodiments including the above-described embodiments and having the following structures.
[0117] (1) A voltage monitoring circuit (for example, voltage monitoring circuit 10, 11, 12 or 13), comprising:
[0118] a reference voltage generating unit (eg, the reference voltage generating unit 10A) that generates a varying reference voltage that periodically changes into a first reference voltage and a second reference voltage that is smaller than the first reference voltage; and
[0119] The comparison unit (for example, the comparison unit 10B) compares the fluctuation reference voltage with the monitored voltage and switches the output level according to the magnitudes of the fluctuation reference voltage and the monitored voltage.
[0120] According to this power supply monitoring circuit, the normality or abnormality of the monitored voltage and the voltage monitoring circuit can be determined based on the output of the voltage monitoring circuit, without providing a circuit for detecting abnormality of the voltage monitoring circuit outside the voltage monitoring circuit.
[0121] (2) The voltage monitoring circuit according to (1) above, wherein:
[0122] The reference voltage generating section generates the first reference voltage and the second reference voltage by changing a resistance dividing ratio of a constant voltage.
[0123] (3) The voltage monitoring circuit according to (2) above, wherein:
[0124] The reference voltage generating unit comprises:
[0125] a first resistor (eg, resistor R1);
[0126] a second resistor (e.g., resistor R2), connected in series with the first resistor;
[0127] a third resistor (for example, resistor R3), one terminal of which is connected to a connection point between the first resistor and the second resistor; a switch element (for example, MOS transistor Tr), which is connected to the other terminal of the third resistor,
[0128] The switch element is turned off, and the constant voltage is divided by the first resistor and the second resistor, thereby generating the first reference voltage.
[0129] The switching element is turned on to generate the second reference voltage by resistance-dividing the constant voltage using the first resistor and a combined resistor formed by connecting the second resistor and the third resistor in parallel.
[0130] (4) The voltage monitoring circuit according to any one of (1) to (3) above, wherein:
[0131] The comparison unit includes a plurality of comparators (for example, comparators CP1 and CP2) to which a plurality of monitored voltages are input respectively, and the common fluctuation reference voltage is input to the plurality of comparators.
[0132] (5) The voltage monitoring circuit according to any one of (1) to (3) above, wherein:
[0133] The comparison unit is connected to the determination circuit.
[0134] When a pulse waveform voltage is output from the comparison unit, the determination circuit (for example, determination circuit 10C or 10D) determines that the monitored voltage is normal, and when a fixed voltage is output, the determination circuit (for example, determination circuit 10C or 10D) determines that there is an abnormality in at least one of the monitored voltage and the voltage monitoring circuit.
[0135] (6) A voltage monitoring method of a voltage monitoring circuit (for example, the voltage monitoring circuit 10, 11, 12 or 13), wherein:
[0136] The switching element (for example, MOS transistor Tr) switches between the first reference voltage and the second reference voltage which is smaller than the first reference voltage, thereby inputting the periodically changing reference voltage to the comparison unit (for example, comparison unit 10B).
[0137] The comparison unit compares the fluctuation reference voltage with the monitored voltage, and switches an output level according to the magnitudes of the fluctuation reference voltage and the monitored voltage.
[0138] According to this power supply monitoring method, the normality or abnormality of the monitored voltage and the voltage monitoring circuit can be determined based on the output of the voltage monitoring circuit, without providing a circuit for detecting abnormality of the voltage monitoring circuit outside the voltage monitoring circuit.
[0139] Explanation of symbols
[0140] 10, 11, 12, 13 Voltage monitoring circuit
[0141] 10A reference voltage generator
[0142] SR Shunt Regulator
[0143] R1, R2, R3, R4 resistors
[0144] Tr MOS transistor
[0145] 10B, 13B comparison unit
[0146] CP, CP1, CP2 comparator
[0147] R5 resistor
[0148] 10C, 10D judgment circuit
[0149] 13C monitored voltage generating unit.
Claims
1. A voltage monitoring circuit, characterized in that: have: a reference voltage generating unit that generates a variable reference voltage that periodically changes into a first reference voltage and a second reference voltage, wherein the second reference voltage is smaller than the first reference voltage; and The comparison unit compares the fluctuation reference voltage with the monitored voltage and switches the output level according to the magnitude of the fluctuation reference voltage and the monitored voltage.
2. The voltage monitoring circuit according to claim 1, characterized in that: The reference voltage generating section generates the first reference voltage and the second reference voltage by changing a resistance dividing ratio of a constant voltage.
3. The voltage monitoring circuit according to claim 2, characterized in that: The reference voltage generating unit comprises: a first resistor; a second resistor connected in series with the first resistor; a third resistor, one terminal of which is connected to a connection point between the first resistor and the second resistor; and a switch element connected to the other terminal of the third resistor. The switch element is turned off, and the constant voltage is divided by the first resistor and the second resistor, thereby generating the first reference voltage. The switching element is turned on to generate the second reference voltage by resistance-dividing the constant voltage using the first resistor and a combined resistor formed by connecting the second resistor and the third resistor in parallel.
4. The voltage monitoring circuit according to any one of claims 1 to 3, characterized in that: The comparison unit includes a plurality of comparators to which a plurality of monitored voltages are input respectively, and the common fluctuation reference voltage is input to the plurality of comparators.
5. The voltage monitoring circuit according to any one of claims 1 to 3, characterized in that: The comparison unit is connected to the determination circuit. The determination circuit determines that the monitored voltage is normal when the comparison unit outputs a pulse waveform voltage, and determines that at least one of the monitored voltage and the voltage monitoring circuit is abnormal when the comparison unit outputs a fixed voltage.
6. A voltage monitoring method for a voltage monitoring circuit, characterized in that: The switching element switches between a first reference voltage and a second reference voltage which is smaller than the first reference voltage, thereby inputting a periodically changing reference voltage into the comparison unit. The comparison unit compares the fluctuation reference voltage with the monitored voltage, and switches an output level according to the magnitudes of the fluctuation reference voltage and the monitored voltage.