Method and device for operating LED display

Abstract

The invention provides a method and an apparatus for operating an LED display. The method comprises the following steps: storing Nth scanning line data in a line buffer; storing the Nth scanning line data in a frame buffer; displaying the Nth scanning line data stored in the line buffer; storing (N + 1) th scan line data in the line buffer during display of the Nth scan line data stored in the line buffer; storing the (N + 1) th scanning line data in a frame buffer; displaying the (N + 1) th scan line data stored in the line buffer; repeating the steps until the (N + M) th scanning line data stored in the line buffer is displayed; and displaying the scanning line data stored in the frame buffers from the Nth scanning line data to the (N + M) th scanning line data one by one.

Description

Technical Field

[0001] The invention relates to a method and a device for operating an LED display. Background Art

[0002] Since LED displays have a faster response time than liquid crystal displays (LCDs), this also causes flickering problems in LED displays. In traditional LED driver architectures, a ping-pong frame buffer (a back-and-forth frame buffer memory) has been designed to reduce LED flicker at higher refresh rates. The ping-pong frame buffer is used to store video data so that each scan section can be lit simultaneously and each line can be refreshed several times within a frame to reduce or eliminate the flicker problem of the LED.

[0003] However, the ping-pong frame buffer increases the cost and may cause further frame delay. Specifically, the static random access memory (SRAM) size of the ping-pong frame buffer is proportional to the capacity of the number of driven pixels (e.g., twice as much as 2x). However, using the ping-pong frame buffer, there is a one-frame delay, which is unavoidable. Therefore, it is urgent to develop a new method or device to reduce flicker in LED displays. Summary of the invention

[0004] The purpose of providing this invention is to introduce some concepts in a simplified form, which will be further described in the detailed description below. Its purpose is not to identify key features or essential features of the claimed subject matter, nor is it intended to be used as an aid in determining the scope of the claimed subject matter.

[0005] According to an exemplary embodiment, a method for operating an LED display is provided, which uses a ping-pong row buffer and a frame buffer to reduce the SRAM hardware cost by half and reduce the waiting time from one frame to one scan line. Specifically, the method includes: storing the Nth scan line data in the row buffer, where N is a natural number equal to or greater than 1; storing the Nth scan line data in the frame buffer; displaying the Nth scan line data stored in the row buffer; storing the (N+1)th scan line data in the row buffer during displaying the Nth scan line data stored in the row buffer; storing the (N+1)th scan line data in the frame buffer; displaying the (N+1)th scan line data stored in the row buffer; storing the (N+2)th scan line data in the row buffer during displaying the (N+1)th scan line data stored in the row buffer; storing the (N+2)th scan line data in the frame buffer; and simultaneously displaying the (N+2)th scan line data stored in the row buffer.

[0006] Furthermore, in an exemplary embodiment, the method further includes: displaying the Nth scan line data stored in the frame buffer; displaying the (N+1)th scan line data stored in the frame buffer; and displaying the (N+2)th scan line data stored in the frame buffer. Furthermore, the scan line data stored in the frame buffer are displayed sequentially from the Nth scan line data to the (N+2)th scan line data in the same order as previously displayed from the line buffer. Repeat the steps of claim 1 until the (N+M)th scan line data stored in the line buffer is displayed, where M is a predetermined natural number greater than N. The method further includes displaying the scan line data stored in the frame buffer in the order from the Nth scan line data to the (N+M)th scan line data, where M is a predetermined natural number.

[0007] In another exemplary embodiment, the method may include: storing the Nth scan line data in a row buffer, where N is a natural number equal to or greater than 1; displaying the Nth scan line data stored in the row buffer; storing the Nth scan line data in a frame buffer and storing the (N+1)th scan line data in the row buffer while displaying the Nth scan line data stored in the row buffer; displaying the (N+1)th scan line data stored in the row buffer; storing the (N+1)th scan line data in the frame buffer and storing the (N+2)th scan line data in the row buffer while displaying the (N+1)th scan line data stored in the row buffer; displaying the (N+2)th scan line data stored in the row buffer; and storing the (N+2)th scan line data in the frame buffer while displaying the (N+2)th scan line data stored in the row buffer.

[0008] Furthermore, in an exemplary embodiment, the scan line data stored in the frame buffer is displayed sequentially from the Nth scan line data to the (N+M)th scan line data, and the display order is the same as the order previously displayed from the line buffer. The line buffer is a ping-pong line buffer, which is configured to be switched in each step of storing the scan line data. The scan line data is stored in the frame buffer from the line buffer. The size of the line buffer is configured to store each scan line data from the Nth scan line data to the (N+M)th scan line data. The size of the frame buffer is configured to store all scan line data from the Nth scan line data to the (N+M)th scan line data.

[0009] According to another exemplary embodiment, an LED display device is provided. The device includes: a line buffer; a frame buffer; and a processor and a storage device communicatively coupled to the processor. The storage device can store the operable instructions executed by the processor to perform the following steps: storing the Nth scan line data in the line buffer, wherein N is a natural number equal to or greater than 1; storing the Nth scan line data in the frame buffer; displaying the Nth scan line data stored in the line buffer; during the display of the Nth scan line data stored in the line buffer, the line buffer stores the (N+1)th scan line data; storing the (N+1)th scan line data in the frame buffer; displaying the (N+1)th scan line data stored in the line buffer; during the display of the (N+1)th scan line data stored in the line buffer, storing the (N+2)th scan line data in the line buffer; storing the (N+2)th scan line data in the frame buffer; and displaying the (N+2)th scan line data stored in the line buffer at the same time.

[0010] In another exemplary embodiment, the storage device can store the operable instructions executed by the processor to perform the following steps: storing the Nth scan line data in a row buffer, where N is a natural number equal to or greater than 1; displaying the Nth scan line data stored in the row buffer; while displaying the Nth scan line data stored in the row buffer, storing the Nth scan line data in a frame buffer and storing the (N+1)th scan line data in the row buffer; displaying the (N+1)th scan line data stored in the row buffer; while displaying the (N+1)th scan line data stored in the row buffer, storing the (N+1)th scan line data in the frame buffer and storing the (N+2)th scan line data in the row buffer; displaying the (N+2)th scan line data stored in the row buffer; and while displaying the (N+2)th scan line data stored in the row buffer, storing the (N+2)th scan line data in the frame buffer.

[0011] In addition, in an exemplary embodiment, when the processor executes the operable instruction, the storage device may store the instruction to further execute the following steps: display the Nth scan line data stored in the frame buffer; display the (N+1)th scan line data stored in the frame buffer; and simultaneously display the (N+2)th scan line data stored in the frame buffer. The processor displays the scan line data stored in the frame buffer in sequence from the Nth scan line data to the (N+2)th scan line data in the same order as previously displayed from the line buffer. When the processor executes the operable instruction, the storage device stores the instruction to repeat the steps of claim 1 until the (N+M)th scan line data stored in the line buffer is displayed, where M is a predetermined natural number greater than N. When the processor executes the operable instruction, the storage device stores the instruction to further execute the display of the scan line data stored in the frame buffer from the Nth scan line data to the (N+M)th scan line data, where M is a predetermined natural number.

[0012] In addition, in an exemplary embodiment, the processor displays the scan line data stored in the frame buffer in order from the Nth scan line data to the (N+M)th scan line data, and the display order is the same as the order previously displayed from the line buffer. The line buffer is a ping-pong line buffer, which is configured to be switched in each step of storing the scan line data. The scan line data is stored from the line buffer to the frame buffer. The size of the line buffer is configured to store each scan line data from the Nth scan line data to the (N+M)th scan line data. The size of the frame buffer is configured to store all scan line data from the Nth scan line data to the N+Mth scan line data. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Advantages of embodiments of the present invention will become apparent from the following detailed description of exemplary embodiments of the present invention, which description should be considered in conjunction with the following drawings.

[0014] Figure 1 Schematic diagram of data transmission sequence of an LED display in an exemplary embodiment of the present invention.

[0015] Figure 2 FIG. 1 is a schematic diagram of a data transmission sequence from subframes S0_F0 to S5_F0 and then to S0_F1 according to an exemplary embodiment.

[0016] Figure 3 FIG. 4 is a schematic diagram of segmented transactions in a subframe S0_F0 according to an exemplary embodiment.

[0017] Figure 4FIG. 1 is a schematic diagram of segmented transactions in a subframe S1_F0 according to an exemplary embodiment.

[0018] Figure 5 FIG. 1 is a schematic diagram of segmented transactions of subframes S2_F0 to S5_F0 and S0_F1 according to an exemplary embodiment.

[0019] Figure 6 is a schematic block diagram of an LED driver component in an exemplary embodiment.

[0020] Figure 7 FIG. 4 is a timing diagram of a driving scheme according to an exemplary embodiment. DETAILED DESCRIPTION

[0021] Various aspects of the present invention are disclosed in the following description and related drawings for specific embodiments of the present invention. An alternative embodiment may be designed without departing from the spirit or scope of the present invention. In addition, well-known elements of exemplary embodiments of the present invention will not be described in detail or omitted in this specification to avoid obscuring the relevant details of the present invention. In addition, in order to facilitate the understanding of this patent specification, several terms used herein will be discussed below.

[0022] As used herein, the word "exemplary" means "serving as an example, instance, or illustration," and the embodiments described herein are not limiting but merely exemplary. It should be understood that the described embodiments are not necessarily to be construed as being preferred or advantageous over other embodiments. Furthermore, the terms "embodiments of the invention," "embodiments," or "invention" do not require that all embodiments of the invention include the discussed features, advantages, or modes of operation.

[0023] In addition, many embodiments are described in terms of sequences of actions performed by, for example, elements of a computing device. It will be appreciated that the various actions described in this specification may be performed by specific circuits (e.g., application specific integrated circuits (ASICs)), by program instructions executed by one or more processors, or by a combination of the two. In addition, these sequences of actions described in this specification may be considered to be fully contained in any form of computer-readable storage medium, which has a corresponding set of computer instructions stored therein, which, when executed, cause the associated processor to perform the functions described herein. Therefore, various aspects of the present invention may be implemented in a variety of different forms, all of which are considered to fall within the scope of the subject matter of the claims. In addition, for each embodiment described herein, the corresponding form of any such embodiment may be described herein as, for example, "logically configured to" perform the described actions.

[0024] According to an exemplary embodiment and generally with reference to the accompanying drawings, various exemplary implementations of a scrambled progressive scan architecture for an LED driver may be disclosed. According to an exemplary embodiment, a scrambled progressive scan architecture for an LED driver may use a ping-pong row buffer and a frame buffer, which may reduce the SRAM hardware cost by half. This architecture is very beneficial for small pitch or small / micro LED drivers that require large drive pixel capacity that is becoming increasingly larger. In addition, in an exemplary embodiment, using a ping-pong row buffer instead of a frame buffer may reduce the latency from a frame to a scan line.

[0025] Now turn to Figure 1 , Figure 1 1 is a data transmission sequence diagram of an LED display in an exemplary embodiment. According to an exemplary embodiment, the LED display may include six areas, each area having 180 scan lines as follows: DR0 is all LED drivers that drive LEDs in region 0, scan lines 0-179. DR1 is all the LED drivers that drive the LEDs in region 1 and scan lines 180-359. DR2 is all the LED drivers that drive the LEDs in region 2, scan lines 360-539. DR3 is all the LED drivers that drive the LEDs in region 3, scan lines 540-719. DR4 is all the LED drivers that drive the LEDs in region 4, scan lines 720-899. DR5 is all the LED drivers that drive the LEDs in region 5, scan lines 900-1079.

[0026] In an exemplary embodiment, each frame period can be divided into S segments (subframes), and the time span (T subframe ) is approximately 1 / frame / segment, so that the refresh rate can be increased from the frame rate (Frame_rate) to Frame_rate*S. In the case of a 120Hz frame rate and 6 segments, the refresh rate can be 1 / 120 / 6*1e3=1.3889 milliseconds. In addition, in an exemplary embodiment, each subframe can be divided into Z regions vertically. The number of scan lines in each region is determined by the number of scan areas, which is equal to Total_SCAN / Z. For example, in a 1KLED display panel with 1920 (channels) × 1080 (scan lines) divided into 6 regions, each region has scan lines = 1080 / 6 = 180. In the case of vertical scanning, the total number of pixels in each region is 1920 (H) × 180 (V). H represents the horizontal direction and V represents the vertical direction.

[0027] In addition, according to an exemplary embodiment, each area can be controlled by multiple LED drivers to achieve that the entire horizontal range is under control. For example, for an LED driver case that drives 60 (channel) x180 (scanning area) pixels, 1920 / 60=32 LED drivers are required for each area. In the case of a 120Hz frame rate and 6 segments or subframes, its scanning display period is subframe period / scanning area=1 / (120×6) / 180=1.3889ms / 180=7.716us. In an exemplary embodiment, the segmentation of the frame is represented in the format of "S(segment)_F(frame)". Therefore, the segmentation of frame_0 is "S0_F0-S5_F0", and "S0_F1-S5_F1" is the segmentation of frame_1. In addition, in an exemplary embodiment, the data is represented in the format of "F(frame)_S(segment)_Z(area)_CX(scanning line)". For example, "F0_S0_Z0_CX0" is the data of frame 0_segment_0_region 0 and scan line 0. During the display of the next scan line, the new scan line data is transmitted and stored in the ping-pong line buffer.

[0028] According to an exemplary embodiment, when the current scan line is fully displayed and the scan line change signal is triggered, the LED driver triggers the ping-pong line buffer and displays the new scan line data. The new scan line data is stored in the frame buffer. In an exemplary embodiment, switching the ping-pong line buffer and storing in the frame buffer do not need to be performed at the same time. An exemplary embodiment shows that as long as the line buffer has been updated, the new scan line data can be stored in the frame buffer. However, allowing both to occur at the same time can achieve better timing control.

[0029] Now turn to Figure 2 , Figure 2 Schematic diagram of data transmission sequence from subframe S0_F0 to S5_F0 and then to S0_F1. According to an exemplary embodiment, each LED driver has a ping-pong row buffer to store the current scan line data and the data of the next scan line. In addition, in an exemplary embodiment, the frame buffer can be used to display the same or similar content in subsequent segments (subframes). After filling the row buffer, it can wait for the scan line signal to change to switch the scan line display content, while storing the data in the frame buffer.

[0030] According to an exemplary embodiment, displaying the current scan line data and storing the current scan line data in the frame buffer may occur simultaneously. Therefore, in each scan cycle, the LED driver can display the current scan line data and receive the next scan line data in the line buffer. Once the change scan line signal is received, the LED driver can swap the ping-pong line buffer to change the display content and store the content in the frame buffer. After all scan lines in each area have been displayed in a segment (subframe), the area data of all scan lines may have been stored in the frame buffer, and the stored data can be used to be displayed in a subsequent segment.

[0031] Still Figure 2 For reference, according to an exemplary embodiment, data of DR0 may be transmitted and stored in a frame buffer during S0_FN, and repeatedly displayed in S1_FN-S5_FN. Data of DR1 may be transmitted and stored in a frame buffer during S1_FN, and repeatedly displayed in S2_FN-S5_FN, S0_FN+1. Data of DR2 may be transmitted and stored in a frame buffer during S2_FN, and repeatedly displayed in S3_FN-S5_FN, S0_FN+1-S1_FN+1. Data of DR3 may be transmitted and stored in a frame buffer during S3_FN, and repeatedly displayed in S4_FN-S5_FN, S0_FN+1-S2_FN+1. Data of DR4 may be transmitted and stored in a frame buffer during S4_FN, and repeatedly displayed in S5_FN, S0_FN+1-S3_FN+1. The data of DR5 can be transferred and stored in the frame buffer during S5_FN, and can be repeatedly displayed in S0_FN+1-S4_FN+1.

[0032] According to an exemplary embodiment, from the beginning to the end of Frame_N, all Frame_N data can be transmitted to the LED driver, but the display can start from Frame_N and end in Frame_N + 1. Compared with the traditional architecture that usually has a one-frame delay, the waiting time of the exemplary embodiment can be only "one scan line".

[0033] Now turn to Figure 3-5 , combined with Figure 3-5 , the above segmented transactions in subframes S0_F0 to S5_F0 and S0_F1 are further described in more detail herein. According to an exemplary embodiment, referring to Figure 3, the segmented transaction of subframe S0_F0 can be started by storing F0_S0_Z0_CX0 in the row buffer of DR0. (S001). During the display of F0_S0_Z0_CX0 stored in the row buffer, the transaction further continues to store F0_S0_Z0_CX0 in the DR0 frame buffer (once the row buffer is updated, it is stored in the frame buffer), and the next scan line data F0_S0_Z0_CX1 is stored in the row buffer (the data transfer of F0_S0_Z0_CX1 can be completed before the display of F0_S0_Z0_CX0 ends). (S002). After displaying F0_S0_Z0_CX0 stored in the DR0 row buffer, the transaction will further continue to display F0_S0_Z0_CX1 stored in the DR0 row buffer. During the display of F0_S0_Z0_CX1 stored in the line buffer, the transaction further continues to store F0_S0_Z0_CX1 in the frame buffer of DR0 and store the next scan line data F0_S0_Z0_CX2 in the line buffer. According to an exemplary embodiment, DR1-DR5 are empty. (S003). Repeat the above steps until F0_S0_Z0_CX177 stored in the DR0 line buffer is displayed. At the end of displaying F0_S0_Z0_CX177 stored in the DR0 line buffer, the transaction continues to display F0_S0_Z0_CX178. During the display of F0_S0_Z0_CX178 stored in the line buffer, the transaction continues to store F0_S0_Z0_CX178 in the DR0 frame buffer and store the next scan line data F0_S0_Z0_CX179 (the last data of area_0, frame_0) in the line buffer. DR1-DR5 are still empty. (S004). When DR0 finishes displaying F0_S0_Z0_CX178, the transaction continues to display F0_S0_Z0_CX179 and stores F0_S0_Z0_CX179 in the frame buffer of DR0. According to an exemplary embodiment, at this time, all data of Zone_0, frame_0 should be stored in the frame buffer of DR0. DR1 starts to receive F0_S1_Z1_CX0. DR2-DR5 are empty. (S005).

[0034] Reference now Figure 4, the segmented transaction now switches from subframe S0_F0 to S1_F0. At the end of displaying F0_S0_Z0_CX179 stored in the DR0 line buffer, the transaction continues to repeatedly display F0_S0_Z0_CX0 from the frame buffer of DR0, and DR1 starts to display F0_S1_Z1_CX0 from the DR 1 line buffer. During the display of F0_S1_Z1_CX0 stored in the DR1 line buffer, the transaction continues to store F0_S1_Z1_CX0 in the frame buffer of DR1 and stores the next scan line data F0_S1_Z1_CX1 in the line buffer of DR1. DR2-DR5 are empty. (S006). At the end of displaying F0_S1_Z1_CX0 stored in the DR1 line buffer, the transaction continues to repeatedly display F0_S0_Z0_CX1 from the frame buffer of DR0 and F0_S1_Z1_CX1 from the DR1 line buffer. During the display of F0_S1_Z1_CX1 stored in the line buffer of DR1, the transaction continues to store F0_S1_Z1_CX1 in the frame buffer of DR1 and stores the next scan line data F0_S1_Z1_CX2 in the line buffer of DR1. DR2-DR5 are empty. (S007). The above steps are repeated until F0_S1_Z1_CX177 stored in the line buffer of DR1 is displayed. After the display of F0_S1_Z1_CX177 stored in the line buffer of DR1 is completed, the transaction continues to repeatedly display F0_S0_Z0_CX178 from the frame buffer of DR0 and F0_S1_Z1_CX178 from the line buffer of DR1. During the display of F0_S1_Z1_CX178 stored in the line buffer of DR1, the transaction continues to store F0_S1_Z1_CX178 in the frame buffer of DR1 and stores the next scan line data F0_S1_Z1_CX179 (the last data of zone_1, frame_0) in the line buffer of DR1. DR2-DR5 are still empty. (S008). At the end of displaying F0_S1_Z1_CX178 stored in the line buffer of DR1, the transaction continues to repeatedly display F0_S0_Z0_CX179 from the frame buffer of DR0, display F0_S1_Z1_CX179 from the line buffer of DR 1, and store F0_S1_Z1_CX179 in the frame buffer of DR1. At this time, all the data of Zone_1, frame_0 are stored in the frame buffer of DR1, and DR2 starts to receive F0_S2_Z2_CX0. DR3-DR5 are empty. (S009).

[0035] Reference now Figure 5, the segmented transaction now switches from subframe S1_F0 to S2_F0. After the display of F0_S1_Z1_CX179 stored in the DR1 line buffer is completed, the transaction continues to repeatedly display F0_S0_Z0_CX0 from the DR0 frame buffer and repeatedly display F0_S1_Z1_CX0 from the DR1 frame buffer. DR 2 begins to display F0_S2_Z2_CX0 from the DR2 line buffer. During the display of F0_S2_Z2_CX0 stored in the DR2 line buffer, the transaction continues to store F0_S2_Z2_CX0 in the DR2 frame buffer and stores the next scan line data F0_S2_Z2_CX1 in the DR1 line buffer. DR3-DR5 are empty at this point. (S010). Similar steps are repeated until F0_S4_Z4_CX179 stored in the DR4 line buffer is displayed and the segmented transaction switches from subframe S4_F0 to S5_F0. After displaying F0_S4_Z4_CX179 stored in the DR4 line buffer, the transaction continues to repeatedly display F0_S0_Z0_CX0-F0_S4_Z4_CX0 from the DR0-4 frame buffer. DR5 starts to display F0_S5_Z5_CX0 from the DR5 line buffer. During the display of F0_S5_Z5_CX0 stored in the DR5 line buffer, the transaction continues to store F0_S5_Z5_CX0 in the DR5 frame buffer and stores the next scan line data F0_S5_Z5_CX1 in the DR1 line buffer. (S011). Repeat similar steps until F0_S5_Z5_CX178 stored in the DR5 line buffer is displayed. After displaying F0_S5_Z5_CX178 stored in the DR5 line buffer, the transaction continues to repeatedly display F0_S0_Z0_CX179-F0_S4_Z4_CX179 from the DR0-4 frame buffers. DR 5 starts to display F0_S5_Z5_CX179 from the DR5 line buffer. During the display of F0_S5_Z5_CX179 stored in the DR5 line buffer, the transaction continues to store F0_S5_Z5_CX179 in the frame buffer of DR5 and stores F1_S0_Z0_CX0 (the first data of frame_1) in the line buffer of DR0. (S012). The segmented transaction now switches from subframe S5_F0 to S0_F1. After displaying F0_S5_Z5_CX179 stored in the line buffer of DR5, the transaction continues to repeatedly display F0_S1_Z1_CX0-F0_S5_Z5_CX0 from the frame buffers of DR1-5. DR0 starts displaying F1_S0_Z0_CX0 from the line buffer of DR0.While F1_S0_Z0_CX0 stored in the DR0 line buffer is being displayed, the transaction continues to store F1_S0_Z0_CX0 in the DR0 frame buffer and stores the next scan line data F1_S0_Z0_CX1 in the DR1 line buffer.

[0036] Now with Figure 6 and Figure 7 For reference, Figure 6 is a schematic block diagram of components in an exemplary embodiment LED driver, which provides a 16-bit grayscale LED driver driving 60×180 pixels. Figure 7 is a timing diagram of a drive scheme drawn according to an exemplary embodiment. As shown in the figure, the SCAN_Change strobe pulse can trigger a change in the scan line content. It can also trigger the FILL_PIN signal of the line buffer. The ping-pong line buffer operation is defined by FILL_PIN. When FILL_PIN=1, the ping memory is updating and the pong memory drives SCAN_DATA. When FILL_PIN=0, the PING memory drives SCAN_DATA and the PONG memory drives SCAN_DATA. At the same time, the frame buffer write strobe appears after the scan change strobe. It triggers the writing of SCAN_DATA to the frame buffer. The input to the PWM engine comes from when DATA_UPDATE=1: SCAN_DATA; when DATA_UPDATE=0: Frame_BUF_OUT. The PWM engine calculates the PWM pulses and shifts them into the output channel.

[0037] The above description and accompanying drawings illustrate the principles, preferred embodiments and operating modes of the present invention. However, the present invention should not be construed as being limited to the above specific embodiments. Additional variations of the above embodiments will be understood by those skilled in the art (e.g., features associated with certain configurations of the present invention may be associated with any other configuration of the present invention as desired).

[0038] Therefore, the above embodiments should be regarded as illustrative rather than restrictive. It should be appreciated that variations may be made to these embodiments by those skilled in the art without departing from the scope of the present invention as defined in the following claims.

Claims

1. A method for operating an LED display, characterized in that, include: storing the Nth scan line data in at least one line buffer, where N is a natural number equal to or greater than 1; Displaying the Nth scan line data stored in at least one line buffer; During display of the Nth scan line data stored in the at least one line buffer, storing the Nth scan line data in the at least one frame buffer and storing the (N+1)th scan line data in the at least one line buffer; displaying the (N+1)th scan line data stored in the at least one line buffer; During display of the (N+1)th scan line data stored in at least one line buffer, storing the (N+1)th scan line data in at least one frame buffer and storing the (N+2)th scan line data in at least one line buffer; displaying the (N+2)th scan line data stored in the at least one line buffer; and During display of the (N+2)th scanning line data stored in the at least one line buffer, the (N+2)th scanning line data is stored in the at least one frame buffer.

2. The method according to claim 1, characterized in that Also includes: displaying the Nth scan line data stored in the at least one frame buffer; displaying the (N+1)th scan line data stored in the at least one frame buffer; as well as The (N+2)th scanning line data stored in at least one frame buffer is displayed.

3. The method according to claim 1, characterized in that The scan line data stored in the at least one frame buffer are displayed sequentially from the Nth scan line data to the (N+2)th scan line data in the same order as previously displayed from the at least one line buffer.

4. The method according to claim 1, characterized in that: The steps of claim 1 are repeated until the (N+M)th scanning line data stored in at least one line buffer is displayed, wherein M is a predetermined natural number greater than N.

5. The method according to claim 4, characterized in that The method further includes displaying all scan line data from the Nth scan line data to the (N+M)th scan line data stored in at least one frame buffer, wherein M is a predetermined natural number.

6. The method according to claim 4, characterized in that The scan line data stored in the at least one frame buffer are displayed sequentially from the Nth scan line data to the (N+M)th scan line data in the same order as previously displayed from the at least one line buffer.

7. The method according to claim 1, characterized in that The at least one line buffer is a ping-pong line buffer configured to be switched in each step of storing at least one scan line data.

8. The method according to claim 1, characterized in that At least one scan line data is stored from at least one line buffer into at least one frame buffer.

9. The method according to claim 4, characterized in that The size of the at least one line buffer is configured to store each scanning line data from the Nth scanning line data to the (N+M)th scanning line data.

10. The method according to claim 4, characterized in that The size of the at least one frame buffer is configured to store all scan line data from the Nth scan line data to the (N+M)th scan line data.

11. A device for operating an LED display, characterized in that: include: at least one line buffer; at least one frame buffer; and At least one processor and at least one storage device communicatively coupled to at least one of the processors, and when at least one of the processors executes an operable instruction, at least one of the storage devices can store the instruction to perform the following steps: storing the Nth scan line data in at least one line buffer, where N is a natural number equal to or greater than 1; Displaying the Nth scan line data stored in at least one line buffer; During display of the Nth scan line data stored in the at least one line buffer, storing the Nth scan line data in the at least one frame buffer and storing the (N+1)th scan line data in the at least one line buffer; displaying the (N+1)th scan line data stored in the at least one line buffer; During display of the (N+1)th scan line data stored in at least one line buffer, storing the (N+1)th scan line data in at least one frame buffer and storing the (N+2)th scan line data in at least one line buffer; displaying the (N+2)th scan line data stored in the at least one line buffer; and During displaying the (N+2)th scanning line data stored in the at least one line buffer, the (N+2)th scanning line data is stored in at least one frame buffer.

12. The device according to claim 11, characterized in that in, When the at least one processor executes the operable instruction, the at least one storage device stores the instruction to further perform the following steps: displaying the Nth scan line data stored in the at least one frame buffer; displaying the (N+1)th scan line data stored in the at least one frame buffer; and The (N+2)th scanning line data stored in the at least one frame buffer is displayed.

13. The device according to claim 11, characterized in that The scan line data stored in at least one frame buffer is displayed by at least one processor in sequence from the Nth scan line data to the (N+2)th scan line data in the same order as previously displayed from at least one line buffer.

14. The device according to claim 11, characterized in that When the operable instruction is executed by the at least one processor, the at least one storage device stores the instruction to repeat the steps until the (N+M)th scan line data stored in the at least one line buffer is displayed, where M is a predetermined natural number greater than N.

15. The device according to claim 14, characterized in that in, When the at least one processor executes the operable instruction, the at least one storage device stores the instruction to further display the scan line data stored in the at least one frame buffer from the Nth scan line data to the (N+M)th scan line data, where M is a predetermined natural number.

16. The device according to claim 14, characterized in that The scan line data stored in at least one frame buffer is displayed sequentially by at least one processor from the Nth scan line data to the (N+M)th scan line data in the same order as previously displayed from at least one line buffer.

17. The device according to claim 11, characterized in that The at least one line buffer is a ping-pong line buffer configured to be switched in each step of storing at least one scan line data.

18. The device according to claim 11, characterized in that At least one scan line data is stored from at least one line buffer into at least one frame buffer.

19. The device according to claim 14, characterized in that The size of the at least one line buffer is configured to store each scanning line data from the Nth scanning line data to the (N+M)th scanning line data.

20. The device according to claim 14, characterized in that The size of the at least one frame buffer is configured to store all scan line data from the Nth scan line data to the (N+M)th scan line data.

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