A method and device for operating an LED display

Abstract

The present invention provides a method and apparatus for operating an LED display. The method comprises: storing an Nth scan line data in a line buffer; storing the Nth scan line data in a frame buffer; displaying the Nth scan line data stored in the line buffer; while displaying the Nth scan line data stored in the line buffer, storing the (N+1)th scan line data in the line buffer; storing the (N+1)th scan line data in the frame buffer; displaying the (N+1)th scan line data stored in the line buffer; repeating the above steps until the (N+M)th scan line data stored in the line buffer is displayed; and simultaneously displaying the scan line data stored in the frame buffer from the Nth scan line data to the (N+M)th scan line data one by one.

Description

Technical Field

[0001] The invention relates to a method and a device for operating an LED display. Background Art

[0002] Because LED displays have faster response times than liquid crystal displays (LCDs), flickering can be a problem. Traditional LED driver architectures employ a ping-pong frame buffer (a back-and-forth frame buffer memory) to reduce LED flicker at higher refresh rates. The ping-pong frame buffer stores video data so that each scan section can be illuminated simultaneously and each line can be refreshed several times within a frame, reducing or eliminating LED flicker.

[0003] However, the ping-pong frame buffer increases costs and may cause further frame delays. Specifically, the size of the static random-access memory (SRAM) of the ping-pong frame buffer is directly proportional to the number of pixels driven (for example, twice the capacity). However, the use of the ping-pong frame buffer results in an unavoidable one-frame delay. Therefore, a new method or device for reducing flicker in LED displays is urgently needed. Summary of the Invention

[0004] The purpose of providing this disclosure is to introduce some concepts in a simplified form, which will be further described in the detailed description below. It is not intended to identify key features or essential features of the claimed subject matter, nor is it intended to be used as an aid in determining the scope of the claimed subject matter.

[0005] According to an exemplary embodiment, a method for operating an LED display is provided, which uses a ping-pong row buffer and a frame buffer to reduce the SRAM hardware cost by half and reduce the waiting time from one frame to one scan line. Specifically, the method includes: storing N-th scan line data in a row buffer, where N is a natural number equal to or greater than 1; storing the N-th scan line data in a frame buffer; displaying the N-th scan line data stored in the row buffer; while displaying the N-th scan line data stored in the row buffer, storing (N+1)-th scan line data in the row buffer; storing (N+1)-th scan line data in the frame buffer; displaying the (N+1)-th scan line data stored in the row buffer; while displaying the (N+1)-th scan line data stored in the row buffer, storing (N+2)-th scan line data in the row buffer; storing (N+2)-th scan line data in the frame buffer; and simultaneously displaying the (N+2)-th scan line data stored in the row buffer.

[0006] Furthermore, in an exemplary embodiment, the method further includes: displaying the Nth scan line data stored in the frame buffer; displaying the (N+1)th scan line data stored in the frame buffer; and displaying the (N+2)th scan line data stored in the frame buffer. Furthermore, the scan line data stored in the frame buffer are displayed sequentially from the Nth scan line data to the (N+2)th scan line data in the same order as previously displayed from the line buffer. The steps of claim 1 are repeated until the (N+M)th scan line data stored in the line buffer is displayed, where M is a predetermined natural number greater than N. The method further includes displaying the scan line data stored in the frame buffer in the order from the Nth scan line data to the (N+M)th scan line data, where M is a predetermined natural number.

[0007] In another exemplary embodiment, the method may include: storing the Nth scan line data in a row buffer, where N is a natural number equal to or greater than 1; displaying the Nth scan line data stored in the row buffer; storing the Nth scan line data in a frame buffer and storing the (N+1)th scan line data in the row buffer during display of the Nth scan line data stored in the row buffer; displaying the (N+1)th scan line data stored in the row buffer; storing the (N+1)th scan line data in the frame buffer and storing the (N+2)th scan line data in the row buffer during display of the (N+1)th scan line data stored in the row buffer; displaying the (N+2)th scan line data stored in the row buffer; and storing the (N+2)th scan line data in the frame buffer during display of the (N+2)th scan line data stored in the row buffer.

[0008] Furthermore, in an exemplary embodiment, the scan line data stored in the frame buffer are displayed sequentially from the Nth scan line data to the (N+M)th scan line data, and the display order is the same as the order previously displayed from the line buffer. The line buffer is a ping-pong line buffer configured to be switched in each step of storing the scan line data. The scan line data is stored in the frame buffer from the line buffer. The size of the line buffer is configured to store each scan line data from the Nth scan line data to the (N+M)th scan line data. The size of the frame buffer is configured to store all scan line data from the Nth scan line data to the (N+M)th scan line data.

[0009] According to another exemplary embodiment, an LED display device is provided. The device includes: a line buffer; a frame buffer; and a processor and a storage device communicatively coupled to the processor. The storage device can store operable instructions executed by the processor to perform the following steps: storing Nth scan line data in the line buffer, where N is a natural number equal to or greater than 1; storing the Nth scan line data in the frame buffer; displaying the Nth scan line data stored in the line buffer; while displaying the Nth scan line data stored in the line buffer, the line buffer stores (N+1)th scan line data; storing (N+1)th scan line data in the frame buffer; displaying the (N+1)th scan line data stored in the line buffer; while displaying the (N+1)th scan line data stored in the line buffer, storing (N+2)th scan line data in the line buffer; storing (N+2)th scan line data in the frame buffer; and simultaneously displaying the (N+2)th scan line data stored in the line buffer.

[0010] In another exemplary embodiment, the storage device can store the operable instructions executed by the processor to perform the following steps: storing the Nth scan line data in the line buffer, where N is a natural number equal to or greater than 1; displaying the Nth scan line data stored in the line buffer; while displaying the Nth scan line data stored in the line buffer, storing the Nth scan line data in the frame buffer and storing the (N+1)th scan line data in the line buffer; displaying the (N+1)th scan line data stored in the line buffer; while displaying the (N+1)th scan line data stored in the line buffer, storing the (N+1)th scan line data in the frame buffer and storing the (N+2)th scan line data in the line buffer; displaying the (N+2)th scan line data stored in the line buffer; and while displaying the (N+2)th scan line data stored in the line buffer, storing the (N+2)th scan line data in the frame buffer.

[0011] Furthermore, in one exemplary embodiment, when the processor executes the operable instruction, the storage device may store the instruction to further execute the following steps: displaying the Nth scan line data stored in the frame buffer; displaying the (N+1)th scan line data stored in the frame buffer; and simultaneously displaying the (N+2)th scan line data stored in the frame buffer. The processor sequentially displays the scan line data stored in the frame buffer from the Nth scan line data to the (N+2)th scan line data in the same order as previously displayed from the line buffer. When the processor executes the operable instruction, the storage device stores the instruction to repeat the steps of claim 1 until the (N+M)th scan line data stored in the line buffer is displayed, where M is a predetermined natural number greater than N. When the processor executes the operable instruction, the storage device stores the instruction to further execute the following steps: displaying the scan line data stored in the frame buffer from the Nth scan line data to the (N+M)th scan line data, where M is a predetermined natural number.

[0012] Furthermore, in an exemplary embodiment, the processor displays the scan line data stored in the frame buffer in sequence from the Nth scan line data to the (N+M)th scan line data, and the display order is the same as the order previously displayed from the line buffer. The line buffer is a ping-pong line buffer that is configured to be switched in each step of storing the scan line data. The scan line data is stored from the line buffer to the frame buffer. The size of the line buffer is configured to store each scan line data from the Nth scan line data to the (N+M)th scan line data. The size of the frame buffer is configured to store all scan line data from the Nth scan line data to the (N+M)th scan line data. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Advantages of embodiments of the present invention will become apparent from the following detailed description of exemplary embodiments of the present invention, which description should be considered in conjunction with the following drawings.

[0014] Figure 1 Schematic diagram of data transmission sequence of an LED display in an exemplary embodiment of the present invention.

[0015] Figure 2 FIG. 1 is a schematic diagram of a data transmission sequence from subframes S0_F0 to S5_F0 and then to S0_F1 according to an exemplary embodiment.

[0016] Figure 3 FIG. 1 is a schematic diagram of segmented transactions in a subframe S0_F0 according to an exemplary embodiment.

[0017] Figure 4FIG. 1 is a schematic diagram of segmented transactions in a subframe S1_F0 according to an exemplary embodiment.

[0018] Figure 5 FIG. 1 is a schematic diagram of segmented transactions of subframes S2_F0 to S5_F0 and S0_F1 according to an exemplary embodiment.

[0019] Figure 6 FIG. 4 is a schematic block diagram of an LED driver component in an exemplary embodiment.

[0020] Figure 7 FIG. 4 is a timing diagram of a driving scheme according to an exemplary embodiment. DETAILED DESCRIPTION

[0021] Various aspects of the present invention are disclosed in the following description of specific embodiments of the invention and the associated drawings. Alternative embodiments may be devised without departing from the spirit or scope of the invention. Furthermore, well-known elements of exemplary embodiments of the present invention will not be described in detail or will be omitted in this description to avoid obscuring the relevant details of the invention. Furthermore, to facilitate understanding of this patent specification, several terms used herein will be discussed below.

[0022] As used herein, the word "exemplary" means "serving as an example, instance, or illustration," and the embodiments described herein are not limiting but merely exemplary. It should be understood that the described embodiments are not necessarily to be construed as preferred or advantageous over other embodiments. Furthermore, the terms "embodiments of the invention," "embodiments," or "invention" do not require that all embodiments of the invention include the discussed features, advantages, or modes of operation.

[0023] In addition, many embodiments are described in terms of sequences of actions performed by, for example, elements of a computing device. It will be appreciated that the various actions described herein may be performed by specific circuits (e.g., application specific integrated circuits (ASICs)), by program instructions executed by one or more processors, or by a combination of the two. Furthermore, the sequences of actions described herein may be considered to be fully contained within any form of computer-readable storage medium having stored therein a corresponding set of computer instructions that, when executed, cause an associated processor to perform the functions described herein. Accordingly, various aspects of the present invention may be implemented in a variety of different forms, all of which are considered to fall within the scope of the claimed subject matter. Furthermore, for each embodiment described herein, the corresponding form of any such embodiment may be described herein as, for example, "logically configured to" perform the described actions.

[0024] According to an exemplary embodiment, and generally with reference to the accompanying drawings, various exemplary implementations of a scrambled progressive scan architecture for an LED driver are disclosed. According to an exemplary embodiment, the scrambled progressive scan architecture for an LED driver can utilize a ping-pong row buffer and a frame buffer, which can reduce SRAM hardware costs by half. This architecture is particularly beneficial for fine-pitch or small / micro LED drivers, where large drive pixel capacity is becoming increasingly demanding. Furthermore, in exemplary embodiments, using a ping-pong row buffer instead of a frame buffer can reduce latency from a frame to a scan line.

[0025] Now turn Figure 1 , Figure 1 FIG. 1 is a data transmission sequence diagram of an LED display in an exemplary embodiment. According to an exemplary embodiment, the LED display may include six areas, each area having 180 scan lines as follows:

[0026] DR0 is all the LED drivers that drive the LEDs in region 0 and scan lines 0-179.

[0027] DR1 is all LED drivers that drive the LEDs in region 1 and scan lines 180-359.

[0028] DR2 is all the LED drivers that drive the LEDs in region 2 and scan lines 360-539.

[0029] DR3 is all LED drivers that drive LEDs in region 3 and scan lines 540-719.

[0030] DR4 is all the LED drivers that drive the LEDs in region 4, scan lines 720-899.

[0031] DR5 is all the LED drivers that drive the LEDs in region 5, scan lines 900-1079.

[0032] In an exemplary embodiment, each frame period can be divided into S segments (subframes), and the time span (T subframe) is approximately 1 / frame / segment, which can increase the refresh rate from the frame rate (Frame_rate) to Frame_rate*S. In the case of a 120Hz frame rate and 6 segments, the refresh rate can be 1 / 120 / 6*1e3=1.3889 milliseconds. In addition, in an exemplary embodiment, each subframe can be divided into Z areas vertically. The number of scan lines in each area is determined by the number of scan areas, which is equal to Total_SCAN / Z. For example, in a 1KLED display panel with 1920 (channels) × 1080 (scan lines) divided into 6 areas, each area has scan lines = 1080 / 6 = 180. In the case of vertical scanning, the total number of pixels in each area is 1920 (H) × 180 (V). H represents the horizontal direction and V represents the vertical direction.

[0033] Furthermore, according to exemplary embodiments, each region can be controlled by multiple LED drivers to ensure control over the entire horizontal range. For example, for an LED driver driving 60 (channel) x 180 (scanning area) pixels, each region requires 1920 / 60 = 32 LED drivers. With a 120Hz frame rate and six segments or subframes, the scanning display period is subframe period / scanning area = 1 / (120×6) / 180 = 1.3889ms / 180 = 7.716us. In one exemplary embodiment, frame segments are represented in the format "S (segment)_F (frame)." Thus, the segments for Frame_0 are "S0_F0-S5_F0," while the segments for Frame_1 are "S0_F1-S5_F1." Furthermore, in an exemplary embodiment, data is represented in the format "F (frame)_S (segment)_Z (area)_CX (scanning line)." For example, "F0_S0_Z0_CX0" is the data of frame 0_segment_0_region 0 and scan line 0. During the display of the next scan line, the new scan line data is transferred and stored in the ping-pong line buffer.

[0034] According to an exemplary embodiment, when the current scan line is fully displayed and the scan line change signal is triggered, the LED driver triggers the ping-pong line buffer and displays the new scan line data. The new scan line data is stored in the frame buffer. In an exemplary embodiment, switching the ping-pong line buffer and storing in the frame buffer do not need to be performed at the same time. An exemplary embodiment shows that as long as the line buffer has been updated, the new scan line data can be stored in the frame buffer. However, having both occur at the same time can achieve better timing control.

[0035] Now turn Figure 2 , Figure 2The following diagram illustrates the data transfer sequence from subframes S0_F0 to S5_F0 and then to S0_F1. According to exemplary embodiments, each LED driver has a ping-pong line buffer to store data for the current scan line and the next scan line. Furthermore, in exemplary embodiments, the frame buffer can be used to display the same or similar content in subsequent segments (subframes). After filling the line buffer, it can wait for a change in the scan line signal to switch the scan line display content while simultaneously storing data in the frame buffer.

[0036] According to an exemplary embodiment, displaying the current scan line data and storing the current scan line data in the frame buffer may occur simultaneously. Therefore, in each scan cycle, the LED driver can display the current scan line data and receive the next scan line data from the line buffer. Upon receiving the change scan line signal, the LED driver can swap the ping-pong line buffer to change the display content and store the content in the frame buffer. After all scan lines in each region have been displayed in a segment (subframe), the region data for all scan lines may have been stored in the frame buffer, and the stored data can be used to display it in the subsequent segment.

[0037] Still Figure 2 For reference, according to an exemplary embodiment, data of DR0 may be transferred and stored in a frame buffer during S0_FN and repeatedly displayed in S1_FN-S5_FN. Data of DR1 may be transferred and stored in a frame buffer during S1_FN and repeatedly displayed in S2_FN-S5_FN and S0_FN+1. Data of DR2 may be transferred and stored in a frame buffer during S2_FN and repeatedly displayed in S3_FN-S5_FN and S0_FN+1-S1_FN+1. Data of DR3 may be transferred and stored in a frame buffer during S3_FN and repeatedly displayed in S4_FN-S5_FN and S0_FN+1-S2_FN+1. Data of DR4 may be transferred and stored in a frame buffer during S4_FN and repeatedly displayed in S5_FN and S0_FN+1-S3_FN+1. The data of DR5 can be transferred and stored in the frame buffer during S5_FN, and can be repeatedly displayed in S0_FN+1-S4_FN+1.

[0038] According to an exemplary embodiment, all Frame_N data can be transmitted to the LED driver from the beginning to the end of Frame_N, but the display can start from Frame_N and end in Frame_N+1. Compared with the traditional architecture that usually has a one-frame delay, the latency of the exemplary embodiment can be only "one scan line".

[0039] Now turn Figure 3-5 , combined with Figure 3-5 , this article further describes the above segmented transactions in subframes S0_F0 to S5_F0 and S0_F1 in more detail. According to an exemplary embodiment, referring to Figure 3 , the segmented transaction of the subframe S0_F0 can be started by storing F0_S0_Z0_CX0 in the line buffer of DR0. (S001). During the display of F0_S0_Z0_CX0 stored in the line buffer, the transaction further continues to store F0_S0_Z0_CX0 in the DR0 frame buffer (once the line buffer is updated, it is stored in the frame buffer), and the next scan line data F0_S0_Z0_CX1 is stored in the line buffer (the data transfer of F0_S0_Z0_CX1 can be completed before the display of F0_S0_Z0_CX0 ends). (S002). After displaying F0_S0_Z0_CX0 stored in the DR0 line buffer, the transaction will further continue to display F0_S0_Z0_CX1 stored in the DR0 line buffer. While F0_S0_Z0_CX1 stored in the line buffer is being displayed, the transaction further continues by storing F0_S0_Z0_CX1 in the frame buffer of DR0 and storing the next scan line data F0_S0_Z0_CX2 in the line buffer. According to an exemplary embodiment, DR1-DR5 are empty. (S003). The above steps are repeated until F0_S0_Z0_CX177 stored in the DR0 line buffer is displayed. When the display of F0_S0_Z0_CX177 stored in the DR0 line buffer is completed, the transaction continues by displaying F0_S0_Z0_CX178. While F0_S0_Z0_CX178 stored in the line buffer is being displayed, the transaction continues by storing F0_S0_Z0_CX178 in the DR0 frame buffer and storing the next scan line data F0_S0_Z0_CX179 (the last data of region_0, frame_0) in the line buffer. DR1-DR5 remain empty. (S004). When DR0 finishes displaying F0_S0_Z0_CX178, the transaction continues to display F0_S0_Z0_CX179 and stores F0_S0_Z0_CX179 in DR0's frame buffer. According to an exemplary embodiment, at this point, all data for Zone_0, Frame_0 should be stored in DR0's frame buffer. DR1 begins receiving F0_S1_Z1_CX0. DR2-DR5 remain empty. (S005).

[0040] Now refer to Figure 4, the segmented transaction now switches from subframe S0_F0 to S1_F0. At the end of displaying F0_S0_Z0_CX179 stored in the DR0 line buffer, the transaction continues to repeatedly display F0_S0_Z0_CX0 from DR0's frame buffer, and DR1 begins to display F0_S1_Z1_CX0 from DR1's line buffer. While displaying F0_S1_Z1_CX0 stored in DR1's line buffer, the transaction continues to store F0_S1_Z1_CX0 in DR1's frame buffer and stores the next scan line data, F0_S1_Z1_CX1, in DR1's line buffer. DR2-DR5 are empty. (S006). At the end of displaying F0_S1_Z1_CX0 stored in DR1's line buffer, the transaction continues to repeatedly display F0_S0_Z0_CX1 from DR0's frame buffer and F0_S1_Z1_CX1 from DR1's line buffer. While displaying F0_S1_Z1_CX1 stored in the DR1 line buffer, the transaction continues by storing F0_S1_Z1_CX1 in the DR1 frame buffer and storing the next scan line data, F0_S1_Z1_CX2, in the DR1 line buffer. DR2-DR5 are empty (S007). The above steps are repeated until F0_S1_Z1_CX177 stored in the DR1 line buffer is displayed. After displaying F0_S1_Z1_CX177 stored in the DR1 line buffer, the transaction continues by repeatedly displaying F0_S0_Z0_CX178 from the DR0 frame buffer and F0_S1_Z1_CX178 from the DR1 line buffer. While displaying F0_S1_Z1_CX178 stored in DR1's line buffer, the transaction continues to store F0_S1_Z1_CX178 in DR1's frame buffer and stores the next scan line data, F0_S1_Z1_CX179 (the last data for Zone_1, Frame_0), in DR1's line buffer. DR2-DR5 remain empty (S008). Upon completion of displaying F0_S1_Z1_CX178 stored in DR1's line buffer, the transaction continues to repeatedly display F0_S0_Z0_CX179 from DR0's frame buffer, display F0_S1_Z1_CX179 from DR1's line buffer, and store F0_S1_Z1_CX179 in DR1's frame buffer. At this point, all data for Zone_1, Frame_0 is stored in DR1's frame buffer, and DR2 begins receiving F0_S2_Z2_CX0. DR3-DR5 are empty. (S009).

[0041] Now refer to Figure 5, the segmented transaction now switches from subframe S1_F0 to S2_F0. After displaying F0_S1_Z1_CX179 stored in the DR1 line buffer, the transaction continues to repeatedly display F0_S0_Z0_CX0 from the DR0 frame buffer and repeatedly display F0_S1_Z1_CX0 from the DR1 frame buffer. DR 2 begins to display F0_S2_Z2_CX0 from the DR2 line buffer. While displaying F0_S2_Z2_CX0 stored in the DR2 line buffer, the transaction continues to store F0_S2_Z2_CX0 in the DR2 frame buffer and store the next scan line data F0_S2_Z2_CX1 in the DR1 line buffer. DR3-DR5 are empty at this point. (S010). Similar steps are repeated until F0_S4_Z4_CX179 stored in the DR4 line buffer is displayed and the segmented transaction switches from subframe S4_F0 to S5_F0. After displaying F0_S4_Z4_CX179 stored in the DR4 line buffer, the transaction continues by repeatedly displaying F0_S0_Z0_CX0-F0_S4_Z4_CX0 from the DR0-4 frame buffer. DR5 begins displaying F0_S5_Z5_CX0 from the DR5 line buffer. While displaying F0_S5_Z5_CX0 stored in the DR5 line buffer, the transaction continues by storing F0_S5_Z5_CX0 in the DR5 frame buffer and storing the next scan line data, F0_S5_Z5_CX1, in the DR1 line buffer (S011). Similar steps are repeated until F0_S5_Z5_CX178 stored in the DR5 line buffer is displayed. After displaying F0_S5_Z5_CX178 stored in the DR5 line buffer, the transaction continues by repeatedly displaying F0_S0_Z0_CX179 through F0_S4_Z4_CX179 from the DR0-4 frame buffers. DR5 begins displaying F0_S5_Z5_CX179 from the DR5 line buffer. While displaying F0_S5_Z5_CX179 stored in the DR5 line buffer, the transaction continues by storing F0_S5_Z5_CX179 in the DR5 frame buffer and F1_S0_Z0_CX0 (the first data for Frame_1) in the DR0 line buffer (S012). The segmented transaction now switches from subframe S5_F0 to S0_F1. After displaying F0_S5_Z5_CX179 stored in DR5 line buffer, the transaction continues to repeatedly display F0_S1_Z1_CX0-F0_S5_Z5_CX0 from the frame buffers of DR1-5. DR 0 starts displaying F1_S0_Z0_CX0 from DR0 line buffer.While F1_S0_Z0_CX0 stored in the DR0 line buffer is being displayed, the transaction continues to store F1_S0_Z0_CX0 in the DR0 frame buffer and stores the next scan line data F1_S0_Z0_CX1 in the DR1 line buffer.

[0042] Now with Figure 6 and Figure 7 For reference, Figure 6 FIG. 1 is a schematic block diagram of components in an exemplary embodiment of an LED driver. The exemplary embodiment provides a 16-bit grayscale LED driver driving 60×180 pixels. Figure 7 The following is a timing diagram of a drive scheme according to an exemplary embodiment. As shown in the figure, the SCAN_Change strobe pulse can trigger a change in the scan line content. It can also trigger the FILL_PIN signal of the line buffer. The ping-pong line buffer operation is defined by FILL_PIN. When FILL_PIN = 1, the ping memory is updating and the pong memory drives SCAN_DATA. When FILL_PIN = 0, the ping memory drives SCAN_DATA and the pong memory drives SCAN_DATA. At the same time, the frame buffer write strobe appears after the scan change strobe. It triggers the writing of SCAN_DATA to the frame buffer. The input to the PWM engine comes from: SCAN_DATA when DATA_UPDATE = 1; when DATA_UPDATE = 0: Frame_BUF_OUT. The PWM engine calculates the PWM pulses and shifts them into the output channels.

[0043] The above description and accompanying drawings illustrate the principles, preferred embodiments, and modes of operation of the present invention. However, the present invention should not be construed as limited to the specific embodiments described above. Additional variations of the above embodiments will be appreciated by those skilled in the art (e.g., features associated with certain configurations of the present invention may be associated with any other configuration of the present invention, as desired).

[0044] Therefore, the above embodiments should be regarded as illustrative rather than restrictive.It should be appreciated that variations can be made in these embodiments by those skilled in the art without departing from the scope of the invention as defined in the following claims.

Claims

1. A method for operating an LED display, characterized in that, include: Step A, storing the Nth scan line data in at least one line buffer, where N is a natural number equal to or greater than 1; Step B, displaying the Nth scan line data stored in at least one line buffer; Step C, during the display of the Nth scan line data stored in the at least one line buffer, storing the Nth scan line data in the at least one frame buffer and storing the (N+1)th scan line data in the at least one line buffer; Step D, displaying the (N+1)th scan line data stored in the at least one line buffer; Step E, storing the (N+1)th scan line data in at least one frame buffer and storing the (N+2)th scan line data in at least one line buffer during display of the (N+1)th scan line data stored in at least one line buffer; Step F, displaying the (N+2)th scan line data stored in the at least one line buffer; and Step G, storing the (N+2)th scan line data in at least one frame buffer during display of the (N+2)th scan line data stored in at least one line buffer; Repeating steps AG until the (N+M)th scanning line data stored in at least one line buffer is displayed, where M is a predetermined natural number greater than N; All scan line data from the Nth scan line data to the (N+M)th scan line data stored in at least one frame buffer are displayed, wherein the scan line data from the Nth scan line data to the (N+M)th scan line data stored in the at least one frame buffer are displayed sequentially in the same order as previously displayed from the at least one line buffer.

2. The method according to claim 1, characterized in that The at least one line buffer is a ping-pong line buffer configured to be switched in each step of storing at least one scan line data.

3. The method according to claim 1, characterized in that At least one scan line data is stored from at least one line buffer into at least one frame buffer.

4. The method according to claim 1, wherein The size of the at least one line buffer is configured to store each scanning line data from the Nth scanning line data to the (N+M)th scanning line data.

5. The method according to claim 1, wherein The size of the at least one frame buffer is configured to store all scan line data from the Nth scan line data to the (N+M)th scan line data.

6. A device for operating an LED display, characterized in that: include: at least one line buffer; at least one frame buffer; and At least one processor and at least one storage device communicatively coupled to at least one of the processors, and when at least one of the processors executes an operable instruction, at least one of the storage devices may store the instruction to perform the following steps: storing the Nth scan line data in at least one line buffer, where N is a natural number equal to or greater than 1; displaying the Nth scan line data stored in at least one line buffer; During display of the Nth scan line data stored in the at least one line buffer, storing the Nth scan line data in the at least one frame buffer and storing the (N+1)th scan line data in the at least one line buffer; displaying the (N+1)th scan line data stored in the at least one line buffer; During display of the (N+1)th scan line data stored in the at least one line buffer, storing the (N+1)th scan line data in the at least one frame buffer and storing the (N+2)th scan line data in the at least one line buffer; displaying the (N+2)th scanning line data stored in the at least one line buffer; and During display of the (N+2)th scan line data stored in the at least one line buffer, storing the (N+2)th scan line data in at least one frame buffer; When the operable instruction is executed by the at least one processor, the at least one storage device stores the instruction to repeat the steps until the (N+M)th scan line data stored in the at least one line buffer is displayed, where M is a predetermined natural number greater than N; when the at least one processor executes the operable instruction, the at least one storage device stores the instruction to further display the scan line data stored in the at least one frame buffer from the Nth scan line data to the (N+M)th scan line data, where the scan line data stored in the at least one frame buffer is displayed sequentially by the at least one processor from the Nth scan line data to the (N+M)th scan line data in the same order as previously displayed from the at least one line buffer.

7. The device according to claim 6, characterized in that The at least one line buffer is a ping-pong line buffer configured to be switched in each step of storing at least one scan line data.

8. The device according to claim 6, characterized in that At least one scan line data is stored from at least one line buffer into at least one frame buffer.

9. The device according to claim 6, characterized in that The size of the at least one line buffer is configured to store each piece of scanning line data from the Nth scanning line data to the (N+M)th scanning line data.

10. The device according to claim 6, characterized in that The size of the at least one frame buffer is configured to store all scan line data from the Nth scan line data to the (N+M)th scan line data.

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