A bit-tag-assisted decoding method, device, and medium suitable for RS codes

By using a bit-tag-assisted decoding method, combined with RS code and BPSK modulator, the bit tagging and flipping strategies in the decoding process are optimized, solving the problem of limited decoding performance of RS code in complex communication environments. This achieves a balance between high error correction capability and low bit error rate, improving the adaptability and quality of the communication system.

CN119210963BActive Publication Date: 2025-10-28HEFEI UNIV OF TECH
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Patent Information

Application Number
CN202411428013.9
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2024-10-14
Publication Date
2025-10-28
Estimated Expiration
2044-10-14

AI Technical Summary

Technical Problem

Existing hard-decision decoding algorithms for RS codes are limited in efficiency and performance when dealing with high error rates and large data blocks, while soft-decision decoding algorithms are limited in application due to high power consumption and complex computational requirements. Existing decoding technologies are difficult to meet the requirements of high coding gain and low power consumption, and the system upgrade costs are high, making it difficult to cope with complex communication environments.

Method used

A bit-marking-assisted decoding method is adopted. By defining bit marks with multiple reliability levels and an optimized bit-flipping strategy, combined with an RS code encoder, BPSK modulator, hard decision and soft decision demodulator, the channel soft information is used for bit marking and flipping to optimize the decoding process of the RS code hybrid decoder.

Benefits of technology

It improves the error correction capability and decoding performance of RS codes, reduces the bit error rate, achieves a balance between complexity and performance, and enhances the adaptability and communication quality of communication systems at high data rates.

✦ Generated by Eureka AI based on patent content.

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Abstract

This invention discloses a bit-marking-assisted decoding method, device, and medium suitable for RS codes. At the transmitting end, the binary data stream generates codewords through an RS code encoder and is then modulated using a BPSK modulator. After being transmitted through a noisy channel to the receiving end, the receiving end performs mixed reception processing on the received signal, including hard-decision demodulation and soft information calculation. Then, the bits after hard-decision demodulation are marked using soft information. Based on these marked bits, errors in traditional hard-decision decoding, such as decoding failures and errors, are corrected by bit flipping, ultimately restoring the original data. This invention, through bit marking and bit flipping, utilizes soft information to assist in mixed hard-decision decoding, reducing decoding failures and errors caused by channel noise in traditional hard-decision decoding, thereby significantly improving the system's anti-interference capability and ensuring high-quality and reliable data transmission.
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Description

Technical Field

[0001] This invention belongs to the field of communication technology, specifically a bit-mark-assisted decoding method, device, and medium applicable to RS codes. Background Technology

[0002] With the rapid development of communication technology, the types and quantities of communication services are constantly increasing, and the requirements for communication quality and real-time performance are also rising. However, practical systems still face noise interference and suboptimal channel transmission characteristics, making information prone to errors during transmission. Although forward error correction (FEC) has played an important role in improving the reliability of communication systems, existing error correction schemes still have shortcomings. As the target data rate increases, FEC schemes must strike a balance between complexity and performance to achieve higher coding gain, lower latency, and lower power consumption. In applications requiring short codewords, low latency, and simple codecs, RS codes remain a preferred option.

[0003] RS codes are widely used in flash memory storage, optical communication, and wireless communication, representing a high-efficiency error correction method. However, facing increasingly complex communication environments, traditional hard-decision decoding algorithms for RS codes are limited in efficiency and performance when handling high error rates and large data blocks. While soft-decision decoding algorithms can improve decoding performance, their high power consumption and complex computational resource requirements limit their practical application. Furthermore, although RS codes can be combined with other coding schemes (such as convolutional codes and polar codes), existing decoding techniques and algorithms are still insufficient to meet the requirements for higher coding gain and lower power consumption. Moreover, due to cost constraints, existing systems are often difficult to fully upgrade, making them inadequate for future communication challenges. Therefore, in-depth research on RS codes and their decoding technologies is particularly important. Summary of the Invention

[0004] This invention addresses the shortcomings of existing technologies by proposing a bit-tag-assisted decoding method, device, and medium suitable for RS codes. The aim is to improve the performance gain of hard-decision decoding, achieve higher error correction capabilities and lower bit error rates, thereby achieving an effective balance between complexity and performance in RS decoding. This ensures communication quality, reliability, and efficiency while enhancing the overall performance and adaptability of communication systems in complex communication environments, meeting the ever-increasing demand for high-data-rate communication and promoting the further development of communication technology.

[0005] To achieve the above-mentioned objectives, the present invention adopts the following technical solution:

[0006] The present invention provides a bit-tag-assisted decoding method for RS codes, characterized in that it is applied to a transmission scenario consisting of a transmitter, a channel, and a receiver. The transmitter includes an RS code encoder and a BPSK modulator; the channel contains additive white Gaussian noise; the receiver includes a BPSK hard-decision demodulator, a BPSK soft-decision demodulator, and an RS code hybrid decoder; the bit-tag-assisted decoding method is performed according to the following steps:

[0007] Step 1: Define n as the codeword length, k as the information length, and m as a positive integer, satisfying the relation m = log₂n, and k <n;

[0008] The RS code encoder encodes k×m transmitted information bits I to obtain an RS codeword c containing n×m bits. Let c... ij Let be the bit in the i-th row and j-th column of the RS codeword c, where i = 1, 2, …, n, j = 1, 2, …, m;

[0009] Step 2: After the RS codeword c is modulated by the BPSK modulator, a transmission symbol sequence s containing n×m elements is obtained. Let s ij For the element in the i-th row and j-th column of the symbol sequence s, s ij The value can be -1 or 1, i = 1, 2, ..., n, j = 1, 2, ..., m;

[0010] Step 3: After the transmitted symbol sequence s is transmitted to the receiving end through a channel containing additive white Gaussian noise, the received symbol sequence y is obtained;

[0011] Step 4: After the received symbol sequence y is demodulated by the BPSK hard decision demodulator, a received binary matrix r containing n×m bits is obtained;

[0012] Meanwhile, after the received symbol sequence y is demodulated by the BPSK soft decision demodulator, a log-likelihood ratio absolute value matrix λ containing n×m elements is obtained.

[0013] Step 5: The received binary matrix r and the absolute value of the log-likelihood ratio matrix λ are simultaneously transmitted to the RS code hybrid decoder for bit-marked auxiliary decoding, thereby obtaining a message sequence I′ containing k×m bits.

[0014] The bit-tag-assisted decoding method for RS codes described in this invention is characterized in that the RS hybrid decoder in step 5 includes an RS standard decoder, a bit-tag module, a decoding error detection module, and a bit-flipping module; and bit-tag-assisted decoding is performed according to the following steps:

[0015] Step 5.0, Define rij To receive the bits in the i-th row and j-th column of a binary matrix r; define λ. ij Let λ be the element in the i-th row and j-th column of the absolute value of the log-likelihood ratio matrix λ, where i = 1, 2, …, n, j = 1, 2, …, m;

[0016] From r ij The number of PE bits in the marking results is N PE The number of bits in the HUB is N. HUB ;

[0017] Define l as the current decoding count and L as the maximum decoding count; initialize l = 1;

[0018] Define μ l Let μ be the number of bits flipped during the l-th decoding, and μ l The value of is a positive integer;

[0019] The received binary matrix r is used as the bit-flipping result r during the (l-1)th decoding. l-1 ′;

[0020] Step 5.1: The bit tagging module uses λ ij The value of r ij Perform bit tagging to obtain r ij The marking results include: HRB bits, RB bits, UB bits, and HUB bits; wherein, HUB bits and UB bits are collectively referred to as PE bits;

[0021] Step 5.2, RS standard decoder for r l-1 Decode the code to obtain the decoding result c for the l-th decoding. l The decoding state during the l-th decoding;

[0022] Step 5.3: If the decoding status at the l-th decoding stage indicates that the decoding is correct, then proceed to step 5.4; otherwise, proceed to step 5.5.

[0023] Step 5.4, the decoding error detection module, based on r ij The marking results, for the decoding result c l Perform decoding error detection to obtain the error bit detection result for the l-th decoding;

[0024] If the detection result during the l-th decoding does not contain the HRB bit, the RS code hybrid decoder considers the decoding result c to be correct. l If the result is deemed reliable, proceed to step 5.6; otherwise, the RS code hybrid decoder considers the decoding result c to be reliable. l 'Unreliable, proceed to step 5.5;'

[0025] Step 5.5: The bit flipping module performs a bit flip on r. l-1 Perform the l-th bit flip and update the tag result to obtain the bit flip result r during the l-th decoding. l The updated labeling results are then processed, and step 5.2 is performed.

[0026] Step 5.6: If l ≤ L, then the decoding is successful. The decoding result c from the l-th decoding attempt is... l The first k × m bits of the first binary matrix I' are assigned to the message sequence I'; if l > L, it indicates that the decoding has failed, and the received binary matrix r is assigned to the message sequence I'.

[0027] Furthermore, the bit marking in step 5.1 is performed as follows:

[0028] Define three bit-marking thresholds δ1, δ2, and δ3;

[0029] When |λ ij When | ≥ δ1, then r ij Marked as HRB bits;

[0030] When δ2≤ |λ ij When | < δ1, then r ij Marked as RB bits;

[0031] When δ3≤ |λ ij When | < δ2, then r ij Marked as UB bits;

[0032] When |λ ij When |< δ3, bit r ij It is marked as a HUB bit.

[0033] Furthermore, the bit flipping and bit tag updating in step 5.5 are performed as follows:

[0034] Step 5.5.0, Define μ l The range of values ​​is [N] min N max ], where N min N represents the lower bound. max Indicates the upper limit;

[0035] Step 5.5.1: If l ≥ L, assign L+1 to l and then execute step 5.6; otherwise, execute step 5.5.2.

[0036] Step 5.5.2: If the number of bits in the HUB is N HUB Greater than the number of bit flips μ l Randomly select μ from the HUB bits lAfter recording the position of each bit as the position to be flipped E, proceed to step 5.5.3;

[0037] If the number of bit flips μ l The number N greater than HUB bits HUB And the number of bits less than PE, N PE At that time, μ is randomly selected from PEs. l After recording the position of each bit as the position to be flipped E, proceed to step 5.5.3;

[0038] If the number of bit flips is μ l The number of bits greater than PE, N PE After assigning L+1 to l, proceed to step 5.6;

[0039] Step 5.5.3: Determine the number of bit flips, μ. l Has the upper limit N been reached? max ;

[0040] If μ l Reaching the upper limit N max Then for r ij In the labeling results N min Clear the HUB bit markers to achieve N HUB The update, and μ l Set as lower limit N min ;

[0041] If μ l The upper limit N has not been reached. max , will μ l +1 is assigned to μ l ;

[0042] Step 5.5.4: Flip all the bits recorded in position E to be flipped to obtain the bit flipping result r for the Lth decoding. l After assigning l+1 to l, return to step 5.2.

[0043] Furthermore, μ in step 5.5.0 l The range of values ​​is [N] min N max It is determined according to the following process:

[0044] Step a: Define the probability density function of the received symbol sequence y as f(y);

[0045] Step b: Calculate the probability that the PE bit is an error bit. ;

[0046] Step c: Calculate the probability that the erroneous bit is marked as a PE bit. ;

[0047] Step d: Calculate the estimated average number of erroneous bits η in the hard-decision demodulated received symbol r. ;

[0048] Step e: Calculate the actual value of the average number of erroneous bits in r, and calculate the difference σ between the actual value and the predicted value η;

[0049] Step f: Calculate N min =η-σ;N max =η+σ.

[0050] Furthermore, the selection of the labeling threshold in step 5.1 is determined according to the following process:

[0051] Calculate the probability that the HRB bit is an error bit. and determine β HRB The initial value of δ1 when δ = 0 is determined, and then the optimal value of δ1 is obtained near the initial value of δ1 through numerical simulation optimization algorithm.

[0052] Calculate the probability that an erroneous bit is marked as a HUB bit. and β HUB and α HUB The intersection of the two curves with respect to δ3 is taken as the initial value of δ3. Then, the optimal value of δ3 is obtained in the vicinity of the initial value of δ3 through numerical simulation optimization algorithm.

[0053] Determine α PE The initial value corresponding to δ2 is determined when it is sufficiently large. Then, between the initial values ​​of δ3 and δ2, the optimal value corresponding to δ2 is obtained through numerical simulation optimization algorithm.

[0054] The present invention provides an electronic device, including a memory and a processor, wherein the memory is used to store a program that supports the processor in executing the bit tag-assisted decoding method, and the processor is configured to execute the program stored in the memory.

[0055] The present invention discloses a computer-readable storage medium on which a computer program is stored, wherein the computer program, when executed by a processor, performs the steps of the bit-tag-assisted decoding method.

[0056] Compared with the prior art, the present invention has the following beneficial effects:

[0057] 1. This invention uses a marking threshold to label bits into multiple reliability levels based on the soft information of the channel. This method provides an important reference for bit flipping decisions through the bit marking results, thereby significantly improving the accuracy of decoding decisions. Compared with traditional hard-decision methods, this invention refines the bit reliability assessment, enabling the decoder to more effectively identify and process high-risk bits without increasing the computational complexity of the decoding process.

[0058] 2. This invention utilizes bit-marking results to design an optimized bit-flipping strategy to address common decoding errors and failures. This strategy can correct some channel error bits, enabling traditional RS code hard-decision decoders to more effectively handle the remaining error bits, thereby improving overall decoding performance. Detailed Implementation

[0059] In this embodiment, a bit-tag-assisted decoding method for RS codes is presented, aiming to balance complexity and performance, thereby ensuring the reliability of high-speed transmission at low cost. Specifically, this bit-tag-assisted decoding method is applied to a transmission scenario consisting of a transmitter, a channel, and a receiver. The transmitter includes an RS code encoder and a BPSK modulator; the channel contains additive white Gaussian noise; and the receiver includes a BPSK hard-decision demodulator, a BPSK soft-decision demodulator, and an RS code hybrid decoder. The method is performed according to the following steps:

[0060] Step 1: In this embodiment, RS codes will be encoded and decoded according to the KP4 encoding standard recommended in the optical transport network standard. Therefore, the codeword length n is 544, the information length k is 514, each codeword contains 10 bits m, and satisfies the relationship m = log2n, and k < n;

[0061] After encoding the 514×10 transmitted information bits I, the RS code encoder obtains an RS codeword c containing 544×10 bits. Let c... ij Let be the bit in the i-th row and j-th column of the RS codeword c, where i = 1, 2, …, 544 and j = 1, 2, …, 10;

[0062] Step 2: After the RS codeword c is modulated by the BPSK modulator, a transmission symbol sequence s containing 544 × 10 elements is obtained. Let s ij For the element in the i-th row and j-th column of the symbol sequence s, s ij The value can be either -1 or 1;

[0063] Step 3: After the transmitted symbol sequence s is transmitted to the receiving end through a channel containing additive white Gaussian noise, the received symbol sequence y is obtained;

[0064] Step 4: After the received symbol sequence y is demodulated by the BPSK hard decision demodulator, a received binary matrix r containing 544×10 bits is obtained;

[0065] Meanwhile, after the received symbol sequence y is demodulated by the BPSK soft decision demodulator, a log-likelihood ratio absolute value matrix λ containing 544×10 elements is obtained.

[0066] Step 5: The binary matrix r and the absolute value of the log-likelihood ratio matrix λ are simultaneously transmitted to the RS code hybrid decoder for bit-marked auxiliary decoding, thereby obtaining a message sequence I′ containing 514×10 bits;

[0067] Step 5.0, Define r ij To receive the bits in the i-th row and j-th column of a binary matrix r; define λ. ij Let λ be the element in the i-th row and j-th column of the absolute value of the log-likelihood ratio matrix λ, where i = 1, 2, …, 544 and j = 1, 2, …, 10;

[0068] From r ij The number of PE bits in the marking results is N PE The number of bits in the HUB is N. HUB ;

[0069] Define l as the current decoding count and L as the maximum decoding count; initialize l = 1 and L = 10;

[0070] Define μ l Let μ be the number of bits flipped during the l-th decoding, and μ l The value of is a positive integer;

[0071] The received binary matrix r is used as the bit-flipping result r during the (l-1)th decoding. l-1 ′;

[0072] Step 5.1: The bit tagging module uses λ ij The value of r ij Perform bit tagging to obtain r ij The marking results include: HRB bits, RB bits, UB bits, and HUB bits; among them, HUB bits and UB bits are collectively referred to as PE bits;

[0073] Step 5.1.1: Define three bit-tag thresholds δ1, δ2, and δ3; pass the probability β. HRB β HUB α HUB and α PEAfter determining the optimization range of the bit tag threshold, numerical simulations were performed within this range to optimize the bit tag threshold. In this embodiment, the final values ​​obtained were δ1=17, δ2=1.3, and δ3=0.85.

[0074] Calculate the probability that the HRB bit is an error bit. and determine β HRB When δ1 = 0, the initial value of δ1 is 9. The range of δ1 > 9 is determined as the optimization range. During the numerical simulation, δ2 = 2.5 and δ3 = 0.87 are assumed by default. Finally, the optimal value δ1 = 17 is obtained.

[0075] Calculate the probability that an erroneous bit is marked as a HUB bit. and determine β HUB and α HUB The initial value of the intersection of the two curves with respect to δ3 is 0.87. The optimization range is selected around δ3=0.87. During the numerical simulation, δ1=17 and δ2=2.5, and finally the optimal value δ3=0.85 is obtained.

[0076] Calculate the probability α that the erroneous bit is marked as a PE bit. PE Determine α PE When the initial value of δ2 is 2.5 when it is large enough, the optimization range of δ2 is selected as [0.85, 2.5]. During the numerical simulation, δ1=17 and δ3=0.85, and finally the optimal value is δ2=1.3.

[0077] Step 5.1.2, when |λ ij When | ≥ δ1, then r ij Marked as HRB bits;

[0078] When δ2≤ |λ ij When | < δ1, then r ij Marked as RB bits;

[0079] When δ3≤ |λ ij When | < δ2, then r ij Marked as UB bits;

[0080] When |λ ij When |< δ3, bit r ij Marked as HUB bit;

[0081] Step 5.2, RS standard decoder for r l-1 Decode the code to obtain the decoding result c for the l-th decoding. l The decoding state during the l-th decoding;

[0082] Step 5.3: If the decoding status at the l-th decoding stage indicates that the decoding is correct, then proceed to step 5.4; otherwise, proceed to step 5.5.

[0083] Step 5.4, the decoding error detection module, based on r ij The marking results, RS standard decoder for c l Perform decoding error detection to obtain the error bit detection result for the l-th decoding;

[0084] If the detection result during the l-th decoding does not contain the HRB bit, the RS code hybrid decoder considers the decoding result c to be correct. l If the result is deemed reliable, proceed to step 5.6; otherwise, the RS code hybrid decoder considers the decoding result c to be reliable. l 'Unreliable, proceed to step 5.5;'

[0085] Step 5.5: The bit flipping module performs a bit flip on r. l-1 Perform the l-th bit flip and update the tag result to obtain the bit flip result r during the l-th decoding. l ′ and the updated labeling results;

[0086] Step 5.5.0, Define μ l The range of values ​​is [N] min N max ], where N min N represents the lower bound. max Indicates the upper limit; specifically includes:

[0087] Step a: Define the probability density function of the received symbol sequence y as f(y);

[0088] Step b: Calculate the probability that the PE bit is an error bit. ;

[0089] Step c: Calculate the probability that the erroneous bit is marked as a PE bit. ;

[0090] Step d: Calculate the estimated average number of erroneous bits η in the hard-decision demodulated received symbol r. ;

[0091] Step e: Calculate the actual value of the average number of erroneous bits in r, and calculate the difference σ between the actual value and the estimated value η. In this embodiment, σ = 1.

[0092] Step f: Calculate N min =η-1;N max =η+1;

[0093] Step 5.5.1: If l ≥ L, assign L+1 to l and then execute step 5.6; otherwise, execute step 5.5.2.

[0094] Step 5.5.2: If the number of bits in the HUB is N HUB Greater than the number of bit flips μ l Randomly select μ from the HUB bits l After recording the position of each bit as the position to be flipped E, proceed to step 5.5.3;

[0095] If the number of bit flips μ l The number N greater than HUB bits HUB And the number of bits less than PE, N PE At that time, μ is randomly selected in PE. l After recording the position of each bit as the position to be flipped E, proceed to step 5.5.3;

[0096] If the number of bit flips is μ l The number of bits greater than PE, N PE After assigning L+1 to l, proceed to step 5.6;

[0097] Step 5.5.3: Determine the number of bit flips, μ. l Has the upper limit N been reached? max ;

[0098] If μ l Reaching the upper limit N max , will μ l Set as lower limit N min , in r ij Randomly select N from the labeling results min N is assigned a number of HUB bits and their positions are recorded as positions G to be updated. After clearing the original markings of all bits recorded in G, N is updated. HUB The value is assigned to all bits recorded in G, and the new tag is UB;

[0099] If μ l The upper limit N has not been reached. max , will μ l +1 is assigned to μ l ;

[0100] Step 5.5.4: Flip all the bits recorded in position E to be flipped to obtain the bit flipping result r for the Lth decoding. l After assigning l+1 to l, return to step 5.2;

[0101] Step 5.6: If l ≤ L, then the decoding is successful. The decoding result c from the l-th decoding attempt is... l The first 514×10 bits of I′ are assigned to the message sequence I′; if l > L, it indicates that the decoding has failed, and the received binary matrix r is assigned to the message sequence I′.

[0102] Step 6: Compare the decoded message sequence I′ with the transmitted information bits I, count the number of erroneous bits, calculate the bit error rate, and then calculate the signal-to-noise ratio gain achieved by the bit-mark-assisted decoding method compared to the traditional RS code hard-decision decoder. In this embodiment, KP4 achieves a bit error rate of 10... -5 At that time, the bit-tag-assisted decoding method can achieve a signal-to-noise ratio gain of 0.2dB compared with the traditional RS code hard decision decoder.

[0103] In this embodiment, an electronic device includes a memory and a processor. The memory stores a program that supports the processor in executing the above-described method, and the processor is configured to execute the program stored in the memory.

[0104] In this embodiment, a computer-readable storage medium stores a computer program, which is executed by a processor to perform the steps of the above method.

Claims

1. A bit-tag-assisted decoding method suitable for RS codes, characterized in that, This method is applied in a transmission scenario consisting of a transmitter, a channel, and a receiver. The transmitter includes an RS code encoder and a BPSK modulator; the channel contains additive white Gaussian noise; the receiver includes a BPSK hard-decision demodulator, a BPSK soft-decision demodulator, and an RS code hybrid decoder; the bit-tag-assisted decoding method is performed according to the following steps: Step 1: Define n as the codeword length, k as the information length, and m as a positive integer, satisfying the relationship m = log2n and k < n; The RS code encoder encodes k×m transmitted information bits I to obtain an RS codeword c containing n×m bits. Let c... ij Let be the bit in the i-th row and j-th column of the RS codeword c, where i = 1, 2, …, n, j = 1, 2, …, m; Step 2: After the RS codeword c is modulated by the BPSK modulator, a transmission symbol sequence s containing n×m elements is obtained. Let s ij For the element in the i-th row and j-th column of the symbol sequence s, s ij The value can be -1 or 1, i = 1, 2, …, n, j = 1, 2, …, m; Step 3: After the transmitted symbol sequence s is transmitted to the receiving end through a channel containing additive white Gaussian noise, the received symbol sequence y is obtained; Step 4: After the received symbol sequence y is demodulated by the BPSK hard decision demodulator, a received binary matrix r containing n×m bits is obtained; Meanwhile, after the received symbol sequence y is demodulated by the BPSK soft decision demodulator, a log-likelihood ratio absolute value matrix λ containing n×m elements is obtained. Step 5: The received binary matrix r and the absolute value of the log-likelihood ratio matrix λ are simultaneously transmitted to the RS code hybrid decoder for bit-marked auxiliary decoding, thereby obtaining a message sequence I′ containing k×m bits; The RS code hybrid decoder includes an RS standard decoder, a bit tag module, a decoding error detection module, and a bit flipping module; and performs bit tag-assisted decoding according to the following steps: Step 5.0, Define r ij To receive the bits in the i-th row and j-th column of a binary matrix r; define λ. ij Let λ be the element in the i-th row and j-th column of the absolute value of the log-likelihood ratio matrix λ, where i = 1, 2, …, n, j = 1, 2, …, m; From r ij The number of PE bits in the marking results is N PE The number of bits in the HUB is N. HUB ; Define l as the current decoding count and L as the maximum decoding count; initialize l = 1; Define μ l Let μ be the number of bits flipped during the l-th decoding, and μ l The value of is a positive integer; The received binary matrix r is used as the bit-flipping result r during the (l-1)th decoding. l-1 ′; Step 5.1: The bit tagging module uses λ ij The value of r ij Perform bit tagging to obtain r ij The marking results include: HRB bits, RB bits, UB bits, and HUB bits; wherein, HUB bits and UB bits are collectively referred to as PE bits; Step 5.2, RS standard decoder for r l-1 Decode the code to obtain the decoding result c for the l-th decoding. l The decoding state during the l-th decoding; Step 5.3: If the decoding status at the l-th decoding stage indicates that the decoding is correct, then proceed to step 5.4; otherwise, proceed to step 5.

5. Step 5.4, the decoding error detection module, based on r ij The marking results, for the decoding result c l Perform decoding error detection to obtain the error bit detection result for the l-th decoding; If the detection result during the l-th decoding does not contain the HRB bit, the RS code hybrid decoder considers the decoding result c to be correct. l If the result is deemed reliable, proceed to step 5.6; otherwise, the RS code hybrid decoder considers the decoding result c to be reliable. l 'Unreliable, proceed to step 5.5;' Step 5.5: The bit flipping module performs a bit flip on r. l-1 Perform the l-th bit flip and update the tag result to obtain the bit flip result r during the l-th decoding. l The updated labeling results are then processed, and step 5.2 is performed. Step 5.5.0, Define μ l The range of values ​​is [N] min N max ], where N min N represents the lower bound. max Indicates the upper limit; Step 5.5.1: If l > L, it indicates decoding failure, and the received binary matrix r is assigned to the message sequence I′; otherwise, proceed to step 5.5.

2. Step 5.5.2: If the number of bits in the HUB is N HUB Greater than the number of bit flips μ l Randomly select μ from the HUB bits l After recording the position of each bit as the position to be flipped E, proceed to step 5.5.3; If the number of bit flips μ l The number N greater than HUB bits HUB And the number of bits less than PE, N PE At that time, μ is randomly selected from the PE bits. l After recording the position of each bit as the position to be flipped E, proceed to step 5.5.3; If the number of bit flips is μ l The number of bits greater than PE, N PE After assigning l+1 to l, proceed to step 5.6; Step 5.5.3: Determine the number of bit flips, μ. l Has the upper limit N been reached? max ; If μ l Reaching the upper limit N max Then for r ij In the labeling results N min Clear the HUB bit markers to achieve N HUB The update, and μ l Set as lower limit N min ; If μ l The upper limit N has not been reached. max , will μ l +1 is assigned to μ l ; Step 5.5.4: Flip all the bits recorded in the position E to be flipped to obtain the bit flipping result r during the l-th decoding. l After assigning l+1 to l, return to step 5.2; Step 5.6: If l ≤ L, then the decoding is successful. The decoding result c from the l-th decoding attempt is... l The first k × m bits of the first binary matrix I' are assigned to the message sequence I'; if l > L, it indicates that the decoding has failed, and the received binary matrix r is assigned to the message sequence I'.

2. The bit-tag-assisted decoding method for RS codes according to claim 1, characterized in that, The bit marking in step 5.1 is performed as follows: Define three bit-marking thresholds δ1, δ2, and δ3; When |λ ij When | ≥ δ1, then r ij Marked as HRB bits; When δ2≤ |λ ij When | < δ1, then r ij Marked as RB bits; When δ3≤ |λ ij When | < δ2, then r ij Marked as UB bits; When |λ ij When |< δ3, bit r ij It is marked as a HUB bit.

3. The bit-tag-assisted decoding method for RS codes according to claim 2, characterized in that, μ in step 5.5.0 l The range of values ​​is [N] min N max It is determined according to the following process: Step a: Define the probability density function of the received symbol sequence y as f(y); Step b: Calculate the probability that the PE bit is an error bit. ; Step c: Calculate the probability that the erroneous bit is marked as a PE bit. ; Step d: Calculate the estimated average number of erroneous bits η in the hard-decision demodulated received symbol r. ; Step e: Calculate the actual value of the average number of erroneous bits in r, and calculate the difference σ between the actual value and the predicted value η; Step f: Calculate N min =η-σ;N max =η+σ.

4. The bit-tag-assisted decoding method for RS codes according to claim 3, characterized in that, The selection of the labeling threshold in step 5.1 is determined according to the following process: Calculate the probability that the HRB bit is an error bit. and determine β HRB The initial value of δ1 when δ = 0 is determined, and then the optimal value of δ1 is obtained near the initial value of δ1 through numerical simulation optimization algorithm. Calculate the probability that an erroneous bit is marked as a HUB bit. , and and α HUB The intersection of the two curves with respect to δ3 is taken as the initial value of δ3. Then, the optimal value of δ3 is obtained in the vicinity of the initial value of δ3 through numerical simulation optimization algorithm. Determine α PE The initial value corresponding to δ2 is determined when it is sufficiently large. Then, between the initial values ​​of δ3 and δ2, the optimal value corresponding to δ2 is obtained through numerical simulation optimization algorithm.

5. An electronic device, comprising a memory and a processor, characterized in that, The memory is used to store a program that supports the processor in executing any of the bit-tag-assisted decoding methods of claims 1-4, and the processor is configured to execute the program stored in the memory.

6. A computer-readable storage medium storing a computer program thereon, characterized in that, When the computer program is run by the processor, it performs the steps of any of the bit tag-assisted decoding methods described in claims 1-4.