Pixel circuit, display panel and display device

Abstract

The invention discloses a pixel circuit, a display panel and a display device, relates to the technical field of display, and can improve poor dark lines caused by short circuit of local electrodes and improve the display effect and the display yield. The pixel circuit comprises a first sub-circuit electrically connected with a first node, wherein the first sub-circuit is used for being electrically connected with a data signal line; the second sub-circuit is electrically connected with the second node and is used for being electrically connected with a first power line; the driving sub-circuit is electrically connected with the first node, the second node and the third node, the third node is electrically connected with the first electrode of the light-emitting device, and the second electrode of the light-emitting device is electrically connected with the common electrode; the reset sub-circuit comprises a protection unit and a reset unit, the protection unit is electrically connected with the reset unit, the protection unit is electrically connected with the third node, and the reset unit is used for being electrically connected with a second power supply connecting line; the protection unit comprises a resistor, and the resistivity of the protection unit is smaller than that of the second power supply connecting line.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a pixel circuit, a display panel and a display device. Background Art

[0002] At present, in the field of display technology, the pixel circuit, as the core circuit of the display drive backplane, constitutes the basic display drive backplane together with the gate drive circuit and the data drive circuit. Under the control of the row scanning signal output by the gate drive circuit, the pixel circuit writes the display data signal output by the data drive circuit into the storage capacitor of the pixel circuit row by row through the switch tube in the pixel circuit. The drive tube in the pixel circuit accurately and continuously outputs voltage or current to the display optoelectronic device, such as the light-emitting device or the pixel electrode of the liquid crystal panel, under the control of the voltage stored in the capacitor; the display device displays image information by active or passive light emission under the drive of current or voltage.

[0003] However, in the existing pixel circuit structure, a local electrode short circuit easily leads to a whole row, a whole column or a cross-shaped dark line defect, which seriously affects the display effect and yield of the display panel. Summary of the invention

[0004] The embodiments of the present application provide a pixel circuit, a display panel and a display device, which can improve the dark line defects caused by local electrode short circuits and improve the display effect and display yield.

[0005] According to a first aspect of an embodiment of the present application, a pixel circuit is provided, including:

[0006] A first sub-circuit, electrically connected to the first node, the first sub-circuit being used to electrically connect to a data signal line;

[0007] a second subcircuit, electrically connected to the second node, the second subcircuit being used to electrically connect to the first power line;

[0008] a driving subcircuit, electrically connected to the first node, the second node and a third node respectively, the third node is used to be electrically connected to the first electrode of the light emitting device, and the second electrode of the light emitting device is used to be electrically connected to the common electrode;

[0009] a reset subcircuit, the reset subcircuit comprising a protection unit and a reset unit, the protection unit being electrically connected to the reset unit, the protection unit being electrically connected to the third node, the reset unit being used to be electrically connected to a second power connection line, the second power connection line being used to transmit a second power signal;

[0010] The protection unit includes a resistor, and a resistivity of the protection unit is smaller than a resistivity of the second power connection line.

[0011] In some embodiments, when the first and second poles of the light-emitting device are short-circuited, the difference between the potential connected to the second power connection line and the potential connected to the common electrode is a first difference, and the first difference is greater than or equal to the driving voltage difference of the light-emitting device. The protection unit is used to break the circuit under the action of the current formed between the second power connection line and the third node, and the reset unit is disconnected from the third node.

[0012] In some embodiments, the first sub-circuit, the second sub-circuit, the driving sub-circuit and the reset unit all include transistors, the second sub-circuit includes a capacitor unit, a first end of the capacitor is electrically connected to the first node, a second end of the capacitor unit is electrically connected to the second node, a third end of the capacitor unit is electrically connected to a fourth node, and the fourth node is used to be electrically connected to the first power line;

[0013] The driving subcircuit includes a P-type transistor, and the reset unit includes an N-type transistor.

[0014] In some embodiments, the first sub-circuit includes a first transistor, the second sub-circuit includes a second transistor, the driving sub-circuit includes a driving transistor, the reset unit includes a third transistor, and the capacitor unit includes a first capacitor and a second capacitor;

[0015] The gate of the first transistor is used to receive a first control signal, the first electrode of the first transistor is used to electrically connect to a data signal line, the second electrode of the first transistor is electrically connected to the first node, the gate of the second transistor is used to receive a second control signal, the first electrode of the second transistor is electrically connected to the fourth node, the second electrode of the second transistor is electrically connected to the second node, the two ends of the first capacitor are electrically connected to the first node and the second node respectively, the two ends of the second capacitor are electrically connected to the second node and the fourth node respectively, the gate of the driving transistor is electrically connected to the first node, the first electrode of the driving transistor is electrically connected to the second node, the second electrode of the driving transistor is electrically connected to the third node, the gate of the third transistor is used to receive a third control signal, the first electrode of the third transistor is electrically connected to the protection unit, and the second electrode of the third transistor is used to electrically connect to the second power supply connection line.

[0016] In some embodiments, when the first and second electrodes of the light-emitting device are short-circuited, the first control signal is used to control the first transistor to be turned off so that the first subcircuit is disconnected, the second control signal is used to control the second transistor to be turned off so that the second subcircuit is disconnected, and the third control signal is used to control the third transistor to be turned on so that the reset unit is turned on; and / or,

[0017] In the case that the first electrode and the second electrode of the light emitting device are short-circuited, the potential of the second power supply signal is the ground potential, and the potential of the common electrode is a negative potential.

[0018] In some embodiments, the protection unit includes an electrical fuse;

[0019] In the case that the first electrode and the second electrode of the light emitting device are short-circuited, the electric fuse is used to be blown under the action of the current flowing therethrough, so that the reset unit is disconnected from the third node.

[0020] In some embodiments, the protection unit includes an electrical fuse;

[0021] The electric fuse is arranged in the same layer as at least one signal line, and the resistivity of the electric fuse is smaller than the resistivity of the signal line arranged in the same layer; and / or,

[0022] The electric fuse is arranged in the same layer as the gate of the transistor, and the resistivity of the electric fuse is smaller than the resistivity of the gate of the transistor; and / or,

[0023] The electric fuse is arranged in the same layer as the semiconductor layer, and the resistivity of the electric fuse is smaller than the resistivity of the semiconductor layer arranged in the same layer.

[0024] In some embodiments, the protection unit includes an electrical fuse;

[0025] The electrical fuse comprises a first connection end, a second connection end and a fuse segment, the fuse segment, the first connection end and the second connection end are an integrated structure, and the fuse segment is connected between the first connection end and the second connection end;

[0026] The first connection end is electrically connected to the third node through a first via hole, and the second connection end is electrically connected to the reset unit through a second via hole;

[0027] The size of the fuse segment in a first direction is smaller than the size of the connection end, the first direction intersects with a second direction, and the second direction is the length direction of the fuse segment.

[0028] In some implementations, the pixel circuit further includes:

[0029] A process reference structure, wherein the process reference structure and the electrical fuse are arranged in the same layer;

[0030] The process reference structure and the first connection end and the second connection end are respectively arranged on different sides of the fuse segment;

[0031] The orthographic projection of the process reference structure on the substrate layer has no overlap with the orthographic projection of the electrical fuse on the substrate layer.

[0032] In some embodiments, the second power connection line is used to electrically connect to a second power line, and the second power line is electrically connected to a plurality of the second power connection lines;

[0033] The current density of the second power connection line is greater than the current density of the electric fuse;

[0034] The current density of the second power line is greater than the current density of the electrical fuse.

[0035] In some embodiments, the connection distance between the electric fuse and the first electrode of the light emitting device is greater than the connection distance between the electric fuse and the second power connection line; and / or,

[0036] The fuse breaking voltage range is 7.5V to 9V; and / or,

[0037] The line width of the fuse segment is in the range of 0.02 μm to 0.2 μm, and the thickness of the fuse segment is in the range of 200 nm to 500 nm; and / or,

[0038] The fuse segment is arranged in a curve or a folded line.

[0039] In some embodiments, the protection unit includes an electric fuse, and when the first and second electrodes of the light emitting device are short-circuited, the electric fuse is used to be melted under the action of the current flowing therethrough, so that the reset unit is disconnected from the third node;

[0040] The square resistance of the electrical fuse is in the range of 0.06 to 0.3 ohm / □; and / or,

[0041] The electrical fuse at least partially surrounds the third transistor; and / or,

[0042] A shielding layer is provided between the gate of the third transistor and the electrical fuse.

[0043] According to a second aspect of an embodiment of the present application, a display panel is provided, comprising:

[0044] The pixel circuit as described in the first aspect;

[0045] a light emitting device, wherein a first electrode of the light emitting device is electrically connected to a third node of the pixel circuit;

[0046] A data signal line electrically connected to the first sub-circuit of the pixel circuit;

[0047] a first power line, electrically connected to the second sub-circuit of the pixel circuit;

[0048] A second power connection line, electrically connected to a reset unit of the pixel circuit;

[0049] A second power line, electrically connected to the plurality of pixel circuits via the second power connection line;

[0050] The common electrode is electrically connected to the second electrode of the light emitting device.

[0051] According to a third aspect of the embodiments of the present application, a display device is provided, including:

[0052] A display panel as described in the second aspect.

[0053] By setting a protection unit in the pixel circuit, the protection unit may include a resistor, and the resistivity of the resistor of the protection unit may be less than the resistivity of the second power connection line. In the case of a short circuit between the two poles of the light-emitting device, the resistor of the protection unit may be broken under the action of a large current, and the large current has no effect on the second power connection line. The disconnection of the protection unit may disconnect the reset unit from the third node. The reset unit is disconnected from the third node, and in the case of a short circuit between the first pole and the second pole, the potential of the second power connection line may be prevented from being pulled to the short circuit potential of the first pole, thereby preventing the potential of the second power line from being pulled to the potential of the first pole, thereby avoiding dark line defects of the entire row, the entire column or the cross shape caused by a short circuit of a local light-emitting device. Dark line defects in the display mode of the display panel may be repaired as point defects. BRIEF DESCRIPTION OF THE DRAWINGS

[0054] Figure 1 A schematic structural block diagram of a pixel circuit provided in an embodiment of the present application;

[0055] Figure 2 A schematic structural diagram of a display panel provided in an embodiment of the present application;

[0056] Figure 3 A schematic block diagram of the architecture of a display chip provided in an embodiment of the present application;

[0057] Figure 4 A schematic structural diagram of another display panel provided in an embodiment of the present application;

[0058] Figure 5 A schematic structural diagram of a display module provided in an embodiment of the present application;

[0059] Figure 6 A schematic circuit connection diagram of a display panel provided in an embodiment of the present application;

[0060] Figure 7 A schematic structural block diagram of another pixel circuit provided in an embodiment of the present application;

[0061] Figure 8A schematic structural diagram of another pixel circuit provided in an embodiment of the present application;

[0062] Fig. 9 A schematic diagram of a pixel circuit driving timing provided in an embodiment of the present application;

[0063] Fig.10 A schematic diagram of a working state of a pixel circuit in the first stage provided by an embodiment of the present application;

[0064] Fig.11 A schematic diagram of a working state of a pixel circuit in the second stage provided in an embodiment of the present application;

[0065] Fig.12 A schematic diagram of a working state of a pixel circuit in the third stage provided by an embodiment of the present application;

[0066] Fig.13 A schematic diagram of the fourth stage of operation of a pixel circuit provided in an embodiment of the present application

[0067] Fig.14 A schematic diagram of a fourth-stage working state of another pixel circuit provided in an embodiment of the present application;

[0068] Fig.15 A schematic diagram of a timing sequence of some control signals of a repair driving mode provided in an embodiment of the present application;

[0069] Fig.16 A schematic diagram of a working state of a pixel circuit provided in an embodiment of the present application in a repair driving mode;

[0070] Fig.17 A schematic diagram of another working state of the pixel circuit provided in the embodiment of the present application in the repair driving mode;

[0071] Fig.18 A schematic diagram of another working state of the pixel circuit provided in the embodiment of the present application in the repair driving mode;

[0072] Fig.19 A schematic structural diagram of an electric fuse provided in an embodiment of the present application;

[0073] Fig. 20 A schematic structural diagram of another electric fuse provided in an embodiment of the present application;

[0074] Fig.21 A schematic structural diagram of another electric fuse provided in an embodiment of the present application;

[0075] Fig. 22 A schematic structural diagram of another electric fuse provided in an embodiment of the present application;

[0076] Fig.23 A schematic structural diagram of an electric fuse provided in an embodiment of the present application;

[0077] Fig.24 A schematic structural diagram of a display panel provided in an embodiment of the present application;

[0078] Fig.25 A schematic structural diagram of a display device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0079] In order to better understand the technical solutions provided by the embodiments of this specification, the technical solutions of the embodiments of this specification are described in detail below through the accompanying drawings and specific embodiments. It should be understood that the embodiments of this specification and the specific features in the embodiments are detailed descriptions of the technical solutions of the embodiments of this specification, rather than limitations on the technical solutions of this specification. In the absence of conflict, the embodiments of this specification and the technical features in the embodiments can be combined with each other.

[0080] In this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply that there is any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that the process, method, article or equipment including a series of elements includes not only those elements, but also includes other elements not explicitly listed, or also includes elements inherent to such process, method, article or equipment. In the absence of more restrictions, the elements limited by the statement "comprise one..." do not exclude the existence of other identical elements in the process, method, article or equipment including the elements. The term "more than two" includes two or more than two situations.

[0081] At present, in the field of display technology, the pixel circuit, as the core circuit of the display driving backplane, constitutes the basic display driving backplane together with the gate driving circuit and the data driving circuit. Under the control of the row scanning signal output by the gate driving circuit, the pixel circuit writes the display data signal output by the data driving circuit into the storage capacitor of the pixel circuit row by row through the switch tube in the pixel circuit. The driving tube in the pixel circuit accurately and continuously outputs the voltage or current to the display optoelectronic device, such as the pixel electrode of the light-emitting device or the liquid crystal panel, under the control of the voltage stored in the capacitor; the display device displays the image information by active or passive light emission under the drive of the current or voltage. However, in the existing pixel circuit structure, the local electrode short circuit easily leads to the whole row, the whole column or the cross-shaped dark line defect, which seriously affects the display effect and yield of the display panel.

[0082] In view of this, the embodiments of the present application provide a pixel circuit, a display panel and a display device, which can improve the dark line defects caused by local electrode short circuits and improve the display effect and display yield.

[0083] According to a first aspect of an embodiment of the present application, a pixel circuit is provided. Figure 1 A schematic structural block diagram of a pixel circuit provided in an embodiment of the present application. For example, Figure 1 As shown, a pixel circuit includes: a first subcircuit 100, a second subcircuit 200, a driving subcircuit 300 and a reset subcircuit 400, the first subcircuit 100 is electrically connected to the first node N1, the first subcircuit is used to electrically connect to the data signal line 600, and the data signal line 600 can be used to transmit the data signal DATA; the second subcircuit 200 is electrically connected to the second node N2, the second subcircuit 200 is used to electrically connect to the first power line 700, and the first power line 700 can be used to transmit the first power signal VDD; the driving subcircuit 300 is respectively connected to the first node N1 and the second node N2 The reset subcircuit 400 includes a protection unit 410 and a reset unit 420, wherein the protection unit 410 is electrically connected to the reset unit 420, and the protection unit 410 is electrically connected to the third node N3, wherein the third node N3 is used to be electrically connected to the first pole 510 of the light emitting device 500, and the second pole 520 of the light emitting device 500 is used to be electrically connected to the common electrode 800, and the common electrode 800 can be used to transmit the common signal VCOM; the reset subcircuit 400 includes a protection unit 410 and a reset unit 420, wherein the protection unit 410 is electrically connected to the reset unit 420, and the protection unit 410 is electrically connected to the third node N3, and the reset unit 420 is used to be electrically connected to the second power connection line 900, and the second power connection line 900 can be used to transmit the second power signal VSS. The light emitting device 500 can emit light under the voltage drive of the first pole 510 and the second pole 520. The protection unit 410 includes a resistor, and the resistivity of the protection unit 410 is less than the resistivity of the second power connection line 900.

[0084] In some examples, the second power connection line 900 is connected to a second power line, and the second power line can be connected to an entire row of pixel circuits, an entire column of pixel circuits, or a cross-arranged pixel circuit. The potential of the second power connection line 900 to which the current pixel circuit is connected will reversely affect the potential of the second power line.

[0085] In the case of a short circuit between the two poles of the light-emitting device, the resistor of the protection unit can be broken under the action of a large current, and the protection unit is disconnected after the break, and the large current has no effect on the second power connection line. The disconnection of the protection unit can disconnect the reset unit from the third node. The reset unit is disconnected from the third node, which can prevent the potential of the second power connection line from being pulled to the short-circuit potential of the first pole when the first pole and the second pole are short-circuited, and further prevent the potential of the second power line from being pulled to the potential of the first pole, thereby avoiding dark line defects in the entire row, column or cross shape caused by a short circuit of a local light-emitting device. The dark line defect in the display mode of the display panel can be repaired as a point defect.

[0086] Exemplary, reference Figure 1 , a repair driving mode can be set. In the repair driving mode, the difference between the potential connected to the second power connection line 900 and the potential connected to the common electrode 800 is a first difference. The first difference can be the difference between the second power signal VSS and the common signal VCOM. The first difference is greater than or equal to the driving voltage difference of the light-emitting device 500 to emit light, that is, the size of the first difference can be used to drive the light-emitting device 500 to emit light; if there is a short circuit between the first pole 510 and the second pole 520 of the light-emitting device 500, the protection unit 410 can be used to open the circuit under the action of the current formed between the second power connection line 900 and the third node N3, and the reset unit 420 is disconnected from the third node. The reset unit 420 is disconnected from the third node, and when the first pole 510 and the second pole 520 are short-circuited, the potential of the second power connection line 900 can be prevented from being pulled to the short-circuit potential of the first pole 510, and the potential of the second power line can be prevented from being pulled to the potential of the first pole 510, thereby avoiding the whole row, column or cross-shaped dark line defects caused by the short circuit of the local light-emitting device. Dark line defects can be repaired into dot defects.

[0087] Exemplarily, the driving control circuits of silicon-based OLED (organic light-emitting diode) microdisplays, silicon-based LED (light-emitting diode) microdisplays, and OLED displays may include gate driver (gate drive) circuits, source driver (data drive) circuits, and pixel circuits. Dual-chip and single-chip display architectures are included in silicon-based microdisplay architectures and manufacturing processes. The types of products applicable to the pixel circuits provided in the embodiments of the present application include, but are not limited to, silicon-based OLED microdisplays, silicon-based LED microdisplays, and OLED displays. The display panels used in the pixel circuits provided in the embodiments of the present application may be applied in areas including, but not limited to, smartphones, computers, televisions, tablet computers, or smart wearable devices, which may include smart watches or smart glasses, etc., such as AR (augmented reality), VR (virtual reality), XR (extended reality), MR (mixed reality), sights, rangefinders, and other consumer electronics products.

[0088] For example, silicon-based OLED is a new display technology that combines semiconductor process technology and OLED display technology, and uses single-crystal silicon drive circuit wafers as the substrate to prepare OLED devices. Because it has the advantages of both semiconductor process technology and OLED display technology, this technology can prepare micro-displays with smaller display areas (generally 0.2-1.8 inches) while maintaining a certain resolution. This feature gives silicon-based OLEDs a very high pixel density (generally more than 3000PPI). In addition to high PPI, silicon-based OLEDs also have the advantages of high brightness, low power consumption, high response speed, high color gamut, and high thermal stability.

[0089] Figure 2 A schematic structural diagram of a display panel provided in an embodiment of the present application. Figure 2 , silicon-based OLED can be a single-chip driving architecture. The single-chip driving architecture is to integrate the display area ACTIVE AREA of the display panel and the complete display control and driving circuit on the same chip. The driving circuit includes the row driving unit GATEDRIVER, the column driving unit SOURCE DRIVER_MUX, the image processing unit IMAGE PROCESS BLOCK, the storage unit RAM, the clock control unit OTC, etc. The bonding area BONDING PAD AREA can bind the display chip.

[0090] Figure 3 A schematic block diagram of a display chip provided in an embodiment of the present application. Figure 3 In the single-chip architecture, the display chip can include two parts, digital and analog, and is a mixed signal chip. The display chip includes an electrostatic module ESD, a data drive module SD, a line clock control module GTON, a storage unit RAM, a power module POWER, a processor interface MIPI, a clock generation module TS, and an input and output pin I / O Pad. The image processing unit IMAGEPROCESS BLOCK and the clock control unit OTC in the display control circuit are digital modules, which require a semiconductor process with a higher process node (generally 55nm) for production and manufacturing. At the same time, due to the complex logic of the digital module, the number of metal layers used (generally at least 6 metal layers) is large, resulting in a high production cost of the single-crystal silicon drive substrate. In addition, the yield of the silicon-based OLED microdisplay can be divided into the display area part and the display control drive part. The yield of the display control drive part is only determined by the semiconductor process, while the yield of the display area is jointly determined by the semiconductor process and the OLED device process. Under the single-chip architecture, the defect of any part will cause the entire module to become a defective product, resulting in a large loss of product yield, which will further increase the production cost.

[0091] As the display size requirement increases, the cost of the single-chip architecture has attracted attention. In order to reduce the cost and further reduce the power consumption, a dual-chip architecture has been proposed. Figure 4 A schematic diagram of another display panel provided in an embodiment of the present application. Figure 4 As shown, the dual-chip architecture integrates the display area and part of the driving circuit into the panel. The remaining driving circuit and display control circuit are independent DDIC. The panel part includes the display area ACTIVE AREA, the row driving unit GATEDRIVER and the data driving module SD, while the DDIC part includes the timing controller CT, the processor interface MIPI, and the image processing unit. The image processing unit may include the data signal unit DDIC_SOURCE, and the scanning signal unit includes DDIC_GOUT_L and DDIC_GOUT_R. The panel can also integrate the multiple selection circuit DeMUX<1:6> and the cathode signal ring line CathodeRing. After the design of the panel and DDIC is completed, they will be manufactured using processes of different process nodes. The DDIC part adopts a high process node process (generally below 28nm), and the panel part adopts a low process node process (generally 110nm). After completing the production of the panel circuit, the panel will continue to be put into the production of OLED devices. Finally, the manufactured panel is combined with the DDIC through the binding process and the binding area DDIC_I / O Pd Area to form a complete display, or display module.

[0092] Figure 5 A schematic structural diagram of a display module provided in an embodiment of the present application. Figure 5 As shown, the display module includes a display panel, a driver chip DDIC and a flexible circuit board FPC. The display panel is provided with a multiplexer circuit DeMUX<1:6>, a cathode signal ring line Cathode Ring, a row driver unit GATEDRIVER and a timing controller CT.

[0093] According to different division schemes, the panel part has different components. The display area, gate driver circuit and part of the source driver circuit can be made on the panel. Figure 6 A schematic circuit connection diagram of a display panel provided in an embodiment of the present application. For example, Figure 6 As shown, the display area is composed of a pixel circuit array, each pixel circuit drives a sub-pixel to emit light, that is, provides the current required for the OLED device to emit light; the row driving circuit provides the timing signal required to drive the row switch of the pixel circuit to realize the display row-by-row scanning function; the column driving circuit provides the column signal required by the pixel circuit to realize the switching and control of the display screen.

[0094] In single-chip architecture and dual-chip architecture, the pixel circuit, as a key part of the display driver backplane, directly affects the display's performance indicators such as PPI, maximum brightness, contrast, crosstalk and jitter.

[0095] A pixel circuit that outputs a stable voltage can be called a voltage-type pixel circuit, and a pixel circuit that outputs a stable current can be called a current-type pixel circuit. The type of pixel circuit can be determined according to the optoelectronic characteristics of the display device. The pixel circuit can have a data writing stage and an output stage (or a light-emitting stage). The consistency of the on-off characteristics of the optoelectronic device and the initial working state of the pixel circuit requires an initialization stage. At the same time, in order to improve the uniformity of the output current or voltage, the threshold voltage uniformity and carrier mobility of the driving tube must be compensated, and an additional threshold compensation stage needs to be added. Therefore, the working state of the pixel driving circuit includes four stages: initialization, threshold compensation, data writing, and driving light emission. For different applications and different circuit designs, the four stages are simplified or merged. For example, the threshold compensation stage and the data writing stage are merged, and threshold compensation and data writing are performed in the same stage.

[0096] The main measurement indicators of the pixel driving circuit are the following three points. The first is the range of the output stable voltage and / or current. Generally speaking, the larger the output stable current or voltage range, the wider the application range of the pixel circuit. The larger the output current or voltage range, the higher the display brightness and contrast, and the better the circuit performance. The second is the uniformity of the output voltage and / or current. The better the output current or voltage uniformity, the better the display brightness uniformity. The third is the stability of the output voltage and / or current. Because the display refreshes the displayed image in frames, the pixel circuit needs to maintain a stable output within one frame time. In addition, because the displayed image is more complex, the pixel driving circuit is required to have stable output when displaying complex or specific images, that is, the output of the pixel driving circuit is not affected by other data on the data line. The stability of the pixel driving circuit output is an important evaluation indicator of the pixel circuit.

[0097] Figure 7 A schematic structural block diagram of another pixel circuit provided in an embodiment of the present application. Figure 7, the third node N3 connected to the light emitting device 500 is directly connected to the reset unit 420. When VCOM=-9V, after the electrodes at both ends of the light emitting device 500 are short-circuited due to foreign matter, the potential of the first electrode 510 of the pixel circuit is pulled to the common signal VCOM, which is generally -9V. The potential of the end of the reset unit 420 of the pixel circuit connected to the third node N3 is pulled to -9V. When the reset unit 420 is turned on, the potential of the end of the reset unit 420 connected to the second power connection line 900 is pulled to -9V. The second power connection line 900 is connected to the second power line. The second power line can be connected to the entire row of pixel circuits, the entire column of pixel circuits, or the entire row of pixel circuits. For the pixel circuits arranged in a cross pattern, the potential of the second power line will be pulled to about -8V under the action of the voltage drop, and the -8V potential of the second power signal line will be transmitted to the reset unit of other connected pixel circuits. When the reset unit of other pixel circuits is turned on, the potential of the first pole of the light-emitting device connected to other pixel circuits is pulled straight to -8V. Under the action of the common signal -9V, the 1V voltage difference across the light-emitting device is much lower than the lighting voltage, which is generally 3V or above. The light emitters of other pixel circuits cannot emit light under the action of the 1V voltage difference, which will form dark lines in the entire row, column or cross shape, that is, horizontal dark lines, vertical dark lines or cross-shaped dark lines will be formed on the display panel. In the case of short circuits at both ends of one or several local light-emitting devices, dark line defects will occur in a wider range, seriously affecting the display effect, yield and reliability of the display panel.

[0098] refer to Figure 1 A protection unit 410 is set in the pixel circuit, and the protection unit 410 is set between the reset unit and the third node N3. A repair driving mode is set. In the repair driving mode, the reset unit 420 and the protection unit 410 are both turned on, and there is no short circuit between the first electrode 510 and the second electrode 520. The potential of the second electrode 520 is consistent with the potential of the common electrode 800. Since there is no short circuit, the potential of the first electrode 510 and the potential of the second electrode 520 are independent of each other; the potential of the first electrode 510 is consistent with the potential of one end of the protection unit 410 connected to the third node N3, and the protection unit 410 can be regarded as a wire. The potentials at both ends of the protection unit 410 are almost consistent. When the reset unit 420 is turned on, it can be regarded as a wire, and the potentials at both ends of the reset unit are consistent with the potential of the second power signal on the second power connection line. Exemplarily, in the repair driving mode, the common signal VCOM=-9V, the potential of the second power connection line is the ground potential, that is, the second power signal VSS=0V, then the potential of the first pole 510 is 0V, the voltage difference across the light-emitting device 500 is 9V, and the potential of the first pole 510 is higher than the potential of the second pole 520, 9V satisfies the lighting voltage of the light-emitting device, and the light-emitting device 500 can be normally lit. Therefore, the repair driving mode will not affect the normal light-emitting device and the connected pixel circuit.

[0099] refer to Figure 1 In the repair driving mode, the reset unit 420 and the protection unit 410 are both turned on, the first pole 510 and the second pole 520 are short-circuited, and the potential of the second pole 520 is consistent with the potential of the common electrode 800. Due to the short circuit, the potential of the first pole 510 is consistent with the potential of the second pole 520; the potential of the first pole 510 is consistent with the potential of one end of the protection unit 410 connected to the third node N3; when the reset unit 420 is turned on, it can be regarded as a wire, and the potentials at both ends of the reset unit are consistent with the potential of the second power signal on the second power connection line. Exemplarily, in the repair drive mode, the common signal VCOM=-9V, then the potential of the first pole 510 is -9V, and the potential of the second power connection line 900 is the ground potential, that is, the second power signal VSS=0V, then the potential of the reset unit 420 connected to one end of the protection unit 410 is 0V, then the voltage difference between the two ends of the protection unit 410 is 9V, and the current flowing through the protection unit 410 is large, which may cause the protection unit 410 to be short-circuited, and the connection between the reset unit 420 and the third node N3 is cut off, that is, the connection between the second power connection line 900 and the first pole 510 is cut off, then the potential on the second power connection line 900 will not be affected, then the potential on the second power line will not be affected. After going through the repair driving mode, when the pixel circuit of the display panel is lit up and driven, the second power line and the pixel circuit connected to the short-circuited light-emitting device are independent of each other, that is, there is no electrical connection. The potential on the second power line will not be affected by the pixel circuit where the short-circuited light-emitting device is located. Dark spot defects will appear at the location where the short-circuited light-emitting device is located, but there will be no dark line defects. The defective range can be greatly reduced, and the display effect, yield and reliability of the display panel can be improved.

[0100] It should be noted that the signal voltage values ​​mentioned in the above embodiments are only schematic. The value of the common signal VCOM can also be other values ​​such as -12V, -11V, -10V, -8V or -7V. The value of the second power signal VSS can also be 0V, 1V, or -1V. The driving operation of the second power signal VSS at the ground potential is relatively simple.

[0101] Exemplarily, the first electrode 510 of the light emitting device 500 may be an anode of a light emitting diode, and the second electrode 520 may be a cathode of the light emitting diode.

[0102] Exemplarily, the repair drive mode can be an independent mode from the lighting mode, and all pixel circuits of the display panel can be repaired during the detection phase. The short-circuited light-emitting device can be isolated from the second power line to prevent the pixel circuit connected to the short-circuited light-emitting device from interfering with the pixel circuit connected to the same second power line in the lighting mode.

[0103] In some embodiments, the first sub-circuit, the second sub-circuit, the driving sub-circuit and the reset unit all include transistors, the second sub-circuit includes a capacitor unit, the first end of the capacitor unit is electrically connected to the first node, the second end of the capacitor unit is electrically connected to the second node, the third end of the capacitor unit is electrically connected to the fourth node, and the fourth node is used to be electrically connected to the first power line; the capacitor unit can store and discharge charges.

[0104] In some examples, the driving subcircuit includes a P-type transistor, and the reset unit includes an N-type transistor.

[0105] Exemplarily, the reset unit uses a P-type transistor for reset, and the reset voltage range is limited, which leads to a limited voltage range of the first electrode. However, in the circuit structure using a P-type transistor for reset, line failure will not occur due to the same mechanism. Using an N-type transistor for reset can have a larger reset voltage range, but because of the special structure of the N-type transistor, line failure may occur due to the above-mentioned mechanism. Therefore, on this basis, a protection unit is introduced. The N-type transistor cooperates with the protection unit to avoid the occurrence of line failure. The reset unit uses an N-type transistor, and the driving subcircuit can use a P-type transistor for cooperation.

[0106] Exemplarily, the transistor may be a thin film transistor, which may use semiconductor materials as an active layer and metals as electrodes of the transistor. The transistor may also be a silicon-based transistor, which uses a single crystal silicon wafer as a substrate, obtains source and drain electrodes by locally doping the single crystal silicon substrate, and obtains a gate by doping polysilicon. The substrate of the silicon-based transistor may be connected to a power signal, such as a first power signal VDD, to isolate the electrical connection between multiple transistors in the pixel circuit.

[0107] Figure 8 A schematic structural diagram of another pixel circuit provided in an embodiment of the present application. In some embodiments, reference Figure 8, the first sub-circuit includes a first transistor M1, the second sub-circuit includes a second transistor M2, the driving sub-circuit includes a driving transistor DMOS, the reset unit 420 includes a third transistor M3, and the capacitor unit includes a first capacitor C1 and a second capacitor C2. The gate of the first transistor M1 is used to receive a first control signal WS, the first control signal WS can control the on and off states of the first transistor M1, the first electrode of the first transistor M1 is used to electrically connect to the data signal line DATA, the first electrode of the first transistor M1 is used to electrically connect to the data signal line 600, and the second electrode of the first transistor M1 is electrically connected to the first node N1; the gate of the second transistor M2 is used to receive a second control signal DS, the second control signal DS can control the on and off states of the second transistor M2, the first electrode of the second transistor M2 is electrically connected to the fourth node N4, the fourth node N4 is electrically connected to the first power line 700, and the second electrode of the second transistor M2 is electrically connected to the second node N2; the first end of the capacitor unit is one end of the first capacitor C1, the second end of the capacitor unit is connected to the first capacitor C1 and the second capacitor C2, and the third end of the capacitor unit is the other end of the second capacitor C2. The two ends of the first capacitor C1 are electrically connected to the first node N1 and the second node N2, respectively, and the two ends of the second capacitor C2 are electrically connected to the second node N2 and the fourth node N4, respectively, and the fourth node N4 is electrically connected to the first power line 700; the gate of the driving transistor DMOS is electrically connected to the first node N1, the first electrode of the driving transistor DMOS is electrically connected to the second node N2, and the second electrode of the driving transistor DMOS is electrically connected to the third node N3; the gate of the third transistor M3 is used to receive the third control signal AZ, and the third control signal AZ can control the conduction and cutoff of the third transistor M3, the first electrode of the third transistor M3 is electrically connected to the protection unit 410, and the second electrode of the third transistor M3 is used to electrically connect to the second power connection line 900.

[0108] It should be noted that the first electrode of the transistor may be one of the source and the drain, and the second electrode of the transistor may be the other of the source and the drain.

[0109] Exemplary, reference Figure 8 The protection unit may include an electric fuse 411, which may be used as a conductor. The electric fuse 411 may be blown under the action of a large current, and may function as a fuse to cut off the path of the large current. A large current usually comes from a large voltage difference at both ends of the path, so the path with a large voltage difference may be cut off to protect the potentials at both ends of the path from being affected by each other due to the conduction of the path.

[0110] For example, the pixel circuit provided in the embodiment of the present application may be a silicon-based substrate, and the substrate of the transistor in the pixel circuit may be a single-crystal silicon substrate. To achieve electrical isolation between transistors, a power supply signal may be connected to the substrate of the transistor. For example, the substrates of the first transistor M1, the second transistor M2, and the driving transistor DMOS are all connected to the first power supply signal VDD, and the substrate of the third transistor M3 is connected to the second power supply signal VSS.

[0111] Usually, in silicon-based transistors, the potentials of the source and substrate are not the same. For NMOS transistors, the substrate is usually connected to the lowest potential of the circuit, VBS≤0, and VBS is the voltage difference between the substrate and the source; for PMOS transistors, the substrate is usually connected to the highest potential of the circuit, VBS≥0. At this time, the threshold voltage of the transistor will change with the difference in potential between its source and substrate. This effect is called the "back gate effect".

[0112] Take NMOS tube as an example. When VBS<0 of NMOS tube, the change law of threshold voltage is as Vgs rises. Vgs is the voltage difference between the gate and source of the transistor. The gate attracts electrons inside the substrate to move to the surface of the substrate and generates a depletion layer on the surface of the substrate. When Vgs rises to a certain voltage until it reaches the threshold voltage, the surface of the substrate under the gate is inverted, and the NMOS tube begins to conduct between the source and the drain. The magnitude of the threshold voltage is related to the amount of charge in the depletion layer. The more charge in the depletion layer, the more difficult it is to turn on the NMOS tube, and the higher the threshold voltage, that is, the voltage required to turn on the NMOS. When VBS<0, the potential difference between the gate and the substrate increases, the thickness of the depletion layer also increases, and the amount of charge in the depletion layer increases, so the threshold voltage increases. As VBS decreases, the threshold voltage increases, and the drain current decreases when VGS and VDS remain unchanged. Therefore, the substrate and the gate have similar functions and can also control the change of the drain current. So we call it the "back gate" effect. Some measures can be taken in circuit design to weaken or eliminate the bias effect, such as short-circuiting the source and substrate. This can certainly eliminate the influence of the bias effect, but this requires the support of circuit and device structure and manufacturing process.

[0113] In addition, the circuit structure can be improved to reduce the substrate bias effect, and the power supply signal can be connected to the substrate.

[0114] In some examples, reference Figure 8 In the repair driving mode, the first control signal WS is used to control the first transistor M1 to be turned off to disconnect the first sub-circuit, the second control signal DS is used to control the second transistor M2 to be turned off to disconnect the second sub-circuit, and the third control signal AZ is used to control the third transistor M3 to be turned on to turn on the reset unit.

[0115] In some examples, in the repair driving mode, when the first and second electrodes of the light emitting device are short-circuited, the electric fuse is configured to be blown by the flowing current to disconnect the reset unit from the third node.

[0116] In some examples, reference Figure 8 In the repair driving mode, the potential of the second power signal VSS is the ground potential, and the potential of the common electrode 900 is the negative potential. The difference between the potential of the second power signal VSS and the potential of the common electrode 900 is the first difference, and the voltage value of the first difference can be used to drive the light emitting device 500 to light up. If the two poles of the light emitting device 500 are not short-circuited, in the repair driving mode, the electric fuse 411 can be normally turned on, and the light emitting device can be lit. If the two poles of the light emitting device 500 are short-circuited, in the repair driving mode, the light emitting device 500 will not light up, the electric fuse 411 is blown, and the reset sub-circuit is disconnected.

[0117] Fig. 9 A schematic diagram of a pixel circuit driving timing provided in an embodiment of the present application; Fig.10 A schematic diagram of a working state of a pixel circuit in the first stage provided by an embodiment of the present application; Fig.11 A schematic diagram of a working state of a pixel circuit in the second stage provided in an embodiment of the present application; Fig.12 A schematic diagram of a working state of a pixel circuit in the third stage provided by an embodiment of the present application; Fig.13 A schematic diagram of the fourth stage of operation of a pixel circuit provided in an embodiment of the present application. Figures 8 to 13 , the pixel circuit adopts 4T2C current type circuit, 4T2C means 4 transistors and 2 capacitors, the working state of the pixel circuit in the display stage can include four stages:

[0118] Exemplary, reference Fig.10 The first stage ① can be regarded as the initialization stage. From t0 to t1, M1 is turned on, M2 is turned on, and M3 is turned on. The data signal DATA includes the initial data signal V ofs and display data signal V data , initial data signal V ofs The voltage is written into the first capacitor C1 through M1, and the potential of the second node N2 connected to the DMOS source is V s =VDD, V s It is also the source voltage of DMOS. The potential of the first node N1 connected to the gate of DMOS is V g =V ofs , V g The potential of the third node N3 connected to the DMOS drain is V D =V g+V th , V D It is also the voltage of the DMOS drain, V th is the threshold voltage of DMOS, let VDD-V ofs >|V th |, prepare for the next step of discharge. At this time, Vgs=V ini =VDD-V ofs , C1 stores voltage V ini .

[0119] Exemplary, reference Fig.10 In the first stage, VSS=-5V, VCOM=-9V, M3 is turned on, the potential of the third node N3 is -5V, the potential of the first pole 510 of the light-emitting device 500 is -5V, the potential of the second pole 520 is -9V, and the voltage difference between the two poles of the light-emitting device 500 is 4V, which is not enough to light up the light-emitting device 500. The two poles of the light-emitting device 500 are not turned on, and the current flowing through the electric fuse 411 is about pA (picoampere) level, and the electric fuse 411 will not blow.

[0120] Exemplary, reference Fig.11 , the second stage 2 is from t1 to t2, which can be regarded as the self-discharge stage. M3 remains on, M1 is disconnected first, the potential of the first node N1 is floating, and M2 is disconnected again. The potential voltage of the second node N2 begins to discharge through the loop formed by DMOS and M3, and the potential of the second node N2 decreases. Because the potential of the first node N1 is floating, the voltage difference across C1 remains unchanged, and the potential of the first node N1 decreases along with the potential of the second node N2. Due to the back gate effect of DMOS, the equivalent threshold voltage of DMOS |V th_EF |=a×(VDD-V s )+|V th |, a is the back gate coefficient. Vgs remains unchanged, Vgs is the voltage difference between the gate and the source of DMOS, as the potential of the second node N2 decreases, |V th_EF | gradually increases, when |V th_EF When | increases to Vgs, DMOS is turned off and the second node N2 stops discharging. th_EF |=a×(VDD-V s )+|V th |=V ini ,

[0121] Exemplary, reference Fig.12 The third stage ③ is from t2 to t3, which can be regarded as the grayscale voltage writing and threshold compensation stage. M3 remains on, M2 remains off, M1 is on, and V data Write into the first node N1, the voltage of the first node N1 is V ofsChange to V data Since the second node N2 is floating, ΔV s =(1-b)ΔV g ,in Then the voltage of the second node N2 becomes:

[0122] It should be noted that the VDD in b×VDD can be a power supply signal connected to the transistor substrate. In the present application, the transistor silicon-based substrate is connected to the first power supply signal VDD, and can also be connected to a fixed potential separately, which is not specifically limited in the embodiments of the present application.

[0123] Exemplary, reference Fig.11 and Fig.12 In the second and third stages, M3 remains turned on, and the states of both ends of the electrical fuse 411 are consistent with those in the first stage, and the electrical fuse will not blow.

[0124] Exemplary, reference Fig.13 The fourth stage 4 is after time t4, M1 is turned off, M2 is turned on, M3 is turned off, and the light emitting device 500 is lit. At this time, the current flowing through the light emitting device 500 is It can be seen that when When 500 The threshold voltage of the driving transistor DMOS |V th | is irrelevant, that is, the threshold voltage compensation is completed. W / L is the width-to-length ratio of the DMOS channel, μ p is the dielectric constant, c ox is the gate oxide capacitance of DMOS, that is, the capacitance between the gate and the oxide layer.

[0125] Exemplary, reference Fig.13 In the fourth stage, M3 is disconnected, the electrical fuse 411 and M3 cannot form a path, no current passes through the electrical fuse 411, and the electrical fuse 411 will not be blown.

[0126] Fig.14 A schematic diagram of the fourth stage working state of another pixel circuit provided in an embodiment of the present application. Fig.14, taking the second power line 901 arranged in a horizontal line as an example, in a row of pixel circuits, the pixel circuits include a first pixel circuit P1, a second pixel circuit P2, ..., in the fourth stage (lighting stage) of the display mode, the first control signal WS = 3.3V, the second control signal DS = -2V, the third control signal AZ = -5V, then the first transistor M1 is turned off, the second transistor M2 is turned on, and the third transistor M3 is turned off. Taking the second power line 901 arranged in a horizontal line as an example, in a row of pixel circuits, the two electrodes of the light-emitting device 500 connected to the second pixel circuit P2 are short-circuited, the potential of the second electrode 520 of the light-emitting device 500 is pulled to -9V, the gate voltage V3g of M3 = AZ = -5V, the source voltage of M3 is pulled to -9V, that is, the source voltage V3s of M3 = -9V, then the gate-source voltage difference V3gs of M3 = -5V-(-9V) = 4V> V3 th, that is, the gate-source voltage difference of M3 is greater than the threshold voltage V3th, then M3 is turned on, and the drain voltage of M3 is V3d≈Vs=-9V. Due to the existence of the voltage drop, the potential of the second power line 901 connected to the drain of M3 is pulled to -8V, that is, when the two poles of the light-emitting device 500 are short-circuited, the common signal VCOM will be transmitted to the second power line 901 along the direction of the arrow. Due to the existence of the voltage drop, the potential of the second power line 901 is pulled to -8V. At this time, the pixel circuits connected to the other normal light-emitting devices, for example, the gate potential V3g=AZ=-5V of the third transistor M3 of the first pixel circuit P1, the drain potential V3d=-8V of the third transistor M3 of the first pixel circuit P1, the voltage difference between the gate and the drain V3gd=-5V-(-8V)=3V>V3th of the third transistor M3, then M3 is turned on, V3s=-8V, the potential of the first pole 510 of the light-emitting device of the first pixel circuit P1 is -8V, the potential of the second pole 520 of the light-emitting device is -9V, then the voltage difference between the two poles of the light-emitting device is 1V, which is not enough to light up the light-emitting device. Therefore, when the two poles of the light-emitting device of the second pixel circuit P2 are short-circuited, other light-emitting devices arranged in the same row as the second pixel circuit P2 cannot be lit either, and a horizontal dark line defect will be formed.

[0127] Exemplarily, if the second power line 901 is a vertical line, a vertical dark line is formed, and if there are both horizontal and vertical lines, a cross line is formed.

[0128] Fig.15 A schematic diagram of a timing sequence of some control signals of a repair driving mode provided in an embodiment of the present application; Fig.16 A schematic diagram of a working state of a pixel circuit in a repair driving mode provided in an embodiment of the present application. Fig.16In the repair driving mode, the first control signal WS, the second control signal DS and the first power supply signal VDD are floating, that is, in a high impedance state, that is, in the time period of the mode start Mode On and the mode off Mode OFF of the repair driving mode, the first control signal WS, the second control signal DS and the first power supply signal VDD are in a high impedance state or connected to a 3V voltage, but cannot be in a low level state, to ensure that the current does not flow through the driving transistor in the reverse direction and shunt. The third control signal AZ sets a constant potential of 3V, the second power supply signal VSS is grounded, that is, AZ = 3V, VSS = 0V, and the common signal VCOM inputs a negative voltage of 12V (-12V). When the light emitting device 500 is not short-circuited, AZ = 3V, VSS = 0V, the third transistor M3 is turned on, the potential of the first pole 510 of the light emitting device 500 is 0V, the light emitting device 500 is turned on under a cross voltage of 12V, the loop current of the electric fuse 411 is at the nA (nanoampere) level, and the electric fuse is not blown. Therefore, the circuit working state in the repair driving mode will not affect the normal light-emitting device and the pixel circuit in which it is located.

[0129] Fig.17 This is another working state diagram of the pixel circuit provided in the embodiment of the present application in the repair driving mode. Fig.17 In the repair driving mode, the first control signal WS, the second control signal DS and the first power signal VDD are floating, that is, in a high impedance state, the third control signal AZ is set to a constant potential of 3V, the second power signal VSS is grounded, that is, AZ=0V, and the common signal VCOM inputs a negative voltage of 12V (-12V). In the case where the two poles of the light-emitting device 500 are short-circuited, the potential of the first pole 510 of the light-emitting device 500 is -12V, the potential of the end of the electric fuse 411 connected to the first node N3 is -12V, AZ=3V, VSS=0V, the third transistor M3 is turned on, the potential of the end of the fuse connected to M3 is 0V, and the voltage across the two ends of the electric fuse 411 is -12V.

[0130] Fig.18 This is another working state diagram of the pixel circuit provided in the embodiment of the present application in the repair driving mode. Fig.18In the repair driving mode, when the two poles of the light emitting device 500 are short-circuited, the electric fuse 411 generates an instantaneous mA (milliampere) level large current under a -12V voltage difference, the electric fuse 411 is blown, and the third transistor M3 is disconnected from the light emitting device. The -12V potential will not be transmitted to the second power line 901 through M3, and then in the repair driving mode, the dark line defect becomes a dark spot defect. In the subsequent display mode, the short-circuited light emitting device in the lighting stage is not lit. Since the second power line 901 has been disconnected from the short-circuited light emitting device, the short-circuited light emitting device will not affect the potential of the second power line 901, and other normal light emitting devices are normally lit, then only dark spot defects will occur, and dark line defects will not occur.

[0131] In the display panel, the anode and cathode short circuit of a single sub-pixel will pull down the anode potential of the entire row or column of pixels through the second power line, causing the entire row or column of light-emitting devices to not emit light, forming a dark line. The pixel point circuit provided by the embodiment of the present application adds a section of electric fuse to the anode quality inspection of the drain of the third transistor and the light-emitting device, and then increases the voltage difference between the second power signal and the common signal in the repair drive mode, so that the pixel with the anode and cathode short circuit generates an ampere-level large current on the electric fuse, blows the electric fuse, forms a short circuit, and cuts off the connection between the second power line and the short-circuited pixel, which will not cause the second power line to be pulled down by the common electrode through the light-emitting device. This solution can repair the dark line, and the pixel dark spot caused by the anode and cathode short circuit remains unchanged. Since the display tolerance for dark spots is much higher than that for dark lines, repairing the dark line as a bad dark spot can improve the display effect of the display panel and the yield of the display panel.

[0132] In some embodiments, the material of the electric fuse may include a semiconductor material or a metal material.

[0133] For example, in a silicon-based display panel, the gate of a silicon-based transistor is obtained by doping polysilicon, and the electric fuse can be set in the same layer as the gate in the silicon-based display panel. According to the requirements of the electric fuse resistivity, the doping concentration and other doping process parameters of the electric fuse can be set differently from the doping of the gate, or the polysilicon material of the electric fuse is not doped. The line width of the electric fuse and the gate can also be set differently.

[0134] For example, the resistivity of the electric fuse may be smaller than the resistivity of the gate of the transistor disposed in the same layer. Then, under the same current, the electric fuse is more likely to break, while the gate will not break.

[0135] For example, in a thin film display panel, the active layer of the thin film transistor is a semiconductor material, and the electric fuse can be arranged in the same layer as the active layer. Part of the active layer will be doped to connect the source and the drain, and the doping of the electric fuse can be set differently from the doping of the active layer, or can be set the same to obtain the required resistivity.

[0136] For example, the resistivity of the electric fuse may be smaller than the resistivity of the semiconductor layer disposed at the same layer. Then, under the same current, the electric fuse is more likely to break, while the semiconductor will not break.

[0137] Exemplarily, the pixel circuit is provided with multiple metal layers, and the display panel is provided with multiple signal lines, which are usually made of metal materials. The electric fuse can be provided in the same layer as at least one metal layer, and the electric fuse can be provided in the same layer as at least one signal line.

[0138] Exemplarily, the resistivity of the electric fuse may be smaller than the resistivity of the signal line disposed in the same layer. Then, under the same current, the electric fuse is more likely to break, while the signal line will not break.

[0139] Exemplarily, the metal may include a stacked structure or a single layer structure of molybdenum-aluminum-molybdenum, a stacked structure or a single layer structure of titanium-aluminum-titanium, silver, or a conductive metal oxide such as indium tin oxide.

[0140] It should be noted that “A” and “B” being arranged in the same layer means that “A” and “B” are prepared simultaneously through the same process, and the film forming and patterning process preparation can be carried out simultaneously.

[0141] In some embodiments, the electric fuse includes a first connection end, a second connection end and a fuse segment, the fuse segment, the first connection end and the second connection end are an integrated structure, the fuse segment is connected between the first connection end and the second connection end; the first connection end is electrically connected to the third node through a first via, and the second connection end is electrically connected to the reset unit through a second via; the size of the fuse segment in the first direction is smaller than the size of the connection end, the first direction intersects with the second direction, and the second direction is the length direction of the fuse segment.

[0142] Fig.19 A schematic structural diagram of an electric fuse provided in an embodiment of the present application. Fig.19 As shown, the electric fuse includes a first connection end 412, a second connection end 413 and a fuse segment 414, and the fuse segment 414 is connected between the first connection end 412 and the second connection end 413. The first connection end 412, the second connection end 413 and the fuse segment 414 can all be rectangular in shape. The first direction X intersects with the second direction Y, and the second direction Y can be the length direction of the fuse segment 414. The first connection end 412 and the second connection end 413 are the same in size, and the size of the second connection end 413 along the first direction X can be a first size L1. The size of the fuse segment 414 in the first direction X is a second size L2, and the first size L1 is greater than the second size L2. The fuse segment 414 is used to be blown under the action of a large current, so the width of the fuse segment cannot be too wide. The connection end is used to connect other circuit structures, and sufficient space is required to ensure the stability of the electrical connection, so the width of the connection end is greater than the width of the fuse segment.

[0143] In addition, the larger area of ​​the connection end can reduce the resistance of the electric fuse to ensure that it will melt under the action of large current.

[0144] Exemplary, reference Fig.19 The electrical fuse further includes a process reference structure 415, which is arranged on the same layer as the electrical fuse; the process reference structure 415 and the first connection end 412 and the second connection end 413 are arranged on different sides of the fuse segment 414, that is, the process reference structure 415 can be arranged on the left and right sides of the fuse segment 414, and the connection ends are arranged on the upper and lower sides of the fuse segment; the orthographic projection of the process reference structure 415 on the substrate layer does not overlap with the orthographic projection of the electrical fuse on the substrate layer. The process reference structure 415 and the first connection end 412, the second connection end 413 and the fuse segment 414 are all arranged at intervals.

[0145] For example, the larger connecting section can also act as a heat sink, making the ends of the fuse section cooler than the middle area during the melting process. The middle part of the fuse should be the hottest part because it is farthest from the cooling end. This explains why we see that the melting part of the fuse is always in the middle, not near any end.

[0146] For example, in the process of setting the electric fuse, in order to ensure process accuracy and stability, a process reference structure 415 may be set to ensure the area of ​​the graphic structure during the process.

[0147] Fig. 20 A schematic structural diagram of another electric fuse provided in an embodiment of the present application. Fig. 20 The first connection terminal 412 is electrically connected to the first node through the first via 416, and the second connection terminal 413 is electrically connected to the third transistor through the second via 417. Each connection terminal can be provided with 4 vias, or more, such as 6 or 3, etc. The more vias there are, the higher the electrical connection stability is, and multiple vias can be provided within the limited area of ​​the connection terminal.

[0148] Fig.21 A schematic structural diagram of another electric fuse provided in an embodiment of the present application. Fig.21 , the shape of the fuse segment 414 is curved.

[0149] Fig. 22 A schematic structural diagram of another electric fuse provided in an embodiment of the present application. Fig. 22 , the shape of the fuse segment 414 is a broken line.

[0150] Fig.23 A schematic structural diagram of an electric fuse provided in an embodiment of the present application. Fig.23The shape of the fuse segment 414 is serrated, which can reduce the resistance of the fuse segment.

[0151] Due to the limitations of the pixel circuit setting position, the space occupied by the pixel circuit usually affects the resolution of the display panel, so try to avoid the pixel circuit occupying a large area. Within the limited area, the setting space of the newly added electric fuse is relatively limited. In order to ensure the relevant electrical parameters of the electric fuse, such as resistance value and fuse current and other parameters, a special-shaped fuse segment can be set.

[0152] In some embodiments, the second power connection line is used to electrically connect to the second power line, and the second power line is electrically connected to multiple second power connection lines; the current density of the second power connection line is greater than the current density of the electric fuse; the current density of the second power line is greater than the current density of the electric fuse. It can be ensured that when the electric fuse is blown, the second power connection line and the second power line will not be blown by the large current, thereby ensuring the stability of the second power line and the second power connection line.

[0153] In some embodiments, the connection distance between the electric fuse and the first electrode of the light emitting device is greater than the connection distance between the electric fuse and the second power connection line. The electric fuse is closer to the second power connection line than the light emitting device, which can ensure that the connection between the second power line and the current pixel circuit is disconnected when the electric fuse is blown. In addition, the electrode of the light emitting device and the electric fuse can be prevented from being short-circuited.

[0154] In some embodiments, the fuse blowing voltage range is 7.5 V to 9 V, that is, the voltage difference between the two ends that can cause the fuse to blow can be between 7.5 V and 9 V, for example, 8 V or 8.5 V. In addition, the fuse blowing condition also determines the resistance value of the fuse.

[0155] In some embodiments, the line width of the fuse segment ranges from 0.02μm to 0.2μm, that is, the value of the second dimension L2 is between 0.1μm and 0.2μm, for example, it can be 0.15μm, etc. The thickness of the fuse segment ranges from 200nm to 500nm, and the cross-sectional area of ​​the fuse segment can determine the resistance of the fuse segment.

[0156] For example, the line width of the fuse segment in a 0.11 μm process may be in a range of 0.1 μm to 0.2 μm, and the line width of the fuse segment in a 55 nm process may be in a range of 0.02 μm to 0.2 μm.

[0157] In some embodiments, the square resistance of the electrical fuse ranges from 0.06 to 0.3 ohms / □, where □ represents a single square in the square resistance test.

[0158] In some implementations, the electric fuse may at least partially surround the third transistor. The surrounding of the third transistor by the electric fuse may save the installation space of the electric fuse and may also play a role in shielding the third transistor from signal interference.

[0159] In some embodiments, a shielding layer is provided between the gate of the third transistor and the electric fuse. The shielding layer is mainly used to shield the interference of the signal flowing through the electric fuse on the gate. In particular, when the electric fuse is provided around the third transistor, the current on the electric fuse may affect the induced charge of the gate and the active layer, thereby affecting the threshold voltage of the third transistor, etc.

[0160] According to a second aspect of the embodiments of the present application, a display panel is provided. Fig.24 This is a schematic structural diagram of a display panel provided in an embodiment of the present application. Fig.24 As shown, the display panel includes: a pixel circuit P as provided in the first aspect, wherein a plurality of pixel circuits are arranged in an array; a first pole of the light-emitting device is electrically connected to a third node N3 of the pixel circuit P; a data signal line 600 is electrically connected to a first subcircuit of the pixel circuit P; a first power line 700 is electrically connected to a second subcircuit of the pixel circuit P; a second power connection line is electrically connected to a reset unit of the pixel circuit; a second power line 901 is electrically connected to a plurality of pixel circuits via the second power connection line; and a common electrode is electrically connected to a second pole of the light-emitting device.

[0161] Exemplarily, the common electrode may be an electrode layer arranged on the entire surface. The second power line 901 may also be arranged vertically, and the second power line 901 may also be arranged in a mesh, which may easily cause a mesh dark line defect if it is not repaired. The first power line 700 may also be arranged horizontally, and the second power line 901 may also be arranged in a mesh.

[0162] In some embodiments, the ratio of the line width of the second power line 901 to the line width of the fuse segment is greater than or equal to 2, that is, the line width of the second power line is much larger than the line width of the fuse segment, which can prevent the melting current of the fuse segment from affecting the second power line.

[0163] In some examples, the ratio of the line width of the second power connection line to the line width of the fuse segment is greater than or equal to 1. The line width of the second power connection line is also greater than the line width of the fuse segment.

[0164] The display panel is provided with a protection unit in the pixel circuit. The protection unit may include a resistor. The resistivity of the resistor of the protection unit may be less than the resistivity of the second power connection line. In the case of a short circuit between the two poles of the light-emitting device, the resistor of the protection unit may be broken under the action of a large current, and the large current has no effect on the second power connection line. The disconnection of the protection unit may disconnect the reset unit from the third node. In the case of a short circuit between the first pole and the second pole, the potential of the second power connection line may be prevented from being pulled to the short circuit potential of the first pole, thereby preventing the potential of the second power line from being pulled to the potential of the first pole, thereby avoiding dark line defects of the entire row, the entire column or the cross shape caused by a short circuit of a local light-emitting device. The dark line defects in the display mode of the display panel may be repaired as point defects.

[0165] In the third aspect of the embodiments of the present application, Fig.25 Schematic diagram of a display device provided in an embodiment of the present application. Fig.25 As shown, a display device includes: the display panel 1000 provided in the second aspect.

[0166] The display panel used in the display device is provided with a protection unit in the pixel circuit. The protection unit may include a resistor. The resistivity of the resistor of the protection unit may be less than the resistivity of the second power connection line. In the case of a short circuit between the two poles of the light-emitting device, the resistor of the protection unit may be broken under the action of a large current, and the large current has no effect on the second power connection line. The disconnection of the protection unit may disconnect the reset unit from the third node, and in the case of a short circuit between the first pole and the second pole, the potential of the second power connection line may be prevented from being pulled to the short circuit potential of the first pole, thereby preventing the potential of the second power line from being pulled to the potential of the first pole, thereby avoiding dark line defects of the entire row, the entire column or the cross shape caused by a short circuit of a local light-emitting device. The dark line defects in the display mode of the display panel may be repaired as point defects.

[0167] According to a fourth aspect of the embodiments of the present application, a method for driving a pixel circuit is provided, comprising:

[0168] Step 1,

[0169] Providing common signals to the common electrodes respectively, wherein the common signals are negative voltages;

[0170] and providing a ground voltage to the second power line, wherein a difference between the common signal and the ground signal is a first difference, and the first difference is a voltage difference that can light up the light emitting device;

[0171] And, a third control signal is provided to the third transistor, and the third transistor is turned on under the action of the third control signal; so as to repair the dark line defect of the display panel, that is, to perform the operation of the repair driving mode.

[0172] Step 2,

[0173] After the repair driving mode is completed, the display mode driving of the display panel is performed;

[0174] or,

[0175] After the repair driving mode is completed, the display panel is driven in the test mode;

[0176] In the test mode drive, if there is a dark line defect, the repair drive mode can be executed again.

[0177] In some examples, before step 1, a test mode driving of the display panel may be performed, and if there is no dark line defect, the repair driving mode is not performed.

[0178] An embodiment of the present application may also provide a controller, which may include a memory and a processor. The memory may store a computer program, and the processor may execute the steps of the pixel driving method according to the computer program.

[0179] The display device provided in the embodiment of the present application may include a controller and a display panel, and the controller is used to drive the display panel.

[0180] The above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present application.

[0181] Although the preferred embodiments of this specification have been described, those skilled in the art may make additional changes and modifications to these embodiments once they have learned the basic creative concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications that fall within the scope of this specification.

[0182] Obviously, those skilled in the art can make various changes and modifications to this specification without departing from the spirit and scope of this specification. Thus, if these modifications and variations of this specification fall within the scope of the claims of this specification and their equivalents, this specification is also intended to include these modifications and variations.

Claims

1. A pixel circuit, characterized in that: include: A first sub-circuit, electrically connected to the first node, the first sub-circuit being used to electrically connect to a data signal line; a second subcircuit, electrically connected to the second node, the second subcircuit being used to electrically connect to the first power line; a driving subcircuit, electrically connected to the first node, the second node and a third node respectively, the third node is used to be electrically connected to the first electrode of the light emitting device, and the second electrode of the light emitting device is used to be electrically connected to the common electrode; a reset subcircuit, the reset subcircuit comprising a protection unit and a reset unit, the protection unit being electrically connected to the reset unit, the protection unit being electrically connected to the third node, the reset unit being used to be electrically connected to a second power connection line, the second power connection line being used to transmit a second power signal; The protection unit includes a resistor, and a resistivity of the protection unit is smaller than a resistivity of the second power connection line.

2. The pixel circuit according to claim 1, characterized in that: In the event that the first and second poles of the light-emitting device are short-circuited, the difference between the potential connected to the second power connection line and the potential connected to the common electrode is a first difference, and the first difference is greater than or equal to the driving voltage difference of the light-emitting device. The resistance of the protection unit is used to break the circuit under the action of the current formed between the second power connection line and the third node, and the reset unit is disconnected from the third node.

3. The pixel circuit according to claim 1, characterized in that: The first sub-circuit, the second sub-circuit, the driving sub-circuit and the reset unit all include transistors, the second sub-circuit includes a capacitor unit, a first end of the capacitor is electrically connected to the first node, a second end of the capacitor unit is electrically connected to the second node, a third end of the capacitor unit is electrically connected to a fourth node, and the fourth node is used to be electrically connected to the first power line; The driving subcircuit includes a P-type transistor, and the reset unit includes an N-type transistor.

4. The pixel circuit according to claim 3, characterized in that: The first sub-circuit includes a first transistor, the second sub-circuit includes a second transistor, the driving sub-circuit includes a driving transistor, the reset unit includes a third transistor, and the capacitor unit includes a first capacitor and a second capacitor; The gate of the first transistor is used to receive a first control signal, the first electrode of the first transistor is used to electrically connect to a data signal line, the second electrode of the first transistor is electrically connected to the first node, the gate of the second transistor is used to receive a second control signal, the first electrode of the second transistor is electrically connected to the fourth node, the second electrode of the second transistor is electrically connected to the second node, the two ends of the first capacitor are electrically connected to the first node and the second node respectively, the two ends of the second capacitor are electrically connected to the second node and the fourth node respectively, the gate of the driving transistor is electrically connected to the first node, the first electrode of the driving transistor is electrically connected to the second node, the second electrode of the driving transistor is electrically connected to the third node, the gate of the third transistor is used to receive a third control signal, the first electrode of the third transistor is electrically connected to the protection unit, and the second electrode of the third transistor is used to electrically connect to the second power supply connection line.

5. The pixel circuit according to claim 4, characterized in that: In the case where the first electrode and the second electrode of the light emitting device are short-circuited, the first control signal is used to control the first transistor to be turned off so as to disconnect the first sub-circuit, the second control signal is used to control the second transistor to be turned off so as to disconnect the second sub-circuit, and the third control signal is used to control the third transistor to be turned on so as to turn on the reset unit; and / or, In the case that the first electrode and the second electrode of the light emitting device are short-circuited, the potential of the second power supply signal is the ground potential, and the potential of the common electrode is a negative potential.

6. The pixel circuit according to any one of claims 1 to 5, characterized in that: The protection unit includes an electric fuse; In the case that the first electrode and the second electrode of the light emitting device are short-circuited, the electric fuse is used to be blown under the action of the current flowing therethrough, so that the reset unit is disconnected from the third node.

7. The pixel circuit according to any one of claims 1 to 5, characterized in that: The protection unit includes an electric fuse; The electric fuse is arranged in the same layer as at least one signal line, and the resistivity of the electric fuse is smaller than the resistivity of the signal line arranged in the same layer; and / or, The electric fuse is arranged in the same layer as the gate of the transistor, and the resistivity of the electric fuse is smaller than the resistivity of the gate of the transistor; and / or, The electric fuse is arranged in the same layer as the semiconductor layer, and the resistivity of the electric fuse is smaller than the resistivity of the semiconductor layer arranged in the same layer.

8. The pixel circuit according to any one of claims 1 to 5, characterized in that: The protection unit includes an electric fuse; The electrical fuse comprises a first connection end, a second connection end and a fuse segment, the fuse segment, the first connection end and the second connection end are an integrated structure, and the fuse segment is connected between the first connection end and the second connection end; The first connection end is electrically connected to the third node through a first via hole, and the second connection end is electrically connected to the reset unit through a second via hole; The size of the fuse segment in a first direction is smaller than the size of the connection end, the first direction intersects with a second direction, and the second direction is the length direction of the fuse segment.

9. The pixel circuit according to claim 8, characterized in that: Also includes: A process reference structure, wherein the process reference structure and the electrical fuse are arranged in the same layer; The process reference structure and the first connection end and the second connection end are respectively arranged on different sides of the fuse segment; The orthographic projection of the process reference structure on the substrate layer has no overlap with the orthographic projection of the electrical fuse on the substrate layer.

10. The pixel circuit according to claim 9, characterized in that: The second power connection line is used to be electrically connected to a second power line, and the second power line is electrically connected to a plurality of the second power connection lines; The current density of the second power connection line is greater than the current density of the electric fuse; The current density of the second power line is greater than the current density of the electrical fuse.

11. The pixel circuit according to claim 9, characterized in that: The connection distance between the electric fuse and the first electrode of the light emitting device is greater than the connection distance between the electric fuse and the second power connection line; and / or, The fuse breaking voltage range is 7.5V to 9V; and / or, The line width of the fuse segment is in the range of 0.02 μm to 0.2 μm, and the thickness of the fuse segment is in the range of 200 nm to 500 nm; and / or, The fuse segment is arranged in a curve or a folded line.

12. The pixel circuit according to claim 4, characterized in that: The protection unit comprises an electric fuse, and when the first electrode and the second electrode of the light emitting device are short-circuited, the electric fuse is used to be melted under the action of the current flowing therethrough, so that the reset unit is disconnected from the third node; The square resistance of the electrical fuse is in the range of 0.06 to 0.3 ohm / □; and / or, The electrical fuse at least partially surrounds the third transistor; and / or, A shielding layer is provided between the gate of the third transistor and the electrical fuse.

13. A display panel, characterized in that: include: The pixel circuit as claimed in any one of claims 1 to 12; a light emitting device, wherein a first electrode of the light emitting device is electrically connected to a third node of the pixel circuit; A data signal line electrically connected to the first sub-circuit of the pixel circuit; A first power line electrically connected to the second sub-circuit of the pixel circuit; A second power connection line, electrically connected to a reset unit of the pixel circuit; A second power line, electrically connected to the plurality of pixel circuits via the second power connection line; The common electrode is electrically connected to the second electrode of the light emitting device.

14. A display device, characterized in that: include: The display panel as claimed in claim 13.

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