Pixel circuits and their driving methods, display devices

Abstract

This invention relates to the field of display technology, and in particular to a pixel circuit and its driving method, as well as a display device. A data writing unit can write a data signal to the first terminal of a driving unit based on a first scan signal. A compensation unit can perform threshold compensation on the driving unit based on the first scan signal. A storage unit can store the voltage at the control terminal of the driving unit. The driving unit can generate a driving signal based on the potential at the control terminal of the driving unit, thereby driving the light-emitting unit to emit light. A coupling unit can be used to control the voltage at the control terminal of the driving unit, reducing crosstalk in the circuit that causes changes in the brightness of the pixel circuit. The above-mentioned pixel circuit utilizes the coupling unit to ensure the potential at the control terminal of the driving unit, thereby reducing the impact of voltage crosstalk and improving the brightness stability of the pixel circuit.

Description

Technical Field

[0001] This invention relates to the field of display technology, and in particular to a pixel circuit and its driving method, and a display device. Background Technology

[0002] Active-matrix organic light-emitting diode (AMOLED) displays offer unparalleled advantages over liquid crystal displays (LCDs) in terms of color saturation, power consumption, and foldability. To achieve more refined color and brightness display effects, AMOLED is gradually dominating the high-end mobile phone market. However, the current pixel circuit architecture of AMOLED suffers from severe crosstalk problems. Summary of the Invention

[0003] Therefore, it is necessary to provide a pixel circuit, its driving method, and a display device to address the serious crosstalk problem in the existing pixel circuit architecture.

[0004] A pixel circuit includes a data writing unit, a storage unit, a driving unit, a compensation unit, a coupling unit, and a light-emitting unit. The data writing unit is connected to a first terminal of the driving unit and is configured to write a data signal to the first terminal of the driving unit according to a first scan signal. The compensation unit is connected between a control terminal and a second terminal of the driving unit and is configured to perform threshold compensation on the driving unit according to the first scan signal. The storage unit stores the voltage at the control terminal of the driving unit. The coupling unit is connected between the control terminal and the first terminal of the driving unit and is configured to control the potential at the control terminal of the driving unit according to a second scan signal. The second terminal of the driving unit is connected to the light-emitting unit and is configured to generate a driving signal according to the voltage at the control terminal of the driving unit. The driving signal is used to drive the light-emitting unit to emit light.

[0005] In one embodiment, the driving unit includes a first transistor, the first electrode of which serves as the first terminal of the driving unit, the gate of which serves as the control terminal of the driving unit, and the second electrode of which serves as the second terminal of the driving unit; the data writing unit includes a second transistor, the first electrode of which is connected to the first terminal of the driving unit, the gate of which is connected to a first scan line, and the second electrode of which is connected to a data line; the compensation unit includes a third transistor, the first electrode of which is connected to the second terminal of the driving unit, the gate of which is connected to the first scan line, and the second electrode of which is connected to the control terminal of the driving unit; the storage unit includes a storage capacitor, the first terminal of which is connected to a first power line, and the second terminal of which is connected to the control terminal of the driving unit; the coupling unit includes a fourth transistor and a voltage regulator capacitor, the first electrode of which is connected to the first power line, the gate of which is connected to a second scan line, the second electrode of which is connected to the first terminal of the voltage regulator capacitor, and the second terminal of the voltage regulator capacitor is connected to the control terminal of the driving unit.

[0006] In one embodiment, the pixel circuit further includes a first light-emitting control unit and a second light-emitting control unit. The first light-emitting control unit is connected between a first power line and a first end of the driving unit, and is configured to turn on or off the connection between the first power line and the first end of the driving unit according to a light-emitting control signal. The second light-emitting control unit is connected between a second end of the driving unit and the light-emitting unit, and is configured to turn on or off the connection between the second end of the driving unit and the light-emitting unit according to a light-emitting control signal.

[0007] In one embodiment, the first light-emitting control unit includes a fifth transistor, the first terminal of which is connected to the first power supply line, the gate of which is connected to the light-emitting control signal line, and the second terminal of which is connected to the first end of the driving unit; the second light-emitting control unit includes a sixth transistor, the first terminal of which is connected to the second end of the driving unit, the gate of which is connected to the light-emitting control signal line, and the second terminal of which is connected to the light-emitting unit.

[0008] In one embodiment, the pixel circuit further includes a first initialization unit and a second initialization unit. The first initialization unit is connected to the control terminal of the driving unit and is configured to transmit an initialization signal to the control terminal of the driving unit according to a third scan signal to initialize the control terminal of the driving unit. The second initialization unit is connected to the light-emitting unit and is configured to transmit the initialization signal to the light-emitting unit according to a fourth scan signal to initialize the light-emitting unit.

[0009] In one embodiment, the first initialization unit includes a seventh transistor, the first terminal of which is connected to the control terminal of the driving unit, the gate of which is connected to a third scan line, and the second terminal of which is connected to an initialization signal line. The second initialization unit includes an eighth transistor, the first terminal of which is connected to the light-emitting unit, the gate of which is connected to a fourth scan line, and the second terminal of which is connected to an initialization signal line.

[0010] In one embodiment, the third and seventh transistors are dual-gate transistors.

[0011] A display device comprising the pixel circuit described in any of the above embodiments.

[0012] A driving method for a pixel circuit, wherein the pixel circuit includes a first initialization stage, a data writing stage, and a second initialization stage during the operation of a display frame, the driving method comprising: in the first initialization stage, controlling the level of a first scan signal to a cutoff level and controlling the level of a second scan signal to a conduction level; in the data writing stage, controlling the level of the first scan signal to a conduction level and controlling the level of the second scan signal to a cutoff level; and in the second initialization stage, controlling the level of the first scan signal to a cutoff level and controlling the level of the second scan signal to a conduction level.

[0013] In one embodiment, the driving method further includes, in the first initialization phase, controlling the level of the third scan signal to be on, controlling the level of the fourth scan signal to be off, and controlling the level of the light emission control signal to be off; in the data writing phase, controlling the level of the third scan signal to be off, controlling the level of the fourth scan signal to be off, and controlling the level of the light emission control signal to be off; and in the second initialization phase, controlling the level of the third scan signal to be off, controlling the level of the fourth scan signal to be on, and controlling the level of the light emission control signal to be off.

[0014] In one embodiment, the pixel circuit further includes a light-emitting stage after the second initialization stage during the operation of a display frame. The driving method further includes, during the light-emitting stage, controlling the level of the first scan signal to a cutoff level, controlling the level of the second scan signal to a cutoff level, controlling the level of the third scan signal to a cutoff level, controlling the level of the fourth scan signal to a cutoff level, and controlling the level of the light-emitting control signal to a conduction level.

[0015] In the aforementioned pixel circuit, the data writing unit can write a data signal to the first terminal of the driving unit based on the first scan signal; the compensation unit can perform threshold compensation on the driving unit based on the first scan signal; and the storage unit can store the voltage at the control terminal of the driving unit. The driving unit can generate a driving signal based on the potential at the control terminal of the driving unit, thereby driving the light-emitting unit to emit light. The coupling unit can be used to stabilize the voltage at the control terminal of the driving unit, reducing crosstalk in the circuit that causes changes in the brightness of the pixel circuit. The aforementioned pixel circuit utilizes the coupling unit to ensure the potential at the control terminal of the driving unit, thereby reducing the impact of voltage crosstalk and improving the brightness stability of the pixel circuit. Attached Figure Description

[0016] To more clearly illustrate the technical solutions in the embodiments of this specification or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in this specification. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0017] Figure 1 This is a schematic diagram of the pixel circuit structure in one embodiment of this application;

[0018] Figure 2 This is a schematic diagram of the pixel circuit structure in one embodiment of this application;

[0019] Figure 3 This is a schematic diagram of the pixel circuit structure in another embodiment of this application;

[0020] Figure 4 This is a flowchart illustrating the driving method of the pixel circuit in one embodiment of this application;

[0021] Figure 5 This is a timing diagram of the pixel circuit in one embodiment of this application. Detailed Implementation

[0022] To facilitate understanding of the present invention, a more complete description will be given below with reference to the accompanying drawings. Preferred embodiments of the invention are shown in the drawings. However, the invention can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided to provide a thorough and complete understanding of the disclosure of the invention.

[0023] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. The terminology used herein in the description of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. The term "and / or" as used herein includes any and all combinations of one or more of the associated listed items.

[0024] When using the terms “including,” “having,” and “comprising” as described herein, another component may be added unless explicitly qualifying terms such as “only,” “consisting of,” etc. are used. Unless otherwise stated, singular terms may include plural forms and should not be construed as having a quantity of one.

[0025] It should be understood that although the terms “first,” “second,” etc., may be used herein to describe various elements, these elements should not be limited by these terms. These terms are used only to distinguish one element from another. For example, without departing from the scope of this application, a first element may be referred to as a second element, and similarly, a second element may be referred to as a first element.

[0026] In this application, unless otherwise expressly specified and limited, the terms "connected" and "linked" should be interpreted broadly. For example, they can refer to a direct connection or an indirect connection through an intermediate medium, or they can refer to the internal connection of two elements or the interaction between two elements. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances.

[0027] In the existing 7T1C pixel circuit architecture, there is a parasitic capacitance between the data line and the power supply voltage line (ELVDD). The voltage jump of the data signal Source transmitted on the data line will cause the ELVDD potential to change. The ELVDD potential change will then be fed back to the gate Vg of the driving transistor through the storage capacitor Cst, thereby causing the pixel circuit to emit light brightness and generating a serious crosstalk problem.

[0028] Figure 1This is a schematic diagram of the structure of a pixel circuit in one embodiment of the present application. In one embodiment, the pixel circuit may include a data writing unit 100, a storage unit 200, a driving unit 300, a compensation unit 400, a coupling unit 500, and a light-emitting unit 10.

[0029] The data writing unit 100 can be connected to the first terminal of the driving unit 300. The data writing unit 100 can be configured to transmit the data signal Vdata to the first terminal of the driving unit 300 according to the first scan signal S1. The data writing unit 100 can also be connected to the first scan line and the data line respectively. The data writing unit 100 obtains the first scan signal S1 through the first scan line and obtains the data signal Vdata through the data line, so that the data writing unit 100 can transmit the data signal Vdata to the first terminal of the driving unit 300 according to the first scan signal S1.

[0030] The compensation unit 400 can be connected between the control terminal and the second terminal of the drive unit 300. The compensation unit 400 can be configured to perform threshold compensation on the drive unit 300 based on the first scan signal S1. The compensation unit 400 can also be connected to a first scan line to acquire the first scan signal S1 through the first scan line. The data writing unit 100 can perform threshold compensation on the drive unit 300 based on the first scan signal S1.

[0031] The storage unit 200 can be used to store the voltage at the control terminal of the drive unit 300, and the voltage at the control terminal of the drive unit 300 can be a data signal after threshold compensation.

[0032] The coupling unit 500 can be connected between the control terminal of the drive unit 300 and the first terminal of the drive unit 300. The coupling unit 500 can be configured to be turned on or off according to the second scan signal S2, thereby achieving the technical effect of maintaining the potential at the control terminal of the drive unit 300. The coupling unit 500 can also be connected to the second scan line to obtain the second scan signal S2 through the second scan line.

[0033] The driving unit 300 can be configured to generate a driving signal based on the voltage at the control terminal of the driving unit 300. This driving signal can be used to drive the light-emitting unit 10 to emit light. Specifically, when the threshold-compensated data signal Vdata is transmitted to the control terminal of the driving unit 300, the driving unit 300 can generate a driving signal based on the voltage received at its control terminal and transmit it to the light-emitting unit 10 to drive it to emit light.

[0034] The pixel circuit provided in this embodiment transmits the data signal Vdata to the first terminal of the driving unit 300 according to the first scan signal S1 by the data writing unit 100. The compensation unit 400 performs threshold compensation on the driving unit 300, thereby storing the data signal Vdata and the threshold voltage Vth in the storage unit 200. When the pixel circuit is in the light-emitting stage, the storage unit 200 discharges to the control terminal of the driving unit 300. The driving unit 300 can generate a driving signal according to the voltage at the control terminal of the driving unit 300, so as to drive the light-emitting unit 10 to emit light using the driving signal. The above-mentioned pixel circuit uses the coupling unit 500 through internal circuit design to ensure the potential at the control terminal of the driving unit 300, thereby reducing the influence of voltage crosstalk and improving the brightness stability of the pixel circuit.

[0035] Figure 2 This is a schematic diagram of the circuit structure of the pixel circuit in one embodiment of the present application. In one embodiment, the driving unit 300 may include a first transistor M1. The first electrode of the first transistor M1 may serve as the first terminal of the driving unit 300, the gate of the first transistor M1 may serve as the control terminal of the driving unit 300, and the second electrode of the first transistor M1 may serve as the second terminal of the driving unit 300.

[0036] In the embodiments of this disclosure, a transistor refers to a device that includes at least a gate, a drain, and a source. In this disclosure, the first terminal of a transistor can be the drain and the second terminal can be the source, or vice versa. When using transistors with opposite polarities or when the current direction changes during circuit operation, the functions of the "source" and "drain" are sometimes interchanged. In the embodiments of this disclosure, the gate of all or part of the transistor can serve as the control terminal of the transistor, while the first and second terminals can be interchanged as needed.

[0037] In one embodiment, the data writing unit 100 may include a second transistor M2. The first terminal of the second transistor M2 can be connected to a data line, the gate of the second transistor M2 can be connected to a first scan line, and the second terminal of the second transistor M2 can be connected to a first terminal of the driving unit 300. Specifically, the second terminal of the second transistor M2 can be connected to the first terminal of the first transistor M1. The second transistor M2 can obtain the data signal Vdata transmitted by the data line through its first terminal, and obtain the first scan signal S1 transmitted by the first scan line through its gate. The first scan signal S1 can be used to control the second transistor M2 to turn on and off. After the second transistor M2 is turned on according to the first scan signal S1, it can transmit the data signal Vdata to the first terminal of the driving unit 300.

[0038] In one embodiment, the compensation unit 400 may include a third transistor M3. The first terminal of the third transistor M3 may be connected to the second terminal of the driving unit 300; specifically, the first terminal of the third transistor M3 may be connected to the second terminal of the first transistor M1. The gate of the third transistor M3 may be connected to the first scan line, and the second terminal of the third transistor M3 may be connected to the control terminal of the driving unit 300; specifically, the second terminal of the third transistor M3 may be connected to the gate of the first transistor M1. The third transistor M3 can obtain the first scan signal S1 transmitted by the first scan line through its gate. The first scan signal S1 can be used to control the third transistor M3 to enter an on or off state, thereby enabling the third transistor M3 to perform threshold compensation on the driving unit 300 when it enters an on state according to the third scan signal S3.

[0039] In one embodiment, the storage cell 200 may include a storage capacitor Cst, the first end of which may be connected to a first power supply line. The first power supply line may continuously provide a high-level first power supply signal ELVDD. The second end of the storage capacitor Cst may be connected to the control terminal of the driving unit 300. Specifically, the second end of the storage capacitor Cst may be connected to the gate of the first transistor M1.

[0040] In one embodiment, the coupling unit 500 may include a fourth transistor M4 and a voltage-stabilizing capacitor C1. The first terminal of the fourth transistor M4 may be connected to a first power supply line. The gate of the fourth transistor M4 may be connected to a second scan line, and the second terminal of the fourth transistor M4 may be connected to the first terminal of the voltage-stabilizing capacitor C1. The second terminal of the voltage-stabilizing capacitor C1 may be connected to the control terminal of the driving unit 300; specifically, the second terminal of the voltage-stabilizing capacitor C1 may be connected to the gate of the first transistor M1. The fourth transistor M4 can obtain a second scan signal S2 transmitted by the second scan line through its gate. The second scan signal S2 can be used to control the turning on and off of the fourth transistor M4, thereby allowing the fourth transistor M4 to control the connection between the voltage-stabilizing capacitor C1 and the first power supply line according to the second scan signal S2.

[0041] In one embodiment, the light-emitting unit 10 may include a light-emitting diode (LED) D1. When a drive signal generated by the first transistor M1 is transmitted to the LED D1, the LED D1 can emit light with a brightness corresponding to the drive signal. The LED D1 may include an anode and a cathode. The anode of the LED D1 is connected to the second terminal of the first transistor M1, and the cathode of the LED D1 is connected to a second power supply line. The second power supply line can continuously provide a low-level second voltage ELVSS.

[0042] In one embodiment, the pixel circuit may further include a first light-emitting control unit 600 and a second light-emitting control unit 700.

[0043] A first light-emitting control unit 600 can be connected between a first power supply line and a first terminal of a driving unit 300. The first light-emitting control unit 600 can be configured to turn the connection between the first power supply line and the first terminal of the driving unit 300 on or off according to a light-emitting control signal EM. The first light-emitting control unit 600 may include a switching transistor, which is controlled to turn on or off according to the light-emitting control signal EM, thereby enabling the first light-emitting control unit 600 to turn the connection between the first power supply line and the first terminal of the driving unit 300 on or off according to the light-emitting control signal EM. The first power supply line can continuously provide a high-level first power supply signal ELVDD.

[0044] The second light-emitting control unit 700 can be connected between the second terminal of the driving unit 300 and the light-emitting unit 10. The second light-emitting control unit 700 can be configured to turn on or off the connection between the second terminal of the driving unit 300 and the light-emitting unit 10 according to the light-emitting control signal EM. Similarly, the second light-emitting control unit 700 may also include a switching transistor, which is turned on or off according to the light-emitting control signal EM, so that the second light-emitting control unit 700 can turn on or off the connection between the second terminal of the driving unit 300 and the light-emitting unit 10 according to the light-emitting control signal EM.

[0045] In one embodiment, the first light-emitting control unit 600 may include a fifth transistor M5. The first terminal of the fifth transistor M5 may be connected to a first power supply line, the gate of the fifth transistor M5 may be connected to a light-emitting control signal line, and the second terminal of the fifth transistor M5 may be connected to a first terminal of the driving unit 300. Specifically, the second terminal of the fifth transistor M5 may be connected to the first terminal of the first transistor M1. The fifth transistor M5 receives a light-emitting control signal EM transmitted through the light-emitting control signal line via its gate. The light-emitting control signal EM can be used to control the conduction or de-conduction of the fifth transistor M5, thereby allowing the first light-emitting control unit 600 to turn on or off the connection between the first power supply line and the first terminal of the driving unit 300 according to the light-emitting control signal EM.

[0046] The second light-emitting control unit 700 may include a sixth transistor M6. The first terminal of the sixth transistor M6 can be connected to the second terminal of the driving unit 300; specifically, the first terminal of the sixth transistor M6 can be connected to the second terminal of the first transistor M1. The gate of the sixth transistor M6 can be connected to a light-emitting control signal line, and the second terminal of the sixth transistor M6 can be connected to the light-emitting unit 10; specifically, the second terminal of the eighth transistor M8 can be connected to the anode of the light-emitting diode D1. The sixth transistor M6 can receive a light-emitting control signal EM transmitted through the light-emitting control signal line via its gate. The light-emitting control signal EM can also be used to control the conduction or de-conduction of the sixth transistor M6, thereby enabling the second light-emitting control unit 700 to turn on or off the connection between the second terminal of the driving unit 300 and the light-emitting unit 10 according to the light-emitting control signal EM.

[0047] In one embodiment, the pixel circuit may further include a first initialization unit 800 and a second initialization unit 900.

[0048] The first initialization unit 800 can be connected to the control terminal of the drive unit 300. The first initialization unit 800 can be configured to transmit the initialization signal VREFN to the control terminal of the drive unit 300 according to the third scan signal S3, so as to initialize the control terminal of the drive unit 300. The first initialization unit 800 can also be connected to the third scan line to obtain the third scan signal S3 through the third scan line.

[0049] The second initialization unit 900 can be connected to the light-emitting unit 10. The second initialization unit 900 can be configured to transmit an initialization signal VREFN to the light-emitting unit 10 according to the fourth scan signal S4 to initialize the light-emitting unit 10. The second initialization unit 900 can also be connected to the fourth scan line to obtain the fourth scan signal S4 through the fourth scan line.

[0050] In one embodiment, the first initialization unit 800 may include a seventh transistor M7. The first terminal of the seventh transistor M7 may be connected to an initialization signal line, the gate of the seventh transistor M7 may be connected to a third scan line, and the second terminal of the seventh transistor M7 may be connected to the control terminal of the driving unit 300. Specifically, the second terminal of the seventh transistor M7 is connected to the gate of the first transistor M1. The seventh transistor M7 can receive a third scan signal S3 transmitted from the third scan line through its gate. The third scan signal S3 can be used to control the turning on or off of the seventh transistor M7. Therefore, when the seventh transistor M7 is turned on according to the third scan signal S3, the first initialization unit 800 can transmit a first initialization signal VREFN to the control terminal of the driving unit 300 to initialize the control terminal of the driving unit 300.

[0051] The second initialization unit 900 may include an eighth transistor M8. The first terminal of the eighth transistor M8 can be connected to an initialization signal line, the gate of the eighth transistor M8 can be connected to a fourth scan line, and the second terminal of the eighth transistor M8 can be connected to the light-emitting unit 10. Specifically, the second terminal of the eighth transistor M8 can be connected to the anode of the light-emitting diode D1. The eighth transistor M8 can receive a fourth scan signal S4 transmitted from the fourth scan line through its gate. The fourth scan signal S4 can be used to control the turning on or off of the eighth transistor M8. Therefore, when the eighth transistor M8 is turned on according to the fourth scan signal S4, the second initialization unit 900 can transmit an initialization signal VREFN to the anode of the light-emitting diode D1 to initialize the anode of the light-emitting diode D1.

[0052] Figure 3 This is a schematic diagram of the pixel circuit structure in another embodiment of this application. In this embodiment, the third transistor M3 and the seventh transistor M7 can be dual-gate transistors. Specifically, the compensation unit 400 may include a MOS transistor group 1, which may include two transistors connected in series. The MOS transistor group formed by the two transistors connected in series constitutes a dual-gate TFT, and the gates of both transistors are connected to the first scan line. The MOS transistor group 1 can acquire the first scan signal S1 transmitted by the first scan line. The first scan signal S1 can be used to control the MOS transistor group 1 to enter the on or off state, so that the MOS transistor group 1 can perform threshold compensation on the driving unit 300 when it enters the on state according to the first scan signal S1.

[0053] The first initialization unit 800 may include a MOS transistor group 2, which may include two transistors connected in series. The MOS transistor group formed by the two transistors connected in series constitutes a dual-gate TFT, and the gates of both transistors are connected to the third scan line. The MOS transistor group 2 can acquire the third scan signal S3 transmitted by the third scan line. The third scan signal S3 can be used to control the MOS transistor group 2 to enter the on or off state, so that the MOS transistor group 2 can initialize the control terminal of the driving unit 300 when it enters the on state according to the third scan signal S3.

[0054] In this embodiment, with Figure 2 Taking the pixel circuit shown as an example, the driving method of the pixel circuit will be explained.

[0055] The pixel circuitry can include a first stage, a second stage, a third stage, and a fourth stage during the operation of a display frame.

[0056] In this embodiment, when the pixel circuit operates in the first stage, the second terminal of the storage capacitor Cst and the gate of the first transistor M1 can be initialized; that is, the first stage can be the first initialization stage. In the first stage, the first scan signal S1 controls the second transistor M2 and the third transistor M3 to turn off, the second scan signal S2 controls the fourth transistor M4 to turn on, the third scan signal S3 controls the seventh transistor M7 to turn on, the fourth scan signal S4 controls the eighth transistor M8 to turn off, and the light emission control signal EM controls the fifth transistor M5 and the sixth transistor M6 to turn off.

[0057] After the seventh transistor M7 is turned on, the initialization signal VREFN can be transmitted through the seventh transistor M7 to the second terminal of the storage capacitor Cst and the gate of the first transistor M1 to initialize the second terminal of the storage capacitor Cst and the gate of the first transistor M1. Additionally, after the fourth transistor M4 is turned on, the first power supply signal ELVDD can charge the first capacitor C1. At this time, the potentials at the upper plates of the first capacitor C1 and the storage capacitor Cst are both ELVDD, and the potentials at the lower plates of the first capacitor C1 and the storage capacitor Cst are both VREFN. Therefore, in the first stage, the first capacitor C1 stores the potential information ELVDD before the first power supply signal transition.

[0058] When the pixel circuit operates in the second stage, data writing can be achieved; that is, the second stage can be a data writing stage. In the second stage, the first scan signal S1 controls the second transistor M2 and the third transistor M3 to be turned on, the second scan signal S2 controls the fourth transistor M4 to be turned off, the third scan signal S3 controls the seventh transistor M7 to be turned off, the fourth scan signal S4 controls the eighth transistor M8 to be turned off, and the light emission control signal EM controls the fifth transistor M5 and the sixth transistor M6 to be turned off.

[0059] After the second transistor M2 and the third transistor M3 are turned on, the data signal Vdata transmitted on the data line can be transmitted through the second transistor M2 to the first terminal of the first transistor M1. The first transistor M1 is also turned on in the second stage according to the potential at its gate. Simultaneously, since the third transistor M3 is also turned on, the data signal Vdata is transmitted sequentially through the first transistor M1 and the third transistor M3 to the lower plate of the storage capacitor Cst. The signal transmitted to the lower plate of the storage capacitor Cst is the threshold-compensated data signal, for example, Vdata + Vth, where Vth is the threshold voltage of the first transistor M1. That is, in the second stage, the storage capacitor Cst stores the threshold-compensated data information.

[0060] Simultaneously, when the pixel circuit switches from the white screen L255 to the Blank L0 screen, in the second stage, the voltage jump of the data signal transmitted on the data line will couple to the voltage of the first power supply signal ELVDD, causing the voltage of the first power supply signal to change from ELVDD to ELVDD'. After the data signal is written to the storage capacitor Cst in the second stage, the voltage of the first power supply signal has not yet recovered to a stable voltage. That is, during the data writing process, the potential at the upper plate of the storage capacitor Cst is ELVDD'. In subsequent operations, as the first power supply signal recovers from ELVDD' to ELVDD, the storage capacitor Cst will float (i.e., a voltage change on one plate of the storage capacitor Cst will cause a voltage change on the other plate, but the voltage difference between the two plates remains unchanged). The potential at the upper plate of the storage capacitor Cst changes from ELVDD' to ELVDD, which will cause the potential at the lower plate of the storage capacitor Cst to couple from Vg (the potential at the lower plate of the storage capacitor Cst is the same as the gate voltage of the first transistor M1) to Vg'. As can be seen, under the existing pixel circuit architecture, the potential change of the first power supply signal will be fed back to the gate of the first transistor M1 through the storage capacitor Cst, thereby causing changes in the brightness of the pixel circuit and generating a serious crosstalk problem.

[0061] In this embodiment, when the pixel circuit operates in the third stage, it can initialize the anode of the light-emitting unit and achieve voltage regulation of the gate of the first transistor M1; that is, the third stage can be the second initialization stage. In the third stage, the first scan signal S1 controls the second transistor M2 and the third transistor M3 to turn off, the second scan signal S2 controls the fourth transistor M4 to turn on, the third scan signal S3 controls the seventh transistor M7 to turn off, the fourth scan signal S4 controls the eighth transistor M8 to turn on, and the light-emitting control signal EM controls the fifth transistor M5 and the sixth transistor M6 to turn off.

[0062] After the eighth transistor M8 is turned on, the initialization signal VREFN can be transmitted to the anode of the light-emitting diode D1 through the eighth transistor M8 to initialize the anode of the light-emitting diode D1. Simultaneously, after the fourth transistor M4 is turned on, the potential of the upper plate of the first capacitor C1 changes from ELVDD to ELVDD', causing the first capacitor C1 to float (i.e., the voltage change of the upper plate of the first capacitor C1 causes a voltage change of the lower plate, and the voltage difference between the two plates remains unchanged). As the potential of the upper plate of the first capacitor C1 increases, the potential of the lower plate of the first capacitor C1 also increases. At the same time, the gate potential of the first transistor M1 is the same as the potential of the lower plate of the first capacitor C1. Therefore, the gate potential of the first transistor M1 also increases due to the change in the potential of the upper plate of the first capacitor C1. Thus, compared with the gate voltage attenuation of the first transistor in the existing 7T1C pixel circuit, the gate voltage attenuation of the first transistor M1 in the pixel circuit provided in this application is weaker, thereby reducing the probability of crosstalk in the pixel circuit.

[0063] In the pixel circuit provided in this embodiment, the first capacitor C1 and the fourth transistor M4 work together to achieve the technical effect of reverse coupling the voltage ripple on the first power supply signal ELVDD to the gate of the first transistor M1. This can avoid the voltage ripple on the first power supply signal ELVDD from affecting the gate voltage of the first transistor M1 during the subsequent recovery process, and effectively improve the crosstalk problem caused by voltage jumps on the data line.

[0064] When the pixel circuit operates in the fourth stage, it can drive the light-emitting unit 10 to emit light, that is, the fourth stage can be the light-emitting stage. In the fourth stage, the first scan signal S1 controls the second transistor M2 and the third transistor M3 to turn off, the second scan signal S2 controls the fourth transistor M4 to turn off, the third scan signal S3 controls the seventh transistor M7 to turn off, the fourth scan signal S4 controls the eighth transistor M8 to turn off, and the light-emitting control signal EM controls the fifth transistor M5 and the sixth transistor M6 to turn on.

[0065] After the fifth transistor M5 and the sixth transistor M6 are turned on, the connection path from ELVDD to ELVSS in the pixel circuit is completed. At this time, the connections between the first power line and the first terminal of the first transistor M1, as well as between the second terminal of the first transistor M1 and the anode of the light-emitting diode D1, are all completed. The first power supply signal ELVDD provided by the first power line can be transmitted to the first terminal of the first transistor M1 through the fifth transistor M5, and the storage capacitor Cst can transmit the stored threshold-compensated data signal to the gate of the first transistor M1. The first transistor M1 can generate a corresponding driving signal according to the voltage at the gate, and output it to the anode of the light-emitting diode D1 through the sixth transistor M6 to drive the light-emitting diode D1 to emit light. Specifically, the driving signal output by the first transistor M1 can be a driving current, so that the light-emitting diode D1 can be lit according to the driving current output by the first transistor M1.

[0066] In the aforementioned pixel circuit, the first stage not only initializes the storage capacitor Cst and the gate of the first transistor M1, but also charges the first capacitor C1. This allows the first capacitor C1 to reverse-couple the voltage ripple on the first power supply signal ELVDD to the gate of the first transistor M1 after the data writing phase. By reverse-coupling the voltage ripple on the first power supply signal ELVDD to the gate of the first transistor M1, the subsequent voltage ripple on the first power supply signal ELVDD during the recovery process can be prevented from affecting the gate voltage of the first transistor M1, thus improving the brightness uniformity of the pixel.

[0067] In one embodiment, all transistors in the pixel circuit provided in this application are P-type transistors, that is, the first transistor M1, the second transistor M2, the third transistor M3, the fourth transistor M4, the fifth transistor M5, the sixth transistor M6, the seventh transistor M7, and the eighth transistor M8 can all be P-type transistors, for example, polysilicon thin-film transistors. In some other embodiments, the device selection of each unit in the pixel circuit can also be other suitable functional components according to actual application requirements.

[0068] This invention also provides a display device, which includes the pixel circuit described in any of the above embodiments. The display device may include one or more sets of pixel circuits. The pixel circuits can be configured to generate driving signals and use these driving signals to drive the light-emitting unit 10 to emit light. This display device can be applied to any product or component with display functionality, including but not limited to the following categories: mobile phones, televisions, digital cameras, tablet computers, laptops, desktop monitors, smart bracelets, smart glasses, automotive displays, medical devices, industrial control equipment, touch interactive terminals, etc. This invention does not impose any special limitations on these categories.

[0069] The present invention also provides a driving method for driving a pixel circuit as described in any of the above embodiments. The operation of the pixel circuit in a display frame may include a first initialization stage, a data writing stage, and a second initialization stage. Figure 4 This is a flowchart illustrating a pixel circuit driving method in one embodiment of the present application. In one embodiment, the driving method may include the following steps S100 to S300.

[0070] Step S100: In the first initialization phase, the level of the first scan signal is controlled to be off level, and the level of the second scan signal is controlled to be on level.

[0071] In practical applications, appropriate voltage levels can be selected as the on and off levels for each transistor based on its type in the pixel circuit. In this embodiment, using... Figure 3 Taking the pixel circuit shown as an example, the driving method of the pixel circuit will be explained. Figure 3 In this embodiment, all transistors are P-type transistors. Therefore, the on-level can be low and the off-level can be high. Figure 5 This is a timing diagram of the pixel circuit in one embodiment of this application. It can be followed according to... Figure 5 The signal timing shown is used to drive the pixel circuitry during a display frame. Figure 5 In this diagram, S1 can represent the first scan signal, S2 can represent the second scan signal, S3 can represent the third scan signal, S4 can represent the fourth scan signal, EM can represent the light emission control signal, t1 can represent the first initialization stage, t2 can represent the data writing stage, t3 can represent the second initialization stage, and t4 can represent the light emission stage.

[0072] In this embodiment, when the pixel circuit operates in the first initialization phase t1, the storage capacitor Cst and the gate of the first transistor M1 can be initialized. In the first initialization phase t1, the level of the first scan signal S1 can be controlled to be off, and the level of the second scan signal S2 can be controlled to be on, so as to control the second transistor M2 and the third transistor M3 to be off, and control the fourth transistor M4 to be on.

[0073] In one embodiment, the driving method may further include the following steps: in a first initialization phase, controlling the level of the third scan signal to be on, controlling the level of the fourth scan signal to be off, and controlling the level of the light emission control signal to be off.

[0074] Specifically, in the first initialization phase t1, by controlling the level of the third scan signal S3 to be on, controlling the level of the fourth scan signal S4 to be off, and controlling the level of the light emission control signal EM to be off, the seventh transistor M7 can be turned on, and the eighth transistor M8, the fifth transistor M5, and the sixth transistor M6 can be turned off.

[0075] After the seventh transistor M7 is turned on according to the third scan signal S3, the initialization signal VREFN can be transmitted through the seventh transistor M7 to the second terminal of the storage capacitor Cst and the gate of the first transistor M1 to initialize the second terminal of the storage capacitor Cst and the gate of the first transistor M1. Additionally, after the fourth transistor M4 is turned on according to the second scan signal S2, the first power supply signal ELVDD can charge the first capacitor C1. At this time, the potentials at the upper plate of the first capacitor C1 and the upper plate of the storage capacitor Cst are both ELVDD, and the potentials at the lower plate of the first capacitor C1 and the lower plate of the storage capacitor Cst are both VREFN. Therefore, in the first stage, the first capacitor C1 stores the potential information ELVDD before the first power supply signal transition.

[0076] Step S200: During the data writing stage, the level of the first scan signal is controlled to be on, and the level of the second scan signal is controlled to be off.

[0077] In this embodiment, data writing can be achieved when the pixel circuit is operating in the data writing stage t2. During the data writing stage t2, the level of the first scan signal S1 can be controlled to be on, and the level of the second scan signal S2 can be controlled to be off, thereby controlling the second transistor M2 and the third transistor M3 to be on, and controlling the fourth transistor M4 to be off.

[0078] In one embodiment, the driving method may further include the following steps: during the data writing phase, controlling the level of the third scan signal to be at the cutoff level, controlling the level of the fourth scan signal to be at the cutoff level, and controlling the level of the light emission control signal to be at the cutoff level.

[0079] Specifically, during the data writing stage t2, by controlling the level of the third scan signal S3 to the cutoff level, the level of the fourth scan signal S4 to the cutoff level, and the level of the light emission control signal EM to the cutoff level, the seventh transistor M7, the eighth transistor M8, the fifth transistor M5, and the sixth transistor M6 can all be controlled to be cut off.

[0080] After the second transistor M2 and the third transistor M3 are turned on according to the first scan signal S1, the data signal Vdata transmitted on the data line can be transmitted through the second transistor M2 to the first electrode of the first transistor M1. The first transistor M1 is also turned on in the second stage according to the potential at its gate. At the same time, since the third transistor M3 is also turned on, the data signal Vdata is transmitted sequentially through the first transistor M1 and the third transistor M3 to the lower electrode of the storage capacitor Cst. The signal transmitted to the lower electrode of the storage capacitor Cst is the data signal after threshold compensation, for example, it can be Vdata + Vth, where Vth is the threshold voltage of the first transistor M1. That is, in the second stage, the storage capacitor Cst stores the threshold-compensated data information.

[0081] Step S300: In the second initialization phase, the level of the first scan signal is controlled to be off level, and the level of the second scan signal is controlled to be on level.

[0082] In this embodiment, when the pixel circuit operates in the second initialization stage t3, it can initialize the anode of the light-emitting unit and achieve voltage regulation of the gate of the first transistor M1. In the second initialization stage t3, the level of the first scan signal S1 can be controlled to be off, and the level of the second scan signal S2 can be controlled to be on, so as to control the second transistor M2 and the third transistor M3 to be off, and control the fourth transistor M4 to be on.

[0083] In one embodiment, the driving method may further include the following steps: in the second initialization phase, controlling the level of the third scan signal to be off level, controlling the level of the fourth scan signal to be on level, and controlling the level of the light emission control signal to be off level.

[0084] Specifically, in the second initialization phase t3, by controlling the level of the third scan signal S3 to the off level, controlling the level of the fourth scan signal S4 to the on level, and controlling the level of the light emission control signal EM to the off level, the seventh transistor M7, the fifth transistor M5, and the sixth transistor M6 can all be turned off, and the eighth transistor M8 can be turned on.

[0085] After the eighth transistor M8 is turned on according to the fourth scan signal S4, the initialization signal VREFN can be transmitted through the eighth transistor M8 to the anode of the light-emitting diode D1 to initialize the anode of the light-emitting diode D1.

[0086] Considering that during the data writing phase t2, the voltage jump of the data signal transmitted on the data line will couple to the voltage of the first power supply signal ELVDD, causing the voltage of the first power supply signal to change from ELVDD to ELVDD'. This potential change in the first power supply signal will be fed back to the gate of the first transistor M1 through the storage capacitor Cst, causing changes in the brightness of the pixel circuit and generating severe crosstalk. Therefore, in this embodiment, the fourth transistor M4 is turned on according to the second scan signal S2, and the potential of the upper plate of the first capacitor C1 changes from ELVDD to ELVDD'. Thus, the first capacitor C1 also floats (i.e., the voltage change of the upper plate of the first capacitor C1 causes a voltage change of the lower plate, and the voltage difference between the two plates remains unchanged). After the upper plate potential of the first capacitor C1 increases, the lower plate potential of the first capacitor C1 also increases. Simultaneously, since the gate potential of the first transistor M1 is the same as the lower plate potential of the first capacitor C1, the gate potential of the first transistor M1 will also increase due to the change in the upper plate potential of the first capacitor C1, thereby achieving coupled voltage regulation for the gate potential of the first transistor M1.

[0087] In one embodiment, the pixel circuit may further include a light-emitting phase after the second initialization phase during the operation of a display frame. The driving method may further include the following steps: during the light-emitting phase, controlling the level of the first scan signal to a cutoff level, controlling the level of the second scan signal to a cutoff level, controlling the level of the third scan signal to a cutoff level, controlling the level of the fourth scan signal to a cutoff level, and controlling the level of the light-emitting control signal to a conduction level.

[0088] In this embodiment, when the pixel circuit operates in the light-emitting stage t4, it can drive the light-emitting unit 10 to emit light. In the light-emitting stage t4, the level of the first scan signal S1 can be controlled to be cut off, the level of the second scan signal S2 can be controlled to be cut off, the level of the third scan signal S3 can be controlled to be cut off, the level of the fourth scan signal S4 can be controlled to be cut off, and the level of the light-emitting control signal EM can be controlled to be turned on, so as to control the second transistor M2, the third transistor M3, the fourth transistor M4, the seventh transistor M7 and the eighth transistor M7 to be cut off, and control the fifth transistor M5 and the sixth transistor M6 to be turned on.

[0089] After the fifth transistor M5 and the sixth transistor M6 are turned on, the connection path from ELVDD to ELVSS in the pixel circuit is completed. At this time, the connections between the first power line and the first terminal of the first transistor M1, as well as between the second terminal of the first transistor M1 and the anode of the light-emitting diode D1, are all completed. The first power supply signal ELVDD provided by the first power line can be transmitted to the first terminal of the first transistor M1 through the fifth transistor M5, and the storage capacitor Cst can transmit the stored threshold-compensated data signal to the gate of the first transistor M1. The first transistor M1 can generate a corresponding driving signal according to the voltage at the first terminal and the gate, and output it to the anode of the light-emitting diode D1 through the sixth transistor M6 to drive the light-emitting diode D1 to emit light. Specifically, the driving signal output by the first transistor M1 can be a driving current, so that the light-emitting diode D1 can be lit according to the driving current output by the first transistor M1.

[0090] In the pixel circuit driving method provided in this embodiment, the timing control of the second scan signal S2 is used to operate the fourth transistor M4. Combined with the first capacitor C1, this achieves the technical effect of reverse coupling the voltage ripple on the first power supply signal ELVDD to the gate of the first transistor M1. By reverse coupling the voltage ripple on the first power supply signal ELVDD to the gate of the first transistor M1, the influence of the voltage ripple on the gate voltage of the first transistor M1 during the subsequent recovery process of the voltage ripple on the first power supply signal ELVDD can be avoided. This effectively improves the crosstalk problem caused by voltage jumps on the data line and enhances the brightness uniformity of the pixels.

[0091] It should be understood that although the steps in the flowcharts of the accompanying drawings are shown sequentially as indicated by the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless explicitly stated herein, there is no strict order restriction on the execution of these steps, and they can be executed in other orders. Moreover, at least some of the steps in the flowcharts of the accompanying drawings may include multiple steps or stages, which are not necessarily completed at the same time, but may be executed at different times, and the execution order of these steps or stages is not necessarily sequential, but may be performed alternately or in turn with other steps or at least some of the steps or stages of other steps.

[0092] In the description of this specification, references to terms such as "some embodiments," "other embodiments," and "ideal embodiments" indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the invention. In this specification, the illustrative descriptions of the above terms do not necessarily refer to the same embodiments or examples.

[0093] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0094] The embodiments described above are merely illustrative of several implementations of the present invention, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the invention patent. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the present invention, and these all fall within the protection scope of the present invention. Therefore, the protection scope of this invention patent should be determined by the appended claims.

Claims

1. A pixel circuit, characterized in that, It includes a data writing unit, a storage unit, a driving unit, a compensation unit, a coupling unit, and a light-emitting unit. The data writing unit is connected to the first end of the driving unit, and the data writing unit is configured to write a data signal to the first end of the driving unit according to the first scan signal; The compensation unit is connected between the control terminal of the drive unit and the second terminal of the drive unit, and the compensation unit is configured to perform threshold compensation on the drive unit according to the first scan signal. The storage unit is used to store the voltage at the control terminal of the drive unit; The coupling unit is connected between the control terminal of the drive unit and the first terminal of the drive unit, and the coupling unit is configured to control the potential at the control terminal of the drive unit according to the second scan signal. The second end of the driving unit is connected to the light-emitting unit, and the driving unit is configured to generate a driving signal according to the voltage of the control end of the driving unit; the driving signal is used to drive the light-emitting unit to emit light.

2. The pixel circuit according to claim 1, characterized in that, The driving unit includes a first transistor, the first electrode of the first transistor serves as the first terminal of the driving unit, the gate of the first transistor serves as the control terminal of the driving unit, and the second electrode of the first transistor serves as the second terminal of the driving unit. The data writing unit includes a second transistor, the first terminal of the second transistor is connected to the first terminal of the driving unit, the gate of the second transistor is connected to the first scan line, and the second terminal of the second transistor is connected to the data line; The compensation unit includes a third transistor, the first terminal of which is connected to the second terminal of the driving unit, the gate of which is connected to the first scan line, and the second terminal of which is connected to the control terminal of the driving unit. The storage unit includes a storage capacitor, a first end of which is connected to a first power line, and a second end of which is connected to the control terminal of the drive unit. The coupling unit includes a fourth transistor and a voltage regulator capacitor. The first terminal of the fourth transistor is connected to the first power line, the gate of the fourth transistor is connected to the second scan line, the second terminal of the fourth transistor is connected to the first terminal of the voltage regulator capacitor, and the second terminal of the voltage regulator capacitor is connected to the control terminal of the driving unit.

3. The pixel circuit according to claim 1 or 2, characterized in that, The pixel circuit also includes a first light-emitting control unit and a second light-emitting control unit. The first light-emitting control unit is connected between the first power line and the first end of the driving unit. The first light-emitting control unit is configured to turn on or off the connection between the first power line and the first end of the driving unit according to the light-emitting control signal. The second light-emitting control unit is connected between the second end of the driving unit and the light-emitting unit. The second light-emitting control unit is configured to turn on or off the connection between the second end of the driving unit and the light-emitting unit according to the light-emitting control signal.

4. The pixel circuit according to claim 3, characterized in that, The first light-emitting control unit includes a fifth transistor, the first terminal of which is connected to the first power supply line, the gate of which is connected to the light-emitting control signal line, and the second terminal of which is connected to the first end of the driving unit; The second light-emitting control unit includes a sixth transistor, the first terminal of which is connected to the second terminal of the driving unit, the gate of which is connected to the light-emitting control signal line, and the second terminal of which is connected to the light-emitting unit.

5. The pixel circuit according to claim 1, characterized in that, The pixel circuit further includes a first initialization unit and a second initialization unit. The first initialization unit is connected to the control terminal of the driving unit. The first initialization unit is configured to transmit an initialization signal to the control terminal of the driving unit according to the third scan signal, so as to initialize the control terminal of the driving unit. The second initialization unit is connected to the light-emitting unit, and the second initialization unit is configured to transmit the initialization signal to the light-emitting unit according to the fourth scan signal in order to initialize the light-emitting unit.

6. The pixel circuit according to claim 5, characterized in that, The first initialization unit includes a seventh transistor. The first terminal of the seventh transistor is connected to the control terminal of the driving unit, the gate of the seventh transistor is connected to the third scan line, and the second terminal of the seventh transistor is connected to the initialization signal line. The second initialization unit includes an eighth transistor, the first terminal of which is connected to the light-emitting unit, the gate of which is connected to the fourth scan line, and the second terminal of which is connected to the initialization signal line.

7. The pixel circuit according to claim 2 or 6, characterized in that, The third and seventh transistors are dual-gate transistors.

8. A display device, characterized in that, Includes the pixel circuit described in any one of claims 1 to 7.

9. A method for driving a pixel circuit, used to drive the pixel circuit according to any one of claims 1 to 7, wherein the pixel circuit includes a first initialization stage, a data writing stage, and a second initialization stage during the operation of a display frame, characterized in that, The driving method includes: During the first initialization phase, the level of the first scan signal is controlled to be off, and the level of the second scan signal is controlled to be on. During the data writing phase, the level of the first scan signal is controlled to be on, and the level of the second scan signal is controlled to be off. During the second initialization phase, the level of the first scan signal is controlled to be off, and the level of the second scan signal is controlled to be on.

10. The driving method according to claim 9, characterized in that, The driving method further includes: During the first initialization phase, the level of the third scan signal is controlled to be on, the level of the fourth scan signal is controlled to be off, and the level of the light emission control signal is controlled to be off. During the data writing phase, the level of the third scan signal is controlled to be at the cutoff level, the level of the fourth scan signal is controlled to be at the cutoff level, and the level of the light emission control signal is controlled to be at the cutoff level. During the second initialization phase, the level of the third scanning signal is controlled to be off, the level of the fourth scanning signal is controlled to be on, and the level of the light emission control signal is controlled to be off. Optionally, the pixel circuit further includes a light-emitting phase after the second initialization phase during the operation of a display frame, and the driving method further includes: During the light emission stage, the level of the first scan signal is controlled to be at the cutoff level, the level of the second scan signal is controlled to be at the cutoff level, the level of the third scan signal is controlled to be at the cutoff level, the level of the fourth scan signal is controlled to be at the cutoff level, and the level of the light emission control signal is controlled to be at the on level.

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