Node processing method and device

Abstract

The invention discloses a node processing method and device, and belongs to the field of computers. The method comprises the following steps: determining a first source node, wherein the first source node is a node included in the plurality of snapshots; a first target node is determined based on the first source node, the first source node and the first target node are connected through a first output side, the first output side points to the first target node from the first source node, at least one first snapshot in the multiple snapshots comprises the first output side, and the first output side points to the first target node from the first source node. The at least one first snapshot comprises the first target node; reading at least one piece of first data based on the first output edge, wherein the at least one piece of first data is data of the first target node in the at least one first snapshot; and processing the at least one piece of first data. According to the invention, the data management efficiency can be improved.

Description

[0001] This application claims priority to Chinese patent application No. 202310839545.0, filed on July 7, 2023, with invention name “Method for processing timing diagram”, the entire contents of which are incorporated by reference into this application. Technical Field

[0002] The present application relates to the field of computers, and in particular to a method and device for node processing. Background Art

[0003] A time series graph is a graph whose structure evolves over time. For example, for two nodes in a time series graph, there is an edge connecting the two nodes, and as time goes by, the edge connecting the two nodes disappears; or, there is no edge connecting the two nodes, and as time goes by, the two nodes are connected by an edge. Alternatively, the number of nodes included in the time series graph may be constantly changing.

[0004] For example, the timing graph may be a social relationship graph, where each node in the social relationship graph represents a user. For any two users, the two users communicated at a certain moment, and the two nodes corresponding to the two users in the social relationship graph are connected by an edge. After the two users end the communication, the edge between the two nodes corresponding to the two users in the social relationship graph disappears. In the related art, snapshots of the timing graph are taken at different moments to obtain multiple snapshots at different moments, and the multiple snapshots are saved in memory. The accelerator can read the data of the nodes in the multiple snapshots from the memory and process the read data. The accelerator can read in multiple times, read the data of one or more nodes from each snapshot each time, and process the data read from each snapshot.

[0005] The accelerator reads node data from the memory, which is called off-chip communication. In related technologies, the accelerator needs to read the memory frequently, generating a large amount of redundant off-chip communication. Summary of the invention

[0006] The present application provides a node processing method and device to reduce redundant off-chip communication traffic. The technical solution is as follows:

[0007] In the first aspect, the present application provides a method for node processing, the method is applied to an accelerator included in a device, the device also includes a memory, the memory stores multiple snapshots, and the multiple snapshots are used to indicate the status of different moments of the timing diagram. In the method, a first source node is determined, and the first source node is a node included in the multiple snapshots. A first target node is determined based on the first source node, and the first source node and the first target node are connected using a first output edge, and the first output edge points from the first source node to the first target node. There is at least one first snapshot in the multiple snapshots that includes the first output edge, and the at least one first snapshot includes the first target node. At least one first data is read based on the first output edge, and the at least one first data is the data of the first target node in the at least one first snapshot. The at least one first data is processed.

[0008] Since the first target node is determined based on the first source node, the first output edge is obtained based on the first source node and the first target node, and at least one first snapshot including the first output edge is obtained from the multiple snapshots. At least one data of the first target node in the at least one first snapshot is obtained based on the first output edge, so that at least one data can be read simultaneously through a read operation, avoiding reading the at least one data at different times through multiple off-chip communications, thereby reducing redundant off-chip communications.

[0009] In a possible implementation, based on the topology of the multiple snapshots and the priorities of the multiple nodes, the multiple nodes are sorted to obtain a node sequence, where the multiple nodes are the nodes included in the multiple snapshots. A node next to the second source node is selected from the node sequence as the first source node, where the second source node is the source node determined last time. Since the node sequence is sorted based on the priority of each node, high-priority nodes can be processed first.

[0010] In another possible implementation, for each node, the priority of the node is determined based on the lifespan of the node and / or the degree of the node, so that the priority can reflect the frequency of use of the node, so that nodes with higher usage frequency can be read and processed first.

[0011] In another possible implementation, the accelerator includes a first cache space, a second cache space, and a third cache space. The first cache space is used to cache intermediate results generated in the process of sorting the multiple nodes. The second cache space is used to cache node sequences. The third cache space is used to cache data of nodes that have been read.

[0012] In another possible implementation, the accelerator includes a fourth cache space. The fourth cache space is used to cache a bitmap, the bitmap is used to record the states of the multiple nodes, and for each node, the state of the node is an active state when the node is not sorted, or the state of the node is an inactive state when the node is sorted.

[0013] In another possible implementation, the accelerator includes a fifth cache space, and the fifth cache space is used to cache an edge array and a node array. The edge array includes edge information of multiple output edges, the multiple output edges are output edges included in the multiple snapshots, and for each output edge, the edge information of the output edge includes identification information and / or life of the target node of the output edge. The node array includes offset information of multiple nodes, the multiple nodes are nodes included in the multiple snapshots, and for each node, the offset information of the node includes the offset of the edge information of the first output edge in at least one output edge in the edge array and the offset of the edge information of the last output edge in the at least one output edge in the edge array, and the at least one output edge is an output edge with the node as the source node. The first target node is determined based on the first source node, the edge array and the node array. Since the edge array and the node array are located in the fifth cache space of the accelerator, the content in the edge data group and the node array can be quickly obtained from the fifth cache space, thereby improving the efficiency of determining the first target node.

[0014] In another possible implementation, the intermediate result includes at least one second target node of the first node among the multiple nodes, the first node and the second target node are connected by a second output edge in the multiple snapshots, the first node is the source node of the second output edge, and the second cache space includes the first node and the at least one second target node. The first node saved in the first cache space is popped up as the third source node. At least one third target node is determined based on the third source node, and the third source node and the third target node are connected by a third output edge in the multiple snapshots. Based on the priority of the at least one third target node, the at least one third target node is saved to the first cache space and the at least one third target node is saved to the second cache space, and the node sequence includes the node sequence saved in the second cache space. In this way, the topology of multiple snapshots and the priority of multiple nodes are used to sort, and the nodes with higher frequency of use can be sorted to the front and can be read first.

[0015] In another possible implementation, the first node is saved in the second cache space; and at least one second target node of the first node is determined. Based on the priority of the at least one second target node, the at least one second target node is saved in the first cache space and the at least one second target node is saved in the second cache space.

[0016] In another possible implementation, when the at least one first data is cached in the third cache space, the at least one first data is read from the third cache space. When the at least one first data is not cached in the third cache space, the at least one first data is read from the memory based on the first output edge. Since the data of the node with a higher priority can be read first, the data of the node can be saved in the third cache space, and then the data of the node can be read from the third cache space, thereby improving the reading efficiency and not having to read the data of the node from the memory, reducing redundant off-chip communications.

[0017] In another possible implementation, the at least one first data is not cached in the third cache space. When the free capacity of the third cache space is greater than or equal to the total data volume of the at least one first data, the at least one first data is cached in the third cache space. When the free capacity of the third cache space is less than the total data volume of the at least one first data, a node with a priority lower than the priority of the first target node is obtained from the third cache space, and the data of the obtained node stored in the third cache space is updated to the at least one first data. In this way, high-priority data can be stored in the third cache space, which can reduce redundant off-chip communications.

[0018] In a second aspect, the present application provides a node processing device, which is used to execute the method in the first aspect or any possible implementation of the first aspect. Specifically, the device includes a unit for executing the method in the first aspect or any possible implementation of the first aspect.

[0019] In a third aspect, the present application provides a device, comprising at least one processor and at least one memory, wherein the at least one memory stores computer-readable instructions; the at least one processor executes the computer-readable instructions so that the device executes the instructions of the method in the first aspect or any possible implementation of the first aspect.

[0020] In a fourth aspect, the present application provides a computer program product, which includes a computer program stored in a computer-readable storage medium, and the computer program is loaded by a processor to implement instructions of the method of the above-mentioned first aspect or any possible implementation method of the first aspect.

[0021] In a fifth aspect, the present application provides a computer-readable storage medium for storing a computer program, wherein the computer program is loaded by a processor to execute instructions of the method of the first aspect or any possible implementation of the first aspect.

[0022] In a sixth aspect, the present application provides a chip comprising a memory and a processor, the memory being used to store computer instructions, and the processor being used to call and run the computer instructions from the memory to execute instructions of the method of the above-mentioned first aspect or any possible implementation of the first aspect. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figure 1 It is a schematic diagram of a device structure provided in an embodiment of the present application;

[0024] Figure 2 is a structural schematic diagram of a snapshot 1 provided in an embodiment of the present application;

[0025] Figure 3 It is a structural schematic diagram of a snapshot 2 provided in an embodiment of the present application;

[0026] Figure 4 It is a structural diagram of a node array, an edge array and an attribute array provided in an embodiment of the present application;

[0027] Figure 5 is another schematic diagram of a device structure provided in an embodiment of the present application;

[0028] Figure 6 It is a flowchart of a node processing method provided by an embodiment of the present application;

[0029] Figure 7 It is a schematic diagram of the structure of a node processing device provided in an embodiment of the present application;

[0030] Figure 8 It is a schematic diagram of the structure of another device for node processing provided in an embodiment of the present application. DETAILED DESCRIPTION

[0031] The implementation methods of the present application will be further described in detail below with reference to the accompanying drawings.

[0032] See also Figure 1 , an embodiment of the present application provides a device 100, the device 100 includes an accelerator 101 and a memory 102, and the accelerator 101 may access the memory 102. For example, the accelerator 101 may read data stored in the memory 102 and process the read data.

[0033] The memory 102 may store multiple snapshots, which are states of the timing diagram at different moments.

[0034] See also Figure 2 The timing graph includes multiple nodes and multiple output edges. For each output edge, the output edge is an edge from a source node to a target node, and the source node and the target node are two nodes among the multiple nodes.

[0035] For example, Figure 2 The timing diagram shown in the figure includes multiple nodes, respectively, nodes F, D, E, A, C, B and G, and multiple output edges, respectively, output edges FE, FD, DA, DC, AB, AG and CB. For output edge FE, node F is the source node of output edge FE, and node E is the target node of output edge FE. For output edge FD, node F is the source node of output edge FD, and node D is the target node of output edge FD. For output edge DA, node D is the source node of output edge DA, and node A is the target node of output edge DA. For output edge DC, node D is the source node of output edge DC, and node C is the target node of output edge DC. For output edge CB, node C is the source node of output edge CB, and node B is the target node of output edge CB. For output edge AB, node A is the source node of output edge AB, and node B is the target node of output edge AB. For output edge AG, node A is the source node of output edge AG, and node G is the target node of output edge AG.

[0036] For the same timing graph, the state of the timing graph changes over time. For example, as time goes by, the number of nodes included in the timing graph may change, the number of output edges included in the timing graph may change, the output edge connecting two nodes in the timing graph disappears, and / or, two nodes in the timing graph change from having no output edge to having an output edge connected.

[0037] For example, Figure 2 is the timing diagram at time t1, Figure 3 This is the timing diagram at time t2. Compared with the timing diagram at time t1, the output edge AG in the timing diagram at time t2 disappears, and an output edge appears between nodes E and D.

[0038] For example, the time sequence graph may be a social relationship graph, in which the nodes are users. When there is communication between two users, the two nodes corresponding to the two users may be connected using an output edge. When there is no communication between the two users, the output edge between the two nodes corresponding to the two users disappears. Therefore, the social relationship graph will change over time.

[0039] As the state of the timing graph is constantly changing over time, snapshot operations can be performed on the timing graph at different times to obtain multiple snapshots, which are states of the timing graph at different times, and the multiple snapshots are stored in the memory 102. The multiple snapshots are timing graphs at different times, and each snapshot includes multiple nodes and multiple output edges.

[0040] In some embodiments, see Figure 4, the memory 102 includes an attribute array, and the attribute array is used to store the data of each node included in the multiple snapshots. Optionally, for any node, at least one data of the node may be centrally stored in a continuous storage space of the attribute array. Among the multiple snapshots, there may be at least one snapshot including the node, and the at least one data of the node includes the data of the node in the at least one snapshot.

[0041] For example, a timing diagram is generated at time t0, and a snapshot operation is performed on the timing diagram at time t1 to obtain the following: Figure 2 In the snapshot 1 shown in FIG. 1 , time t1 is later than time t0. When a snapshot operation is performed on the timing diagram at time t2, the following is obtained: Figure 3 In the snapshot 2 shown, time t2 is later than time t1.

[0042] For data S of node A in snapshot 1 t1 A And the data S in snapshot 2 t2 A , data S t1 A and data S t2 A They are stored centrally in a continuous storage space in the attribute array.

[0043] For node B’s data S in snapshot 1 t1 B And the data S in snapshot 2 t2 B , data S t1 B and data S t2 B They are stored centrally in a continuous storage space in the attribute array.

[0044] For data S of node C in snapshot 1 t1 C And the data S in snapshot 2 t2 C , data S t1 C and data S t2 C They are stored centrally in a continuous storage space in the attribute array.

[0045] For data S of node D in snapshot 1 t1 D And the data S in snapshot 2 t2 D , data S t1 D and data S t2 DThey are stored centrally in a continuous storage space in the attribute array.

[0046] For data S of node E in snapshot 1 t1 E And the data S in snapshot 2 t2 E , data S t1 E and data S t2 E They are stored centrally in a continuous storage space in the attribute array.

[0047] For data S of node F in snapshot 1 t1 F And the data S in snapshot 2 t2 F , data S t1 F and data S t2 F They are stored centrally in a continuous storage space in the attribute array.

[0048] For the data S of node G in snapshot 1 t1 G And the data S in snapshot 2 t2 G , data S t1 G and data S t2 G They are stored centrally in a continuous storage space in the attribute array.

[0049] For any node, and for each snapshot in at least one snapshot including the node, the data of the node in each snapshot may be the same or different. That is, as time goes by, the data of the node in the time series graph at different times may change or may not change.

[0050] For the multiple nodes included in the multiple snapshots, the accelerator 101 may sort the multiple nodes to obtain a node sequence, then read data of each node according to the node sequence, and process the read data of each node.

[0051] In some embodiments, see Figure 5 The accelerator 101 includes a first cache space 1011 , a second cache space 1012 , and a third cache space 1013 .

[0052] The first cache space 1011 is used to cache the intermediate results generated in the process of sorting the multiple nodes;

[0053] The second cache space 1012 is used to cache the node sequence;

[0054] The third cache space 1013 is used to cache the data of the nodes that have been read by the accelerator 101 .

[0055] In some embodiments, see Figure 5 The accelerator 101 includes a fourth cache space 1014, which is used to cache a bitmap, which is used to record the status of the multiple nodes. For each node, the status of the node is active when the node is not sorted, or the status of the node is inactive when the node is sorted.

[0056] In some embodiments, see Figure 5 The accelerator 101 includes a fifth cache space 1015, and the fifth cache space 1015 is used to cache edge arrays and node arrays.

[0057] See also Figure 4 The edge array includes edge information of multiple output edges, where the multiple output edges are output edges included in the multiple snapshots. For each output edge, the edge information of the output edge includes identification information and / or life span of a target node of the output edge.

[0058] For example, for Figure 2 Snapshot 1 shown and Figure 3 Snapshot 2 is shown, and snapshot 1 and snapshot 2 include output edges FE, FD, ED, DA, DC, AG, AB, CB and GB.

[0059] See also Figure 4 The edge array includes edge information of output edge AB, edge information of output edge AG, edge information of output edge CB, edge information of output edge DA, edge information of output edge DC, edge information of output edge ED, edge information of output edge FD, edge information of output edge FE and edge information of output edge GB.

[0060] Among them, the edge information of the output edge AB includes the identification information IDB and the lifetime (t0, t2) of the target node B, wherein the lifetime (t0, t2) represents a period of time from time t0 to time t2. The meaning of similar content appearing elsewhere in the embodiments of the present application will no longer be listed one by one.

[0061] The side information of the output edge AG includes the identification information IDG and lifespan (t0, t1) of the target node G. The side information of the output edge CB includes the identification information IDB and lifespan (t0, t2) of the target node B. The side information of the output edge DA includes the identification information IDA and lifespan (t0, t2) of the target node A. The side information of the output edge DC includes the identification information IDC and lifespan (t0, t2) of the target node C. The side information of the output edge ED includes the identification information IDD and lifespan (t1, t2) of the target node D. The side information of the output edge FD includes the identification information IDD and lifespan (t0, t1) of the target node D. The side information of the output edge FE includes the identification information IDE and lifespan (t0, t2) of the target node E. The side information of the output edge GB includes the identification information IDB and lifespan (t1, t2) of the target node B.

[0062] See also Figure 4 , the node array includes offset information of the multiple nodes, and for each node, the offset information of the node includes the offset of the edge information of the first output edge of at least one output edge in the edge array and the offset of the edge information of the last output edge of the at least one output edge in the edge array, and the at least one output edge is an output edge with the node as the source node.

[0063] For example, see Figure 4 , the node array includes offset information of node A, offset information of node B, offset information of node C, offset information of node D, offset information of node E, offset information of node F and offset information of node G.

[0064] Among them, for node A, the two output edges with node A as the source node include output edge AB and output edge AG, and the offset information of node A includes the offset information of output edge AB in the edge array offset offset7 and the offset information of output edge AG in the edge array offset offset6.

[0065] For node C, an output edge with node C as a source node includes output edge CB, and the offset information of node C includes offset offset8 of the offset information of output edge CB in the edge array.

[0066] For node D, the two output edges with node D as the source node include output edge DA and output edge DC, and the offset information of node D includes offset information of output edge DA in the edge array, offset 3, and offset information of output edge DC in the edge array, offset 4.

[0067] For the node E, an output edge with the node E as the source node includes the output edge ED, and the offset information of the node E includes the offset offset5 of the offset information of the output edge ED in the edge array.

[0068] For node F, the two output edges with node F as the source node include output edge FD and output edge FE, and the offset information of node F includes offset offset1 of the offset information of output edge FD in the edge array and offset offset2 of the offset information of output edge FE in the edge array.

[0069] For node G, an output edge with node G as a source node includes output edge GB, and the offset information of node G includes offset offset9 of the offset information of output edge GB in the edge array.

[0070] When a snapshot is obtained by performing a snapshot operation on the sequence diagram at a certain moment, for each node included in the snapshot, the snapshot includes the data of the node, and the data of the node is saved in the attribute array, so as to save the snapshot in the memory 102 .

[0071] A snapshot operation can be performed on the timing graph at multiple times to obtain multiple snapshots, so that the multiple snapshots are stored in the memory 102. A node array and an edge array can be generated based on the multiple snapshots, and the node array and the edge array can be stored in the fifth cache space 1015. Then, the accelerator 101 can process the multiple nodes included in the multiple snapshots.

[0072] During implementation, a first source node is determined, and the first source node is a node included in the multiple nodes. A first target node is determined based on the first source node, and the first source node and the first target node are connected using a first output edge, and the first output edge points from the first source node to the first target node. There is at least one first snapshot in the multiple snapshots that includes the first output edge, and the at least one first snapshot includes the first target node. At least one first data is read based on the first output edge, and the at least one first data is the data of the first target node in the at least one first snapshot. The at least one first data is processed. Optionally, the first source node may be the first node in the above-mentioned node sequence, or the first source node is the next node of the second source node in the above-mentioned node sequence, and the second source node is the source node determined last time.

[0073] Optionally, the accelerator may further include a processor, and the processor may process the above-mentioned multiple nodes.

[0074] See also Figure 6 The present application embodiment provides a node processing method 600, the method 600 is applied to Figure 1 The device 100 shown may be applied to Figure 5 The device 100 shown in FIG. The memory of the device 100 stores multiple snapshots, which are states of the timing diagram at different times. The accelerator of the device 100 processes multiple nodes included in the multiple snapshots through the following process.

[0075] Step 601: Based on the topologies of multiple snapshots and the priorities of multiple nodes, the multiple nodes are sorted to obtain a node sequence, where the multiple nodes are the nodes included in the multiple snapshots.

[0076] For each node, the priority of the node is determined based on the lifetime of the node and / or the degree of the node. Optionally, the degree of the node is used to indicate the number of outgoing edges connected to the node. The greater the number of outgoing edges connected to the node, the greater the degree of the node, and the smaller the number of outgoing edges connected to the node, the smaller the degree of the node.

[0077] Optionally, the degree of the node is equal to the number of output edges connected to the node, or the degree of the node is equal to the product of the number of output edges connected to the node and a specified coefficient.

[0078] In step 601, the multiple nodes may be sorted to obtain a node sequence through the following operations 6011 to 6017.

[0079] 6011: Save the first node among the multiple nodes to the second cache space.

[0080] In some embodiments, the first node of the plurality of nodes may be the first node in the topology of the plurality of snapshots.

[0081] For example, for Figure 2 Snapshot 1 and Figure 3 As shown in snapshot 2, the two snapshots include multiple nodes, namely node A, node B, node C, node D, node E, node F and node G. The first node among the multiple nodes is node F, which is the first node in the topology of snapshot 1 and the first node in the topology of snapshot 2.

[0082] In some embodiments, the second cache space may be a first-in-first-out queue, and the first node is added to the queue from the end of the queue to save the first node to the second cache space. For example, for the first node F mentioned above, the first node F is added to the queue from the end of the queue to save the first node F to the second cache space.

[0083] Optionally, saving the first node to the second cache space refers to saving the identification information of the first node to the second cache space, and the meanings of similar contents appearing elsewhere in the embodiments of the present application will not be listed one by one.

[0084] 6012: Determine at least one second target node of the first node, the first node and the at least one second target node are connected using a second output edge, and the first node is a source node of the second output edge.

[0085] The fifth cache space in the accelerator is used to cache an edge array and a node array. The edge array includes edge information of multiple output edges in the multiple snapshots, and the edge information of the output edges includes identification information and / or life of a target node of the output edge. The node array includes offset information of the multiple nodes, and the node offset information includes an offset of edge information of a first output edge in at least one output edge in the edge array and an offset of edge information of a last output edge in the at least one output edge in the edge array, and the at least one output edge is an output edge with the node as a source node.

[0086] In 6012, the offset information of the first node is obtained from the node array, and the offset information includes a first offset and a second offset. The first offset is the offset of the edge information of the first output edge of at least one second output edge in the edge array, and the second offset is the offset of the edge information of the last output edge of the at least one second output edge in the edge array, and the at least one second output edge is an output edge with the first node as the source node. Based on the first offset and the second offset, the edge information of the at least one second output edge is obtained from the edge array.

[0087] The identification information of the at least one second target node is obtained from the edge information of the at least one second output edge, and the at least one second target node is the target node of the at least one second output edge. The at least one second target node is determined based on the identification information of the at least one second target node.

[0088] For example, see Figure 4 In the node array and edge array shown, for the first node F, the offset information of the first node F is obtained from the node array, and the offset information includes the first offset offset1 of the edge information of the output edge FD in the edge array and the second offset offset2 of the edge information of the output edge FE in the edge array. Based on the first offset offset1 and the second offset offset2, the edge information of the output edge FD and the edge information of the output edge FE are obtained from the edge array. The identification information IDD of the second target node D is obtained from the edge information of the output edge FD, and the identification information IDE of the second target node E is obtained from the edge information of the output edge FE. Based on the identification information IDD of the second target node D and the identification information IDE of the second target node E, the second target node D and the second target node E are determined.

[0089] 6013: Based on the priority of the at least one second target node, save the at least one second target node into the first cache space and save the at least one second target node into the second cache space.

[0090] For each second target node, the lifetime of the second target node is obtained from the node array, and the number of output edges connected to the second target node from the multiple snapshots is counted. Based on the lifetime of the second target node and / or the degree of the second target node, the priority of the second target node is obtained, and the degree of the second target node is determined based on the number of output edges connected to the second target node. In the same manner as above, the priority of each second target node is obtained, and based on the priority of each second target node, each second target node is saved in the first cache space and each second target node is saved in the second cache space.

[0091] In some embodiments, the first cache space is a first-in-first-out queue, and based on the priority of each second target node, each second target node is queued from the tail of the first cache space to save each second target node in the first cache space. And, based on the priority of each second target node, each second target node is queued from the tail of the second cache space to save each second target node in the second cache space.

[0092] Optionally, each second target node is queued from the tail of the first cache space in descending order of priority of each second target node. And, each second target node is queued from the tail of the second cache space in descending order of priority of each second target node.

[0093] The fourth cache space in the accelerator is used to cache a bitmap, and the bitmap is used to record the states of the multiple nodes. Initially, the states of the multiple nodes recorded in the bitmap are all active states.

[0094] After the first node and the at least one second target node are saved in the second cache space, it means that the first node and the at least one second target node have been sorted. Therefore, in the bitmap saved in the fourth cache space, the state of the first node is updated to an inactive state, and the state of the at least one second target node is updated to an inactive state.

[0095] For example, for the second target node D, Figure 2 Snapshot 1 shown and Figure 3 In the snapshot 2 shown, the number of outgoing edges connected to the second target node D is 4. The degree of the second target node D is obtained based on the number of outgoing edges 4. The priority of the second target node D is obtained based on the lifetime (t0, t2) of the second target node D and the degree of the second target node D. For the second target node E, Figure 2 Snapshot 1 shown and Figure 3In the snapshot 2 shown, the number of output edges connected to the second target node E is 2, and the degree of the second target node E is obtained based on the number of output edges 2. Based on the lifetime (t0, t2) of the second target node E and the degree of the second target node E, the priority of the second target node E is obtained.

[0096] According to the priority of the second target node D and the priority of the second target node E, the second target node D and the second target node E are queued from the tail of the first cache space to save the second target node D and the second target node E in the first cache space. And, according to the priority of the second target node D and the priority of the second target node E, the second target node D and the second target node E are queued from the tail of the second cache space to save the second target node D and the second target node E in the second cache space. At this time, the first cache space sequentially saves the node D and the node E, and the second cache space sequentially saves the node F, the node D and the node E.

[0097] In addition, the fourth cache space in the accelerator is used to cache a bitmap, which is a bit sequence including 7 bits, and the 7 bits correspond to 7 nodes one by one. The 7 nodes are nodes F, E, D, A, C, B, and G included in snapshot 1 and snapshot 2. Assuming that the bitmap is 1111111, it means that the state of node F, the state of node E, the state of node D, the state of node A, the state of node C, the state of node B, and the state of node G are all active.

[0098] After node F, node D and node E are saved in the second cache space, the status of node F, the status of node D and the status of node E are all updated to inactive status in the bitmap saved in the fourth cache space, so that the bitmap saved in the fourth cache space becomes 0001111.

[0099] 6014: Pop out the first node stored in the first cache space as the third source node.

[0100] In 6014, the first node currently stored in the first cache space is popped out from the head of the queue of the first cache space, and the popped out node is used as the third source node.

[0101] For example, the first cache space stores node D and node E. The first node D currently stored in the first cache space is popped out from the head of the queue of the first cache space, and node D is used as the third source node.

[0102] 6015: Determine at least one third target node based on the third source node, and the third source node and the third target node in the multiple snapshots are connected using a third output edge.

[0103] In 6015, the offset information of the third source node is obtained from the node array, and the offset information includes a third offset and a fourth offset. The third offset is the offset of the edge information of the first output edge of the at least one third output edge in the edge array, and the fourth offset is the offset of the edge information of the last output edge of the at least one third output edge in the edge array, and the source node of the at least one third output edge is the third source node. Based on the third offset and the fourth offset, the edge information of the at least one third output edge is obtained from the edge array.

[0104] The identification information of the at least one third target node is obtained from the edge information of the at least one third output edge, and the at least one third target node is the target node of the at least one third output edge. The at least one third target node is determined based on the identification information of the at least one third target node.

[0105] For example, see Figure 4 In the node array and edge array shown, for the third source node D, the offset information of the third source node D is obtained from the node array, and the offset information includes the third offset offset3 of the edge information of the output edge DA in the edge array and the fourth offset offset4 of the edge information of the output edge DC in the edge array. Based on the third offset offset3 and the fourth offset offset4, the edge information of the output edge DA and the edge information of the output edge DC are obtained from the edge array. The identification information IDC of the third target node C is obtained from the edge information of the output edge DC, and the identification information IDA of the third target node A is obtained from the edge information of the output edge DA. Based on the identification information IDA of the third target node A and the identification information IDC of the third target node C, the third target node A and the third target node C are determined.

[0106] 6016: Based on the priority of the at least one third target node, save the at least one third target node to the first cache space and save the at least one third target node to the second cache space, and the node sequence includes the node sequence saved in the second cache space.

[0107] In 6016, for each third target node, the state of the third target node is determined based on the bitmap stored in the fourth cache space. If the state of the third target node is active, the life of the third target node is obtained from the node array, and the number of output edges connected to the third target node in the multiple snapshots is counted. Based on the life of the third target node and / or the degree of the third target node, the priority of the third target node is obtained. In the same manner as above, the priority of each third target node in the active state is obtained, and based on the priority of each third target node, each third target node is saved in the first cache space and each third target node is saved in the second cache space.

[0108] If the state of the third target node is active, it means that the third target node has not been sorted yet and needs to be sorted. If the state of the third target node is inactive, it means that the third target node has been sorted and does not need to be sorted.

[0109] Optionally, each third target node is stored in the first cache space in descending order of priority of each third target node, and each third target node is stored in the second cache space in descending order of priority of each second target node.

[0110] After each third target node is saved in the second cache space, it indicates that each third target node has been sorted, so in the bitmap saved in the fourth cache space, the state of each third target node is updated to an inactive state.

[0111] For example, for the third target node A, the state of the third target node A is determined to be active based on the bitmap stored in the fourth cache space, and then Figure 2 Snapshot 1 shown and Figure 3 In the snapshot 2 shown, the number of output edges connected to the third target node A is 3, and the degree of the third target node A is obtained based on the number of output edges 3. Based on the lifetime (t0, t2) of the third target node A and the degree of the third target node A, the priority of the third target node A is obtained. For the third target node C, the state of the third target node C is determined to be active based on the bitmap stored in the fourth cache space, and then in the following example Figure 2 Snapshot 1 shown and Figure 3 In the snapshot 2 shown, the number of output edges connected to the third target node C is 2, and the degree of the third target node C is obtained based on the number of output edges 2. Based on the lifetime (t0, t2) of the third target node C and the degree of the third target node C, the priority of the third target node C is obtained.

[0112] The third target node A and the third target node C are saved in the first cache space according to the priority of the third target node A and the priority of the third target node C. And, the third target node A and the third target node C are saved in the second cache space according to the priority of the third target node A and the priority of the third target node C. At this time, the first cache space sequentially saves node E, node A and node C, and the second cache space sequentially saves node F, node D, node E, node A and node C.

[0113] In addition, after node A and node C are saved in the second cache space, the status of node A and node C are updated to inactive status in the bitmap saved in the fourth cache space, so that the bitmap saved in the fourth cache space becomes 0000011.

[0114] 6017: When there are still nodes in the first cache space, return to execute 6014; when there are no nodes in the first cache space, obtain the node sequence saved in the second cache space and end.

[0115] For example, the first node E currently stored in the first cache space is popped from the head of the queue of the first cache space, and node E is used as the third source node. Figure 4 In the node array and edge array shown, for the third source node E, the offset information of the third source node E is obtained from the node array, and the offset information includes the third offset offset5 of the edge information of the output edge ED in the edge array. Based on the third offset offset5, the edge information of the output edge ED is obtained from the edge array. The identification information IDD of the third target node D is obtained from the edge information of the output edge ED, and the third target node D is determined based on the identification information IDD of the third target node D.

[0116] Based on the bitmap stored in the fourth cache space, it is determined that the state of the third target node D is inactive, indicating that the third target node D has been sorted. The first node A currently stored in the first cache space is popped from the head of the first cache space, and node A is used as the third source node. The offset information of the third source node A is obtained from the node array, and the offset information includes the third offset offset6 of the edge information of the output edge AG in the edge array and the fourth offset offset7 of the edge information of the output edge AB in the edge array. Based on the third offset offset6 and the fourth offset offset7, the edge information of the output edge AB and the edge information of the output edge AG are obtained from the edge array. The identification information IDG of the third target node G is obtained from the edge information of the output edge AG, and the identification information IDB of the third target node B is obtained from the edge information of the output edge AB. Based on the identification information IDG of the third target node G, the third target node G is determined, and based on the identification information IDB of the third target node B, the third target node B is determined.

[0117] For the third target node G, the state of the third target node G is determined to be active based on the bitmap stored in the fourth cache space, and then Figure 2 Snapshot 1 shown and Figure 3In the snapshot 2 shown, the number of output edges connected to the third target node G is 1, and the degree of the third target node G is obtained based on the number of output edges 1. Based on the lifetime (t0, t2) of the third target node G and the degree of the third target node G, the priority of the third target node G is obtained. For the third target node B, the state of the third target node B is determined to be active based on the bitmap stored in the fourth cache space, and then in the following example Figure 2 Snapshot 1 shown and Figure 3 In the snapshot 2 shown, the number of output edges connected to the third target node B is 3, and the degree of the third target node B is obtained based on the number of output edges 3. Based on the lifetime (t0, t2) of the third target node B and the degree of the third target node B, the priority of the third target node B is obtained.

[0118] According to the priority of the third target node G and the priority of the third target node B, the third target node B and the third target node G are saved in the first cache space. And, according to the priority of the third target node G and the priority of the third target node B, the third target node B and the third target node G are saved in the second cache space. At this time, the first cache space sequentially saves node C, node B and node G, and the second cache space sequentially saves node F, node D, node E, node A, node C, node B and node G. After node B and node G are saved in the second cache space, the state of node B and the state of node G are both updated to inactive states in the bitmap saved in the fourth cache space, so that the bitmap saved in the fourth cache space becomes 0000000.

[0119] The first node C currently stored in the first cache space is popped from the head of the first cache space, and node C is used as the third source node. Figure 4 In the node array and edge array shown, for the third source node C, the offset information of the third source node C is obtained from the node array, and the offset information includes the third offset offset8 of the edge information of the output edge CB in the edge array. Based on the third offset offset8, the edge information of the output edge CB is obtained from the edge array. The identification information IDB of the third target node B is obtained from the edge information of the output edge CB, and the third target node B is determined based on the identification information IDB of the third target node B.

[0120] Based on the bitmap stored in the fourth cache space, the state of the third target node B is determined to be inactive, and the first node B currently stored in the first cache space is popped out from the head of the first cache space, and node B is used as the third source node. Figure 4 The node array shown does not have the offset information of the third source node B. The first node G currently stored in the first cache space is popped out from the head of the first cache space, and node G is used as the third source node. Figure 4The node array shown does not have the offset information of the third source node G, and when there is no node in the first cache space, the node sequence stored in the second cache space is obtained as node F, node D, node E, node A, node C, node B and node G.

[0121] Step 602: Select a node from the node sequence as a first source node. The first source node may be the first node in the node sequence, or the first source node is the next node of the second source node, and the second source node is the source node determined last time.

[0122] When selecting a node from a node sequence for the first time, the first node in the node sequence is selected and the first node is determined as the first source node. After the node is selected for the first time, the next node of the second source node in the node sequence is selected and the next node is determined as the first source node.

[0123] The accelerator may also read multiple data of the first node from the attribute array of the memory, the multiple data being the data of the first node in the multiple snapshots, and process the multiple data. Optionally, the accelerator may also cache the multiple data in a third cache space.

[0124] For example, the accelerator selects the first node F in the node sequence and determines the first node F as the first source node. Figure 4 The two data of the first node F are read from the attribute array shown in S t1 F and S t2 F , for these two data S t1 F and S t2 F Processing, and the two data S t1 F and S t2 F Save to the third cache space.

[0125] Step 603: Determine a first target node based on the first source node. The first source node and the first target node are connected using a first output edge. The first output edge points from the first source node to the first target node. There is at least one first snapshot among the multiple snapshots that includes the first output edge, and the at least one first snapshot includes the first target node.

[0126] In step 603, the offset information of the first source node is obtained from the node array, and the offset information includes a fifth offset and a sixth offset. The fifth offset is the offset of the edge information of the first output edge in the at least one first output edge in the edge array, and the sixth offset is the offset of the edge information of the last output edge in the at least one first output edge in the edge array, and the source node of the at least one first output edge is the first source node. Based on the fifth offset and the sixth offset, the edge information of the at least one first output edge is obtained from the edge array. The identification information of the at least one first target node is obtained from the edge information of the at least one first output edge, and the at least one first target node is the target node of the at least one first output edge. Based on the identification information of the at least one first target node, the at least one first target node is determined. At least one first output edge for connecting the first source node and the at least one first target node is determined.

[0127] For example, for the first source node F, the offset information of the first source node F is obtained from the node array, and the offset information includes the fifth offset offset1 of the edge information of the output edge FD in the edge array and the sixth offset offset2 of the edge information of the output edge FE in the edge array. Based on the fifth offset offset1 and the sixth offset offset2, the edge information of the output edge FD and the edge information of the output edge FE are obtained from the edge array. The identification information IDD of the first target node D is obtained from the edge information of the output edge FD, and the identification information IDE of the first target node E is obtained from the edge information of the output edge FE. Based on the identification information IDD of the first target node D and the identification information IDE of the first target node E, the first target node D and the first target node E are determined. Based on the first source node F, the first target nodes D and E, the first output edge FD and the first output edge FE are determined.

[0128] Step 604: Read at least one first data based on the first output edge, where the at least one first data is data of the first target node in the at least one first snapshot.

[0129] In step 604 , at least one first snapshot including the first output edge is determined based on the first output edge, and then at least one first data is read. The at least one first data is data of the first target node in the at least one first snapshot.

[0130] In some embodiments, the operation of reading at least one first data may be: if the at least one first data is cached in the third cache space, reading the at least one first data from the third cache space. If the at least one first data is not cached in the third cache space, reading the at least one first data from the memory based on the first output edge.

[0131] Optionally, the at least one first data is data of the first target node, which is centrally stored in an attribute array in the memory, so that the accelerator can read the at least one data from the attribute array through a read operation, thereby improving the reading efficiency.

[0132] Optionally, when the at least one first data is not cached in the third cache space, when the free capacity of the third cache space is greater than or equal to the total data volume of the at least one first data, the at least one first data is cached in the third cache space. When the free capacity of the third cache space is less than the total data volume of the at least one first data, a node with a priority lower than the priority of the first target node is obtained from the third cache space, and the data of the obtained node stored in the third cache space is updated to the at least one first data.

[0133] Step 605: Process the at least one first data.

[0134] For example, for the first output edge FD, the snapshot including the first output edge FD is as follows Figure 2 Snapshot 1 shown, from Figure 4 The data S of the first target node D in snapshot 1 is read from the attribute array shown in FIG. t1 D , for the data S of the first target node D t1 D Process the data S t1 D Save to the third cache space.

[0135] For the first output edge FE, the snapshot including the first output edge FE is as follows Figure 2 Snapshot 1 shown and Figure 3 Snapshot 2 shown, from Figure 4 The two data of the first target node E are read from the attribute array shown, and the two data include the data S of the first target node E in snapshot 1. t1 E and the data S of the first target node E in snapshot 2 t2 E , process the two data of the first target node E. t1 E and S t2 E Save to the third cache space.

[0136] In some embodiments, if there are still unselected nodes in the node sequence, the first source node is used as the second source node, and the process returns to step 602. If there are no unselected nodes in the node sequence, the process ends.

[0137] For example, the next node E of node D is selected from the node sequence as the first source node, and the offset information of the first source node E is obtained from the node array, and the offset information includes the offset offset5 of the edge information of the output edge ED in the edge array. Based on the offset offset5, the edge information of the output edge ED is obtained from the edge array. The identification information IDD of the first target node D is obtained from the edge information of the output edge ED, and the first target node D is determined based on the identification information IDD of the first target node D. The snapshot including the first output edge ED is as follows: Figure 3 Snapshot 2 shown, from Figure 4 The data S of the first target node D in snapshot 2 is read from the attribute array shown in FIG. t2 D , for the data S of the first target node D t2 D Process the data S t2 D Save to the third cache space.

[0138] Select the next node A of node E from the node sequence as the first source node, and obtain the offset information of the first source node A from the node array, the offset information including the offset offset7 of the edge information of the output edge AB in the edge array and the offset offset6 of the edge information of the output edge AG in the edge array. Based on the offset offset7, obtain the edge information of the output edge AB from the edge array. Obtain the identification information IDB of the first target node B from the edge information of the output edge AB, and determine the first target node B based on the identification information IDB of the first target node B. The snapshot including the first output edge AB is as follows Figure 2 Snapshot 1 shown and Figure 3 The snapshot 2 shown reads the data S of the first target node B in the snapshot 1 from the third cache space. t1 B and the data S of the first target node B in snapshot 2 t2 B , the data S of the first target node B t1 B and S t2 B Processing. Based on offset offset6, the edge information of the output edge AG is obtained from the edge array. The identification information IDG of the first target node G is obtained from the edge information of the output edge AG, and the first target node G is determined based on the identification information IDG of the first target node G. The snapshot including the first output edge AG is as follows Figure 2 Snapshot 1 shown, from Figure 4 The data S of the first target node G in snapshot 1 is read from the attribute array shown in FIG. t1 G , for the data S of the first target node Gt1 G Process the data S t1 G Save to the third cache space.

[0139] Select the next node C of node A from the node sequence as the first source node, and obtain the offset information of the first source node C from the node array, the offset information including the offset offset8 of the edge information of the output edge CB in the edge array. Based on the offset offset8, obtain the edge information of the output edge CB from the edge array. Obtain the identification information IDB of the first target node B from the edge information of the output edge CB, and determine the first target node B based on the identification information IDB of the first target node B. The snapshot including the first output edge CB is as follows: Figure 2 Snapshot 1 shown and Figure 3 The snapshot 2 shown reads the data S of the first target node B in the snapshot 1 from the third cache space. t1 B and the data S of the first target node B in snapshot 2 t2 B , the data S of the first target node B t1 B and S t2 D to be processed.

[0140] Select the next node B of node C from the node sequence as the first source node, and obtain the offset information of the first source node B from the node array. Based on the offset information, determine that there is no output edge with node B as the source node, so select the next node G of node B from the node sequence as the first source node. Obtain the offset information of the first source node G from the node array, and the offset information includes the offset offset9 of the edge information of the output edge GB in the edge array. Based on the offset offset9, obtain the edge information of the output edge GB from the edge array, obtain the identification information IDB of the first target node B from the edge information of the output edge GB, and determine the first target node B based on the identification information IDB of the first target node B. The snapshot including the first output edge GB is as follows Figure 3 Snapshot 2 shown, from Figure 4 The data S of the first target node G in snapshot 2 is read from the attribute array shown in FIG. t2 G , for the data S of the first target node G t2 G to be processed.

[0141] In an embodiment of the present application, based on the topology of multiple snapshots and the priority of multiple nodes, the multiple nodes are sorted to obtain a node sequence. Then, according to the order of the nodes in the node sequence, the nodes in the node sequence are respectively used as the first source nodes. Since the first target node is determined based on the first source node, the first output edge is obtained based on the first source node and the first target node, and at least one first snapshot including the first output edge is obtained from the multiple snapshots. At least one first data of the first target node in the at least one first snapshot is obtained based on the first output edge, so that at least one data can be read at the same time through a read operation, avoiding reading the at least one data at different times through multiple off-chip communications, thereby reducing redundant off-chip communications. When at least one first data is read, the at least one first data is stored in the third cache space. When the first target node is a high-priority node, the first target node may be a node with a long life and frequently read, so that the data of the first target node can be read from the third cache space, thereby further reducing redundant off-chip communications to improve the efficiency of node processing.

[0142] See also Figure 7 The embodiment of the present application provides a node processing device 700, the device 700 includes a memory, the memory stores multiple snapshots, the multiple snapshots are used to indicate the status of the timing diagram at different times, the device 700 includes:

[0143] A determining unit 701 is configured to determine a first source node, where the first source node is a node included in the multiple snapshots;

[0144] The determining unit 701 is further configured to determine a first target node based on the first source node, the first source node and the first target node are connected by a first output edge, the first output edge points from the first source node to the first target node, at least one first snapshot among the multiple snapshots includes the first output edge, and the at least one first snapshot includes the first target node;

[0145] A processing unit 702 is configured to read at least one first data based on the first output edge, where the at least one first data is data of the first target node in the at least one first snapshot;

[0146] The processing unit 702 is further configured to process the at least one first data.

[0147] Optionally, the detailed implementation process of determining the first source node by the determining unit 701 is shown in Figure 6 The relevant contents in step 602 of the method 600 are not described in detail here.

[0148] Optionally, the detailed implementation process of the determination unit 701 determining the first target node is shown in Figure 6The relevant contents in step 603 of the method 600 are not described in detail here.

[0149] Optionally, the detailed implementation process of the processing unit 702 reading at least one first data is shown in Figure 6 The relevant contents in step 604 of the method 600 are not described in detail here.

[0150] Optionally, the detailed implementation process of the processing unit 702 processing the at least one first data is shown in Figure 6 The relevant contents in step 605 of the method 600 are not described in detail here.

[0151] Optionally, the processing unit 702 is further configured to sort the multiple nodes to obtain a node sequence based on the topologies of the multiple snapshots and the priorities of the multiple nodes, where the multiple nodes are the nodes included in the multiple snapshots;

[0152] The determination unit 701 is used to select a node next to the second source node from the node sequence as the first source node, where the second source node is the source node determined last time.

[0153] Optionally, the processing unit 702 sorts the multiple nodes to obtain a node sequence. For a detailed implementation process, see Figure 6 The relevant contents in step 601 of the method 600 are not described in detail here.

[0154] Optionally, the determination unit 701 selects the next node of the second source node from the node sequence as the first source node. For a detailed implementation process, see Figure 6 The relevant contents in step 602 of the method 600 are not described in detail here.

[0155] Optionally, for each node, the priority of the node is determined based on the age of the node and / or the degree of the node.

[0156] Optionally, the device 700 further includes a first cache space, a second cache space and a third cache space;

[0157] The first cache space is used to cache intermediate results generated in the process of sorting the multiple nodes;

[0158] The second cache space is used to cache the node sequence;

[0159] The third cache space is used to cache the data of the read nodes.

[0160] Optionally, the device 700 further includes a fourth cache space;

[0161] The fourth cache space is used to cache a bitmap, which is used to record the status of the multiple nodes. For each node, the status of the node is active when the node is not sorted, or the status of the node is inactive when the node is sorted.

[0162] Optionally, the device 700 further includes a fifth cache space, and the fifth cache space is used to cache the edge array and the node array;

[0163] The edge array includes edge information of a plurality of output edges, where the plurality of output edges are output edges included in the plurality of snapshots, and for each output edge, the edge information of the output edge includes identification information and / or lifespan of a target node of the output edge;

[0164] The node array includes offset information of a plurality of nodes, the plurality of nodes are nodes included in the plurality of snapshots, and for each node, the offset information of the node includes an offset of edge information of a first output edge of at least one output edge in the edge array and an offset of edge information of a last output edge of at least one output edge in the edge array, the at least one output edge being an output edge with the node as a source node;

[0165] The determination unit 701 is used to determine the first target node based on the first source node, the edge array and the node array.

[0166] Optionally, the detailed implementation process of the determination unit 701 determining the first target node based on the first source node, the edge array and the node array can be found in Figure 6 The relevant contents in step 603 of the method 600 are not described in detail here.

[0167] Optionally, the intermediate result includes at least one second target node of a first node among the multiple nodes, the first node and the second target node are connected by a second output edge in the multiple snapshots, the first node is a source node of the second output edge, and the second cache space includes the first node and the at least one second target node;

[0168] The processing unit 702 is configured to:

[0169] Pop up the first node stored in the first cache space as the third source node;

[0170] Determine at least one third target node based on the third source node, wherein the third source node and the third target node are connected using a third output edge in the plurality of snapshots;

[0171] Based on the priority of the at least one third target node, the at least one third target node is saved in the first cache space and the at least one third target node is saved in the second cache space, and the node sequence includes the node sequence saved in the second cache space.

[0172] Optionally, the processing unit 702 pops out the first node stored in the first cache space as the third source node. For a detailed implementation process, see Figure 6 The relevant contents in step 6014 of the method 600 are not described in detail here.

[0173] Optionally, the detailed implementation process of the processing unit 702 determining at least one third target node based on the third source node is shown in Figure 6 The relevant contents in step 6015 of the method 600 shown are not described in detail here.

[0174] Optionally, the processing unit 702 saves the at least one third target node to the first cache space and saves the at least one third target node to the second cache space. Figure 6 The relevant contents in step 6016 of the method 600 shown will not be described in detail here.

[0175] Optionally, the processing unit 702 is further configured to:

[0176] Storing the first node in the second cache space; and,

[0177] determining at least one second target node of the first node;

[0178] Based on the priority of the at least one second target node, the at least one second target node is stored in the first cache space and the at least one second target node is stored in the second cache space.

[0179] Optionally, the detailed implementation process of the processing unit 702 saving the first node to the second cache space is shown in Figure 6 The relevant contents in step 6011 of the method 600 are not described in detail here.

[0180] Optionally, the detailed implementation process of the processing unit 702 determining at least one second target node of the first node can be found in Figure 6 The relevant contents in step 6012 of the method 600 are not described in detail here.

[0181] Optionally, the processing unit 702 saves at least one second target node into the first cache space and saves at least one second target node into the second cache space. Figure 6 The relevant contents in step 6016 of the method 600 shown will not be described in detail here.

[0182] Optionally, the processing unit 702 is configured to:

[0183] In a case where the at least one first data is cached in the third cache space, reading the at least one first data from the third cache space;

[0184] When the at least one first data is not cached in the third cache space, the at least one first data is read from the memory based on the first output edge.

[0185] Optionally, the detailed implementation process of the processing unit 702 saving the first node to the second cache space is shown in Figure 6 The relevant contents in step 604 of the method 600 are not described in detail here.

[0186] Optionally, at least one first data is not cached in the third cache space, and the processing unit 702 is further configured to:

[0187] When the free capacity of the third cache space is greater than or equal to the total data amount of the at least one first data, cache the at least one first data in the third cache space;

[0188] When the free capacity of the third cache space is less than the total data volume of the at least one first data, a node whose priority is lower than the priority of the first target node is obtained from the third cache space, and the data of the obtained node stored in the third cache space is updated to the at least one first data.

[0189] Optionally, the detailed implementation process of the processing unit 702 caching the at least one first data into the third cache space is shown in Figure 6 The relevant contents in step 604 of the method 600 are not described in detail here.

[0190] Optionally, the processing unit 702 obtains a node whose priority is lower than that of the first target node from the third cache space, and updates the data of the obtained node stored in the third cache space to the at least one first data. Figure 6 The relevant contents in step 604 of the method 600 are not described in detail here.

[0191] In the embodiment of the present application, since the determination unit determines the first target node based on the first source node, the processing unit obtains the first output edge based on the first source node and the first target node, and obtains at least one first snapshot including the first output edge from the multiple snapshots. The processing unit obtains at least one data of the first target node in the at least one first snapshot based on the first output edge, so that the processing unit can read at least one data at the same time through a read operation, avoiding reading the at least one data at different times through multiple off-chip communications, thereby reducing redundant off-chip communications.

[0192] See also Figure 8, the present application embodiment provides a schematic diagram of a node processing device 800. The device 800 can be deployed in an accelerator in any of the above embodiments. For example, the device 700 can be deployed in the above Figure 1 or Figure 5 The device 100 shown in the figure includes an accelerator 101, or the device 700 can be deployed on the above Figure 6 The method 600 is shown on an accelerator. The apparatus 800 includes at least one processor 801 , an internal connection 802 , a memory 803 and at least one transceiver 804 .

[0193] The device 800 is a hardware structure device that can be used to implement Figure 7 The functional modules in the device 700 are as follows. For example, those skilled in the art may think of Figure 7 The determining unit 801 and the processing unit 702 in the illustrated apparatus 700 may be implemented by the at least one processor 801 calling codes in the memory 803 .

[0194] Optionally, the device 800 may also be used to implement the function of the accelerator in any of the above embodiments.

[0195] Optionally, the processor 801 may be a general-purpose central processing unit (CPU), a network processor (NP), a microprocessor, an application-specific integrated circuit (ASIC), or one or more integrated circuits for controlling the execution of the program of the present application.

[0196] The internal connection 802 may include a path to transmit information between the components. Optionally, the internal connection 802 is a single board or a bus.

[0197] The transceiver 804 is used to communicate with other devices or communication networks.

[0198] The above-mentioned memory 803 can be a read-only memory (ROM) or other types of static storage devices that can store static information and instructions, a random access memory (RAM) or other types of dynamic storage devices that can store information and instructions, or an electrically erasable programmable read-only memory (EEPROM), a compact disc read-only memory (CD-ROM) or other optical disc storage, optical disc storage (including compressed optical disc, laser disc, optical disc, digital versatile disc, Blu-ray disc, etc.), a magnetic disk storage medium or other magnetic storage device, or any other medium that can be used to carry or store the desired program code in the form of instructions or data structures and can be accessed by a computer, but is not limited to this. The memory can exist independently and be connected to the processor through a bus. The memory can also be integrated with the processor.

[0199] The memory 803 is used to store the application code for executing the solution of the present application, and the execution is controlled by the processor 801. The processor 801 is used to execute the application code stored in the memory 803, and cooperate with at least one transceiver 804, so that the device 800 implements the functions of the patent method.

[0200] In a specific implementation, as an embodiment, the processor 801 may include one or more CPUs, such as Figure 8 CPU0 and CPU1 in.

[0201] In a specific implementation, as an embodiment, the device 800 may include multiple processors, such as Figure 8 801 and processor 807 in the embodiment of the present invention. Each of these processors may be a single-CPU processor or a multi-CPU processor. The processor herein may refer to one or more devices, circuits, and / or processing cores for processing data (e.g., computer program instructions).

[0202] A person skilled in the art will understand that all or part of the steps to implement the above embodiments may be accomplished by hardware or by instructing related hardware through a program, and the program may be stored in a computer-readable storage medium, and the above-mentioned storage medium may be a read-only memory, a disk or an optical disk, etc.

[0203] The above description is only an optional embodiment of the present application and is not intended to limit the present application. Any modifications, equivalent substitutions, improvements, etc. made within the principles of the present application shall be included in the protection scope of the present application.

Claims

1. A method for node processing, characterized in that: The method is applied to an accelerator included in a device, the device also includes a memory, the memory stores a plurality of snapshots, the plurality of snapshots are used to indicate the states of a timing diagram at different times, including: Determining a first source node, the first source node being a node included in the plurality of snapshots; Determine a first target node based on the first source node, the first source node and the first target node are connected by a first output edge, the first output edge points from the first source node to the first target node, at least one first snapshot among the multiple snapshots includes the first output edge, and the at least one first snapshot includes the first target node; Reading at least one first data based on the first output edge, where the at least one first data is data of the first target node in the at least one first snapshot; The at least one first data is processed.

2. The method according to claim 1, characterized in that The method further comprises: Based on the topologies of the plurality of snapshots and priorities of the plurality of nodes, the plurality of nodes are sorted to obtain a node sequence, the plurality of nodes being nodes included in the plurality of snapshots; The determining of the first source node comprises: A node next to a second source node is selected from the node sequence as the first source node, wherein the second source node is the source node determined last time.

3. The method according to claim 2, characterized in that For each node, the priority of the node is determined based on the age of the node and / or the degree of the node.

4. The method according to claim 2 or 3, characterized in that The accelerator includes a first cache space, a second cache space and a third cache space; The first cache space is used to cache intermediate results generated in the process of sorting the multiple nodes; The second cache space is used to cache the node sequence; The third cache space is used to cache the data of the read nodes.

5. The method according to any one of claims 2 to 4, characterized in that: The accelerator includes a fourth cache space; The fourth cache space is used to cache a bitmap, which is used to record the status of the multiple nodes. For each node, the status of the node is an active state when the node is not sorted, or the status of the node is an inactive state when the node is sorted.

6. The method according to any one of claims 1 to 5, characterized in that: The accelerator comprises a fifth cache space, wherein the fifth cache space is used to cache the edge array and the node array; The edge array includes edge information of a plurality of output edges, the plurality of output edges are output edges included in the plurality of snapshots, and for each output edge, the edge information of the output edge includes identification information and / or lifespan of a target node of the output edge; The node array includes offset information of a plurality of nodes, the plurality of nodes are nodes included in the plurality of snapshots, and for each node, the node offset information includes an offset of edge information of a first output edge of at least one output edge in the edge array and an offset of edge information of a last output edge of the at least one output edge in the edge array, and the at least one output edge is an output edge with the node as a source node; The determining the first target node based on the first source node includes: The first target node is determined based on the first source node, the edge array, and the node array.

7. The method according to claim 4, characterized in that The intermediate result includes at least one second target node of a first node among the multiple nodes, the first node and the second target node are connected by a second output edge in the multiple snapshots, the first node is a source node of the second output edge, and the second cache space includes the first node and the at least one second target node; The step of sorting the multiple nodes based on the topologies of the multiple snapshots and the priorities of the multiple nodes to obtain a node sequence includes: Popping out the first node stored in the first cache space as the third source node; Determine at least one third target node based on the third source node, and connect the third source node and the third target node in the plurality of snapshots using a third output edge; Based on the priority of the at least one third target node, the at least one third target node is saved in the first cache space and the at least one third target node is saved in the second cache space, and the node sequence includes the node sequence saved in the second cache space.

8. The method according to claim 7, characterized in that The method further comprises: storing the first node in the second cache space; and, determining the at least one second target node of the first node; Based on the priority of the at least one second target node, the at least one second target node is stored in the first cache space and the at least one second target node is stored in the second cache space.

9. The method according to claim 4, 7 or 8, characterized in that The reading at least one first data based on the first output edge comprises: In a case where the at least one first data is cached in the third cache space, reading the at least one first data from the third cache space; In a case where the at least one first data is not cached in the third cache space, the at least one first data is read from the memory based on the first output edge.

10. The method according to claim 9, characterized in that The at least one first data is not cached in the third cache space, and after the at least one first data is read from the memory based on the first output edge, the method further includes: When the free capacity of the third cache space is greater than or equal to the total data volume of the at least one first data, cache the at least one first data in the third cache space; When the free capacity of the third cache space is less than the total data volume of the at least one first data, a node whose priority is lower than the priority of the first target node is obtained from the third cache space, and the data of the obtained node stored in the third cache space is updated to the at least one first data.

11. A node processing device, characterized in that: The device includes a memory, wherein the memory stores a plurality of snapshots, and the plurality of snapshots are used to indicate states of a timing diagram at different times. The device includes: a determining unit, configured to determine a first source node, wherein the first source node is a node included in the plurality of snapshots; The determining unit is further configured to determine a first target node based on the first source node, the first source node and the first target node are connected by a first output edge, the first output edge points from the first source node to the first target node, at least one first snapshot among the multiple snapshots includes the first output edge, and the at least one first snapshot includes the first target node; a processing unit, configured to read at least one first data based on the first output edge, wherein the at least one first data is data of the first target node in the at least one first snapshot; The processing unit is further used to process the at least one first data.

12. The device according to claim 11, characterized in that The processing unit is further configured to sort the multiple nodes to obtain a node sequence based on the topologies of the multiple snapshots and the priorities of the multiple nodes, the multiple nodes being the nodes included in the multiple snapshots; The determining unit is used to select a next node of a second source node from the node sequence as the first source node, and the second source node is the source node determined last time.

13. The device according to claim 12, characterized in that For each node, the priority of the node is determined based on the age of the node and / or the degree of the node.

14. The device according to claim 12 or 13, characterized in that The device also includes a first cache space, a second cache space and a third cache space; The first cache space is used to cache intermediate results generated in the process of sorting the multiple nodes; The second cache space is used to cache the node sequence; The third cache space is used to cache the data of the read nodes.

15. The device according to any one of claims 12 to 14, characterized in that: The device also includes a fourth cache space; The fourth cache space is used to cache a bitmap, which is used to record the status of the multiple nodes. For each node, the status of the node is an active state when the node is not sorted, or the status of the node is an inactive state when the node is sorted.

16. The device according to any one of claims 11 to 15, characterized in that The device further comprises a fifth cache space, wherein the fifth cache space is used to cache the edge array and the node array; The edge array includes edge information of a plurality of output edges, the plurality of output edges are output edges included in the plurality of snapshots, and for each output edge, the edge information of the output edge includes identification information and / or lifespan of a target node of the output edge; The node array includes offset information of a plurality of nodes, the plurality of nodes are nodes included in the plurality of snapshots, and for each node, the node offset information includes an offset of edge information of a first output edge of at least one output edge in the edge array and an offset of edge information of a last output edge of the at least one output edge in the edge array, and the at least one output edge is an output edge with the node as a source node; The determining unit is used to determine the first target node based on the first source node, the edge array and the node array.

17. The device according to claim 14, characterized in that The intermediate result includes at least one second target node of a first node among the multiple nodes, the first node and the second target node are connected by a second output edge in the multiple snapshots, the first node is a source node of the second output edge, and the second cache space includes the first node and the at least one second target node; The processing unit is used for: Popping out the first node stored in the first cache space as the third source node; Determine at least one third target node based on the third source node, and connect the third source node and the third target node in the plurality of snapshots using a third output edge; Based on the priority of the at least one third target node, the at least one third target node is saved in the first cache space and the at least one third target node is saved in the second cache space, and the node sequence includes the node sequence saved in the second cache space.

18. The device according to claim 17, characterized in that The processing unit is further used for: storing the first node in the second cache space; and, determining the at least one second target node of the first node; Based on the priority of the at least one second target node, the at least one second target node is stored in the first cache space and the at least one second target node is stored in the second cache space.

19. The device according to claim 14, 17 or 18, characterized in that The processing unit is used for: In a case where the at least one first data is cached in the third cache space, reading the at least one first data from the third cache space; In a case where the at least one first data is not cached in the third cache space, the at least one first data is read from the memory based on the first output edge.

20. The device according to claim 19, characterized in that The at least one first data is not cached in the third cache space, and the processing unit is further configured to: When the free capacity of the third cache space is greater than or equal to the total data volume of the at least one first data, cache the at least one first data in the third cache space; When the free capacity of the third cache space is less than the total data volume of the at least one first data, a node whose priority is lower than the priority of the first target node is obtained from the third cache space, and the data of the obtained node stored in the third cache space is updated to the at least one first data.

21. A chip, characterized in that: The chip comprises a program code, which, when executed on the chip, enables the chip to execute the method according to any one of claims 1 to 10.

22. A device, characterized in that The device comprises at least one processor and at least one memory, wherein the at least one memory stores computer-readable instructions; the at least one processor executes the computer-readable instructions so that the device executes the method according to any one of claims 1 to 10.

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