MAC address synchronization method, data exchange equipment and storage medium
By obtaining and updating MAC address entries in a multiple-to-1 VLAN conversion scenario, and using preset relationship groups to generate entries containing physical ports and logical ports, the problem of inconsistent aging of the software platform and the underlying switching chip MAC address is solved, and MAC is realized Synchronous update of addresses.
Patent Information
- Application Number
- CN202310799643.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-06-30
- Publication Date
- 2025-01-07
AI Technical Summary
In many-to-1 VLAN conversion scenarios, the software platform cannot identify the logical port from the MAC address entry reported by the underlying switching chip, resulting in inconsistent aging of the MAC address between the software platform and the underlying switching chip.
By obtaining the MAC address entries reported by the underlying switching chip, an updated MAC address entries are generated based on the preset relationship group, including physical ports, user-side VLANs and network-side VLANs, and distributed to the underlying switching chip to realize the physical in the MAC address entries Synchronous updates between ports and logical ports.
It ensures the aging consistency between the software platform and the underlying switching chip for MAC addresses, and solves the problem of inconsistent aging of MAC addresses.
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Figure CN119276654A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of communication technology, and in particular to a MAC address synchronization method, a data exchange device and a storage medium. Background Art
[0002] VLAN (Virtual Local Area Network) is a physical LAN that is logically divided into multiple broadcast domains. Hosts in the same VLAN can communicate directly, but hosts in different VLANs cannot communicate directly with each other, thus limiting broadcast messages to one VLAN. VLAN mapping is used to achieve communication between different VLANs. Since hosts in different VLANs cannot directly communicate with each other, network security is improved.
[0003] Currently, the "many-to-1" VLAN conversion scenario has received increasing attention and recognition in the industry. However, when data switching equipment implements multi-user access to the same VLAN, the software platform cannot identify the logical port from the MAC (Media Access Control) address entry reported by the underlying switching chip, resulting in inconsistent MAC address aging between the software platform and the underlying switching chip. Summary of the invention
[0004] The embodiments of the present application provide a MAC address synchronization method, a data exchange device, and a storage medium, which aim to solve the problem of inconsistent MAC address aging between a software platform and an underlying switch chip.
[0005] In a first aspect, an embodiment of the present application provides a MAC address synchronization method, which is applied to a software platform of a data exchange device, wherein the data exchange device further includes an underlying switching chip, and the method includes:
[0006] Obtain a first MAC address entry reported by the underlying switching chip, where the first MAC address entry includes a MAC address, a logical port, and a network-side VLAN of the message data;
[0007] Generate a second MAC address entry according to the first MAC address entry and the first preset relationship group; wherein the second MAC address entry includes the physical port, MAC address, user-side VLAN and network-side VLAN of the message data; the first preset relationship group includes a plurality of corresponding relationships between at least two parameters for characterizing the logical port, the physical port, the user-side VLAN and the network-side VLAN;
[0008] Generate a third MAC address entry according to the second MAC address entry; wherein the third MAC address entry includes the logical port, MAC address, network side VLAN and next hop identifier of the message data;
[0009] The third MAC address entry is sent to the bottom layer switch chip, so that the bottom layer switch chip is updated according to the third MAC address entry.
[0010] In a second aspect, an embodiment of the present application further provides a MAC address synchronization method, which is applied to an underlying switching chip of a data switching device, wherein the data switching device further includes a software platform, and the method includes:
[0011] Generate a first MAC address entry, wherein the first MAC address entry includes a MAC address, a logical port, and a network-side VLAN of the message data;
[0012] Reporting the first MAC address entry to the software platform, so that the software platform generates a second MAC address entry according to the first MAC address entry and a first preset relationship group, and generates a third MAC address entry according to the second MAC address entry; wherein the second MAC address entry includes the physical port, MAC address, user-side VLAN and network-side VLAN of the message data, and the third MAC address entry includes the logical port, MAC address, network-side VLAN and next-hop identifier of the message data;
[0013] Receive the third MAC address entry sent by the software platform, and update according to the third MAC address entry.
[0014] In a third aspect, an embodiment of the present application further provides a data exchange device, comprising a software platform and an underlying switching chip, wherein the software platform is used to implement a MAC address synchronization method applied to the software platform as described in any one of the embodiments of the present application, and the underlying switching chip is used to implement a MAC address synchronization method applied to the underlying switching chip as described in any one of the embodiments of the present application.
[0015] In a fourth aspect, an embodiment of the present application also provides a storage medium for computer-readable storage, characterized in that the storage medium stores one or more programs, and the one or more programs can be executed by one or more processors to implement any MAC address synchronization method provided in an embodiment of the present application.
[0016] The embodiment of the present application provides a MAC address synchronization method, which can be applied to the software platform or the underlying switching chip of the data exchange device, and specifically includes: the software platform obtains the first MAC address entry reported by the underlying switching chip, and the first MAC address entry includes the logical port of the message data; generates the second MAC address entry according to the first MAC address entry and the first preset relationship group, and the second MAC address entry includes the physical port of the message data; generates the third MAC address entry according to the second MAC address entry, and the third MAC address entry includes the logical port of the message data; sends the third MAC address entry to the underlying switching chip, so that the underlying switching chip is updated according to the third MAC address entry. Through the mapping changes between multiple MAC address entries, the software platform can identify the physical port of the message data, and the underlying switching chip can identify the logical port of the message data, so that the physical port and the logical port in the MAC address entry can be synchronized and updated, and the aging consistency of the software platform and the underlying switching chip for the MAC address can be ensured. BRIEF DESCRIPTION OF THE DRAWINGS
[0017] Figure 1 A schematic diagram of the steps of a MAC address synchronization method provided in an embodiment of the present application;
[0018] Figure 2 A schematic diagram of a scenario for implementing the MAC address synchronization method provided in an embodiment of the present application;
[0019] Figure 3 for Figure 1 A schematic diagram of the sub-step flow chart of the MAC address synchronization method in FIG.
[0020] Figure 4 A schematic diagram of the steps of another MAC address synchronization method provided in an embodiment of the present application;
[0021] Figure 5 A schematic block diagram of the structure of a data exchange device provided in an embodiment of the present application. DETAILED DESCRIPTION
[0022] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.
[0023] The flowcharts shown in the accompanying drawings are only examples and do not necessarily include all the contents and operations / steps, nor must they be executed in the order described. For example, some operations / steps may also be decomposed, combined or partially merged, so the actual execution order may change according to actual conditions.
[0024] It should be understood that the terms used in this application specification are only for the purpose of describing specific embodiments and are not intended to limit the application. As used in this application specification and the appended claims, unless the context clearly indicates otherwise, the singular forms "a", "an" and "the" are intended to include plural forms.
[0025] Currently, the many-to-one VLAN model has received more and more attention and recognition in the industry. The reason is that such a VLAN model can simplify the VLAN planning of the upper network and reduce the network planning and management costs. Many-to-1 VLAN conversion is to convert the VLAN messages of multiple user sides received by a port into the VLAN messages of the network side.
[0026] In some data switching devices, many-to-1 VLAN conversion is implemented based on the logical port and next hop. The premise of this implementation is that the switching chip can support the learning and aging of the logical port. However, current software platforms often do not support the learning and aging of logical ports and can only support the learning and aging of physical ports. Therefore, the aging consistency of the software platform and the MAC address of the switching chip cannot be guaranteed.
[0027] In view of this, an embodiment of the present application proposes a MAC address synchronization method, which can synchronously implement the update of the physical port on the software platform and the update of the logical port on the underlying switching chip, thereby synchronizing the MAC address entries of the message data on the software platform and the underlying switching chip, thereby ensuring the consistency of MAC address synchronization.
[0028] The embodiment of the present application provides a MAC address synchronization method, a data exchange device and a storage medium. The MAC address synchronization method can be applied to a data exchange device, which can include but is not limited to switches, routers and other electronic devices with data exchange functions or communication transfer functions.
[0029] Specifically, the MAC address synchronization method can be applied to a software platform or an underlying switching chip in a data exchange device. The software platform can be a software environment that can provide a running dependency for implementing the underlying data exchange function. The underlying switching chip can be a circuit module for implementing the underlying data exchange function.
[0030] In conjunction with the accompanying drawings, some embodiments of the present application are described in detail below. In the absence of conflict, the following embodiments and features in the embodiments can be combined with each other.
[0031] Please refer to Figure 1 , Figure 1 A schematic diagram of the steps of a MAC address synchronization method provided in an embodiment of the present application.
[0032] like Figure 1 As shown, the MAC address synchronization method includes steps S101 to S104, and can be applied to a software platform of a data exchange device.
[0033] Step S101: Obtain a first MAC address entry reported by an underlying switch chip.
[0034] The first MAC address entry includes the MAC address of the message data, the logical port and the network side VLAN. It should be noted that in the VLAN many-to-one conversion scenario, the underlying switching chip can learn the first MAC address entry based on the logical port and report the first MAC address entry to the software platform.
[0035] Exemplarily, the underlying switching chip obtains the first MAC address entry based on logical port learning, including: the underlying switching chip obtains message data sent by an external device; parses the message data to obtain the physical port and user-side VLAN of the message data; determines the logical port and network-side VLAN of the message data based on the physical port and user-side VLAN of the message data; and merges the MAC address, logical port and network-side VLAN of the message data to obtain the first MAC address entry.
[0036] For example, Figure 2As shown in the network, in order to simplify the VLAN many-to-1 scenario, it is assumed that there are two users accessing, namely PC and Iptv. The message data of PC and Iptv are sent to the data switching device 20 through the gateway 10, and then forwarded to the upper device 30 by the data switching device 20. In the data switching device 20, the bottom layer switching chip parses the message data sent by the PC, and obtains the uplink inbound port of the message data as gei_0 / 1 / 1 / 1, the MAC address is 0000.1111.1111, and the user-side VLAN is 100. The bottom layer switching chip parses the message data sent by Iptv, and obtains the uplink inbound port of the message data as gei_0 / 1 / 1 / 1, the MAC address is 0000.2222.2222, and the user-side VLAN is 200. The bottom layer switching chip is configured with conversion rules between the user-side VLAN and the network-side VLAN, such as converting the user-side VLAN 100 to the network-side VLAN 1000, and converting the user-side VLAN 200 to the network-side VLAN 1000. Therefore, based on gei_0 / 1 / 1 / 1+user-side VLAN 100 and gei_0 / 1 / 1 / 1+user-side VLAN 200, the user-side VLAN of the two message data is converted into the network-side VLAN 1000, and two logical ports logicport are respectively assigned to the two message data. In this example, logicport210 and logicport220 are respectively assigned. Therefore, the first MAC address entries that can be learned by the upstream ingress port gei_0 / 1 / 1 / 1 of the underlying switching chip include: 0000.1111.1111+VLAN1000+logicport210; 0000.2222.2222+VLAN1000+logicport220.
[0037] For example, Figure 2As shown in the network, the upper device 30 returns the message data to the data switching device 20, and then the data switching device 20 forwards the message data to the PC and Iptv through the gateway 10. In the data switching device 20, the underlying switching chip parses the message data sent by the PC, and obtains the downstream inbound port of the message data as gei_0 / 1 / 1 / 2, the MAC address as 0000.3333.3333, and the network side VLAN as 1000. The underlying switching chip parses the message data sent by Iptv, and obtains the downstream inbound port of the message data as gei_0 / 1 / 1 / 2, the MAC address as 0000.4444.4444, and the user side VLAN as 1000. The logical port assigned by the underlying switching chip to the network side VLAN 1000 is logicport230. Therefore, the first MAC address entries learned by the downstream ingress gei_0 / 1 / 1 / 2 of the bottom switching chip include: 0000.3333.3333+VLAN1000+logicport230; 0000.4444.4444+VLAN1000+logicport230.
[0038] In one embodiment, the software platform may be responsible for unified management of allocating and reclaiming the logical port logicport and the next hop nexthop identifier. For example, the software platform allocates the logical port and the next hop identifier based on the physical port and the user-side VLAN, and saves this information in two data tables, one is the logical port table, the content of which includes {physical port, user-side VLAN, logical port}, and the other is the next hop identifier table, the content of which includes {physical port, user-side VLAN, next hop identifier}.
[0039] Exemplarily, the software platform finds three groups of idle logical ports and next hop identifiers from the software allocation pool, such as logicport210, logicport220, logicport230, nexthop110, nexthop120, and nexthop130. These values are bound to the physical port and the user-side VLAN, and the software platform saves the corresponding relationship, such as shown in Table 1 and Table 2:
[0040] Table 1: Logical port table
[0041] Physical Port User-side VLAN Logical Port Gei_0 / 1 / 1 / 1 100 210 Gei_0 / 1 / 1 / 1 200 220 Gei_0 / 1 / 1 / 2 1000 230
[0042] Table 2: Next hop identifier table
[0043] Physical Port User-side VLAN Next hop identifier Gei_0 / 1 / 1 / 1 100 110 Gei_0 / 1 / 1 / 1 200 120 Gei_0 / 1 / 1 / 2 1000 130
[0044] Step S102: Generate a second MAC address entry according to the first MAC address entry and the first preset relationship group.
[0045] The second MAC address entry includes the physical port, MAC address, user-side VLAN and network-side VLAN of the message data. The first preset relationship group includes a plurality of corresponding relationships between at least two parameters for characterizing the logical port, the physical port, the user-side VLAN and the network-side VLAN. Through the mapping change between the first MAC address entry and the second MAC address entry, the software platform can convert the unrecognizable logical port into a recognizable physical port, thereby realizing the synchronous update of the physical port and the logical port in the subsequent MAC address entry.
[0046] It should be noted that the software platform needs to obtain the second MAC address entry including {physical port, MAC address, user-side VLAN, network-side VLAN}. However, the data learned by the software platform from the first MAC address entry of the underlying switching chip only includes {logical port, MAC address, network-side VLAN}, so the software platform also needs to know the physical port and user-side VLAN corresponding to the message data.
[0047] It should be noted that the first preset relationship group may include at least two relationship comparison tables, each relationship comparison table including the correspondence between at least two parameters among the logical port, physical port, user-side VLAN and network-side VLAN, so that the physical port and user-side VLAN corresponding to the message data can be accurately found according to the first MAC address entry.
[0048] In one embodiment, if Figure 3 As shown, step S102 includes: sub-steps S1021 to S1023.
[0049] Sub-step S1021: Determine the physical port of the message data according to the logical port in the first MAC address entry and the first relationship comparison table.
[0050] The first relationship comparison table records the correspondence between physical ports and logical ports. The first MAC address entry records the logical port of the message data, so the physical port of the message data can be accurately found from the first relationship comparison table according to the logical port in the first MAC address entry.
[0051] Exemplarily, the first relationship comparison table is shown in Table 3:
[0052] Table 3: First relationship comparison table
[0053] Physical Port Logical Port Gei_0 / 1 / 1 / 1 Logicport210 Gei_0 / 1 / 1 / 1 Logicport220 Gei_0 / 1 / 1 / 2 Logicport230
[0054] For example, the logical port in the first MAC address entry is logicport210. Through the first relationship comparison table, it can be accurately known that logicport210 corresponds to gei_0 / 1 / 1 / 1, so the physical port of the message data can be found to be Gei_0 / 1 / 1 / 1.
[0055] Sub-step S1022: Determine the user-side VLAN of the message data according to the network-side VLAN in the first MAC address entry, the second relationship comparison table, and the physical port of the message data.
[0056] The second relationship comparison table records the correspondence between the physical port, the user side VLAN, and the network side VLAN. The first MAC address entry records the network side VLAN of the message data, so according to the network side VLAN in the first MAC address entry and the physical port found, the user side VLAN of the message data can be accurately found from the second relationship comparison table.
[0057] Exemplarily, the second relationship comparison table is shown in Table 4:
[0058] Table 4: Second relationship comparison table
[0059] Physical Port User-side VLAN Network-side VLAN Gei_0 / 1 / 1 / 1 100 1000 Gei_0 / 1 / 1 / 1 200 1000
[0060] In one embodiment, the second relationship comparison table is traversed according to the network side VLAN in the first MAC address entry and the physical port of the message data to find the target user side VLAN corresponding to the first MAC address entry; the target user side VLAN is determined as the user side VLAN of the message data.
[0061] Exemplarily, according to the logical port in the first MAC address entry and the first relationship comparison table, the physical port of the message data is determined to be Gei_0 / 1 / 1 / 1, and the network side VLAN in the first MAC address entry is 1000. Therefore, according to the network side VLAN 1000 in the first MAC address entry and the physical port Gei_0 / 1 / 1 / 1 obtained by the search, the target user side VLANs of the message data can be accurately found out from the second relationship comparison table as 100 and 200.
[0062] In one embodiment, determining the target user-side VLAN as the user-side VLAN of the message data includes: obtaining a third relationship comparison table, the third relationship comparison table recording the correspondence between the physical port, the user-side VLAN, and the logical port; traversing the third relationship comparison table according to the target user-side VLAN and the physical port of the message data to find the target logical port corresponding to both the target user-side VLAN and the physical port; when the target logical port is consistent with the logical port in the first MAC address entry, determining the target user-side VLAN corresponding to the logical port in the first MAC address entry as the user-side VLAN of the message data.
[0063] It should be noted that the third relationship comparison table may be, for example, Table 1 in the foregoing text, and therefore the third relationship comparison table may specifically refer to the logical port table shown in Table 1. Therefore, according to the network-side VLAN in the first MAC address entry and the physical port found, the target logical port of the message data can be accurately found from the third relationship comparison table, and the target user-side VLAN corresponding to the logical port in the first MAC address entry is determined as the user-side VLAN of the message data.
[0064] Exemplarily, when the target user-side VLANs include 100 and 200, the third relationship comparison table is traversed to find the target logical ports such as logicport 210 and logicport 220. If the logical port in the first MAC address entry is logicport 210, the user-side VLAN 100 corresponding to logicport 210 can be determined as the user-side VLAN of the message data.
[0065] Exemplarily, referring to the second relationship comparison table and the third relationship comparison table, the second relationship comparison table is traversed according to the physical port gei_0 / 1 / 1 / 1 and the network side VLAN1000 in the first MAC address entry, with the aim of finding out which user side VLANs the physical port gei_0 / 1 / 1 / 1 and the network side VLAN1000 correspond to. Then, using the traversed physical port gei_0 / 1 / 1 / 1 and the user side VLAN100 and the user side VLAN200 as indexes, the third relationship comparison table is traversed again to find out the corresponding logical ports, which are logicport210 and logicport220 respectively. When the logical port found in the table is consistent with the logical port in the first MAC address entry reported by the underlying switching chip, it is considered that the user side VLAN corresponding to the first MAC address entry learned by the underlying switching chip is found.
[0066] Sub-step S1023: Generate a second MAC address entry according to the first MAC address entry, the physical port of the message data, and the user-side VLAN.
[0067] It should be noted that the first MAC address entry includes the MAC address, logical port and network side VLAN of the message data. By merging the physical port and user side VLAN of the message data with the MAC address and user side VLAN in the first MAC address entry, the second MAC address entry that the software platform needs to obtain can be obtained. The second MAC address entry includes {physical port, MAC address, user side VLAN, network side VLAN}.
[0068] It can be understood that the above-mentioned first relationship comparison table, second relationship comparison table and third relationship comparison table are only specific examples of the first preset relationship group. In actual applications, the first preset relationship group may also include relationship comparison tables of other contents, and the embodiments of the present application do not make specific limitations on this.
[0069] Step S103: Generate a third MAC address entry according to the second MAC address entry.
[0070] The second MAC address entry includes the physical port, MAC address, user-side VLAN and network-side VLAN of the message data. The third MAC address entry includes the logical port, MAC address, network-side VLAN and next hop identifier of the message data.
[0071] Through the mapping change between the second MAC address entry and the third MAC address entry, the software platform can convert the physical port that the underlying switching chip cannot recognize into a recognizable logical port, and send the third MAC address entry to the underlying switching chip, thereby realizing the synchronous update of the physical port and the logical port in the subsequent MAC address entries.
[0072] Exemplarily, according to the second MAC address entry, the logical port and next hop identifier of the message data are obtained, and based on the second MAC address entry, the logical port and next hop identifier of the message data, a third MAC address entry is generated. The third MAC address entry includes {logical port, MAC, network side VLAN, next hop identifier}.
[0073] In one embodiment, after generating the second MAC address entry, the software platform may update the second MAC address entry in the MAC address learning table. When updating the second MAC address entry, the software platform may determine whether the network side VLAN in the second MAC address entry is obtained based on the logical port learning. If not, the software platform directly writes the second MAC address entry into the underlying switching chip. If the network side VLAN is learned based on the logical port, the MAC address entry sent to the underlying switching chip also needs to be remapped, such as writing to the underlying switching chip only after the third MAC address entry is generated.
[0074] Among them, the configuration record of the underlying switching chip stores the network-side VLAN corresponding to the logical port learning. By querying the configuration record, it can be known whether the network-side VLAN is learned based on the logical port. It should be noted that the underlying switching chip needs to set {logical port, MAC address, network-side VLAN, next hop identifier} for the MAC address entry learned by the logical port. Therefore, it is necessary to map the second MAC address entry {physical port, MAC address, user-side VLAN, network-side VLAN} to the third MAC address entry {logical port, MAC, network-side VLAN, next hop identifier} and then send it to the underlying switching chip.
[0075] In one embodiment, a third MAC address entry is generated according to the second MAC address entry and the second preset relationship group; wherein the second preset relationship group includes a plurality of corresponding relationships between at least two parameters for characterizing a logical port, a physical port, a user-side VLAN, and a next-hop identifier. The third MAC address entry includes the logical port, MAC address, network-side VLAN, and next-hop identifier of the message data.
[0076] In one embodiment, the logical port corresponding to the second MAC address entry is determined according to the physical port, the user-side VLAN, and the third relationship comparison table in the second MAC address entry; the next hop identifier corresponding to the second MAC address entry is determined according to the logical port corresponding to the second MAC address entry and the fourth relationship comparison table; the third MAC address entry is generated according to the second MAC address entry, the logical port corresponding to the second MAC address entry, and the next hop identifier. The third relationship comparison table records the correspondence between the physical port, the user-side VLAN, and the logical port, and the fourth relationship comparison table records the correspondence between the logical port and the next hop identifier.
[0077] It should be noted that the third relationship comparison table can be, for example, Table 1 in the foregoing text, so the third relationship comparison table can specifically refer to the logical port table shown in Table 1, and the logical port corresponding to the second MAC address entry can be accurately obtained. The fourth relationship comparison table records the correspondence between the logical port and the next hop identifier, so according to the logical port corresponding to the second MAC address entry, the next hop identifier of the message data can be accurately found from the fourth relationship comparison table, so that the third MAC address entry {logical port, MAC, network side VLAN, next hop identifier} can be generated based on the second MAC address entry, the logical port corresponding to the second MAC address entry, and the next hop identifier.
[0078] Exemplarily, the fourth relationship comparison table is shown in Table 5:
[0079] Table 5: Fourth relationship comparison table
[0080] Logical port Next hop identifier Logicport210 Nexthop110 Logicport220 Nexthop120 Logicport230 Nexthop130
[0081] Exemplarily, according to the physical port number gei_0 / 1 / 1 / 1 and cvlan100 and 200, the corresponding logical port numbers logicport210 and logicport220 are found from the third relationship comparison table. After finding the logical port corresponding to the second MAC address entry, the correspondence between the logical port and the next hop nexthop is obtained according to Table 5, that is, logicport210 corresponds to nexthop110, and logicport220 corresponds to nexthop220. Therefore, the third MAC address entry {logical port, MAC address, user-side VLAN, next hop identifier} can be generated.
[0082] In one embodiment, the logical port corresponding to the second MAC address entry is determined according to the physical port, user-side VLAN and third relationship comparison table in the second MAC address entry, including: obtaining the user-side VLAN of the message data reported by the underlying switching chip; judging whether the user-side VLAN in the second MAC address entry is consistent with the user-side VLAN reported by the underlying switching chip; when the user-side VLAN in the second MAC address entry is consistent with the user-side VLAN reported by the underlying switching chip, traversing the third relationship comparison table according to the physical port and user-side VLAN in the second MAC address entry to find the target logical port corresponding to both the physical port and the user-side VLAN.
[0083] It should be noted that before traversing the third relationship comparison table according to the physical port and user-side VLAN in the second MAC address entry to find the target logical port corresponding to both the physical port and the user-side VLAN, it is necessary to determine whether the user-side VLAN in the second MAC address entry is consistent with the user-side VLAN reported by the underlying switching chip. In the case where the user-side VLAN in the second MAC address entry is consistent with the user-side VLAN reported by the underlying switching chip, it can be determined that the second MAC address entry and the related first MAC address entry are obtained based on logical port learning, and the MAC address entry sent to the underlying switching chip needs to be remapped, such as writing to the underlying switching chip only after the third MAC address entry is generated, thereby avoiding mapping other MAC address entries that are not obtained based on logical port learning, thereby improving the reliability of the data conversion device.
[0084] Step S104: Send the third MAC address entry to the bottom layer switch chip, so that the bottom layer switch chip is updated according to the third MAC address entry.
[0085] The software platform can identify the physical port of the message data through the second MAC address entry. In addition, the software platform sends the third MAC address entry to the underlying switching chip, and the underlying switching chip identifies the logical port of the message data. In this way, the physical port and the logical port in the MAC address entry can be updated synchronously, and the aging consistency of the MAC address between the software platform and the underlying switching chip can be guaranteed.
[0086] In one embodiment, after receiving the third MAC address entry, the bottom switching chip checks whether there is already a MAC address entry identical to the third MAC address entry in the current MAC address learning table. If yes, the MAC address entry is updated and the aging time of the MAC address entry is reset. If no, the third MAC address entry is reset in the MAC address learning table of the bottom switching chip.
[0087] In one embodiment, when the software platform sends the third MAC address entry to the underlying switch chip, the software platform updates the second MAC address entry. For example, the software platform first checks whether there is already a MAC address entry identical to the second MAC address entry in the current MAC address learning table. If so, the MAC address entry is updated and the aging time of the MAC address entry is reset. If not, the second MAC address entry is reset in the MAC address learning table of the software platform.
[0088] Exemplarily, the software platform calls the underlying switching chip to set the third MAC address entry. After the underlying switching chip is successfully set, the MAC learning is successful in the command line of the software platform, that is, the software platform displays {physical port, MAC address, network side VLAN}, and the underlying switching chip displays {logical port, MAC address, network side VLAN}. At the same time, the software platform timer is enabled and MAC aging begins. The platform will reset the MAC address entry reported by the underlying switching chip into the MAC learning table of the underlying switching chip. The purpose of this is to reset the aging time so that the platform can accurately observe the MAC learning aging situation.
[0089] The MAC address synchronization method provided in the above embodiment, through the mapping changes between multiple MAC address entries, the software platform can identify the physical port of the message data, and the underlying switching chip can identify the logical port of the message data, so that the physical port and the logical port in the MAC address entry can be updated synchronously, and the aging consistency of the MAC address between the software platform and the underlying switching chip can be guaranteed. Current software platforms often do not support the learning aging of logical ports, but can only support the learning aging of physical ports. Therefore, there is a problem of inconsistency between the MAC address entries reported by the current underlying switching chip and the MAC address entries that the platform can identify.
[0090] Please refer to Figure 4 , Figure 4 A schematic flowchart of the steps of another MAC address synchronization method provided in an embodiment of the present application.
[0091] like Figure 4 As shown, the MAC address synchronization method includes steps S201 to S203, and the MAC address synchronization method can be applied to the bottom layer switching chip of the data switching device.
[0092] Step S201: Generate a first MAC address entry.
[0093] In one embodiment, the message data sent by the external device is obtained; a logical port and a network-side VLAN are allocated to the message data; and a MAC address, a logical port and a network-side VLAN of the message data are merged to obtain a first MAC address entry, wherein the first MAC address entry includes the MAC address, a logical port and a network-side VLAN of the message data.
[0094] In one embodiment, allocating a logical port and a network-side VLAN to message data includes: parsing the message data to obtain a physical port and a user-side VLAN of the message data; and determining a logical port and a network-side VLAN of the message data based on the physical port and the user-side VLAN of the message data.
[0095] Exemplarily, the configuration rules based on logical port learning are set in the bottom switching chip. The rules are configured in the upstream inlet. The upstream rules are mainly used for upstream VLAN conversion, matching physical ports and user-side VLANs, and allocating logical ports and network-side VLANs. For example, two rules are written for the upstream inlet port. The first rule is: match gei_0 / 1 / 1 / 1 and VLAN100, allocate logical port 210 and network-side VLAN1000, and the second rule is: match gei_0 / 1 / 1 / 1 and VLAN200, allocate logical port 220 and network-side VLAN1000. The configuration rules are shown in Table 6:
[0096]
[0097] In one embodiment, a next hop identifier is allocated to the message data according to the logical port and the network side VLAN of the message data. It should be noted that only one logical port cannot realize the downstream 1-to-many conversion, so it is necessary to allocate a next hop identifier nexthop based on each network side VLAN and logical port to identify which specific message data, and the chip needs to be configured as follows: specify the network side VLAN 1000 and the logical port 210, and allocate the next hop identifier as nexthop 110; specify the network side VLAN 1000 and the logical port 220, and allocate the next hop identifier as nexthop 120.
[0098] Since the message needs to be forwarded through gei_0 / 1 / 1 / 2, and the underlying switching chip is learned based on the logical port, the physical port gei_0 / 1 / 1 / 2 also needs to be assigned a logical port and a next hop identifier. Therefore, the logical port of the physical port gei_0 / 1 / 1 / 2 is specified as 230, and based on the network-side VLAN 1000 and the logical port 230, the next hop identifier is assigned as nexthop 130. When the message data is forwarded upstream, the outgoing port found according to the network-side VLAN 1000 is the logical port 230, and the next hop identifier of the logical port 230 is found as nexthop130. Nexthop130 corresponds to the physical port gei_0 / 1 / 1 / 2, so it is forwarded from gei_0 / 1 / 1 / 2; the corresponding relationship of the above configuration is shown in Table 7 and Table 8:
[0099] Table 7:
[0100]
[0101]
[0102] Combining Tables 6, 7, and 8, it can be seen that the correspondence between physical ports and logical ports is as follows, as shown in Table 9:
[0103] Physical Port Logical Port Gei_0 / 1 / 1 / 1 Logicport210 Gei_0 / 1 / 1 / 1 Logicport220 Gei_0 / 1 / 1 / 2 Logicport230
[0104] Finally, you need to configure a downstream outbound rule. The downstream rule is mainly used for the downstream outbound VLAN "1 to many" conversion. The matching condition is the next hop nexthop. The specific action is to modify the network side VLAN to the user side VLAN and specify the export (physical port) forwarding. The message data of the downstream inbound port VLAN1000 finds the logical export of the downstream forwarding based on the MAC address entry learned by the underlying switching chip, which are 210 and 220 respectively. From the previous step, we can know that the next hop is 110 and 120, and according to the rules configured in this step, it is converted into the user side VLAN100 and the user side VLAN200, and forwarded from the gei_0 / 1 / 1 / 1 port. The table entries of the underlying switching chip involved are shown in Table 10:
[0105] Nexthop(matching condition) Physical port (action 1) User-side VLAN (Action 2) Nexthop110 Gei_0 / 1 / 1 / 1 User-side VLAN 100 Nexthop120 Gei_0 / 1 / 1 / 1 User-side VLAN 200
[0106] The above mentioned entries are all entries of the underlying switching chip, not entries saved by the software platform. The synchronization between the MAC learning of the software platform and the MAC learning of the underlying switching chip depends on the above implementation principle. The implementation method of MAC learning synchronization can refer to other embodiments of this application.
[0107] Step S202: Report the first MAC address entry to the software platform, so that the software platform generates a second MAC address entry according to the first MAC address entry and the first preset relationship group, and generates a third MAC address entry according to the second MAC address entry.
[0108] The second MAC address entry includes the physical port, MAC address, user-side VLAN and network-side VLAN of the message data, and the third MAC address entry includes the logical port, MAC address, network-side VLAN and next-hop identifier of the message data. Through the mapping changes between the first MAC address entry and the second MAC address entry, and the mapping changes between the second MAC address entry and the third MAC address entry, the software platform can convert the unrecognizable logical port into a recognizable physical port, and the underlying switching chip can identify the logical port of the message data through the third MAC address entry, thereby realizing the synchronous update of the physical port and the logical port in the MAC address entry.
[0109] In one embodiment, the first preset relationship group includes a plurality of corresponding relationships between at least two parameters for characterizing a logical port, a physical port, a user-side VLAN, and a network-side VLAN. The first preset relationship group may include at least two relationship comparison tables, each relationship comparison table including a corresponding relationship between at least two parameters of a logical port, a physical port, a user-side VLAN, and a network-side VLAN, so that the physical port and the user-side VLAN corresponding to the message data can be accurately found according to the first MAC address entry.
[0110] In one embodiment, the software platform determines the physical port of the message data based on the logical port in the first MAC address entry and the first relationship comparison table; determines the user side VLAN of the message data based on the network side VLAN in the first MAC address entry, the second relationship comparison table and the physical port of the message data; generates the second MAC address entry based on the first MAC address entry, the physical port of the message data and the user side VLAN.
[0111] In one embodiment, the software platform determines the logical port corresponding to the second MAC address entry according to the physical port, user-side VLAN and the third relationship comparison table in the second MAC address entry; determines the next hop identifier corresponding to the second MAC address entry according to the logical port corresponding to the second MAC address entry and the fourth relationship comparison table; generates the third MAC address entry according to the second MAC address entry, the logical port corresponding to the second MAC address entry and the next hop identifier. The third relationship comparison table records the correspondence between the physical port, the user-side VLAN and the logical port, and the fourth relationship comparison table records the correspondence between the logical port and the next hop identifier.
[0112] Step S203: Receive the third MAC address entry sent by the software platform, and update according to the third MAC address entry.
[0113] The software platform can identify the physical port of the message data through the second MAC address entry. In addition, the software platform sends the third MAC address entry to the underlying switching chip, and the underlying switching chip identifies the logical port of the message data. In this way, the physical port and the logical port in the MAC address entry can be updated synchronously, and the aging consistency of the MAC address between the software platform and the underlying switching chip can be guaranteed.
[0114] In one embodiment, after receiving the third MAC address entry, the bottom switching chip checks whether there is already a MAC address entry identical to the third MAC address entry in the current MAC address learning table. If yes, the MAC address entry is updated and the aging time of the MAC address entry is reset. If no, the third MAC address entry is reset in the MAC address learning table of the bottom switching chip.
[0115] In one embodiment, when the software platform sends the third MAC address entry to the underlying switch chip, the software platform updates the second MAC address entry. For example, the software platform first checks whether there is already a MAC address entry identical to the second MAC address entry in the current MAC address learning table. If so, the MAC address entry is updated and the aging time of the MAC address entry is reset. If not, the second MAC address entry is reset in the MAC address learning table of the software platform.
[0116] The MAC address synchronization method provided in the above embodiment enables the software platform to identify the physical port of the message data and the underlying switching chip to identify the logical port of the message data through the mapping changes between multiple MAC address entries, thereby achieving synchronous update of the physical port and the logical port in the MAC address entry and ensuring the aging consistency of the MAC address between the software platform and the underlying switching chip.
[0117] See also Figure 5 , Figure 5 A schematic block diagram of the structure of a data exchange device provided in an embodiment of the present application.
[0118] like Figure 5 As shown, the data exchange device 300 includes a software platform 310 and an underlying switching chip 320. The software platform 310 is used to implement any MAC address synchronization method applied to the software platform 310 in the embodiments of the present application, and the underlying switching chip 320 is used to implement any MAC address synchronization method applied to the underlying switching chip 320 in the embodiments of the present application.
[0119] In one embodiment, the software platform 310 is used to implement:
[0120] Obtaining a first MAC address entry reported by the bottom layer switching chip 320, wherein the first MAC address entry includes a MAC address, a logical port, and a network-side VLAN of the message data;
[0121] Generate a second MAC address entry according to the first MAC address entry and the first preset relationship group; wherein the second MAC address entry includes the physical port, MAC address, user-side VLAN and network-side VLAN of the message data; the first preset relationship group includes a plurality of corresponding relationships between at least two parameters for characterizing the logical port, the physical port, the user-side VLAN and the network-side VLAN;
[0122] Generate a third MAC address entry according to the second MAC address entry; wherein the third MAC address entry includes the logical port, MAC address, network side VLAN and next hop identifier of the message data;
[0123] The third MAC address entry is sent to the bottom layer switch chip 320, so that the bottom layer switch chip 320 is updated according to the third MAC address entry.
[0124] In one embodiment, when the software platform 310 generates the second MAC address entry according to the first MAC address entry and the first preset relationship group, it is used to implement:
[0125] Determine the physical port of the message data according to the logical port in the first MAC address entry and a first relationship comparison table; the first relationship comparison table records the correspondence between the physical port and the logical port;
[0126] Determine the user side VLAN of the message data according to the network side VLAN in the first MAC address entry, the second relationship comparison table and the physical port of the message data; the second relationship comparison table records the correspondence between the physical port, the user side VLAN and the network side VLAN;
[0127] The second MAC address entry is generated according to the first MAC address entry, the physical port of the message data, and the user-side VLAN.
[0128] In one embodiment, when the software platform 310 implements the determination of the user-side VLAN of the message data according to the network-side VLAN in the first MAC address entry, the second relationship comparison table, and the physical port of the message data, it is used to implement:
[0129] According to the network-side VLAN in the first MAC address entry and the physical port of the message data, the second relationship comparison table is traversed to find the target user-side VLAN corresponding to the first MAC address entry;
[0130] The target user-side VLAN is determined as the user-side VLAN of the message data.
[0131] In one embodiment, when implementing the step of determining the target user-side VLAN as the user-side VLAN of the message data, the software platform 310 is used to implement:
[0132] Obtain a third relationship comparison table, wherein the third relationship comparison table records the correspondence between the physical port, the user-side VLAN, and the logical port;
[0133] According to the target user-side VLAN and the physical port of the message data, the third relationship comparison table is traversed to find the target logical port corresponding to both the target user-side VLAN and the physical port;
[0134] When the target logical port is consistent with the logical port in the first MAC address entry, the target user-side VLAN corresponding to the logical port is determined as the user-side VLAN of the message data.
[0135] In one embodiment, when implementing the generating of the third MAC address entry according to the second MAC address entry, the software platform 310 is used to implement:
[0136] A third MAC address entry is generated according to the second MAC address entry and the second preset relationship group; wherein the second preset relationship group includes a plurality of corresponding relationships between at least two parameters for characterizing a logical port, a physical port, a user-side VLAN and a next hop identifier.
[0137] In one embodiment, when implementing the generating of the third MAC address entry according to the second MAC address entry and the second preset relationship group, the software platform 310 is used to implement:
[0138] Determine the logical port corresponding to the second MAC address entry according to the physical port, the user-side VLAN, and the third relationship comparison table in the second MAC address entry;
[0139] Determine the next hop identifier corresponding to the second MAC address entry according to the logical port corresponding to the second MAC address entry and a fourth relationship comparison table; the fourth relationship comparison table records the correspondence between the logical port and the next hop identifier;
[0140] A third MAC address entry is generated according to the second MAC address entry, the logical port corresponding to the second MAC address entry, and the next hop identifier.
[0141] In one embodiment, when the software platform 310 implements the step of determining the logical port corresponding to the second MAC address entry according to the physical port in the second MAC address entry, the user-side VLAN, and the third relationship comparison table, it is used to implement:
[0142] Obtaining the user-side VLAN of the message data reported by the underlying switching chip 320;
[0143] Determine whether the user-side VLAN in the second MAC address entry is consistent with the user-side VLAN reported by the underlying switching chip 320;
[0144] When the user-side VLAN in the second MAC address entry is consistent with the user-side VLAN reported by the underlying switching chip 320, the third relationship comparison table is traversed according to the physical port and user-side VLAN in the second MAC address entry to find the target logical port corresponding to both the physical port and the user-side VLAN.
[0145] In one embodiment, the bottom layer switching chip 320 is used to implement:
[0146] Generate a first MAC address entry, wherein the first MAC address entry includes a MAC address, a logical port, and a network-side VLAN of the message data;
[0147] Reporting the first MAC address entry to the software platform 310, so that the software platform 310 generates a second MAC address entry according to the first MAC address entry and the first preset relationship group, and generates a third MAC address entry according to the second MAC address entry; wherein the second MAC address entry includes the physical port, MAC address, user-side VLAN and network-side VLAN of the message data, and the third MAC address entry includes the logical port, MAC address, network-side VLAN and next-hop identifier of the message data;
[0148] The third MAC address entry sent by the software platform 310 is received, and updated according to the third MAC address entry.
[0149] In one embodiment, the bottom layer switching chip 320, when implementing the generating of the first MAC address entry, is used to implement:
[0150] Get the message data sent by the external device;
[0151] Allocating a logical port and a network-side VLAN to the message data;
[0152] The MAC address, logical port and network-side VLAN of the message data are combined to obtain a first MAC address entry.
[0153] In one embodiment, the bottom switching chip 320, when implementing the allocation of a logical port and a network-side VLAN for the message data, is used to implement:
[0154] Parsing the message data to obtain the physical port and user-side VLAN of the message data;
[0155] Based on the physical port of the message data and the user-side VLAN, the logical port and the network-side VLAN of the message data are determined.
[0156] Those skilled in the art will understand that Figure 5 The structure shown in the figure is only a block diagram of a partial structure related to the embodiment of the present application, and does not constitute a limitation on the data exchange device to which the embodiment of the present application is applied. The specific data exchange device may include more or fewer components than those shown in the figure, or combine certain components, or have a different component arrangement.
[0157] It should be noted that technical personnel in the relevant field can clearly understand that, for the convenience and conciseness of description, the specific working process of the software platform and the underlying switching chip of the data exchange device described above can refer to the corresponding process in the corresponding embodiment of the aforementioned MAC address synchronization method, and will not be repeated here.
[0158] An embodiment of the present application also provides a storage medium for computer-readable storage, wherein the storage medium stores one or more programs, and the one or more programs can be executed by one or more processors to implement the steps of any MAC address synchronization method provided in the embodiment of the present application.
[0159] The storage medium may be an internal storage unit of the data exchange device described in the foregoing embodiments, such as a hard disk or memory of the data exchange device. The storage medium may also be an external storage device of the data exchange device, such as a plug-in hard disk, a smart memory card (Smart Media Card, SMC), a secure digital (Secure Digital, SD) card, a flash card (Flash Card), etc., equipped on the data exchange device.
[0160] It will be appreciated by those skilled in the art that all or some of the steps, systems, and functional modules / units in the methods disclosed above may be implemented as software, firmware, hardware, and appropriate combinations thereof. In hardware implementations, the division between the functional modules / units mentioned in the above description does not necessarily correspond to the division of physical components; for example, a physical component may have multiple functions, or a function or step may be performed by several physical components in cooperation. Some or all physical components may be implemented as software executed by a processor, such as a central processing unit, a digital signal processor, or a microprocessor, or implemented as hardware, or implemented as an integrated circuit, such as an application-specific integrated circuit. Such software may be distributed on a computer-readable medium, which may include a computer storage medium (or non-transitory medium) and a communication medium (or temporary medium). As known to those skilled in the art, the term computer storage medium includes volatile and non-volatile, removable and non-removable media implemented in any method or technology for storing information (such as computer-readable instructions, data structures, program modules, or other data).
[0161] Computer storage media include, but are not limited to, RAM, ROM, EEPROM, flash memory or other memory technology, CD-ROM, digital versatile disks (DVD) or other optical disk storage, magnetic cassettes, magnetic tapes, magnetic disk storage or other magnetic storage devices, or any other medium that can be used to store the desired information and can be accessed by a computer. In addition, it is well known to those of ordinary skill in the art that communication media typically contain computer-readable instructions, data structures, program modules, or other data in a modulated data signal such as a carrier wave or other transport mechanism, and may include any information delivery media.
[0162] The serial numbers of the embodiments of the present application are for description only and do not represent the advantages and disadvantages of the embodiments. The above description is only a specific implementation mode of the present application, but the protection scope of the present application is not limited thereto. Any technician familiar with the technical field can easily think of various equivalent modifications or replacements within the technical scope disclosed in the present application, and these modifications or replacements should be included in the protection scope of the present application. Therefore, the protection scope of the present application shall be based on the protection scope of the claims.
Claims
1. A MAC address synchronization method, characterized in that: A software platform applied to a data exchange device, wherein the data exchange device further comprises an underlying exchange chip, and the method comprises: Obtain a first MAC address entry reported by the underlying switching chip, where the first MAC address entry includes a MAC address, a logical port, and a network-side VLAN of the message data; Generate a second MAC address entry according to the first MAC address entry and the first preset relationship group; wherein the second MAC address entry includes the physical port, MAC address, user-side VLAN and network-side VLAN of the message data; the first preset relationship group includes a plurality of corresponding relationships between at least two parameters for characterizing the logical port, the physical port, the user-side VLAN and the network-side VLAN; Generate a third MAC address entry according to the second MAC address entry; wherein the third MAC address entry includes the logical port, MAC address, network side VLAN and next hop identifier of the message data; The third MAC address entry is sent to the bottom layer switch chip, so that the bottom layer switch chip is updated according to the third MAC address entry.
2. The MAC address synchronization method according to claim 1, characterized in that: The generating a second MAC address entry according to the first MAC address entry and the first preset relationship group includes: Determine the physical port of the message data according to the logical port in the first MAC address entry and a first relationship comparison table; the first relationship comparison table records the correspondence between the physical port and the logical port; Determine the user side VLAN of the message data according to the network side VLAN in the first MAC address entry, the second relationship comparison table and the physical port of the message data; the second relationship comparison table records the correspondence between the physical port, the user side VLAN and the network side VLAN; The second MAC address entry is generated according to the first MAC address entry, the physical port of the message data, and the user-side VLAN.
3. The MAC address synchronization method according to claim 2, characterized in that: The determining the user-side VLAN of the message data according to the network-side VLAN in the first MAC address entry, the second relationship comparison table, and the physical port of the message data includes: According to the network-side VLAN in the first MAC address entry and the physical port of the message data, the second relationship comparison table is traversed to find the target user-side VLAN corresponding to the first MAC address entry; The target user-side VLAN is determined as the user-side VLAN of the message data.
4. The MAC address synchronization method according to claim 3, characterized in that: The step of determining the target user-side VLAN as the user-side VLAN of the message data includes: Obtain a third relationship comparison table, wherein the third relationship comparison table records the correspondence between the physical port, the user-side VLAN, and the logical port; According to the target user-side VLAN and the physical port of the message data, the third relationship comparison table is traversed to find the target logical port corresponding to both the target user-side VLAN and the physical port; When the target logical port is consistent with the logical port in the first MAC address entry, the target user-side VLAN corresponding to the logical port is determined as the user-side VLAN of the message data.
5. The MAC address synchronization method according to any one of claims 1 to 4, characterized in that: The generating a third MAC address entry according to the second MAC address entry comprises: A third MAC address entry is generated according to the second MAC address entry and the second preset relationship group; wherein the second preset relationship group includes a plurality of corresponding relationships between at least two parameters for characterizing a logical port, a physical port, a user-side VLAN and a next hop identifier.
6. The MAC address synchronization method according to claim 5, characterized in that: The generating a third MAC address entry according to the second MAC address entry and the second preset relationship group includes: Determine the logical port corresponding to the second MAC address entry according to the physical port, the user-side VLAN, and the third relationship comparison table in the second MAC address entry; Determine the next hop identifier corresponding to the second MAC address entry according to the logical port corresponding to the second MAC address entry and a fourth relationship comparison table; the fourth relationship comparison table records the correspondence between the logical port and the next hop identifier; A third MAC address entry is generated according to the second MAC address entry, the logical port corresponding to the second MAC address entry, and the next hop identifier.
7. The MAC address synchronization method according to claim 6, characterized in that: The determining, according to the physical port in the second MAC address entry, the user-side VLAN, and the third relationship comparison table, the logical port corresponding to the second MAC address entry includes: Obtaining a user-side VLAN of the message data reported by the underlying switching chip; Determine whether the user-side VLAN in the second MAC address entry is consistent with the user-side VLAN reported by the underlying switching chip; When the user-side VLAN in the second MAC address entry is consistent with the user-side VLAN reported by the underlying switching chip, the third relationship comparison table is traversed according to the physical port and user-side VLAN in the second MAC address entry to find the target logical port corresponding to both the physical port and the user-side VLAN.
8. A MAC address synchronization method, characterized in that: The bottom layer switching chip applied to the data switching device, the data switching device also includes a software platform, and the method includes: Generate a first MAC address entry, wherein the first MAC address entry includes a MAC address, a logical port, and a network-side VLAN of the message data; Reporting the first MAC address entry to the software platform, so that the software platform generates a second MAC address entry according to the first MAC address entry and a first preset relationship group, and generates a third MAC address entry according to the second MAC address entry; wherein the second MAC address entry includes the physical port, MAC address, user-side VLAN and network-side VLAN of the message data, and the third MAC address entry includes the logical port, MAC address, network-side VLAN and next-hop identifier of the message data; Receive the third MAC address entry sent by the software platform, and update according to the third MAC address entry.
9. The MAC address synchronization method according to claim 8, characterized in that: The generating a first MAC address entry comprises: Get the message data sent by the external device; Allocating a logical port and a network-side VLAN to the message data; The MAC address, logical port and network-side VLAN of the message data are combined to obtain a first MAC address entry.
10. The MAC address synchronization method according to claim 9, characterized in that: The allocating a logical port and a network-side VLAN to the message data includes: Parsing the message data to obtain the physical port and user-side VLAN of the message data; Based on the physical port of the message data and the user-side VLAN, the logical port and the network-side VLAN of the message data are determined.
11. A data exchange device, characterized in that: The data exchange device includes a software platform and an underlying switching chip, the software platform is used to implement the MAC address synchronization method according to any one of claims 1 to 7, and the underlying switching chip is used to implement the MAC address synchronization method according to any one of claims 8 to 10.
12. A storage medium for computer-readable storage, characterized in that: The storage medium stores one or more programs, and the one or more programs can be executed by one or more processors to implement the MAC address synchronization method according to any one of claims 1 to 10.