Multi-user scheduling method, device and storage medium based on restricted channel decoder
By allocating a buffer area and configuring the LLR transmission address in the 5G NR base station, the problem of the limited number of FECA decoder channels is solved, parallel processing and scheduling of multi-user data packets are achieved, and the problem of the limited number of users that the decoder can process is solved.
Patent Information
- Application Number
- CN202411360537.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-27
- Publication Date
- 2025-09-16
- Estimated Expiration
- 2044-09-27
AI Technical Summary
In 5G NR base stations, due to the channel number limitation of the FECA decoder, each time slot can only process 8 users, resulting in the inability to simultaneously schedule data packets of more than 8 users under multi-user demand conditions.
By determining the number of user data packets on the eNB side, the data packets are distributed to the first and second buffer areas for CRC processing, processed in the current and next time slots respectively, different LLR sending addresses are configured to cache soft bit information, and CRC results and TB streams are reported separately.
It realizes the parallel processing of multiple user data packets in the current and next time slots, avoids uplink processing conflicts, solves the problem of decoder channel number limitation, and can schedule data packets of more than 8 users at the same time.
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Figure CN119277545B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of 5G NR communication technology, and in particular to a multi-user scheduling method, device, and storage medium based on a restricted channel decoder. Background Art
[0002] Currently, in the 5G NR base station implementation, the eNB receives uplink service data sent by the UE through the uplink PUSCH channel. The number of users that can be processed by the uplink PUSCH channel is limited by the number of channels of the FECA decoder, that is, a maximum of 8 users can be processed at a time. This leads to the inability to schedule data packets of more than 8 users at the same time due to decoding limitations when more users are needed. Summary of the Invention
[0003] In view of this, the purpose of the present invention is to provide a multi-user scheduling method, device and storage medium based on a restricted channel decoder to solve the problem in the prior art that the number of channels of the FECA decoder limits the number of users that can be processed in each time slot, resulting in the inability to simultaneously schedule data packets of more than 8 users due to decoding limitations when more users are required.
[0004] According to a first aspect of an embodiment of the present invention, a multi-user scheduling method based on a restricted channel decoder is provided, the method comprising:
[0005] The user equipment sends uplink service data to the eNB side through the uplink PUSCH channel;
[0006] After receiving the uplink service data, the eNB side determines the number of user data packets in the current air interface time slot;
[0007] According to the result of the user data packet judgment, if the number of user data packets is less than or equal to the limited number of users x processed by the FECA decoder in each time slot, the user data packets are sent to the first buffer area;
[0008] Performing CRC processing on the user data packet of the first buffer area in the current air interface timeslot, obtaining the uplink CRC result and TB flow of the first buffer area, and reporting the uplink CRC result and TB flow of the first buffer area;
[0009] According to the result of the user data packet determination, if the number of user data packets is greater than the limited number of users that can be processed in each time slot of the FECA decoder, x user data packets are sent to the first buffer area, and the remaining user data packets are sent to the second buffer area, where the number of user data packets in the second buffer area is less than or equal to x;
[0010] The user data packets of the first buffer area are de-crc processed in the current air interface time slot to obtain the uplink CRC result and TB flow of the first buffer area; the user data packets of the second buffer area are de-crc processed in the next time slot of the current air interface time slot to obtain the uplink CRC result and TB flow of the second buffer area; the uplink CRC results and TB flow of the first buffer area and the second buffer area are reported separately.
[0011] Preferably, it also includes:
[0012] If the number of user data packets is less than or equal to the limited number of users x that can be processed per time slot of the FECA decoder, the first LLR sending address is configured;
[0013] The first LLR sending address is used to send the user data packet to the first buffer area for buffering.
[0014] Preferably, it also includes:
[0015] If the number of user data packets is greater than the limited number of users that can be processed in each time slot of the FECA decoder, the first LLR sending address and the second LLR sending address are configured respectively;
[0016] The first LLR sending address is used to send x user data packets to the first buffer area, and the second LLR sending address is used to send the remaining user data packets to the second buffer area. The maximum number of cached user data packets in the second buffer area is less than or equal to the limited number of processing users x per time slot of the FECA decoder.
[0017] Preferably,
[0018] The CRC solution processing includes:
[0019] Performing time domain CP removal processing on the user data packet to obtain an accurate time domain signal;
[0020] Performing FFT transformation on the accurate time domain signal to obtain a data frequency domain signal;
[0021] Performing channel estimation on the data frequency domain signal to obtain a channel estimation result;
[0022] Performing equalization processing on the data frequency domain signal according to the channel estimation result to obtain an equalization result;
[0023] Using the equalization result and the channel estimation result, the demodulation software demodulates the soft bit information of the user data packet;
[0024] Decoding the soft bit information by configuring a decoding tool to obtain a TB stream;
[0025] Perform CRC check on the TB stream to obtain an uplink CRC result.
[0026] Preferably,
[0027] The performing channel estimation on the data frequency domain signal to obtain a channel estimation result includes:
[0028] The SL algorithm is used to estimate the impact response experienced by the data frequency domain signal to obtain a channel estimation result.
[0029] Preferably,
[0030] The performing equalization processing on the data frequency domain signal according to the channel estimation result to obtain the equalization result includes:
[0031] The data frequency domain signal is restored using a minimum mean square error method according to the channel estimation result to obtain an equalization result.
[0032] According to a second aspect of an embodiment of the present invention, a multi-user scheduling device based on a restricted channel decoder is provided, the device comprising:
[0033] Data sending module: used by the user equipment to send uplink service data to the eNB side through the uplink PUSCH channel;
[0034] Data packet number determination module: used for determining the number of user data packets in the current air interface timeslot after the eNB side receives uplink service data;
[0035] The first buffer module is configured to send the user data packets to the first buffer area if the number of user data packets is less than or equal to the number of users x that can be processed in each time slot of the FECA decoder according to the result of the user data packet judgment;
[0036] A first CRC decompression module is configured to perform CRC decompression on the user data packet in the first buffer area in the current air interface timeslot, obtain the uplink CRC result and TB flow of the first buffer area, and report the uplink CRC result and TB flow of the first buffer area;
[0037] A second buffer module is configured to, based on a determination result of the user data packets, send x user data packets to the first buffer area and the remaining user data packets to the second buffer area if the number of user data packets is greater than the limit number of users that can be processed per time slot of the FECA decoder. The number of user data packets in the second buffer area is less than or equal to x.
[0038] The second CRC decompression module is used to perform CRC decompression on the user data packets in the first buffer area in the current air interface time slot to obtain the uplink CRC result and TB flow of the first buffer area, and perform CRC decompression on the user data packets in the second buffer area in the next time slot of the current air interface time slot to obtain the uplink CRC result and TB flow of the second buffer area; and report the uplink CRC results and TB flow of the first buffer area and the second buffer area separately.
[0039] According to a third aspect of an embodiment of the present invention, a storage medium is provided, wherein the storage medium stores a computer program, and when the computer program is executed by a host controller, each step in the above method is implemented.
[0040] The technical solutions provided by the embodiments of the present invention may have the following beneficial effects:
[0041] The present application judges the number of user data packets. If the number of user data packets exceeds the limit x of users that can be processed in each time slot of the FECA decoder, x user data packets are cached in the first cache area, and the remaining user data packets are cached in the second cache area. The user data packets in the first cache area are first de-CRC processed in the current air interface time slot, and the user data packets in the second cache area are de-CRC processed in the next time slot of the current air interface time slot. The above scheme enables the present application to process multiple uplink user data packets at the same time without causing uplink processing conflicts, that is, uplink and downlink processing can be carried out in parallel in the current air interface time slot and the next time slot without interfering with each other, thereby solving the problem that the number of users that can be processed in each time slot is limited by the number of channels of the FECA decoder, resulting in the inability to simultaneously schedule data packets that exceed the limit on the number of users to be processed.
[0042] It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the invention. BRIEF DESCRIPTION OF THE DRAWINGS
[0043] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the invention and, together with the description, serve to explain the principles of the invention.
[0044] Figure 1 is a flow chart illustrating a multi-user scheduling method based on a restricted channel decoder according to an exemplary embodiment;
[0045] Figure 2 is a system diagram of a multi-user scheduling device based on a restricted channel decoder according to another exemplary embodiment;
[0046] In the accompanying drawings: 1-data sending module, 2-data packet number judgment module, 3-first cache module, 4-first CRC decomposition module, 5-second cache module, 6-second CRC decomposition module. DETAILED DESCRIPTION
[0047] Exemplary embodiments will be described in detail herein, examples of which are illustrated in the accompanying drawings. In the following description, when referring to the drawings, like numbers in different figures represent like or similar elements unless otherwise indicated. The embodiments described in the following exemplary embodiments are not intended to represent all possible embodiments consistent with the present invention. Rather, they are merely examples of apparatus and methods consistent with certain aspects of the present invention, as detailed in the appended claims.
[0048] Example 1
[0049] Figure 1 is a flow chart showing a multi-user scheduling method based on a restricted channel decoder according to an exemplary embodiment. Figure 1 As shown, the method includes:
[0050] S1: The user equipment sends uplink service data to the eNB side through the uplink PUSCH channel;
[0051] S2, after receiving the uplink service data, the eNB side determines the number of user data packets in the current air interface timeslot;
[0052] S3, based on the result of the user data packet judgment, if the number of user data packets is less than or equal to the limited number of users x that can be processed per time slot of the FECA decoder, then the user data packets are sent to the first buffer;
[0053] S4, performing CRC processing on the user data packet in the first buffer area in the current air interface timeslot, obtaining the uplink CRC result and TB flow of the first buffer area, and reporting the uplink CRC result and TB flow of the first buffer area;
[0054] S5, based on the result of the user data packet determination, if the number of user data packets is greater than the limited number of users that can be processed per time slot of the FECA decoder, then x user data packets are sent to the first buffer area, and the remaining user data packets are sent to the second buffer area, where the number of user data packets in the second buffer area is less than or equal to x;
[0055] S6, performing CRC processing on the user data packets in the first buffer area in the current air interface timeslot to obtain an uplink CRC result and a TB flow of the first buffer area, performing CRC processing on the user data packets in the second buffer area in the timeslot next to the current air interface timeslot to obtain an uplink CRC result and a TB flow of the second buffer area; and reporting the uplink CRC results and TB flows of the first buffer area and the second buffer area separately;
[0056] It can be understood that, in the current 5G NR base station implementation scheme, the eNB receives uplink service data sent by the UE (user equipment) through the uplink PUSCH (physical uplink shared channel) channel. The uplink PUSCH channel reception processing generally undergoes a series of processes such as time domain CP removal, FFT, channel estimation and measurement, equalization, de-layer mapping, demodulation, descrambling, bit-level decoding and CRC decoding to obtain the final uplink CRC result and TB stream. The number of users processed by the uplink PUSCH channel is limited by the number of channels of the FECA decoder. The number of users that can be processed in each time slot, that is, a maximum of 8 users can be processed at a time. This leads to the inability to schedule more than 8 user PDUs on a U time slot at the same time due to decoding restrictions under the condition of more user requirements. In order to solve this problem, the specific solution of this application is as follows:
[0057] After symbol-level processing, the eNB performs decoding on the uplink PUSCH channel according to the number of UEs (user equipment). The decoding process is mainly divided into three types: processing for less than 8 users, processing for more than 8 users and less than 16 users, and processing for more than 16 users. The specific implementation principles are as follows:
[0058] For the PUSCH symbol-level process, the number of users is determined when calculating parameters in air interface timeslot n:
[0059] When the number of users is less than 8, the normal PUSCH channel processing flow is followed. That is, after a series of processes such as time domain CP removal, FFT, channel estimation and measurement, equalization, de-layer mapping, demodulation, descrambling, bit-level decoding, and CRC decoding, the final uplink CRC result and TB stream are obtained.
[0060] When the number of users exceeds 8 and is less than 16, this special processing mechanism needs to be activated. When there are more than 8 PDUs (protocol data units), different LLR sending addresses need to be configured in advance to cache soft bit information. It should be noted that the LLR sending addresses of the first 8 PDUs and the last 1 to 8 PLUS PDUs are different, that is, when there are more than 8 users and less than 16 users, different LLR sending addresses (the first LLR sending address and the second LLR sending address mentioned above) need to be configured. For the first 8 PDUs, they are sent to the first buffer area through the first LLR sending address, and for the remaining 1 to 8 PDUs, they are sent to the second buffer area through the second LLR sending address. That is to say, if the number of users is 14, then the first buffer area caches 8 PDUs and the second buffer area caches 6 PDUs; for the PUSCH (physical uplink shared channel) bit-level process, it is necessary to judge the number of users at the air interface time slot n. The first 8 PDUs are subjected to bit-level process CRC and TB flow in the current air interface time slot n, and the last 8 PLUS The PDU is deserialized into CRC and TB stream at the bit level in the n+1 time slot; the first 8 PDUs and the last 1 to 8 PDUs are reported separately.
[0061] When the number of users exceeds 16, protection processing is required, that is, batch processing, with a maximum of 16 PDUs processed in one batch. The processing process is shown above.
[0062] It is worth noting that after the above series of processing, including time domain CP removal, FFT, channel estimation and measurement, equalization, de-layer mapping, demodulation, descrambling, bit-level decoding and CRC decompression, the final uplink CRC result and TB stream include:
[0063] Time domain CP removal: eliminates inter-symbol interference caused by multipath propagation to obtain accurate time domain signals;
[0064] FFT transform: FFT transform converts time domain signals into frequency domain signals;
[0065] Channel estimation and measurement: Channel estimation uses the SL algorithm to estimate the impact of the signal, which is applied to subsequent equalization processing to eliminate interference caused by multipath signal aliasing;
[0066] Equalization and de-layering: Equalization and de-layering are the process of using the minimum mean square error (MMSE) to maximize the restoration of the data frequency domain signal using the channel estimation result of the DMRS (demodulation reference signal).
[0067] Demodulation and descrambling: Demodulation and descrambling provide signal synchronization, frequency error estimation, and channel estimation through DMRS, enabling the demodulation software to accurately demodulate the soft bit information on the PUSCH;
[0068] Bit-level decoding: Bit-level decoding decodes the soft bit information by configuring the decoding tool to obtain the TB stream;
[0069] CRC check: Perform CRC check on the TB stream to detect whether there is bit flipping or data damage during transmission, and obtain the uplink CRC result.
[0070] In this embodiment, the uplink PUSCH channel is scheduled on a U time slot in a UD time slot ratio, with a maximum of 16 users scheduled in this time slot U. For PLUS PDUs with more than 8 users, LLR buffering is performed and waiting for decoding processing in the next D time slot. In this way, multiple uplink user PDUs can be processed simultaneously without causing uplink processing conflicts. That is, uplink and downlink processing can be carried out in parallel on the D time slot without interfering with each other.
[0071] Example 2
[0072] Figure 2 1 is a system diagram of a multi-user scheduling device based on a restricted channel decoder according to another exemplary embodiment, the device comprising:
[0073] Data sending module 1: used for the user equipment to send uplink service data to the eNB side through the uplink PUSCH channel;
[0074] Data packet number determination module 2: used for determining the number of user data packets in the current air interface timeslot after the eNB side receives uplink service data;
[0075] The first buffer module 3 is configured to send the user data packets to the first buffer area if the number of user data packets is less than or equal to the number of users x that can be processed in each time slot of the FECA decoder according to the result of the user data packet judgment;
[0076] The first CRC decompression module 4 is configured to perform CRC decompression on the user data packet in the first buffer area in the current air interface timeslot, obtain the uplink CRC result and TB flow of the first buffer area, and report the uplink CRC result and TB flow of the first buffer area;
[0077] The second buffer module 5 is configured to, based on the result of the user data packet determination, send x user data packets to the first buffer area and the remaining user data packets to the second buffer area if the number of user data packets is greater than the limit number of users that can be processed in each time slot of the FECA decoder, where the number of user data packets in the second buffer area is less than or equal to x;
[0078] The second CRC de-processing module 6 is used to perform CRC processing on the user data packets in the first cache area in the current air interface time slot to obtain the uplink CRC result and TB flow of the first cache area, and perform CRC processing on the user data packets in the second cache area in the next time slot of the current air interface time slot to obtain the uplink CRC result and TB flow of the second cache area; and report the uplink CRC results and TB flows of the first cache area and the second cache area separately.
[0079] Example 3:
[0080] This embodiment provides a storage medium, wherein the storage medium stores a computer program, and when the computer program is executed by a host controller, each step in the above method is implemented;
[0081] It is understandable that the storage medium mentioned above can be a read-only memory, a magnetic disk or an optical disk, etc.
[0082] It can be understood that the same or similar parts of the above embodiments can be referenced to each other, and the contents not described in detail in some embodiments can refer to the same or similar contents in other embodiments.
[0083] It should be noted that, in the description of the present invention, the terms "first", "second", etc. are used for descriptive purposes only and should not be understood as indicating or implying relative importance. In addition, in the description of the present invention, unless otherwise specified, the meaning of "plurality" is at least two.
[0084] Any process or method description in a flowchart or otherwise described herein may be understood to represent a module, segment or portion of code comprising one or more executable instructions for implementing the steps of a specific logical function or process, and the scope of the preferred embodiments of the present invention includes alternative implementations in which functions may be performed out of the order shown or discussed, including performing functions in a substantially simultaneous manner or in the reverse order depending on the functions involved, which should be understood by those skilled in the art to which the embodiments of the present invention pertain.
[0085] It should be understood that various parts of the present invention can be implemented using hardware, software, firmware, or a combination thereof. In the above-described embodiments, multiple steps or methods can be implemented using software or firmware stored in a memory and executed by a suitable instruction execution system. For example, if implemented using hardware, as in another embodiment, any one of the following technologies known in the art or a combination thereof can be used: a discrete logic circuit having a logic gate circuit for implementing a logic function on a data signal, an application-specific integrated circuit having a suitable combination of logic gate circuits, a programmable gate array (PGA), a field programmable gate array (FPGA), etc.
[0086] Those skilled in the art will understand that all or part of the steps in the method of the above embodiment can be completed by instructing related hardware through a program, and the program can be stored in a computer-readable storage medium. When the program is executed, it includes one or a combination of the steps of the method embodiment.
[0087] In addition, the functional units in the various embodiments of the present invention may be integrated into a single processing module, or each unit may exist physically separately, or two or more units may be integrated into a single module. The aforementioned integrated modules may be implemented in the form of hardware or in the form of software functional modules. If the integrated modules are implemented in the form of software functional modules and sold or used as independent products, they may also be stored in a computer-readable storage medium.
[0088] The storage medium mentioned above can be a read-only memory, a magnetic disk or an optical disk, etc.
[0089] Throughout this specification, reference to terms such as "one embodiment," "some embodiments," "examples," "specific examples," or "some examples" means that a specific feature, structure, material, or characteristic described in conjunction with that embodiment or example is included in at least one embodiment or example of the present invention. In this specification, schematic representations of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
[0090] Although the embodiments of the present invention have been shown and described above, it will be understood that the above embodiments are illustrative and are not to be construed as limitations on the present invention. A person skilled in the art may change, modify, replace and modify the above embodiments within the scope of the present invention.
Claims
1. A multi-user scheduling method based on a restricted channel decoder, characterized in that: The method comprises: The user equipment sends uplink service data to the eNB side through the uplink PUSCH channel; After receiving the uplink service data, the eNB side determines the number of user data packets in the current air interface time slot; According to the result of the user data packet judgment, if the number of user data packets is less than or equal to the limited number of users x processed by the FECA decoder in each time slot, the user data packets are sent to the first buffer area; Performing CRC processing on the user data packet of the first buffer area in the current air interface timeslot, obtaining the uplink CRC result and TB flow of the first buffer area, and reporting the uplink CRC result and TB flow of the first buffer area; According to the result of the user data packet determination, if the number of user data packets is greater than the limited number of users that can be processed in each time slot of the FECA decoder, x user data packets are sent to the first buffer area, and the remaining user data packets are sent to the second buffer area, where the number of user data packets in the second buffer area is less than or equal to x; The user data packets of the first buffer area are de-crc processed in the current air interface time slot to obtain the uplink CRC result and TB flow of the first buffer area; the user data packets of the second buffer area are de-crc processed in the next time slot of the current air interface time slot to obtain the uplink CRC result and TB flow of the second buffer area; the uplink CRC results and TB flow of the first buffer area and the second buffer area are reported separately.
2. The method according to claim 1, characterized in that Also includes: If the number of user data packets is less than or equal to the limited number of users x that can be processed per time slot of the FECA decoder, the first LLR sending address is configured; The first LLR sending address is used to send the user data packet to the first buffer area for buffering.
3. The method according to claim 2, characterized in that Also includes: If the number of user data packets is greater than the limited number of users that can be processed in each time slot of the FECA decoder, the first LLR sending address and the second LLR sending address are configured respectively; The first LLR sending address is used to send x user data packets to the first buffer area, and the second LLR sending address is used to send the remaining user data packets to the second buffer area. The maximum number of cached user data packets in the second buffer area is less than or equal to the limited number of processing users x per time slot of the FECA decoder.
4. The method according to claim 1, wherein The CRC solution processing includes: Performing time domain CP removal processing on the user data packet to obtain an accurate time domain signal; Performing FFT transformation on the accurate time domain signal to obtain a data frequency domain signal; Performing channel estimation on the data frequency domain signal to obtain a channel estimation result; Performing equalization processing on the data frequency domain signal according to the channel estimation result to obtain an equalization result; Using the equalization result and the channel estimation result, the demodulation software demodulates the soft bit information of the user data packet; Decoding the soft bit information by configuring a decoding tool to obtain a TB stream; Perform CRC check on the TB stream to obtain an uplink CRC result.
5. The method according to claim 4, characterized in that The performing channel estimation on the data frequency domain signal to obtain a channel estimation result includes: The SL algorithm is used to estimate the impact response experienced by the data frequency domain signal to obtain a channel estimation result.
6. The method according to claim 5, characterized in that The performing equalization processing on the data frequency domain signal according to the channel estimation result to obtain the equalization result includes: The data frequency domain signal is restored using a minimum mean square error method according to the channel estimation result to obtain an equalization result.
7. A multi-user scheduling device based on a restricted channel decoder, characterized in that: The device comprises: Data sending module: used by the user equipment to send uplink service data to the eNB side through the uplink PUSCH channel; Data packet number determination module: used for determining the number of user data packets in the current air interface timeslot after the eNB side receives uplink service data; The first buffer module is configured to send the user data packets to the first buffer area if the number of user data packets is less than or equal to the number of users x that can be processed in each time slot of the FECA decoder according to the result of the user data packet judgment; A first CRC decompression module is configured to perform CRC decompression on the user data packet in the first buffer area in the current air interface timeslot, obtain the uplink CRC result and TB flow of the first buffer area, and report the uplink CRC result and TB flow of the first buffer area; A second buffer module is configured to, based on a determination result of the user data packets, send x user data packets to the first buffer area and the remaining user data packets to the second buffer area if the number of user data packets is greater than the limit number of users that can be processed per time slot of the FECA decoder. The number of user data packets in the second buffer area is less than or equal to x. The second CRC decompression module is used to perform CRC decompression on the user data packets in the first buffer area in the current air interface time slot to obtain the uplink CRC result and TB flow of the first buffer area, and perform CRC decompression on the user data packets in the second buffer area in the next time slot of the current air interface time slot to obtain the uplink CRC result and TB flow of the second buffer area; and report the uplink CRC results and TB flow of the first buffer area and the second buffer area separately.
8. A storage medium, characterized in that: The storage medium stores a computer program, and when the computer program is executed by the main controller, each step of the multi-user scheduling method based on the restricted channel decoder according to any one of claims 1 to 6 is implemented.
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