A chip simulation verification method and device, electronic equipment and storage medium
By writing monitoring signals and timestamps into memory in the chip simulation platform and managing data using primary and backup partitions, and prioritizing the use of static random access memory, the problem of limited resources in the chip simulation platform is solved, and efficient performance analysis is achieved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- 格创通信(浙江)有限公司
- Filing Date
- 2024-12-16
- Publication Date
- 2026-07-07
AI Technical Summary
In existing technologies, chip simulation platforms suffer from low performance analysis efficiency when acquiring long-term signal waveforms due to limited server and hard drive resources, and require multiple acquisitions of short-term signal waveforms for offline analysis.
By acquiring monitoring signals in the simulation platform and writing the signal values and timestamps into the memory, the monitoring data is managed using the main partition and backup partition of the memory. Static random access memory is used first for data storage to reduce redundant data. The software platform directly analyzes the monitoring data to determine the chip performance status.
It improves the efficiency of chip performance analysis, reduces the utilization of server resources, avoids the signal waveform format conversion process, and enhances the efficiency of data storage and analysis.
Smart Images
Figure CN119294316B_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of chip simulation technology, and in particular to a chip simulation verification method, apparatus, electronic device and storage medium. Background Technology
[0002] As chip complexity continues to increase, after chip design, simulation platforms are typically used to simulate the chip's actual operating state in order to analyze its performance. In related technologies, simulation platforms running on servers input external stimuli to the simulated chip, generating signal waveforms. General-purpose signal analysis platforms then convert these waveforms into a recognizable format for chip performance analysis.
[0003] In the aforementioned chip performance analysis process, the simulation platform stores the acquired signal waveforms on the hard drive. The signal analysis platform uses server resources to convert the signal waveforms into a recognizable format. However, long-term signal waveforms require more server resources and larger-capacity hard drives. However, the limited resources of servers and hard drives prevent the simulation platform from acquiring long-term signal waveforms. Furthermore, when acquiring signal waveforms, the simulation platform needs to acquire short-term signal waveforms multiple times before offline analysis, which results in low efficiency in chip performance analysis. Summary of the Invention
[0004] The purpose of this application is to provide a chip simulation verification method, apparatus, electronic device, and storage medium to improve the efficiency of chip performance analysis. The specific technical solution is as follows:
[0005] In a first aspect of this application, a chip simulation verification method is provided, applied to a simulation platform, the method comprising:
[0006] The monitoring signal is input to the chip under test to obtain monitoring data describing the signal status of the chip under test during the current time period;
[0007] The signal values and timestamps contained in the monitoring data are written into the memory so that the software platform can read and analyze the monitoring data from the memory to determine the performance status of the chip to be monitored; wherein, each signal value corresponds to a timestamp, and the corresponding timestamp indicates the acquisition time of the signal value.
[0008] In one possible embodiment, writing the signal value and timestamp contained in the monitoring data into the memory includes:
[0009] For the first moment of the current time period, the timestamp representing that moment and the signal value at that moment are written into the memory;
[0010] For each moment in the current time period except the first moment, if the signal value in the monitoring data at that moment is different from the signal value at the previous moment, then the timestamp representing that moment and the signal value at that moment are written into the memory; if the signal value in the monitoring data at that moment is the same as the signal value at the previous moment, then the timestamp representing that moment and the signal value at that moment are not recorded.
[0011] In one possible embodiment, the memory includes a primary partition and a backup partition, and the step of writing the signal values and timestamps contained in the monitoring data into the memory includes:
[0012] Write the signal values and timestamps contained in the monitoring data into the main partition;
[0013] If the primary partition is full, the monitoring data that has not yet been written to the primary partition will continue to be written to the backup partition until the backup partition has 0 free storage space.
[0014] In one possible embodiment, if the memory is a static random access memory within the chip to be monitored, the storage space size of the static random access memory is related to at least one of the number of monitoring signals, the number of registers, the number of bits occupied by the timestamp describing the current time period, and the frequency of the clock signal; wherein, each register value stored in the register is used to describe the signal state of a set of monitoring signals.
[0015] In one possible embodiment, the memory includes a static random access memory within the chip to be monitored and an external memory outside the chip to be monitored. The step of writing the signal value and timestamp contained in the monitoring data into the memory includes:
[0016] The signal values and timestamps contained in the monitoring data are written into the static random access memory;
[0017] If the static random access memory (SRAM) is full, the monitoring data that has not yet been written to the SRAM will continue to be written to the external memory.
[0018] In a second aspect of this application, a chip simulation verification method is provided, applied to a software platform, the method comprising:
[0019] Read monitoring data describing the signal status of the chip to be monitored within the current time period from the memory; wherein, the monitoring data is obtained by the simulation platform after inputting the monitoring signal to the chip to be monitored, and the monitoring data includes signal value and timestamp, each signal value corresponds to a timestamp, and the corresponding timestamp indicates the acquisition time of the signal value;
[0020] The monitoring data is analyzed to determine the performance status of the chip to be monitored.
[0021] In one possible embodiment, reading monitoring data from the memory describing the signal state of the chip to be monitored within the current time period includes:
[0022] Read and remove monitoring data from memory that describes the signal status of the chip to be monitored during the current time period.
[0023] In a third aspect of this application, a chip simulation and verification apparatus is provided, applied to a simulation platform, the apparatus comprising:
[0024] The data acquisition module is used to input the monitoring signal into the chip to be monitored and acquire monitoring data describing the signal status of the chip to be monitored within the current time period.
[0025] The data writing module is used to write the signal values and timestamps contained in the monitoring data into the memory, so that the software platform can read and analyze the monitoring data from the memory to determine the performance status of the chip to be monitored; wherein, each signal value corresponds to a timestamp, and the corresponding timestamp indicates the acquisition time of the signal value.
[0026] In one possible embodiment, the data writing module is specifically used for:
[0027] For the first moment of the current time period, the timestamp representing that moment and the signal value at that moment are written into the memory;
[0028] For each moment in the current time period except the first moment, if the signal value in the monitoring data at that moment is different from the signal value at the previous moment, then the timestamp representing that moment and the signal value at that moment are written into the memory; if the signal value in the monitoring data at that moment is the same as the signal value at the previous moment, then the timestamp representing that moment and the signal value at that moment are not recorded.
[0029] In one possible embodiment, the memory includes a primary partition and a backup partition, and the data writing module is specifically used for:
[0030] Write the signal values and timestamps contained in the monitoring data into the main partition;
[0031] If the primary partition is full, the monitoring data that has not yet been written to the primary partition will continue to be written to the backup partition until the backup partition has 0 free storage space.
[0032] In one possible embodiment, if the memory is a static random access memory within the chip to be monitored, the storage space size of the static random access memory is related to at least one of the number of monitoring signals, the number of registers, the number of bits occupied by the timestamp describing the current time period, and the frequency of the clock signal; wherein, each register value stored in the register is used to describe the signal state of a set of monitoring signals.
[0033] In one possible embodiment, the memory includes a static random access memory within the chip to be monitored and an external memory outside the chip to be monitored, and the data writing module is specifically used for:
[0034] The signal values and timestamps contained in the monitoring data are written into the static random access memory;
[0035] If the static random access memory (SRAM) is full, the monitoring data that has not yet been written to the SRAM will continue to be written to the external memory.
[0036] In a fourth aspect of this application, a chip simulation and verification apparatus is provided, applied to a software platform, the apparatus comprising:
[0037] The data reading module is used to read monitoring data describing the signal status of the chip under monitoring within the current time period from the memory. The monitoring data is obtained by the simulation platform after inputting the monitoring signal to the chip under monitoring. The monitoring data includes signal values and timestamps. Each signal value corresponds to a timestamp, and the corresponding timestamp indicates the acquisition time of the signal value.
[0038] The data analysis module is used to analyze the monitoring data and determine the performance status of the chip to be monitored.
[0039] In one possible embodiment, the data reading module is specifically used for:
[0040] Read and remove monitoring data from memory that describes the signal status of the chip to be monitored during the current time period.
[0041] In a fifth aspect of the embodiments of this application, an electronic device is also provided, including a processor, a communication interface, a memory, and a communication bus, wherein the processor, the communication interface, and the memory communicate with each other through the communication bus;
[0042] Memory, used to store computer programs;
[0043] When a processor executes a program stored in memory, it implements the steps of the method described in either the first or second aspect above.
[0044] In another aspect of the embodiments of this application, a computer-readable storage medium is also provided, wherein a computer program is stored therein, and when the computer program is executed by a processor, it implements the method steps of either the first aspect or the second aspect described above.
[0045] Beneficial effects of the embodiments in this application:
[0046] The chip simulation verification method provided in this application involves a simulation platform that, when a monitoring signal is input to the chip under test, acquires monitoring data describing the signal state of the chip within the current time period, and writes the signal values and timestamps contained in the monitoring data into a memory. The software platform reads and analyzes the monitoring data from the memory to determine the performance state of the chip under test, thereby completing the chip performance analysis.
[0047] Furthermore, the monitoring data in this application has a different format from the signal waveforms in related technologies. The software platform can directly analyze the monitoring data, eliminating the need for the signal analysis platform in related technologies to convert the signal waveforms into a recognizable format, reducing the utilization of server resources, and improving the performance analysis efficiency of the chip.
[0048] Of course, implementing any product or method of this application does not necessarily require achieving all of the advantages described above at the same time. Attached Figure Description
[0049] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other embodiments can be obtained based on these drawings.
[0050] Figure 1 A flowchart illustrating the first chip simulation verification method provided in this application embodiment;
[0051] Figure 2 A flowchart illustrating the second chip simulation verification method provided in this application embodiment;
[0052] Figure 3 A flowchart illustrating the third chip simulation verification method provided in this application embodiment;
[0053] Figure 4 A schematic diagram of a primary partition and a backup partition provided for an embodiment of the application;
[0054] Figure 5 A flowchart illustrating the fourth chip simulation verification method provided in this application embodiment;
[0055] Figure 6A flowchart illustrating the fifth chip simulation verification method provided in this application embodiment;
[0056] Figure 7 A flowchart illustrating the sixth chip simulation verification method provided in this application embodiment;
[0057] Figure 8 This is a schematic diagram of the structure of the first chip simulation and verification device provided in the embodiments of this application;
[0058] Figure 9 This is a schematic diagram of the structure of the second chip simulation and verification device provided in the embodiments of this application;
[0059] Figure 10 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application. Detailed Implementation
[0060] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art based on this application are within the scope of protection of this application.
[0061] This application provides a chip simulation and verification method applied to a simulation platform. See [link to relevant documentation]. Figure 1 This is a flowchart illustrating the first chip simulation verification method provided in this application embodiment, the method including S101-S102.
[0062] S101, input the monitoring signal to the chip to be monitored, and obtain monitoring data describing the signal status of the chip to be monitored within the current time period.
[0063] In S101, the chip to be monitored may include multiple modules, each corresponding to a different monitoring signal. The signal status of the monitoring signal can reflect the working status or performance indicators of each module. For example, the monitoring signal corresponding to the message receiving module may be an experimental clock signal, a Counter, or a base signal, where Counter represents the number of received messages.
[0064] Before performing chip simulation verification, the signal paths of the monitored signals need to be set in the monitoring program. The monitoring program includes .tcl files and .sv / .v files. The .sv / .v files are the monitoring programs for a specific module of the chip to be monitored, and the .tcl files are instantiation instances provided by the .sv / .v files, defining the set of monitored signals.
[0065] For example, the performance status of the first module in the chip under monitoring is determined using the first .sv file and the first monitoring signal, and the performance status of the second module in the chip under monitoring is determined using the first .v file and the second monitoring signal. The .tcl file integrates the first .sv file and the first .v file together and defines a set of monitoring signals, which includes the first monitoring signal and the second monitoring signal.
[0066] S102, writes the signal value and timestamp contained in the monitoring data into the memory, so that the software platform can read and analyze the monitoring data from the memory to determine the performance status of the chip to be monitored.
[0067] Each signal value corresponds to a timestamp, which indicates the time when the signal value was acquired.
[0068] In S102, the monitoring data in the memory can be stored in the form of a data file, which is named after the timestamp of the deadline for writing the monitoring data.
[0069] The software platform is a program specifically designed to process monitoring data, which includes signal values and timestamps. The software platform may include a data acquisition unit, a data processing unit, and a data display unit.
[0070] The data acquisition unit reads monitoring data from the memory and stores it in the local memory, which can be DDR (Double Data Rate Synchronous Dynamic Random Access Memory). The data processing unit determines the signal value corresponding to each timestamp in the monitoring data. The data display module displays chip performance data graphically, such as line graphs and heat maps. Based on the displayed content, staff can determine the performance status of the chip under monitoring, such as memory rate, latency, and jitter.
[0071] For example, in a line graph, the horizontal axis represents the timestamp, the vertical axis represents the signal value, and the line represents the trend of the signal value at different times. In a heatmap, different color levels are mapped to different modules of the chip; darker colors represent higher temperatures or greater communication loads.
[0072] In addition, the software platform can run remotely on other devices, connect to the simulation platform via network or other connection methods, or run on the same server as the simulation platform.
[0073] Using the above embodiment, the simulation platform, when inputting a monitoring signal to the chip under test, acquires monitoring data describing the signal state of the chip within the current time period, and writes the signal values and timestamps contained in the monitoring data into a memory. The software platform reads and analyzes the monitoring data from the memory to determine the performance state of the chip under test, thereby completing the chip performance analysis.
[0074] Furthermore, the monitoring data in this application has a different format from the signal waveforms in related technologies. The software platform can directly analyze the monitoring data, eliminating the need for the signal analysis platform in related technologies to convert the signal waveforms into a recognizable format, reducing the utilization of server resources, and improving the performance analysis efficiency of the chip.
[0075] In one possible embodiment, see Figure 2 This is a flowchart illustrating the second chip simulation verification method provided in this application embodiment, which is consistent with the aforementioned... Figure 1 Compared to the embodiment shown, the above-described S102 can be implemented by S102A-S102B.
[0076] S102A: For the first moment of the current time period, write the timestamp representing that moment and the signal value of that moment into the memory.
[0077] For example, assuming the first moment of the current time period is t0, and the signal value at moment t0 is 1, then the timestamp representing moment t0 and the signal value 1 at that moment will be written into the memory.
[0078] S102B: For each moment in the current time period except the first moment, if the signal value in the monitoring data at that moment is different from the signal value at the previous moment, then the timestamp representing that moment and the signal value at that moment are written into the memory; if the signal value in the monitoring data at that moment is the same as the signal value at the previous moment, then the timestamp representing that moment and the signal value at that moment are not recorded; so that the software platform can read and analyze the monitoring data from the memory to determine the performance status of the chip to be monitored.
[0079] For example, suppose the signal value at time t0 is 1, the signal value at time t1 is 0, the signal value at time t2 is 0, the signal value at time t3 is 0, the signal value at time t4 is 1, the signal value at time t5 is 1, the signal value at time t6 is 1, the signal value at time t7 is 1, the signal value at time t8 is 1, and the signal value at time t9 is 0.
[0080] Since the signal value at time t1 is different from the signal value at time t0, the timestamp representing time t1 and the signal value 0 at that time are written into memory. Since the signal value at time t2 is the same as the signal value at time t1, the timestamp representing time t2 and the signal value 0 at time t2 are not recorded.
[0081] Similarly, the timestamp representing time t3 and the signal value 0 at time t3 are not recorded, nor are the timestamp representing time t4 and the signal value 0 at time t4.
[0082] Since the signal value at time t5 is different from the signal value at time t4, the timestamp representing time t5 and the signal value 1 at that time are written into memory. Since the signal value at time t6 is the same as the signal value at time t5, the timestamp representing time t6 and the signal value 1 at time t6 are not recorded.
[0083] Similarly, the timestamp representing time t7 and the signal value 1 representing time t7 are not recorded, nor are the timestamp representing time t8 and the signal value 1 representing time t8.
[0084] Since the signal value at time t9 is different from the signal value at time t8, the timestamp representing time t9 and the signal value 0 at that time are written into the memory.
[0085] The above process can be called incremental compression. The monitoring data before incremental compression is shown in Table 1, and the monitoring data after incremental compression is shown in Table 2.
[0086] See Table 1 for monitoring data before incremental compression provided in an embodiment of this application.
[0087] Table 1
[0088]
[0089] See Table 2 for an example of incrementally compressed monitoring data provided in this application embodiment.
[0090] Table 2
[0091]
[0092] Using the above embodiment, for the first moment of the current time period, the timestamp representing that moment and the signal value at that moment are written into the memory, so that the signal value collected at the first moment of the current time period can be stored. Since the signal value changes at a low frequency within a certain period of time, for each moment in the current time period other than the first moment, only when the signal value at that moment in the monitoring data is different from the signal value at the previous moment, the timestamp representing that moment and the signal value at that moment are written into the memory, which can greatly remove redundant data and improve the storage space utilization of the memory.
[0093] In one possible embodiment, the memory includes a primary partition and a backup partition, see [link to relevant documentation]. Figure 3 This is a flowchart illustrating the third chip simulation verification method provided in this application embodiment, which is consistent with the aforementioned... Figure 1Compared to the illustrated embodiment, the above-described S102 can be implemented by S102C and S102D.
[0094] S102C writes the signal values and timestamps contained in the monitoring data into the main partition.
[0095] In the S102C, the storage space of the primary partition is the same as that of the backup partition. After the simulation platform acquires monitoring data, it first writes the monitoring data to the primary partition until the primary partition's storage space is full.
[0096] S102D, when the main partition's storage space is full, continues to write monitoring data that has not yet been written to the main partition to the backup partition until the backup partition's free storage space is 0; so that the software platform can read and analyze the monitoring data from the memory to determine the performance status of the chip to be monitored.
[0097] In S102D, when the primary partition's storage space is full, the data write descriptor is switched to the backup partition, so that the monitoring data that has not been written to the primary partition can continue to be written to the backup partition. Here, the data write descriptor can be understood as an offset address.
[0098] Specifically, the address of each signal in memory = the offset address of the primary partition / backup partition + the offset address of the signal within this partition. By changing the offset address of the primary partition / backup partition, data can be written to the corresponding partition.
[0099] Furthermore, each partition can be further divided into two segments: a single segment and a register segment. Within the single segment, data in each memory space is arranged according to a defined signal. For example, SingleA stores the timestamp and signal value corresponding to signal A, SingleB stores the timestamp and signal value corresponding to signal B, and so on. Within the register segment, data in each memory space is arranged according to a defined register. For example, regA stores the timestamp and signal value corresponding to register A, regB stores the timestamp and signal value corresponding to register B, and so on. The signal values within each signal or register are arranged according to their timestamps.
[0100] See Figure 4 This is a schematic diagram of a primary partition and a backup partition provided in the application embodiment.
[0101] The white area represents the primary partition, and the gray area represents the backup partition. Each partition is divided into two segments: a single-signal segment and a register segment.
[0102] In the single signal segment of the primary partition, single signal segment A, single signal segment B, ..., single signal segment N correspond to signal A, signal B, ..., signal N, respectively. Single signal segment A stores the timestamp and signal value corresponding to signal A, single signal segment B stores the timestamp and signal value corresponding to signal B, and so on. Single signal segment N stores the timestamp and signal value corresponding to signal N. The signal values of single signal segment B are arranged according to the timestamp, where the signal value at time t0 is 1, the signal value at time t1 is 0, and the signal value at time tn is 1.
[0103] By using the above embodiment, the signal values and timestamps contained in the monitoring data are written to the primary partition. When the storage space of the partition is full, the data is written to the descriptor and switched to the backup partition. This can avoid the situation where the monitoring data in the backup partition also has problems when the primary partition is damaged.
[0104] In one possible embodiment, the memory includes static random access memory within the chip to be monitored and external memory outside the chip to be monitored, see [link to relevant documentation]. Figure 5 This is a flowchart illustrating the fourth chip simulation verification method provided in this application embodiment, which is consistent with the aforementioned... Figure 1 Compared to the illustrated embodiment, the above-described S102 can be implemented using S102E and S102F.
[0105] S102E writes the signal values and timestamps contained in the monitoring data into the static random access memory.
[0106] In the S102E, static random access memory is also known as SRAM (Static Random Access Memory). Compared with external memory, SRAM has faster read and write speeds and lower data transfer latency, making it suitable for storing data that needs to be accessed frequently. Therefore, the signal values and timestamps contained in the monitoring data are preferentially written into the static random access memory.
[0107] S102F, when the static random access memory (SRAM) is full, continues to write monitoring data that has not yet been written to SRAM into external memory; so that the software platform can read and analyze the monitoring data from the memory to determine the performance status of the chip under monitoring.
[0108] External storage devices can be hard drives, USB flash drives, or optical discs. Different external storage devices may have different storage capacities; for example, mechanical hard drives typically range from 500GB to 10TB, solid-state drives (SSDs) typically range from 120GB to 4TB, and USB flash drives typically range from 8GB to 1TB. Optical discs have relatively smaller capacities; for example, a CD-ROM has a capacity of 700MB.
[0109] Using the above embodiment, due to the fast read / write speed and low data transmission latency of SRAM, prioritizing the writing of signal values and timestamps contained in the monitoring data to static random access memory (SRAM) can accelerate the read / write speed of monitoring data, thereby improving the efficiency of chip simulation and verification. When the SRAM storage space is full, the monitoring data not yet written to SRAM is continued to be written to external memory. Since external memory has a larger storage space, it can prevent data loss due to insufficient storage space for monitoring data not yet written to SRAM.
[0110] In one possible embodiment, if the memory is a static random access memory within the chip to be monitored, the storage space size of the static random access memory is related to at least one of the following: the number of monitoring signals, the number of registers, the number of bits occupied by the timestamp describing the current time period, and the frequency of the clock signal; wherein, each register value stored in the register is used to describe the signal state of a set of monitoring signals.
[0111] Specifically, the storage space size of static random access memory can be calculated using the following formula.
[0112]
[0113] in, This indicates the size of the static random access memory (SRAM). Indicates the number of monitored signals. This indicates the number of bits used for the timestamp. Indicates the number of registers. This indicates the number of bits occupied by each register. This indicates the frequency of the clock signal.
[0114] Furthermore, since the static random access memory (SRAM) includes a primary partition and a backup partition, the final SRAM size is... Twice as much.
[0115] By selecting the above embodiments, a memory with suitable storage space can be selected based on at least one of the following: the number of monitored signals, the number of registers, the number of bits occupied by the timestamp describing the current time period, and the frequency of the clock signal, thereby avoiding waste of memory storage space.
[0116] This invention also provides a chip simulation and verification method, applied to a software platform, see [link to relevant documentation]. Figure 6 This is a flowchart illustrating the fifth chip simulation verification method provided in this application embodiment, which includes steps S601-S602.
[0117] S601, Read monitoring data describing the signal status of the chip to be monitored within the current time period from the memory;
[0118] The monitoring data is obtained by the simulation platform after inputting the monitoring signal to the chip under test. The monitoring data includes signal value and timestamp. Each signal value corresponds to a timestamp, and the corresponding timestamp indicates the acquisition time of the signal value.
[0119] S602 analyzes the monitoring data to determine the performance status of the chip under monitoring.
[0120] Using the above embodiment, the simulation platform, when inputting a monitoring signal to the chip under test, acquires monitoring data describing the signal state of the chip within the current time period, and writes the signal values and timestamps contained in the monitoring data into a memory. The software platform reads and analyzes the monitoring data from the memory to determine the performance state of the chip under test, thereby completing the chip performance analysis.
[0121] Furthermore, the monitoring data in this application has a different format from the signal waveforms in related technologies. The software platform can directly analyze the monitoring data, eliminating the need for the signal analysis platform in related technologies to convert the signal waveforms into a recognizable format, reducing the utilization of server resources, and improving the performance analysis efficiency of the chip.
[0122] In one possible embodiment, see Figure 7 This is a flowchart illustrating the sixth chip simulation verification method provided in this application embodiment, which is consistent with the aforementioned... Figure 6 Compared to the illustrated embodiment, the above-described S601 can be implemented using S601A.
[0123] S601A reads and removes monitoring data describing the signal status of the chip to be monitored during the current time period from the memory.
[0124] In S601, after the software platform reads the monitoring data describing the signal status of the chip to be monitored within the current time period from the memory, the monitoring data that has been read from the memory will be deleted, and the freed-up storage space will be used to store new monitoring data.
[0125] By using the above embodiments, the software platform can quickly read and remove monitoring data, resulting in a shorter time that the monitoring data remains in the memory and reducing the occupation of memory resources. Therefore, the simulation platform can reuse the memory with limited storage space to continuously store monitoring data collected over a long period of time, enabling the simulation platform to continuously acquire monitoring data over extended periods, thereby improving the efficiency of chip performance analysis.
[0126] Corresponding to the aforementioned chip simulation and verification method, this application also provides a chip simulation and verification apparatus, applied to a simulation platform, see [link to relevant documentation]. Figure 8This is a schematic diagram of the structure of the first chip simulation and verification device provided in the embodiments of this application. The device includes:
[0127] The data acquisition module 801 is used to input the monitoring signal into the chip to be monitored and acquire monitoring data describing the signal status of the chip to be monitored within the current time period.
[0128] The data writing module 802 is used to write the signal values and timestamps contained in the monitoring data into the memory, so that the software platform can read and analyze the monitoring data from the memory to determine the performance status of the chip to be monitored; wherein, each signal value corresponds to a timestamp, and the corresponding timestamp indicates the acquisition time of the signal value.
[0129] Using the above embodiment, the simulation platform, when inputting a monitoring signal to the chip under test, acquires monitoring data describing the signal state of the chip within the current time period, and writes the signal values and timestamps contained in the monitoring data into a memory. The software platform reads and analyzes the monitoring data from the memory to determine the performance state of the chip under test, thereby completing the chip performance analysis.
[0130] Furthermore, the monitoring data in this application has a different format from the signal waveforms in related technologies. The software platform can directly analyze the monitoring data, eliminating the need for the signal analysis platform in related technologies to convert the signal waveforms into a recognizable format, reducing the utilization of server resources, and improving the performance analysis efficiency of the chip.
[0131] In one possible embodiment, the data writing module 802 is specifically used for:
[0132] For the first moment of the current time period, the timestamp representing that moment and the signal value at that moment are written into the memory;
[0133] For each moment in the current time period except the first moment, if the signal value in the monitoring data at that moment is different from the signal value at the previous moment, then the timestamp representing that moment and the signal value at that moment are written into the memory; if the signal value in the monitoring data at that moment is the same as the signal value at the previous moment, then the timestamp representing that moment and the signal value at that moment are not recorded.
[0134] Using the above embodiment, for the first moment of the current time period, the timestamp representing that moment and the signal value at that moment are written into the memory, so that the signal value collected at the first moment of the current time period can be stored. Since the signal value changes at a low frequency within a certain period of time, for each moment in the current time period other than the first moment, only when the signal value at that moment in the monitoring data is different from the signal value at the previous moment, the timestamp representing that moment and the signal value at that moment are written into the memory, which can greatly remove redundant data and improve the storage space utilization of the memory.
[0135] In one possible embodiment, the memory includes a primary partition and a secondary partition, and the data writing module 802 is specifically used for:
[0136] Write the signal values and timestamps contained in the monitoring data to the main partition;
[0137] If the primary partition is full, the monitoring data that has not yet been written to the primary partition will continue to be written to the backup partition until the backup partition has 0 free storage space.
[0138] By using the above embodiment, the signal values and timestamps contained in the monitoring data are written to the primary partition. When the storage space of the partition is full, the data is written to the descriptor and switched to the backup partition. This can avoid the situation where the monitoring data in the backup partition also has problems when the primary partition is damaged.
[0139] In one possible embodiment, if the memory is a static random access memory within the chip to be monitored, the storage space size of the static random access memory is related to at least one of the following: the number of monitoring signals, the number of registers, the number of bits occupied by the timestamp describing the current time period, and the frequency of the clock signal; wherein, each register value stored in the register is used to describe the signal state of a set of monitoring signals.
[0140] By selecting the above embodiments, a memory with suitable storage space can be selected based on at least one of the following: the number of monitored signals, the number of registers, the number of bits occupied by the timestamp describing the current time period, and the frequency of the clock signal, thereby avoiding waste of memory storage space.
[0141] In one possible embodiment, the memory includes a static random access memory within the chip to be monitored and an external memory outside the chip to be monitored. The data writing module 802 is specifically used for:
[0142] Write the signal values and timestamps contained in the monitoring data into static random access memory;
[0143] If the static random access memory (SRAM) is full, the monitoring data that has not yet been written to SRAM will continue to be written to the external memory.
[0144] Using the above embodiment, due to the fast read / write speed and low data transmission latency of SRAM, prioritizing the writing of signal values and timestamps contained in the monitoring data to static random access memory (SRAM) can accelerate the read / write speed of monitoring data, thereby improving the efficiency of chip simulation and verification. When the SRAM storage space is full, the monitoring data not yet written to SRAM is continued to be written to external memory. Since external memory has a larger storage space, it can prevent data loss due to insufficient storage space for monitoring data not yet written to SRAM.
[0145] Corresponding to the aforementioned chip simulation and verification method, this application also provides a chip simulation and verification device applied to a software platform. See [link to relevant documentation]. Figure 9 This is a schematic diagram of the structure of a second type of chip simulation and verification device provided in this application embodiment. The device includes:
[0146] The data reading module 901 is used to read monitoring data describing the signal status of the chip under monitoring within the current time period from the memory. The monitoring data is obtained by the simulation platform after inputting the monitoring signal to the chip under monitoring. The monitoring data includes signal value and timestamp. Each signal value corresponds to a timestamp, and the corresponding timestamp indicates the acquisition time of the signal value.
[0147] The data analysis module 902 is used to analyze the monitoring data and determine the performance status of the chip to be monitored.
[0148] Using the above embodiment, the simulation platform, when inputting a monitoring signal to the chip under test, acquires monitoring data describing the signal state of the chip within the current time period, and writes the signal values and timestamps contained in the monitoring data into a memory. The software platform reads and analyzes the monitoring data from the memory to determine the performance state of the chip under test, thereby completing the chip performance analysis.
[0149] Furthermore, the monitoring data in this application has a different format from the signal waveforms in related technologies. The software platform can directly analyze the monitoring data, eliminating the need for the signal analysis platform in related technologies to convert the signal waveforms into a recognizable format, reducing the utilization of server resources, and improving the performance analysis efficiency of the chip.
[0150] In one possible embodiment, the data reading module 901 is specifically used for:
[0151] Read and remove monitoring data from memory that describes the signal status of the chip to be monitored during the current time period.
[0152] By using the above embodiments, the software platform can quickly read and remove monitoring data, resulting in a shorter time that the monitoring data remains in the memory and reducing the occupation of memory resources. Therefore, the simulation platform can reuse the memory with limited storage space to continuously store monitoring data collected over a long period of time, enabling the simulation platform to continuously acquire monitoring data over extended periods, thereby improving the efficiency of chip performance analysis.
[0153] This application also provides an electronic device, such as... Figure 10 As shown, it includes a processor 1001, a communication interface 1002, a memory 1003, and a communication bus 1004, wherein the processor 1001, the communication interface 1002, and the memory 1003 communicate with each other through the communication bus 1004.
[0154] Memory 1003 is used to store computer programs;
[0155] When the processor 1001 executes the program stored in the memory 1003, it implements any of the method steps of the chip simulation verification method described above.
[0156] Using the above embodiment, the simulation platform, when inputting a monitoring signal to the chip under test, acquires monitoring data describing the signal state of the chip within the current time period, and writes the signal values and timestamps contained in the monitoring data into a memory. The software platform reads and analyzes the monitoring data from the memory to determine the performance state of the chip under test, thereby completing the chip performance analysis.
[0157] Furthermore, the monitoring data in this application has a different format from the signal waveforms in related technologies. The software platform can directly analyze the monitoring data, eliminating the need for the signal analysis platform in related technologies to convert the signal waveforms into a recognizable format, reducing the utilization of server resources, and improving the performance analysis efficiency of the chip.
[0158] The communication bus mentioned in the above electronic devices can be a Peripheral Component Interconnect (PCI) bus or an Extended Industry Standard Architecture (EISA) bus, etc. This communication bus can be divided into address bus, data bus, control bus, etc. For ease of illustration, only one thick line is used to represent it in the diagram, but this does not mean that there is only one bus or one type of bus.
[0159] The communication interface is used for communication between the aforementioned electronic devices and other devices.
[0160] The memory may include random access memory (RAM) or non-volatile memory (NVM), such as at least one disk storage device. Optionally, the memory may also be at least one storage device located remotely from the aforementioned processor.
[0161] The processors mentioned above can be general-purpose processors, including central processing units (CPUs), network processors (NPs), etc.; they can also be digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware components.
[0162] In another embodiment provided in this application, a computer-readable storage medium is also provided, which stores a computer program that, when executed by a processor, implements the steps of any of the above-described chip simulation verification methods.
[0163] Using the above embodiment, the simulation platform, when inputting a monitoring signal to the chip under test, acquires monitoring data describing the signal state of the chip within the current time period, and writes the signal values and timestamps contained in the monitoring data into a memory. The software platform reads and analyzes the monitoring data from the memory to determine the performance state of the chip under test, thereby completing the chip performance analysis.
[0164] Furthermore, the monitoring data in this application has a different format from the signal waveforms in related technologies. The software platform can directly analyze the monitoring data, eliminating the need for the signal analysis platform in related technologies to convert the signal waveforms into a recognizable format, reducing the utilization of server resources, and improving the performance analysis efficiency of the chip.
[0165] In another embodiment provided in this application, a computer program product containing instructions is also provided, which, when run on a computer, causes the computer to execute any of the chip simulation verification methods described in the above embodiments.
[0166] Using the above embodiment, the simulation platform, when inputting a monitoring signal to the chip under test, acquires monitoring data describing the signal state of the chip within the current time period, and writes the signal values and timestamps contained in the monitoring data into a memory. The software platform reads and analyzes the monitoring data from the memory to determine the performance state of the chip under test, thereby completing the chip performance analysis.
[0167] Furthermore, the monitoring data in this application has a different format from the signal waveforms in related technologies. The software platform can directly analyze the monitoring data, eliminating the need for the signal analysis platform in related technologies to convert the signal waveforms into a recognizable format, reducing the utilization of server resources, and improving the performance analysis efficiency of the chip.
[0168] In the above embodiments, implementation can be achieved entirely or partially through software, hardware, firmware, or any combination thereof. When implemented using software, it can be implemented entirely or partially as a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, all or part of the processes or functions described in the embodiments of this application are generated. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, the computer instructions can be transmitted from one website, computer, server, or data center to another website, computer, server, or data center via wired (e.g., coaxial cable, fiber optic, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) means. The computer-readable storage medium can be any available medium that a computer can access or a data storage device such as a server or data center that integrates one or more available media. The available medium can be a magnetic medium (e.g., floppy disk, hard disk, magnetic tape), an optical medium (e.g., DVD), or a semiconductor medium (e.g., solid state disk (SSD)).
[0169] It should be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.
[0170] The various embodiments in this specification are described in a related manner. Similar or identical parts between embodiments can be referred to mutually. Each embodiment focuses on its differences from other embodiments. In particular, the embodiments for apparatus, electronic devices, and storage media are basically similar to the method embodiments, so the descriptions are relatively simple; relevant parts can be referred to the descriptions of the method embodiments.
[0171] The above description is merely a preferred embodiment of this application and is not intended to limit the scope of protection of this application. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application are included within the scope of protection of this application.
Claims
1. A chip simulation and verification method, characterized in that, Applied to a simulation platform, the method includes: The monitoring signal is input to the chip under test to obtain monitoring data describing the signal status of the chip under test in the current time period. The chip under test includes multiple modules, and different modules correspond to different monitoring signals. The signal status of the monitoring signal is used to reflect the working status or performance indicators of each module. For the first moment of the current time period, the timestamp representing that moment and the signal value of that moment in the monitoring data are written into the memory. For each moment in the current time period other than the first moment, if the signal value of that moment in the monitoring data is different from the signal value of the previous moment, the timestamp representing that moment and the signal value of that moment in the monitoring data are written into the memory. If the signal value of that moment in the monitoring data is the same as the signal value of the previous moment, the timestamp representing that moment and the signal value of that moment are not recorded, so that the software platform can read and analyze the monitoring data from the memory to determine the performance status of the chip under monitoring. Each signal value corresponds to a timestamp, and the corresponding timestamp represents the acquisition time of the signal value. The software platform is a program used to process the monitoring data. If the memory is a static random access memory (SRAM) within the chip to be monitored, the storage space size of the SRAM is calculated using the following formula: ； in, This indicates the size of the static random access memory (SRAM). Indicates the number of monitored signals. This indicates the number of bits used for the timestamp. Indicates the number of registers. This indicates the number of bits occupied by each register. The register represents the frequency of the clock signal; each register value stored in the register is used to describe the signal state of a set of monitored signals.
2. The method according to claim 1, characterized in that, The memory includes a primary partition and a backup partition. The step of writing the timestamp representing the current moment and the signal value at that moment from the monitoring data into the memory includes: Write the signal values and timestamps contained in the monitoring data into the main partition; If the primary partition is full, the monitoring data that has not yet been written to the primary partition will continue to be written to the backup partition until the backup partition has 0 free storage space.
3. The method according to claim 1, characterized in that, The memory includes a static random access memory within the chip to be monitored and an external memory outside the chip to be monitored. The step of writing the timestamp representing the current moment and the signal value at that moment from the monitoring data into the memory includes: The signal values and timestamps contained in the monitoring data are written into the static random access memory; If the static random access memory (SRAM) is full, the monitoring data that has not yet been written to the SRAM will continue to be written to the external memory.
4. A chip simulation and verification method, characterized in that, Applied to a software platform, wherein the software platform is a program for processing monitoring data, the method includes: The monitoring data describing the signal status of the chip under monitoring during the current time period is read from the memory. The monitoring data is obtained by the simulation platform after inputting the monitoring signal to the chip under monitoring. The monitoring data includes signal value and timestamp. Each signal value corresponds to a timestamp, and the corresponding timestamp indicates the acquisition time of the signal value. The chip under monitoring includes multiple modules, and different modules correspond to different monitoring signals. The signal status of the monitoring signal is used to reflect the working status or performance indicators of each module. The monitoring data is analyzed to determine the performance status of the chip under monitoring; The monitoring data describing the signal state of the chip under monitoring during the current time period is written to the memory by the simulation platform in the following manner: For the first moment of the current time period, the timestamp representing that moment and the signal value of that moment in the monitoring data are written into the memory; for each moment in the current time period other than the first moment, if the signal value of that moment in the monitoring data is different from the signal value of the previous moment, the timestamp representing that moment and the signal value of that moment in the monitoring data are written into the memory; if the signal value of that moment in the monitoring data is the same as the signal value of the previous moment, the timestamp representing that moment and the signal value of that moment are not recorded. If the memory is a static random access memory (SRAM) within the chip to be monitored, the storage space size of the SRAM is calculated using the following formula: ； in, This indicates the size of the static random access memory (SRAM). Indicates the number of monitored signals. This indicates the number of bits used for the timestamp. Indicates the number of registers. This indicates the number of bits occupied by each register. The register represents the frequency of the clock signal; each register value stored in the register is used to describe the signal state of a set of monitored signals.
5. The method according to claim 4, characterized in that, The step of reading monitoring data from the memory that describes the signal status of the chip to be monitored within the current time period includes: Read and remove monitoring data from memory that describes the signal status of the chip to be monitored during the current time period.
6. A chip simulation and verification device, characterized in that, The device, used in a simulation platform, includes: The data acquisition module is used to input the monitoring signal into the chip to be monitored and acquire monitoring data describing the signal status of the chip to be monitored within the current time period. The chip to be monitored includes multiple modules, and different modules correspond to different monitoring signals. The signal status of the monitoring signal is used to reflect the working status or performance indicators of each module. The data writing module is used to write the signal values and timestamps contained in the monitoring data into the memory, so that the software platform can read and analyze the monitoring data from the memory to determine the performance status of the chip to be monitored; wherein, each signal value corresponds to a timestamp, and the corresponding timestamp indicates the acquisition time of the signal value; The data writing module is specifically used for: For the first moment of the current time period, the timestamp representing that moment and the signal value of that moment in the monitoring data are written into the memory; for each moment in the current time period other than the first moment, if the signal value of that moment in the monitoring data is different from the signal value of the previous moment, the timestamp representing that moment and the signal value of that moment in the monitoring data are written into the memory; if the signal value of that moment in the monitoring data is the same as the signal value of the previous moment, the timestamp representing that moment and the signal value of that moment are not recorded. If the memory is a static random access memory (SRAM) within the chip to be monitored, the storage space size of the SRAM is calculated using the following formula: ； in, This indicates the size of the static random access memory (SRAM). Indicates the number of monitored signals. This indicates the number of bits used for the timestamp. Indicates the number of registers. This indicates the number of bits occupied by each register. The register represents the frequency of the clock signal; each register value stored in the register is used to describe the signal state of a set of monitored signals.
7. A chip simulation and verification device, characterized in that, Applied to a software platform, the device includes: The data reading module is used to read monitoring data describing the signal status of the chip under monitoring within the current time period from the memory. The monitoring data is obtained by the simulation platform after inputting the monitoring signal to the chip under monitoring. The monitoring data includes signal values and timestamps. Each signal value corresponds to a timestamp, which indicates the acquisition time of the signal value. The chip under monitoring includes multiple modules, and different modules correspond to different monitoring signals. The signal status of the monitoring signals is used to reflect the working status or performance indicators of each module. The data analysis module is used to analyze the monitoring data and determine the performance status of the chip to be monitored. The monitoring data describing the signal state of the chip under monitoring during the current time period is written to the memory by the simulation platform in the following manner: For the first moment of the current time period, the timestamp representing that moment and the signal value of that moment in the monitoring data are written into the memory; for each moment in the current time period other than the first moment, if the signal value of that moment in the monitoring data is different from the signal value of the previous moment, the timestamp representing that moment and the signal value of that moment are written into the memory; if the signal value of that moment in the monitoring data is the same as the signal value of the previous moment, the timestamp representing that moment and the signal value of that moment are not recorded. If the memory is a static random access memory (SRAM) within the chip to be monitored, the storage space size of the SRAM is calculated using the following formula: ； in, This indicates the size of the static random access memory (SRAM). Indicates the number of monitored signals. This indicates the number of bits used for the timestamp. Indicates the number of registers. This indicates the number of bits occupied by each register. The register represents the frequency of the clock signal; each register value stored in the register is used to describe the signal state of a set of monitored signals.
8. An electronic device, characterized in that, It includes a processor, a communication interface, a memory, and a communication bus, wherein the processor, the communication interface, and the memory communicate with each other through the communication bus; Memory, used to store computer programs; A processor, when executing a program stored in memory, implements the steps of the method described in any one of claims 1-3 or 4-5.
9. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program that, when executed by a processor, implements the steps of the method described in any one of claims 1-3 or 4-5.