Pixel driving circuit and control method thereof, and display device

Abstract

The present application is applicable to the field of display technology, and provides a pixel driving circuit and a control method thereof, and a display device. The pixel driving circuit includes: an adjustment subcircuit, a driving subcircuit, a compensation subcircuit, a driving control subcircuit, a first reset subcircuit, a second reset subcircuit, a first light-emitting control subcircuit, a second light-emitting control subcircuit, and a storage subcircuit. The pixel driving circuit of the present application compensates for the leakage current of the first node during the data writing phase, so that the driving transistor continuously generates a driving current during the light-emitting phase, so that the display device using the pixel driving circuit has good brightness effect, good light-emitting effect, and better performance.

Description

Technical Field

[0001] The present application belongs to the field of display technology, and in particular relates to a pixel driving circuit and a control method thereof, and a display device. Background Art

[0002] Organic Light Emitting Diode (OLED) display devices have the advantages of self-luminescence, high contrast, wide color gamut and wide operating temperature range, and have gradually been widely studied and applied. The brightness of OLED display devices is related to the amount of current flowing through, especially the driving current generated by the driving transistor in the pixel driving circuit.

[0003] Currently, process deviations often occur during the manufacturing process of driving transistors, which makes it difficult to manufacture driving transistors that are completely identical. As a result, there are differences in the threshold voltages of driving transistors used in pixel driving circuits. Moreover, due to factors such as extended working time and changes in the use environment, the threshold voltage of the driving transistor will also drift. These will affect the driving current of the driving transistor, causing brightness problems such as increased brightness and brightness flickering in OLED display devices, which seriously affects the performance of the display device.

[0004] Therefore, it is urgent to provide a new pixel driving circuit to solve the above problems. Summary of the invention

[0005] In view of this, an embodiment of the present application provides a pixel driving circuit and a control method thereof, and a display device. The pixel driving circuit compensates for the leakage current of the first node in the data writing stage, so that the driving transistor continues to generate a driving current in the light-emitting stage, so that the display device using the pixel driving circuit has good brightness effect, good light-emitting effect, and better performance.

[0006] A first aspect of an embodiment of the present application provides a pixel driving circuit, including:

[0007] an adjustment subcircuit, electrically connected to the voltage control signal line, the second scan signal line, the first node and the power supply voltage line, and configured to compensate for the leakage current of the first node under the common control of the voltage control signal of the voltage control signal line and the scan signal of the second scan signal line during the data writing phase;

[0008] a driving subcircuit, electrically connected to the first node, the second node and the third node, and configured to conduct a path between the second node and the third node under the control of the voltage of the first node, so that a current for making the light-emitting element emit light is generated in the path, and the current is continuously generated in the light-emitting stage;

[0009] a compensation subcircuit, electrically connected to the second scan signal line, the first node and the third node, and configured to conduct a path between the first node and the third node under the control of a scan signal of the second scan signal line;

[0010] a drive control subcircuit, electrically connected to the second scan signal line, the data signal line and the second node, and configured to write the data signal of the data signal line into the second node under the control of the scan signal of the second scan signal line;

[0011] a first reset subcircuit and a second reset subcircuit, wherein the first reset subcircuit is electrically connected to the first scan signal line, the initial signal line and the first node, and is configured to reset the first node by the initial signal of the initial signal line under the control of the scan signal of the first scan signal line; and the second reset subcircuit is electrically connected to the second scan signal line, the reset signal line and the anode of the light emitting element, and is configured to reset the anode by the reset signal of the reset signal line under the control of the scan signal of the second scan signal line;

[0012] a first light-emitting control subcircuit and a second light-emitting control subcircuit, wherein the first light-emitting control subcircuit is electrically connected to a light-emitting control signal line, the power supply voltage line and the second node, and the second light-emitting control subcircuit is electrically connected to the light-emitting control signal line, the third node and the anode, and the first light-emitting control subcircuit and the second light-emitting control subcircuit are respectively configured to transmit a current for causing the light-emitting element to emit light to the anode under the control of a light-emitting control signal of the light-emitting control signal line;

[0013] The storage sub-circuit is electrically connected to the power supply voltage line and the first node, and is configured to maintain the voltage of the first node.

[0014] In one embodiment, the adjustment subcircuit includes a light-sensing capacitor and a dual-gate transistor;

[0015] The first electrode of the photosensitive capacitor is electrically connected to the voltage control signal line, and the second electrode is electrically connected to the first control electrode of the dual-gate transistor;

[0016] The second control electrode of the dual-gate transistor is electrically connected to the second scanning signal line, the first electrode is electrically connected to the power supply voltage line, and the second electrode is electrically connected to the first node.

[0017] In one embodiment, the driving subcircuit includes a driving transistor;

[0018] The control electrode of the driving transistor is electrically connected to the first node, the first electrode is electrically connected to the second node, and the second electrode is electrically connected to the third node.

[0019] In one embodiment, the compensation subcircuit comprises a fifth transistor;

[0020] The control electrode of the fifth transistor is electrically connected to the second scanning signal line, the first electrode is electrically connected to the third node, and the second electrode is electrically connected to the first node.

[0021] In one embodiment, the drive control subcircuit includes a sixth transistor;

[0022] The control electrode of the sixth transistor is electrically connected to the second scanning signal line, the first electrode is electrically connected to the data signal line, and the second electrode is electrically connected to the second node.

[0023] In one embodiment, the first reset subcircuit comprises a first transistor, a control electrode of the first transistor is electrically connected to the first scan signal line, a first electrode is electrically connected to the initial signal line, and a second electrode is electrically connected to the first node;

[0024] The second reset subcircuit includes a second transistor, wherein a control electrode of the second transistor is electrically connected to the second scanning signal line, a first electrode is electrically connected to the reset signal line, and a second electrode is electrically connected to the anode.

[0025] In one embodiment, the first light emitting control subcircuit comprises a third transistor, wherein a control electrode of the third transistor is electrically connected to the light emitting control signal line, a first electrode is electrically connected to the power supply voltage line, and a second electrode is electrically connected to the second node;

[0026] The second light emitting control subcircuit includes a fourth transistor, wherein a control electrode of the fourth transistor is electrically connected to the light emitting control signal line, a first electrode is electrically connected to the third node, and a second electrode is electrically connected to the anode.

[0027] In one embodiment, the storage subcircuit includes a storage capacitor;

[0028] A first electrode of the storage capacitor is electrically connected to the power supply voltage line, and a second electrode of the storage capacitor is electrically connected to the first node.

[0029] A second aspect of an embodiment of the present application provides a display device, comprising a plurality of pixel units arranged in an array and the above-mentioned pixel driving circuit, wherein the pixel driving circuit is electrically connected to the plurality of pixel units and is configured to control the plurality of pixel units.

[0030] A third aspect of the embodiments of the present application provides a control method for controlling the above-mentioned pixel driving circuit, the control method comprising:

[0031] In a frame display picture cycle, a frame display picture is displayed through a reset phase, a data writing phase and a light emitting phase.

[0032] The pixel driving circuit provided in the first aspect of the embodiment of the present application can compensate for the leakage current of the first node in the data writing stage by setting an adjustment subcircuit as a compensation subcircuit, so that the potential of the first node changes as little as possible or even does not change, so that the control electrode potential of the driving transistor is relatively stable, and the driving transistor continues to generate a driving current in the light-emitting stage, and controls the brightness of the light-emitting element to change as little as possible or even does not change, thereby effectively reducing the problems of brightness increase and brightness flicker of the display device using the pixel driving circuit, thereby making the display device have good brightness effect, good light-emitting effect, and better performance.

[0033] The third aspect of the embodiment of the present application provides a control method for a pixel driving circuit. When the ambient light changes, the amount of charge in the photosensitive capacitor changes during the data writing stage, which drives the current of the dual-gate transistor to change. Then, during the data writing stage, electric fields in opposite directions are formed between the first electrode and the second electrode of the dual-gate transistor, which have opposite effects on holes and electrons. Under the action of the two electric fields, the electron flow rate in the dual-gate transistor is faster, the number of electrons attracted is more, and the on-state current is larger, thereby compensating for the leakage current of the first node caused by light or long-term charging, so that the driving transistor continues to generate a driving current during the light-emitting stage, and controls the brightness of the light-emitting element to change as little as possible. At the same time, the pixel driving circuit can drive the light-emitting element to emit light, and the timing is simple and easy to implement.

[0034] It can be understood that the beneficial effects of the second aspect mentioned above can be found in the relevant descriptions of the first and third aspects mentioned above, and will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

[0036] Figure 1 A schematic diagram of a pixel driving circuit provided in an embodiment of the present application;

[0037] Figure 2 A schematic diagram of the structure of a dual-gate transistor provided in an embodiment of the present application;

[0038] Figure 3 A schematic diagram of the structure of an adjustment subcircuit composed of a dual-gate transistor and a storage capacitor provided in an embodiment of the present application;

[0039] Figure 4A schematic diagram of a control method for a pixel driving circuit provided in an embodiment of the present application;

[0040] Figure 5 A schematic diagram of a current of a first node before and after compensation provided in an embodiment of the present application;

[0041] Figure 6 A driving timing diagram of a pixel driving circuit provided in an embodiment of the present application;

[0042] Figure 7-Figure 9 for Figure 1 The pixel driving circuit is Figure 6 Schematic diagram of driving principle under driving timing.

[0043] Figure Number:

[0044] 1-adjustment subcircuit, 2-driving subcircuit, 3-compensation subcircuit, 4-driving control subcircuit, 51-first reset subcircuit, 52-second reset subcircuit, 61-first light-emitting control subcircuit, 62-second light-emitting control subcircuit, 7-storage subcircuit, 81-first gate, 82-second gate, 91-first insulating layer, 92-second insulating layer, 10-active layer, 11-source, 12-drain, 13-holes, 14-electrons, 15-negative ions, 16-first passivation layer, 17-substrate , 18-second passivation layer, 19-photosensitive material layer, 20-pixel electrode layer, N1-first node, N2-second node, N3-third node, N4-fourth node, HV-voltage control signal line, Scan2-second scanning signal line, PVDD-power supply voltage line, DATA-data signal line, Scan1-first scanning signal line, Vint-initial signal line, Vreset-reset signal line, EMIT-light emitting control signal line, PVEE-ground terminal, C1-photosensitive capacitor, I 1 - Current before first node compensation, I 2 -current after compensation at the first node, T1-first transistor, T2-second transistor, T3-third transistor, T4-fourth transistor, T5-fifth transistor, T6-sixth transistor, T7-dual-gate transistor, DT-driving transistor. DETAILED DESCRIPTION

[0045] In order to enable those skilled in the art to better understand the solution of the present application, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of this application.

[0046] The term "comprising" and any variations thereof in the specification and claims of the present application and the above-mentioned drawings are intended to cover non-exclusive inclusions. For example, a process, method or system, product or apparatus comprising a series of steps or units is not limited to the listed steps or units, but optionally also includes unlisted steps or units, or optionally also includes other steps or units inherent to these processes, methods, products or apparatuses.

[0047] In the embodiments of the present application, words such as "first", "second", "fourth", "fifth", and "sixth" are used to distinguish between identical or similar items with basically the same functions and effects. This is only for the purpose of clearly describing the technical solutions of the embodiments of the present application and shall not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features.

[0048] In the embodiment of the present application, the gate of the transistor and the source follower is called the control electrode, one of the source and the drain is called the first electrode, and the other is called the second electrode. In the embodiment of the present application, the first electrode of the source follower and all transistors is called the source electrode, and the second electrode is called the drain electrode.

[0049] In the embodiments of the present application, the term “electrically connected” may refer to a direct electrical connection between two components, or may refer to an electrical connection between two components via one or more other components.

[0050] Embodiment 1

[0051] The present application embodiment provides a pixel driving circuit, referring to Figure 1 As shown, the pixel driving circuit includes:

[0052] The adjustment sub-circuit 1 is electrically connected to the voltage control signal line HV, the second scanning signal line Scan2, the first node N1 and the power supply voltage line PVDD, and is configured to compensate for the leakage current of the first node N1 under the joint control of the voltage control signal of the voltage control signal line HV and the scanning signal of the second scanning signal line Scan2 during the data writing phase.

[0053] The driving subcircuit 2 is electrically connected to the first node N1, the second node N2 and the third node N3, and is configured to turn on the path between the second node N2 and the third node N3 under the control of the voltage of the first node N1, so that a current is generated in the path for making the light-emitting element emit light, and the current is continuously generated during the light-emitting stage.

[0054] The compensation sub-circuit 3 is electrically connected to the second scan signal line Scan2, the first node N1 and the third node N3, and is configured to conduct the path between the first node N1 and the third node N3 under the control of the scan signal of the second scan signal line Scan2.

[0055] The drive control subcircuit 4 is electrically connected to the second scan signal line Scan2, the data signal line DATA and the second node N2, and is configured to write the data signal of the data signal line DATA into the second node N2 under the control of the scan signal of the second scan signal line Scan2.

[0056] The first reset subcircuit 51 and the second reset subcircuit 52, the first reset subcircuit 51 is electrically connected to the first scanning signal line Scan1, the initial signal line Vint and the first node N1, and is configured to reset the first node N1 through the initial signal of the initial signal line Vint under the control of the scanning signal of the first scanning signal line Scan1; the second reset subcircuit 52 is electrically connected to the second scanning signal line Scan2, the reset signal line Vreset and the anode of the light-emitting element, and is configured to reset the anode through the reset signal of the reset signal line Vreset under the control of the scanning signal of the second scanning signal line Scan2.

[0057] The first light-emitting control subcircuit 61 and the second light-emitting control subcircuit 62, the first light-emitting control subcircuit 61 is electrically connected to the light-emitting control signal line EMIT, the power supply voltage line PVDD and the second node N2, the second light-emitting control subcircuit 62 is electrically connected to the light-emitting control signal line EMIT, the third node N3 and the anode of the light-emitting element, the first light-emitting control subcircuit 61 and the second light-emitting control subcircuit 62 are respectively configured to transmit the current used to make the light-emitting element emit light to the anode of the light-emitting element under the control of the light-emitting control signal of the light-emitting control signal line EMIT.

[0058] The storage sub-circuit 7 is electrically connected to the power supply voltage line PVDD and the first node N1 , and is configured to maintain the voltage of the first node N1 .

[0059] refer to Figure 1 As shown, the anode of the light emitting element may be electrically connected to the fourth node N4, and the cathode of the light emitting element may be electrically connected to the ground terminal PVEE.

[0060] The specific circuit structures of the above-mentioned adjustment subcircuit, driving subcircuit, compensation subcircuit, driving control subcircuit, first reset subcircuit, second reset subcircuit, first light-emitting control subcircuit, second light-emitting control subcircuit and storage subcircuit are not limited, as long as the corresponding functions are met.

[0061] The first node, the second node, the third node and the fourth node are defined only for the convenience of describing the circuit structure. The first node, the second node, the third node and the fourth node are not actual circuit units.

[0062] If the above-mentioned pixel driving circuit is applied to an OLED display device, the above-mentioned light-emitting element is OLED; if the above-mentioned pixel driving circuit is applied to a sub-millimeter light-emitting diode (Mini Light Emitting Diode, Mini LED) display device, the above-mentioned light-emitting element is Mini LED; if the above-mentioned pixel driving circuit is applied to a micro light-emitting diode (Micro Light Emitting Diode, Micro LED) display device, the above-mentioned light-emitting element is Micro LED. Of course, it can also be other types of light-emitting elements, which shall be subject to the actual application.

[0063] It should be noted that the power supply voltage signal on the power supply voltage line PVDD in the embodiment of the present application does not control the light emission of the light emitting element in the pixel driving circuit. The power supply voltage line PVDD and the ground terminal PVEE together determine the flow direction of the light emitting current in the light emitting element.

[0064] The pixel driving circuit provided in the embodiment of the present application can compensate for the leakage current of the first node in the data writing stage by setting an adjustment subcircuit as a compensation subcircuit, so that the potential of the first node changes as little as possible or even does not change, so that the control electrode potential of the driving transistor is relatively stable, and the driving transistor continues to generate a driving current in the light-emitting stage, and controls the brightness of the light-emitting element to change as little as possible or even does not change, thereby effectively reducing the problems of brightness increase and brightness flicker of the display device using the pixel driving circuit, thereby making the display device have good brightness effect, good light-emitting effect, and better performance.

[0065] In one embodiment, the adjustment subcircuit 1 includes a photosensitive capacitor C1 and a dual-gate transistor T7, the first electrode of the photosensitive capacitor C1 is electrically connected to the voltage control signal line HV, the second electrode is electrically connected to the first control electrode of the dual-gate transistor T7, the second control electrode of the dual-gate transistor T7 is electrically connected to the second scan signal line Scan2, the first electrode is electrically connected to the power supply voltage line PVDD, and the second electrode is electrically connected to the first node N1.

[0066] In practical applications, a photosensitive capacitor C1 of the embodiment of the present application can be obtained by adding photosensitive materials to an ordinary capacitor to make it have a photosensitive function. Specifically, the photosensitive capacitor C1 of the embodiment of the present application may include a capacitor gate (specifically, the first gate of the dual-gate transistor T7) and a plate arranged on one side of the capacitor gate, and a layer of photosensitive material may be arranged between the plate and the capacitor gate. When the ambient light changes, the photosensitive material in the photosensitive capacitor C1 will increase the amount of charge in the photosensitive capacitor C1, driving the current change of the first gate of the dual-gate transistor T7, thereby effectively solving the influence of the ambient light on the current brought by the driving transistor DT.

[0067] In practical applications, the dual-gate transistor T7 may be a dual-gate thin film transistor (TFT) or the like.

[0068] refer to Figure 2 As shown, the dual-gate transistor T7 includes a first gate 81, a second gate 82, a first insulating layer 91, a second insulating layer 92, an active layer 10, a source 11 and a drain 12. When different electrical signals are provided to the first gate 81 and the second gate 82 of the dual-gate transistor T7, such as Figure 2 As shown, when a positive voltage is provided to the first gate 81 and a negative voltage is provided to the second gate 82, the effect of the electric field on the holes 13 and the electrons 14 can be strengthened, the holes 13 flow more toward the second gate 82, and the electrons 14 flow more toward the first gate 81, and the flow rate of the electrons 14 is accelerated, the number of electrons 14 attracted is more, and the on-state current output by the dual-gate transistor T7 is larger.

[0069] In practical applications, evaporation and other methods can be used to Figure 2 A metal layer is evaporated on the source 11 and the drain 12 to serve as the second gate 82 of the dual-gate transistor T7. The material of the metal layer may include aluminum (Al), copper (Cu), etc.

[0070] It should be noted that the dual-gate transistor T7 can be the same size and type as the driving transistor DT, which is convenient for manufacturing and control.

[0071] Figure 3 FIG. 4 shows a schematic diagram of the structure of the adjustment sub-circuit composed of the dual-gate transistor T7 and the driving transistor DT. Figure 3 As shown, the structure of the adjustment sub-circuit includes a substrate 17, and a first gate 81, a first insulating layer 91, an active layer 10, a source-drain metal layer (including a source electrode 11 and a drain electrode 12), a second insulating layer 92, a second gate 82, a second passivation layer 18, a photosensitive material layer 19 and a pixel electrode layer 20 which are sequentially stacked on the substrate 17. At the same time, the structure of the adjustment sub-circuit also includes a first passivation layer 16, and the first passivation layer 16 covers the entire outer surface of the substrate 17, the first gate 81, the first insulating layer 91, the active layer 10, the source electrode 11 and the drain electrode 12 and the second insulating layer 92. In addition, the first passivation layer 16 also covers a portion of the outer surface of the second gate 82 and has a groove, and a portion of the second passivation layer 18 is arranged in the groove.

[0072] In applications, there is no limitation on the material of the substrate 17 , which may include a rigid material, such as glass, or a flexible material, such as polyimide (PI).

[0073] The materials of the first insulating layer 91 and the second insulating layer 92 may be inorganic materials, for example, silicon nitride (SiNx).

[0074] The material of the active layer 10 may be any one of non-oxides, oxides, etc. Among them, the non-oxide may include amorphous silicon (a-Si), hydrogenated amorphous silicon (a-Si:H), low temperature polysilicon (Low Temperature Poly-silicon, LTPS), etc., which are not specifically limited here.

[0075] The materials of the first gate 81 and the second gate 82 can both be metal materials, such as Al, molybdenum (Mo), etc.

[0076] The source electrode 11 and the drain electrode 12 may be made of metal materials, such as Al, Cu, etc.

[0077] The materials of the first passivation layer 16 and the second passivation layer 18 can both be silicon dioxide (SiO 2 )、SiNx、Al2O3(Al 2 O 3 )wait.

[0078] It should be noted that the thickness and other parameters of the above structures can be obtained according to actual applications and will not be described in detail here.

[0079] Therefore, by utilizing the double-gate structure of the double-gate transistor T7, the first gate of the double-gate transistor T7 can form a photosensitive capacitor C1 with the electrode plate and the photosensitive material, and the second gate of the double-gate transistor T7 can be electrically connected to the second scanning signal line Scan2. In this way, when the external environment light changes, the photosensitive material will cause the amount of charge in the photosensitive capacitor C1 to change. At the same time, since the second electrode of the photosensitive capacitor C1 is electrically connected to the first control electrode of the dual-gate transistor T7, it will drive the current in the dual-gate transistor T7 to change. Moreover, since the second control electrode of the dual-gate transistor T7 is electrically connected to the second scanning signal line Scan2, then in the data writing stage, the second control electrode of the dual-gate transistor T7 is turned on. At this time, the voltage directions of the first control electrode and the second control electrode of the dual-gate transistor T7 are opposite, and they form electric fields in opposite directions with the first electrode and the second electrode of the dual-gate transistor T7, respectively, so as to produce opposite effects on the holes 13 and the electrons 14. Then, under the action of the two electric fields, the electron flow rate in the dual-gate transistor T7 is faster, the number of electrons attracted is more, and the on-state current output by the dual-gate transistor T7 is larger. At this time, the current stored in the first node N1 is I 2 , making I 2 >I 1 , thereby compensating for the leakage current of the first node N1 caused by light or long-term charging.

[0080] It should be noted that Figure 4 I 1 and I 2 Schematic diagram of the change of 1 is the current of the first node N1 before compensation, I 2 is the current after compensation of the first node N1. Figure 4 As shown, as the light changes, the current I 1 The current I after the compensation of the first node N1 is 2 The decline is slow, and I 2 >I 1 .

[0081] In one embodiment, the driving sub-circuit 2 includes a driving transistor DT, wherein a control electrode of the driving transistor DT is electrically connected to the first node N1 , a first electrode is electrically connected to the second node N2 , and a second electrode is electrically connected to the third node N3 .

[0082] During the data writing phase, the leakage current of the first node N1 caused by illumination or long-term charging can be compensated by the combined action of the dual-gate transistor T7 and the light-sensitive capacitor C1, thereby ensuring the threshold voltage of the driving transistor DT and enabling the driving transistor DT to continuously generate current during the light-emitting phase, so as to ensure that the brightness of the light-emitting element is as normal as possible.

[0083] In one embodiment, the compensation sub-circuit 3 includes a fifth transistor T5 , wherein the control electrode of the fifth transistor T5 is electrically connected to the second scan signal line Scan2 , the first electrode is electrically connected to the third node N3 , and the second electrode is electrically connected to the first node N1 .

[0084] In one embodiment, the drive control subcircuit 4 includes a sixth transistor T6 , a control electrode of the sixth transistor T6 is electrically connected to the second scan signal line Scan2 , a first electrode is electrically connected to the data signal line DATA, and a second electrode is electrically connected to the second node N2 .

[0085] In one embodiment, the first reset sub-circuit 51 includes a first transistor T1, the control electrode of the first transistor T1 is electrically connected to the first scan signal line Scan1, the first electrode is electrically connected to the initial signal line Vint, and the second electrode is electrically connected to the first node N1; the second reset sub-circuit 52 includes a second transistor T2, the control electrode of the second transistor T2 is electrically connected to the second scan signal line Scan2, the first electrode is electrically connected to the reset signal line Vreset, and the second electrode is electrically connected to the anode of the light-emitting element.

[0086] In one embodiment, the first light-emitting control subcircuit 61 includes a third transistor T3, the control electrode of the third transistor T3 is electrically connected to the light-emitting control signal line EMIT, the first electrode is electrically connected to the power supply voltage line PVDD, and the second electrode is electrically connected to the second node N2; the second light-emitting control subcircuit 62 includes a fourth transistor T4, the control electrode of the fourth transistor T4 is electrically connected to the light-emitting control signal line EMIT, the first electrode is electrically connected to the third node N3, and the second electrode is electrically connected to the anode of the light-emitting element.

[0087] It should be noted that the second electrode of the third transistor T3, the first electrode of the driving transistor DT and the second electrode of the sixth transistor T6 are all electrically connected to the second node N2, that is, the second electrode of the third transistor T3, the first electrode of the driving transistor DT and the second electrode of the sixth transistor T6 are electrically connected.

[0088] The first electrode of the fourth transistor T4, the second electrode of the driving transistor DT and the first electrode of the fifth transistor T5 are all electrically connected to the third node N3, that is, the first electrode of the fourth transistor T4, the second electrode of the driving transistor DT and the first electrode of the fifth transistor T5 are electrically connected.

[0089] The second electrode of the fourth transistor T4 and the second electrode of the second transistor T2 are both electrically connected to the anode of the light emitting element, that is, the second electrode of the fourth transistor T4 is electrically connected to the second electrode of the second transistor T2.

[0090] In one embodiment, the storage sub-circuit 7 includes a storage capacitor Cst, a first electrode of the storage capacitor Cst is electrically connected to the power voltage line PVDD, and a second electrode of the storage capacitor Cst is electrically connected to the first node N1.

[0091] It should be noted that the first electrode of the storage capacitor Cst, the first electrode of the dual-gate transistor T7 and the first electrode of the third transistor T3 are all electrically connected to the power supply voltage line PVDD, that is, the first electrode of the storage capacitor Cst, the first electrode of the dual-gate transistor T7 and the first electrode of the third transistor T3 are electrically connected.

[0092] The second electrode of the storage capacitor Cst, the second electrode of the first transistor T1, the second electrode of the fifth transistor T5, the second electrode of the dual-gate transistor T7 and the control electrode of the driving transistor DT are all electrically connected to the first node N1, that is, the second electrode of the storage capacitor Cst, the second electrode of the first transistor T1, the second electrode of the fifth transistor T5, the second electrode of the dual-gate transistor T7 and the control electrode of the driving transistor DT are electrically connected.

[0093] In practical applications, the first transistor T1, the second transistor T2, the third transistor T3, the fourth transistor T4, the fifth transistor T5, the sixth transistor T6, the dual-gate transistor T7 and the driving transistor DT can all be TFTs, specifically, any one of non-oxide TFTs, oxide TFTs, etc., wherein the non-oxide TFTs may include a-Si TFTs, LTPS TFTs, etc., which are not specifically limited here.

[0094] In order to unify the manufacturing process and facilitate the subsequent circuit driving method to be simpler, the first transistor T1, the second transistor T2, the third transistor T3, the fourth transistor T4, the fifth transistor T5, the sixth transistor T6, the dual-gate transistor T7 and the driving transistor DT can all be N-type transistors. Of course, the first transistor T1, the second transistor T2, the third transistor T3, the fourth transistor T4, the fifth transistor T5, the sixth transistor T6, the dual-gate transistor T7 and the driving transistor DT can all be P-type transistors, which are not specifically limited here.

[0095] The pixel driving circuit provided in the embodiment of the present application forms a compensation subcircuit by setting a photosensitive capacitor and a dual-gate transistor. When the ambient light changes, the amount of charge in the photosensitive capacitor changes, and drives the current of the dual-gate transistor to change. Then, in the data writing stage, electric fields with opposite directions are formed between the first electrode and the second electrode of the dual-gate transistor, which have opposite effects on holes and electrons. Under the action of the two electric fields, the electron flow rate in the dual-gate transistor is faster, the number of electrons attracted is more, and the on-state current is larger, so that the leakage current of the first node caused by light or long-term charging can be compensated, so that the driving transistor can continuously generate a driving current in the light-emitting stage and try to maintain the brightness of the light-emitting element. Therefore, the display device using the pixel driving circuit has good brightness effect, good light-emitting effect, and better performance.

[0096] Embodiment 2

[0097] An embodiment of the present application provides a display device, including a plurality of pixel units arranged in an array and a pixel driving circuit as in the first embodiment, wherein the pixel driving circuit is electrically connected to the plurality of pixel units and is configured to control the plurality of pixel units.

[0098] The above-mentioned display device can be a flexible display device (also called a flexible screen) or a rigid display device (ie, a display screen that cannot be bent), which is not limited here.

[0099] The above-mentioned display device can be an OLED display device, or a Micro LED display device or a Mini LED display device, as well as any product or component with a display function, such as a television, digital camera, mobile phone, tablet computer, etc. that includes these display devices; the above-mentioned display device can also be used in the fields of identity recognition, medical equipment, etc., and the products that have been promoted or have good promotion prospects include security identity authentication, smart door locks, medical image acquisition, etc.

[0100] The display device has the advantages of good luminous brightness effect, good display effect, low cost, long life, high stability, high contrast, good imaging quality and high product quality.

[0101] Embodiment 3

[0102] The embodiment of the present application provides a control method of a pixel driving circuit as in the first embodiment.

[0103] like Figure 5 As shown, the control method includes:

[0104] S1. In a frame display period, a frame display is realized through a reset phase, a data writing phase and a light emitting phase.

[0105] The working timing of the pixel driving circuit in the embodiment of the present application can refer to Figure 5 As shown, the specific description is as follows.

[0106] In the following, the first transistor T1, the second transistor T2, the third transistor T3, the fourth transistor T4, the fifth transistor T5, the sixth transistor T6, the dual-gate transistor T7 and the driving transistor DT are all N-type low-temperature polysilicon TFTs, and the light-emitting element is an OLED. Figure 6 The timing diagram of each signal line shown in the embodiment of the present application is as follows Figure 1 The working principle of the pixel driving circuit shown in FIG. Figures 7 to 9 In the figure, the transistor is turned off by the "×" mark, and the light-emitting element does not emit light by the "×" mark.

[0107] Initialization phase:

[0108] exist Figure 6 In the t11 phase, low-level signals are input to the first scan signal line Scan1, the initial signal line Vint, the reset signal line Vreset, and the ground terminal PVEE, and high-level signals are input to the second scan signal line Scan2, the light-emitting control signal line EMIT, the power voltage line PVDD, the voltage control signal line HV, and the data signal line DATA. Figure 7As shown, the first transistor T1 is turned on, and the second transistor T2, the third transistor T3, the fourth transistor T4, the fifth transistor T5, the sixth transistor T6, the dual-gate transistor T7, and the driving transistor DT are all turned off.

[0109] Since the first transistor T1 is turned on, the initial signal of the initial signal line Vint can be written into the first node N1, and the first node N1 is initialized to the initial signal of the initial signal line Vint.

[0110] Data writing phase:

[0111] exist Figure 6 In the t12 phase, low-level signals are input to the second scan signal line Scan2, the initial signal line Vint, the reset signal line Vreset, and the ground terminal PVEE, and high-level signals are input to the first scan signal line Scan1, the light-emitting control signal line EMIT, the power voltage line PVDD, the voltage control signal line HV, and the data signal line DATA. Figure 8 As shown, the second transistor T2, the fifth transistor T5, the sixth transistor T6, the dual-gate transistor T7, and the driving transistor DT are all turned on, and the first transistor T1, the third transistor T3, and the fourth transistor T4 are all turned off.

[0112] Since the fifth transistor T5 and the sixth transistor T6 are turned on, the data signal of the data signal line DATA is written into the gate of the driving transistor DT and self-compensation is completed; at the same time, since the second transistor T2 is turned on, the reset signal of the reset signal line Vreset is transmitted to the anode of the OLED to reset the OLED; in addition, the data signal of the data signal line DATA is also written into the second electrode of the storage capacitor Cst and charges the storage capacitor Cst.

[0113] More importantly, the second scanning signal line Scan2 inputs a low-level signal, and at this time, the dual-gate transistor T7 is turned on. When the external environment light changes, the photosensitive material causes the amount of charge in the photosensitive capacitor C1 to change. At the same time, since the second electrode of the photosensitive capacitor C1 is electrically connected to the first control electrode of the dual-gate transistor T7, it will drive the current in the dual-gate transistor T7 to change. Moreover, since the second control electrode of the dual-gate transistor T7 is electrically connected to the second scanning signal line Scan2, then in the data writing stage, the second control electrode of the dual-gate transistor T7 is turned on. At this time, the voltage directions of the first control electrode and the second control electrode of the dual-gate transistor T7 are opposite, and they form electric fields in opposite directions with the first electrode and the second electrode of the dual-gate transistor T7, respectively, so as to produce opposite effects on the holes 13 and the electrons 14. Then, under the action of the two electric fields, the electron flow rate in the dual-gate transistor T7 is faster, the number of electrons attracted is more, and the on-state current output by the dual-gate transistor T7 is larger. At this time, the current stored in the first node N1 is I2, so that I2>I1, thereby compensating for the leakage current of the first node N1 caused by light or long-term charging.

[0114] During the lighting phase:

[0115] exist Figure 6 In the t13 stage, low-level signals are input to the light-emitting control signal line EMIT, the initial signal line Vint, the reset signal line Vreset, and the ground terminal PVEE, and high-level signals are input to the first scanning signal line Scan1, the second scanning signal line Scan2, the power supply voltage line PVDD, the voltage control signal line HV, and the data signal line DATA. Fig. 9 As shown, the third transistor T3, the fourth transistor T4 and the driving transistor DT are all turned on, and the first transistor T1, the second transistor T2, the fifth transistor T5, the sixth transistor T6 and the double-gate transistor T7 are all turned off.

[0116] Since the third transistor T3 and the fourth transistor T4 are turned on, the power supply voltage signal of the power supply voltage line PVDD is transmitted to the first electrode of the driving transistor DT, so that the driving transistor DT generates a driving current, and since the leakage current of the first node is compensated, the driving current can be continuously generated to flow to the anode of the OLED, thereby driving the OLED to emit light with a relatively stable brightness.

[0117] In the above process, the driving current Ids generated by the driving transistor DT is:

[0118] Ids=(1 / 2)×μ×(W / L)×CGI×(VDD-Vdata-Vth) 2, wherein CGI is the capacitance of the gate oxide of the driving transistor DT (i.e., the gate capacitance), VDD is the power supply voltage of the power supply voltage line PVDD, Vdata is the data signal of the data signal line DATA (i.e., the data voltage), Vth is the threshold voltage of the driving transistor DT, W is the channel width of the driving transistor DT, L is the channel length of the driving transistor DT, and μ is the carrier mobility of the driving transistor DT.

[0119] The control method of the pixel driving circuit provided in the embodiment of the present application, when the ambient light changes, the amount of charge in the photosensitive capacitor changes during the data writing stage, which drives the current of the dual-gate transistor to change. Then, during the data writing stage, electric fields in opposite directions are formed between the first electrode and the second electrode of the dual-gate transistor, which have opposite effects on holes and electrons. Under the action of the two electric fields, the electron flow rate in the dual-gate transistor is faster, the number of electrons attracted is more, and the on-state current is larger, thereby compensating for the leakage current of the first node caused by light or long-term charging, so that the driving transistor continues to generate a driving current during the light-emitting stage, and controls the brightness of the light-emitting element to change as little as possible. At the same time, the above-mentioned pixel driving circuit can drive the light-emitting element to emit light, and the timing is simple and easy to implement.

[0120] Only the contents related to the invention are introduced here. Other structures can be obtained by referring to the relevant technologies and will not be described in detail here.

[0121] The above are only preferred embodiments of the present application and are not intended to limit the present application. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present application should be included in the protection scope of the present application.

Claims

1. A pixel driving circuit, characterized in that: include: an adjustment subcircuit, electrically connected to the voltage control signal line, the second scan signal line, the first node and the power supply voltage line, and configured to compensate for the leakage current of the first node under the common control of the voltage control signal of the voltage control signal line and the scan signal of the second scan signal line during the data writing phase; a driving subcircuit, electrically connected to the first node, the second node and the third node, and configured to conduct a path between the second node and the third node under the control of the voltage of the first node, so that a current for making the light-emitting element emit light is generated in the path, and the current is continuously generated in the light-emitting stage; a compensation subcircuit, electrically connected to the second scan signal line, the first node and the third node, and configured to conduct a path between the first node and the third node under the control of a scan signal of the second scan signal line; a drive control subcircuit, electrically connected to the second scan signal line, the data signal line and the second node, and configured to write the data signal of the data signal line into the second node under the control of the scan signal of the second scan signal line; a first reset subcircuit and a second reset subcircuit, wherein the first reset subcircuit is electrically connected to the first scan signal line, the initial signal line and the first node, and is configured to reset the first node by the initial signal of the initial signal line under the control of the scan signal of the first scan signal line; and the second reset subcircuit is electrically connected to the second scan signal line, the reset signal line and the anode of the light emitting element, and is configured to reset the anode by the reset signal of the reset signal line under the control of the scan signal of the second scan signal line; a first light-emitting control subcircuit and a second light-emitting control subcircuit, wherein the first light-emitting control subcircuit is electrically connected to a light-emitting control signal line, the power supply voltage line and the second node, and the second light-emitting control subcircuit is electrically connected to the light-emitting control signal line, the third node and the anode, and the first light-emitting control subcircuit and the second light-emitting control subcircuit are respectively configured to transmit a current for causing the light-emitting element to emit light to the anode under the control of a light-emitting control signal of the light-emitting control signal line; a storage subcircuit, electrically connected to the power supply voltage line and the first node, and configured to maintain a voltage of the first node; The adjustment subcircuit includes a light-sensing capacitor and a dual-gate transistor; The first electrode of the photosensitive capacitor is electrically connected to the voltage control signal line, and the second electrode is electrically connected to the first control electrode of the dual-gate transistor; The second control electrode of the dual-gate transistor is electrically connected to the second scanning signal line, the first electrode is electrically connected to the power supply voltage line, and the second electrode is electrically connected to the first node.

2. The pixel driving circuit according to claim 1, characterized in that: The driving subcircuit includes a driving transistor; The control electrode of the driving transistor is electrically connected to the first node, the first electrode is electrically connected to the second node, and the second electrode is electrically connected to the third node.

3. The pixel driving circuit according to claim 1, wherein: The compensation subcircuit includes a fifth transistor; The control electrode of the fifth transistor is electrically connected to the second scanning signal line, the first electrode is electrically connected to the third node, and the second electrode is electrically connected to the first node.

4. The pixel driving circuit according to claim 1, wherein: The drive control subcircuit includes a sixth transistor; The control electrode of the sixth transistor is electrically connected to the second scanning signal line, the first electrode is electrically connected to the data signal line, and the second electrode is electrically connected to the second node.

5. The pixel driving circuit according to claim 1, wherein: The first reset subcircuit comprises a first transistor, a control electrode of the first transistor is electrically connected to the first scanning signal line, a first electrode is electrically connected to the initial signal line, and a second electrode is electrically connected to the first node; The second reset subcircuit includes a second transistor, wherein a control electrode of the second transistor is electrically connected to the second scanning signal line, a first electrode is electrically connected to the reset signal line, and a second electrode is electrically connected to the anode.

6. The pixel driving circuit according to claim 1, wherein: The first light-emitting control subcircuit comprises a third transistor, wherein a control electrode of the third transistor is electrically connected to the light-emitting control signal line, a first electrode is electrically connected to the power supply voltage line, and a second electrode is electrically connected to the second node; The second light emitting control subcircuit includes a fourth transistor, wherein a control electrode of the fourth transistor is electrically connected to the light emitting control signal line, a first electrode is electrically connected to the third node, and a second electrode is electrically connected to the anode.

7. The pixel driving circuit according to claim 1, wherein: The storage subcircuit includes a storage capacitor; A first electrode of the storage capacitor is electrically connected to the power supply voltage line, and a second electrode of the storage capacitor is electrically connected to the first node.

8. A display device, characterized in that: The invention comprises a plurality of pixel units arranged in an array and a pixel driving circuit as claimed in any one of claims 1 to 7, wherein the pixel driving circuit is electrically connected to the plurality of pixel units and is configured to control the plurality of pixel units.

9. A control method for controlling the pixel driving circuit according to any one of claims 1 to 7, characterized in that: The control method comprises: In a frame display picture cycle, a frame display picture is displayed through a reset phase, a data writing phase and a light emitting phase.

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