A data processing method and device, computer equipment and a storage medium

Abstract

The application relates to the computer technical field and discloses a data processing method and device, computer equipment and a storage medium, the method comprising the following steps: receiving M pieces of interleaved data returned by N slave devices, the M pieces of interleaved data comprising M pieces of reading data and corresponding M pieces of data identifiers, each reading data and data identifier is generated and fed back by any slave device based on a reading command issued by a master device, and M is greater than N and greater than 1; obtaining L buffer zones pre-divided in a storage resource pool, each buffer zone corresponds to a data identifier, N is less than or equal to L and L is less than or equal to M; according to the M pieces of data identifiers, storing interleaved data belonging to the same data identifier in the buffer zone corresponding to the same data identifier; and based on a preset priority transmission rule, transmitting the interleaved data stored in the L buffer zones to the master device. The application can solve the problem of low transmission efficiency of interleaved data and avoid the problem of system freezing caused by data interleaving.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of computer, in particular to a data processing method and device, computer equipment and storage medium. BACKGROUND

[0002] The device based on the Advanced eXtensible Interface (AXI) protocol to transmit commands and data may exist a master device to multiple slave devices or multiple master devices to multiple slave devices between the multi-channel transmission. In this case, in order to ensure the performance index of data transmission, in most cases, the multi-channel data is transmitted in parallel. This will appear multi-channel data to a output port at the same time, that is, the data interleaving occurs.

[0003] There is uncertainty in the compatibility of functional modules used in a system to data interleaving. When the downstream or upstream of the module compatible with data interleaving is connected to the module incompatible with data interleaving, the interleaved data will cause the entire system to be deadlocked. To solve this problem, the device and the slave device port usually use the single slave mode, that is, the master device issues a command, and after the slave device responds to the command, the master device issues the next command to the next slave device, avoiding the occurrence of data interleaving. But this way will cause the transmission efficiency of interleaved data to be low, and when a command executes abnormally, it will cause data transmission failure. SUMMARY

[0004] Therefore, the present application provides a data processing method and device, computer equipment and storage medium to solve the problem of low transmission efficiency of interleaved data and avoid the entire system being deadlocked due to data interleaving.

[0005] In a first aspect, the present application provides a data processing method, which comprises: receiving M pieces of interleaved data returned by N slave devices, the M pieces of interleaved data comprising M read data and corresponding M data identifiers, each read data and data identifier being generated and fed back by any slave device based on a read command issued by a master device, M≥N>1; obtaining L buffer areas pre-divided in a storage resource pool, each buffer area corresponding to a data identifier, N≤L≤M; storing interleaved data belonging to the same data identifier in the buffer area corresponding to the same data identifier according to the M data identifiers; and transmitting the interleaved data stored in the L buffer areas to the master device based on a preset priority transmission rule.

[0006] According to the method of the first aspect, the M pieces of interleaved data are stored in the buffer area corresponding to each data identifier based on the M data identifiers contained in the received M pieces of interleaved data, that is, all interleaved data belonging to the same data identifier in the M pieces of interleaved data are stored in one buffer area, so that the M pieces of interleaved data are stored in groups. After part or all of the L buffer areas store interleaved data, the interleaved data stored in the L buffer areas is transmitted to the host device based on the preset priority transmission rule, so that the host device can receive the interleaved data stored in each buffer area according to the transmission rule. Then, after the host device receives the interleaved data of the same data identifier, the host device can transmit the interleaved data of the same data identifier to the upstream module or the downstream module of the host device, so that the interleaved data of the same data identifier can be recognized by the upstream module or the downstream module, the problem that the upstream module or the downstream module cannot transmit interleaved data in the case of incompatible interleaved data is overcome, the interleaved data is ensured to comply with the transmission protocol specification, the transmission efficiency of the interleaved data is maximally ensured to be optimal, and the problem that the entire system is deadlocked due to data interleaving is avoided.

[0007] In an optional implementation, the M pieces of interleaved data include an ith piece of interleaved data, i≤M, and the ith piece of interleaved data includes an ith data identifier; the storage resource pool further has L candidate buffer areas pre-divided, and the L candidate buffer areas correspond to the L buffer areas one by one; and the interleaved data belonging to the same data identifier is stored in the buffer area corresponding to the same data identifier according to the M data identifiers, including: the ith piece of interleaved data is stored in the buffer area corresponding to the ith data identifier according to the ith data identifier included in the ith piece of interleaved data, i≤M.

[0008] In the method, the ith piece of interleaved data is stored in the buffer area corresponding to the ith data identifier according to the ith data identifier included in the ith piece of interleaved data, including: whether a target candidate buffer area exists in the L candidate buffer areas is judged, and the target candidate buffer area stores interleaved data including the ith data identifier.

[0009] If the target candidate buffer area exists, the ith piece of interleaved data is stored in the target candidate buffer area, and when the state of the buffer area corresponding to the target candidate buffer area is an unfilled state, the interleaved data stored in the target candidate buffer area is stored in the buffer area corresponding to the target candidate buffer area.

[0010] If the target candidate buffer area does not exist, whether a target buffer area exists in the L buffer areas is judged, and the target buffer area stores interleaved data including the ith data identifier.

[0011] If the target buffer area does not exist, the ith piece of interleaved data is stored in any buffer area with an empty state in the L buffer areas.

[0012] If the target buffer exists, it is determined whether the state of the target buffer is a full storage state.

[0013] If yes, the i-th interleaved data is stored in the candidate buffer corresponding to the target buffer, and the interleaved data stored in the candidate buffer corresponding to the target buffer is stored in the target buffer when the state stored in the target buffer is an under storage state.

[0014] If no, the i-th interleaved data is stored in the target buffer.

[0015] Based on the above method, the L candidate buffers can be divided in advance, which avoids early stopping of receiving data when the buffer is full of interleaved data, and increases the number of interleaved data that can be ingested by the L buffers. After the buffer releases space, the data in the corresponding candidate buffer is written to the buffer when the buffer is in an under storage state, which improves the transmission efficiency of the data.

[0016] In an optional implementation, when one of the L candidate buffers is in a full storage state, the reception of the interleaved data returned by the N slave devices is stopped.

[0017] Based on the above method, when one of the L candidate buffers is in a full storage state, it indicates that the interleaved data stored in the full storage buffer among the L candidate buffers at the current time has not been transmitted to the master device, and the new interleaved data cannot be received. Therefore, the reception of the interleaved data returned by the N slave devices is stopped to avoid a deadlock problem.

[0018] In an optional implementation, each piece of interleaved data further includes a read state bit and a read flag bit. The read state bit is used to indicate whether the read data is successfully read. The read flag bit is used to indicate whether the interleaved data with the same data identifier has been completely stored in the L buffers.

[0019] Based on the above method, it can be determined whether the read data is successfully read based on the read state bit, and whether the interleaved data with the same data identifier has been completely stored in the L buffers based on the read flag bit, which facilitates subsequent determination of the order of transmission of the interleaved data stored in the L buffers.

[0020] In an optional implementation, when the interleaved data is stored in the L buffers, the interleaved data stored in the L buffers is transmitted to the host device based on a preset priority transmission rule, including: when there is one buffer storing the interleaved data in the L buffers, the interleaved data stored in the one buffer is transmitted to the host device based on the preset priority transmission rule; or when there are multiple buffers storing the interleaved data in the L buffers, the interleaved data stored in the buffers storing the first piece of interleaved data corresponding to different data identifiers is transmitted to the host device in the order of storage time of the first piece of interleaved data corresponding to different data identifiers based on the preset priority transmission rule; when there is no buffer storing the first piece of interleaved data in the multiple buffers, the interleaved data stored in the buffer storing the interleaved data including the target read flag is transmitted to the host device in the order of storage time of the interleaved data including the target read flag, and the target read flag is used to indicate that the interleaved data of the same data identifier has been completely stored in the L buffers.

[0021] Based on the above method, when there is one buffer storing the interleaved data in the L buffers, the interleaved data stored in the one buffer is transmitted to the host device; or when there are multiple buffers storing the interleaved data in the L buffers, the interleaved data stored in the buffers storing the first piece of interleaved data corresponding to different data identifiers is preferentially transmitted to the host device, and then the interleaved data stored in the buffer storing the interleaved data including the target read flag is transmitted to the host device, thereby ensuring that the interleaved data including the next data identifier is transmitted after the interleaved data including one data identifier is completely transmitted, so that the M pieces of interleaved data can be sequentially transmitted.

[0022] In an optional implementation, the buffer storing the interleaved data including the target read flag includes a first buffer and a second buffer, the storage time of the interleaved data including the target read flag in the first buffer is a first storage time, and the storage time of the interleaved data including the target read flag in the second buffer is a second storage time, and the interleaved data stored in the buffer storing the interleaved data including the target read flag is transmitted to the host device, including: if the first storage time is earlier than the second storage time, the interleaved data stored in the first buffer is transmitted to the host device; when it is detected that the state of the first buffer is empty and the first buffer has transmitted the interleaved data including the target read flag, the interleaved data stored in the second buffer is transmitted to the host device.

[0023] Based on the above method, when it is detected that the state of the first buffer is empty and the first buffer has transmitted the interleaved data including the target read flag, the interleaved data stored in the second buffer is transmitted to the host device, so as to ensure that the interleaved data stored in the next buffer is transmitted after the interleaved data stored in one buffer is completely transmitted.

[0024] In an optional implementation, before the L buffer areas pre-divided in the storage resource pool are acquired, the method further comprises: acquiring a maximum number of the maximum pen of the M pens of interleaved data; determining the depth of each buffer area according to the maximum number; and determining the number L of the buffer areas pre-divided in the storage resource pool according to the total amount of data of the M pens of interleaved data and the depth.

[0025] Based on the above method, the number of the pre-divided buffer areas can be accurately determined based on the actual requirement of the interleaved data to be transmitted as required, so that the resources in the storage resource pool are avoided from being excessively occupied.

[0026] In a second aspect, the present application provides a data processing device, comprising: an acquisition module, configured to receive M pens of interleaved data returned by N slave devices, each pen of the interleaved data comprising read data and a data identifier returned by each slave device in response to a read command issued by a master device, and M > N > 1; the acquisition module is configured to acquire L buffer areas pre-divided in a storage resource pool, each buffer area corresponding to a data identifier, and N ≤ L ≤ M; a processing module, configured to store each pen of the interleaved data in the buffer area corresponding to the data identifier included in each pen of the interleaved data according to the M data identifiers included in the M pens of the interleaved data; and the processing module is further configured to, in a case where the interleaved data is stored in the L buffer areas, transmit the interleaved data stored in the L buffer areas to the master device based on a preset priority transmission rule.

[0027] In a third aspect, the present application provides a computer device, comprising: a memory and a processor, which are in communication connection with each other, and the memory stores computer instructions; the processor executes the computer instructions to perform the data processing method of the first aspect or any of the corresponding embodiments thereof.

[0028] In a fourth aspect, the present application provides a computer readable storage medium, which stores computer instructions, and the computer instructions are used to make a computer execute the data processing method of the first aspect or any of the corresponding embodiments thereof.

[0029] In a fifth aspect, the present application provides a computer program product, comprising computer instructions, and the computer instructions are used to make a computer execute the data processing method of the first aspect or any of the corresponding embodiments thereof. BRIEF DESCRIPTION OF DRAWINGS

[0030] In order to make the technical solutions in the specific embodiments or prior art of the present application clearer, the drawings needed in the specific embodiments or prior art description will be briefly introduced as follows. Obviously, the drawings in the following description are some embodiments of the present application, and other drawings can be obtained by those skilled in the art without any creative effort on the basis of these drawings.

[0031] Figure 1 is a topological graph of a data processing system according to an embodiment of the present application;

[0032] Figure 2 is a flowchart of a data processing method according to an embodiment of the present application;

[0033] Figure 3 is a schematic diagram of an ID_Buffer according to an embodiment of the present application;

[0034] Figure 4 is a flowchart of storing the i-th interleaved data in the buffer according to an embodiment of the present application;

[0035] Figure 5 is a structural block diagram of a data processing apparatus according to an embodiment of the present application;

[0036] Figure 6 is a hardware structure schematic diagram of a computer device according to an embodiment of the present application. DETAILED DESCRIPTION

[0037] In order to make the technical solutions in the specific embodiments or prior art of the present application clearer, the drawings needed in the specific embodiments or prior art description will be briefly introduced as follows. Obviously, the drawings in the following description are some embodiments of the present application, and other drawings can be obtained by those skilled in the art without any creative effort on the basis of these drawings.

[0038] The technical solutions provided by the embodiments of the present application are applied to a scenario of data transmission based on an Advanced eXtensible Interface (AXI) protocol. In this scenario, data transmission based on the AXI protocol can result in data interleaving transmission.

[0039] Data interleaving transmission refers to interleaving data transmission between multiple data requests to improve the efficiency and throughput of bus communication. This method allows multiple data requests to be processed in one clock cycle and returns data in an interleaved manner, thereby reducing response time and improving performance. Data interleaving transmission is an important mechanism in the AXI protocol, which improves the efficiency and performance of bus communication by simultaneously processing multiple data requests, cross-returning data, out-of-order execution, and burst transmission. This transmission method helps optimize data interaction in the system, reduces waiting time, improves data throughput, and improves the overall performance of the system.

[0040] AXI protocol can be AXI3 protocol or AXI4 protocol. AXI3 protocol and AXI4 protocol may appear read data interleaving transmission, and AXI3 protocol may also appear write data interleaving.

[0041] Read data interleaving transmission is one of the implementation forms of read data out-of-order output. In burst mode, multiple slave ports simultaneously return data, and consecutive read data on the master port is not from the same slave port. Each interleaved data can be distinguished by read identification.

[0042] In the process of write data interleaving transmission, write data with different identifiers can be interleaved. However, write data with the same identifier needs to be in order.

[0043] Based on the current data interleaving transmission process, when single slave mode is used for interleaved data transmission, the transmission efficiency of interleaved data is low, and when a command execution exception occurs, data transmission fails.

[0044] To solve the above technical problems, the embodiment of the present application provides a data processing method, which stores each interleaved data in the buffer corresponding to the data identifier included in each interleaved data, and groups and sorts the interleaved data, to solve the problem of low transmission efficiency of interleaved data and avoid the problem of system deadlock caused by data interleaving.

[0045] The following describes the method provided by the embodiment of the present application by taking the data processing system 10 shown in Figure 1 as an example. Figure 1 It is only a schematic diagram and does not constitute a limitation on the applicable scenarios of the technical solutions provided by the present application.

[0046] As shown in Figure 1 , Figure 1 is a topology diagram of the data processing system according to the embodiment of the present application. Figure 1 In the embodiment, the data processing system 10 can include a data processing device 101, a master device 102, a first slave device 103, a second slave device 104, and a storage resource pool 105.

[0047] The data processing apparatus 101 can be any device with communication function and management function of storage resource pool. For example, the data processing apparatus can be a storage controller.

[0048] The master device 102 can be any device with communication function and calculation function. The master device 102 is used to issue read command to the first slave device 103 or the second slave device 104, and receive read data returned by the data processing apparatus 101.

[0049] The first slave device 103 or the second slave device 104 can be any device with communication function and calculation function. The first slave device 103 or the second slave device 104 is used to return read data to the storage resource pool 105.

[0050] The storage resource pool 105 can be any device with storage function. For example, the storage resource pool can be a physical storage device such as a hard disk.

[0051] Figure 1 The data processing system 10 shown is only for example and is not intended to limit the technical solutions of the present application. Those skilled in the art should understand that in the specific implementation process, the data processing system 10 can also include other master devices or slave devices, and the number of master devices and slave devices can also be determined according to specific needs, and is not limited.

[0052] According to the embodiment of the present application, a data processing method is provided. It should be noted that the steps shown in the flowchart of the drawing can be executed in a computer system such as a group of computer executable instructions, and although the logical order is shown in the flowchart, in some cases, the steps shown or described can be executed in a different order from here.

[0053] In this embodiment, a data processing method is provided, which can be used in the data processing apparatus 101 described above, Figure 2 is a flowchart of the data processing method according to the embodiment of the present application, as Figure 2 shown, the flow includes the following steps:

[0054] S201: receiving M pieces of interleaved data returned by N slave devices.

[0055] The M pieces of interleaved data include M read data and corresponding M data identifiers, each read data and data identifier is generated and fed back by any slave device based on the read command issued by the master device, and M≥N>1. Each piece of interleaved data includes a read data and a data identifier. Further, each piece of interleaved data further includes a read state bit and a read flag bit.

[0056] In an example, before S201, the master device issues a read command to at least one slave device. Each slave device receives the read command, generates interleaved data, and sends the interleaved data to the data processing apparatus.

[0057] The read command is an AXI protocol command, and is used to read data from at least one slave device.

[0058] The read data can be rdata data in an R channel of the AXI protocol.

[0059] The data identifier is used to identify each piece of interleaved data. The data identifier can be a rid identifier in an R channel of the AXI protocol.

[0060] The read status bit is used to indicate whether the master device successfully reads data in the slave device. The read status bit can be a rresp signal bit in an R channel of the AXI protocol.

[0061] The read flag bit is used to indicate whether all pieces of interleaved data with the same data identifier have been stored in the L buffers. The read flag bit can be a rlast signal bit in an R channel of the AXI protocol.

[0062] S202: Obtain L buffers pre-divided in a storage resource pool.

[0063] Each buffer corresponds to a data identifier, and N≤L≤M. The buffer can also be referred to as an ID_Buffer.

[0064] In an embodiment of the present application, L candidate buffers are also pre-divided in the storage resource pool, and the L candidate buffers correspond to the L buffers one by one. The candidate buffer can also be referred to as a Reserved_Buffer.

[0065] In some optional embodiments, before obtaining the L buffers pre-divided in the storage resource pool, the data processing apparatus obtains a maximum number of a maximum piece of interleaved data in the M pieces of interleaved data; determines a depth of each buffer according to the maximum number; and determines the number L of the buffers pre-divided in the storage resource pool according to a total data amount of the M pieces of interleaved data and the depth.

[0066] It can be understood that the data amount of the interleaved data that can be stored in the buffer is greater than the data amount of each piece of interleaved data.

[0067] Optionally, the number of the buffers does not need to be consistent with the maximum number of the data identifiers, and the data processing apparatus can also adjust the number of the buffers according to a use frequency of the data identifiers.

[0068] S203: According to the M data identifiers, the interleaved data belonging to the same data identifier is stored in the buffer corresponding to the same data identifier.

[0069] In some optional embodiments, the data processing device combines the rdata data, the rid identifier, the rlast signal bit and the rresp signal bit in the R channel into a multi-bit data before storing each piece of interleaved data in the buffer corresponding to the data identifier included in each piece of interleaved data, and names the multi-bit data as port_m_data.

[0070] In the formula, the bit width of port_m_data = the bit width of rdata + the bit width of rid + the bit width of rlast + the bit width of rresp. For example, as shown in the formula, the bit width of port_m_data = 8 bits + 4 bits + 1 bit + 1 bit = 14 bits. Figure 3 Figure 3 is a schematic diagram of ID_Buffer of an embodiment of the present application; ID_Buffer includes a plurality of buffer groups inside, and each buffer group can store port_m_data.

[0071] As shown in the formula, Figure 4 Figure 4 is a flowchart of storing the i-th piece of interleaved data in the buffer in the M pieces of interleaved data in an embodiment of the present application, i≤M. In the formula, Figure 4 , the data processing device stores the i-th piece of interleaved data in the buffer corresponding to the i-th data identifier included in the i-th piece of interleaved data according to the i-th data identifier, and the data processing device performs the following steps:

[0072] S401: Determine whether there is a target candidate buffer in the L candidate buffers.

[0073] S402: If there is a target candidate buffer, store the i-th piece of interleaved data in the target candidate buffer, and if the state of the buffer corresponding to the target candidate buffer is not a full storage state, store the interleaved data stored in the target candidate buffer in the buffer corresponding to the target candidate buffer;

[0074] S403: If there is no target candidate buffer, determine whether there is a target buffer in the L buffers;

[0075] S404: If there is no target buffer, store the i-th piece of interleaved data in any buffer whose state is empty in the L buffers;

[0076] S405: If there is a target buffer, determine whether the state of the target buffer is a full storage state;

[0077] ​​S406: If yes, the ith interleaved data is stored in the candidate buffer corresponding to the target buffer, and the interleaved data stored in the candidate buffer corresponding to the target buffer is stored in the target buffer when the state of the target buffer is the not full state;

[0078] S407: If no, the ith interleaved data is stored in the target buffer.

[0079] The target candidate buffer stores the interleaved data including the ith data identifier.

[0080] In the embodiment of the application, the target buffer stores the interleaved data including the ith data identifier.

[0081] In the embodiment of the application, the data processing device can monitor the state of the buffer or the candidate buffer at each clock cycle (clk). The state can be a full state or an empty state. The full state is a full state, and the empty state is an empty state.

[0082] Optionally, the data processing device stops receiving the interleaved data returned by the N slave devices when the state of one of the L candidate buffers is the full state.

[0083] The data processing device stops receiving the interleaved data returned by the N slave devices by pulling down the RREADY signal to prohibit the return of the read interleaved data.

[0084] S204: Based on the preset priority transmission rule, the interleaved data stored in the L buffers is transmitted to the master device.

[0085] The preset priority transmission rule can be set according to actual needs.

[0086] In some optional embodiments, the data processing device transmits the interleaved data stored in one of the L buffers to the master device based on the preset priority transmission rule when one of the L buffers stores the interleaved data.

[0087] In some optional embodiments, when there are multiple buffer zones storing interleaved data in the L buffer zones, the interleaved data stored in the buffer zones storing the first piece of interleaved data corresponding to different data identifiers is transmitted to the host device according to the preset priority transmission rule and the storage time sequence of the first piece of interleaved data corresponding to different data identifiers; when there is no buffer zone storing the first piece of interleaved data in the multiple buffer zones, the interleaved data stored in the buffer zones storing the interleaved data including the target read flag is transmitted to the host device according to the storage time sequence of the interleaved data including the target read flag, and the target read flag is used to indicate that the interleaved data of the same data identifier has been completely stored in the L buffer zones.

[0088] In an example, the buffer zone storing the interleaved data including the target read flag includes a first buffer zone and a second buffer zone, the storage time of the interleaved data including the target read flag in the first buffer zone is the first storage time, and the storage time of the interleaved data including the target read flag in the second buffer zone is the second storage time. In this case, the data processing device can transmit the interleaved data stored in the first buffer zone to the host device; when it is detected that the state of the first buffer zone is empty and the first buffer zone has transmitted the interleaved data including the target read flag, the interleaved data stored in the second buffer zone is transmitted to the host device.

[0089] Specifically, the data processing device sets the IDNUM state machine when the interleaved data is stored in the ID_Buffer, and when it is detected that the L ID Buffers do not store interleaved data, the IDNUM state machine is started in the IDLE state; when it is detected that the L ID Buffers start to store interleaved data, the pointer is directed to the ID_Buffer storing the interleaved data by the IDNUM state machine.

[0090] It can be understood that the ID_Buffer pointed by the pointer is the buffer zone currently transmitting the interleaved data.

[0091] For example, when there is one buffer zone storing interleaved data in the L buffer zones, the data processing device directs the pointer to the ID_Buffer by the IDNUM state machine, and transmits the interleaved data stored in the ID_Buffer to the host device.

[0092] In an example, the data processing device can also set a special register to record the order of arrival of the interleaved data including the target read flag in the L buffer zones, and write the data identifiers of the interleaved data including the target read flag into the register in sequence.

[0093] In the register, continuous writing of the same data identification is allowed, as shown in the following table. In the table, "2" is the identification of the first interleaved data including the target read flag bit in the L buffers, "1" is the identification of the second interleaved data including the target read flag bit in the L buffers, the first "3" is the identification of the third interleaved data including the target read flag bit in the L buffers, and the second "3" is the identification of the fourth interleaved data including the target read flag bit in the L buffers.

[0094]

[0095] It can be understood that the pointer switching only occurs when the data with the target read flag bit is read, and no switching is performed at other times, so as to avoid starting to transmit the next data with a different data identification before a complete set of data is transmitted, and to avoid the case of data interleaving. When the data processing apparatus detects that the interleaved data enters the buffer, if the state of the last buffer pointed to by the pointer is already in the empty state, and the data with the target read flag bit has been transmitted, the state is in the waiting switching state, and the states of the other buffers are all in the empty state, the pointer is switched to the current buffer to start transmitting the data.

[0096] Based on the method of S201 to S204, the data processing apparatus can receive M interleaved data returned by N slave devices, obtain L buffers pre-divided in a storage resource pool, and store each piece of interleaved data in a buffer corresponding to a data identification included in each piece of interleaved data according to the M data identifications included in the M pieces of interleaved data. In the case that the L buffers store interleaved data, the interleaved data stored in the L buffers is transmitted to the master device based on a preset priority transmission rule.

[0097] Since the M pieces of interleaved data can be stored in a buffer corresponding to a data identification included in each piece of interleaved data according to the M data identifications, that is, the interleaved data with the same data identification in the M pieces of interleaved data is stored in one buffer, the M pieces of interleaved data are grouped; at the same time, the interleaved data stored in the L buffers is transmitted to the master device based on the preset priority transmission rule, that is, the M pieces of interleaved data are sorted and then transmitted to the master device, so that the M pieces of interleaved data read by the master device can be recognized by a module that is not compatible with interleaved data, and the interleaved data conforms to the protocol specification, thereby maximizing the transmission efficiency of the interleaved data and avoiding the problem of system freezing caused by data interleaving.

[0098] A data processing apparatus is also provided in the embodiments, which is configured to implement the above-described embodiments and preferred embodiments, and will not be described here again. As used below, the term "module" can be a combination of software and / or hardware that implements a predetermined function. Although the apparatus described in the following embodiments is preferably implemented in software, implementation in hardware, or a combination of software and hardware, is also possible and contemplated.

[0099] The embodiments provide a data processing apparatus, as shown in Figure 5 Figure 5 is a structural block diagram of a data processing apparatus according to an embodiment of the present application; the apparatus comprises:

[0100] The acquisition module 501 is configured to receive M pieces of interleaved data returned by N slave devices, the M pieces of interleaved data comprising M pieces of read data and corresponding M pieces of data identifiers, each piece of read data and data identifier being generated and fed back by any slave device based on a read command issued by a master device, and M≥N>1.

[0101] The acquisition module 501 is configured to acquire L buffer areas pre-divided in a storage resource pool, each buffer area corresponding to a data identifier, and N≤L≤M.

[0102] The processing module 502 is configured to store, according to the M pieces of data identifiers, interleaved data belonging to the same data identifier in a buffer area corresponding to the same data identifier.

[0103] The processing module 502 is further configured to transmit, based on a preset priority transmission rule, the interleaved data stored in the L buffer areas to the master device.

[0104] In some optional embodiments, the M pieces of interleaved data comprise an ithpiece of interleaved data, i≤M, the ithpiece of interleaved data comprising an ithdata identifier; the storage resource pool further pre-divides L candidate buffer areas, the L candidate buffer areas corresponding to the L buffer areas one by one; and the processing module 502 is specifically configured to store, according to the ithdata identifier included in the ithpiece of interleaved data, the ithpiece of interleaved data in a buffer area corresponding to the ithdata identifier, i≤M.

[0105] The processing module 502 is further specifically configured to store, according to the ithdata identifier included in the ithpiece of interleaved data, the ithpiece of interleaved data in a buffer area corresponding to the ithdata identifier, comprising:

[0106] The processing module 502 is further specifically configured to determine whether a target candidate buffer area exists in the L candidate buffer areas, the target candidate buffer area storing interleaved data comprising the ithdata identifier.

[0107] ​The processing module 502 is further specifically configured to: if the target candidate buffer exists, store the i-th piece of interleaved data in the target candidate buffer, and store the interleaved data stored in the target candidate buffer in the buffer corresponding to the target candidate buffer when the state of the buffer corresponding to the target candidate buffer is the not full storage state.

[0108] The processing module 502 is further specifically configured to: if the target candidate buffer does not exist, determine whether a target buffer exists in the L buffers, and the target buffer stores the interleaved data including the i-th data identifier.

[0109] The processing module 502 is further specifically configured to: if the target buffer does not exist, store the i-th piece of interleaved data in any buffer of the L buffers in an empty state.

[0110] The processing module 502 is further specifically configured to: if the target buffer exists, determine whether the state of the target buffer is the full storage state.

[0111] The processing module 502 is further specifically configured to: if yes, store the i-th piece of interleaved data in the candidate buffer corresponding to the target buffer, and store the interleaved data stored in the candidate buffer corresponding to the target buffer in the target buffer when the state of the target buffer is the not full storage state.

[0112] The processing module 502 is further specifically configured to: if no, store the i-th piece of interleaved data in the target buffer.

[0113] In some optional embodiments, the processing module 502 is further configured to stop receiving the interleaved data returned by the N slave devices when the state of one of the L candidate buffers is the full storage state.

[0114] In some optional embodiments, each piece of interleaved data further includes a read state bit and a read flag bit, the read state bit is used to indicate whether the read data is successfully read, and the read flag bit is used to indicate whether the interleaved data of the same data identifier has been completely stored in the L buffers.

[0115] In some optional embodiments, the processing module 502 is further specifically configured to, when one of the L buffers stores the interleaved data, transmit the interleaved data stored in the buffer to the master device based on a preset priority transmission rule.

[0116] Alternatively, the processing module 502 is further specifically configured to, when multiple buffers of the L buffers store the interleaved data, transmit the interleaved data stored in the buffer storing the first piece of interleaved data corresponding to different data identifiers to the master device in the storage time order of the first piece of interleaved data corresponding to different data identifiers based on a preset priority transmission rule.

[0117] The processing module 502 is also specifically configured to, in a case where there is no buffer storing the first pen interlaced data in the plurality of buffers, transmit the interlaced data stored in the buffer storing the interlaced data including the target read flag bit to the host device in the storage time sequence of the interlaced data including the target read flag bit, the target read flag bit being used to indicate that the interlaced data of the same data identifier has been completely stored in the L buffers.

[0118] In some optional embodiments, the buffer storing the interlaced data including the target read flag bit includes a first buffer and a second buffer, the interlaced data including the target read flag bit is stored in the first buffer at a first storage time, and the interlaced data including the target read flag bit is stored in the second buffer at a second storage time; the processing module 502 is also specifically configured to, if the first storage time is earlier than the second storage time, transmit the interlaced data stored in the first buffer to the host device; and the processing module 502 is also specifically configured to, when detecting that the state of the first buffer is empty and the first buffer has transmitted the interlaced data including the target read flag bit, transmit the interlaced data stored in the second buffer to the host device.

[0119] In some optional embodiments, before obtaining the L buffers pre-divided in the storage resource pool, the obtaining module 501 is also configured to obtain a maximum quantity of the maximum pen interlaced data in the M pen interlaced data; the processing module 502 is also configured to determine the depth of each buffer according to the maximum quantity; and the processing module 502 is also configured to determine the number L of the buffers pre-divided in the storage resource pool according to the total quantity of data of the M pen interlaced data and the depth.

[0120] Further function descriptions of the above various modules and units are the same as those of the above corresponding embodiments, and will not be described here again.

[0121] The data processing apparatus in the embodiment is presented in the form of a functional unit, where the unit refers to an ASIC (Application Specific Integrated Circuit, Application Specific Integrated Circuit) circuit, a processor and a memory executing one or more software or fixed programs, and / or other devices that can provide the above functions.

[0122] The embodiment of the present application also provides a computer device with the above Figure 5 data processing apparatus.

[0123] Please refer to Figure 6 , Figure 6 is a structural schematic diagram of a computer device provided by an optional embodiment of the present application, as Figure 6As shown, the computer device includes one or more processors 10, memory 20, and interfaces 30 for the various components to communicate with one another. The various components communicate through one or more buses, and can be mounted on a common motherboard or in other manners as appropriate. The processor 10 can execute instructions, for example, stored in the memory 20 to display graphical information for a GUI on an external input / output device, such as a display device coupled to the interface. In some optional implementations, multiple processors and / or multiple buses can be employed as appropriate, such as about the memory 20. Also, various components can be distributed, such as over a network to provide greater functionality and / or redundancy. For example, components can be located on either or both of the same device or distributed among multiple devices. Figure 6 The processor 10 is taken as an example.

[0124] The processor 10 can be a central processing unit, a network processor, or a combination thereof. The processor 10 can further include a hardware chip. The hardware chip can be an application specific integrated circuit, a programmable logic device, or a combination thereof. The programmable logic device can be a complex programmable logic device, a field programmable logic device, a general array logic, or any combination thereof.

[0125] The memory 20 stores instructions that are executable by the at least one processor 10 to cause the at least one processor 10 to perform the methods illustrated in the above embodiments.

[0126] The memory 20 can include a program region and a data region. The program region can store an operating system and applications required by at least one function. The data region can store data created according to the use of the computer device, and the like. In addition, the memory 20 can include a high-speed random access memory, and can further include a non-transitory memory, such as at least one magnetic disk storage device, a flash memory device, or other non-transitory solid-state memory device. In some optional implementations, the memory 20 can optionally include a memory disposed remotely from the processor 10, which can be connected to the computer device through a network. Examples of the network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and a combination thereof.

[0127] The memory 20 can include a volatile memory, such as a random access memory, and can also include a non-volatile memory, such as a flash memory, a hard disk, or a solid state disk. The memory 20 can also include a combination of the above-mentioned types of memories.

[0128] The computer device further includes a communication interface 30 for the computer device to communicate with other devices or communication networks.

[0129] The embodiments of the present application further provide a computer readable storage medium, and the method according to the embodiments of the present application can be implemented in hardware, firmware, or recorded in a storage medium, or stored in a remote storage medium or a non-transitory machine readable storage medium and downloaded to a local storage medium through network, so that the method described herein can be processed by such software on a storage medium using a general purpose computer, a special purpose processor, or programmable or special hardware. The storage medium can be a magnetic disk, an optical disk, a read-only memory, a random access memory, a flash memory, a hard disk, or a solid state disk, etc. Further, the storage medium can also include a combination of the above-mentioned memories. It can be understood that the computer, the processor, the microprocessor controller, or the programmable hardware includes a storage component that can store or receive software or computer code, when the software or computer code is accessed and executed by the computer, the processor, or the hardware, the method shown in the above embodiments is implemented.

[0130] Part of the present application can be applied as a computer program product, for example, computer program instructions, when executed by a computer, through the operation of the computer, the method and / or technical solutions according to the present application can be called or provided. Those skilled in the art should understand that the form of computer program instructions in a computer readable medium includes but is not limited to source files, executable files, installation package files, etc. Correspondingly, the way of executing computer program instructions by computer includes but is not limited to: the computer directly executes the instructions, or the computer compiles the instructions and then executes the corresponding compiled program, or the computer reads and executes the instructions, or the computer reads and installs the instructions and then executes the corresponding installed program. Here, the computer readable medium can be any available computer readable storage medium or communication medium accessible to the computer.

[0131] Although the embodiments of the present application are described in conjunction with the accompanying drawings, various modifications and changes can be made by those skilled in the art without departing from the spirit and scope of the present application, and such modifications and changes fall within the scope defined by the appended claims.

Claims

1. A data processing method, characterized by, The method comprises: receiving M pieces of interleaved data returned by N slave devices, the M pieces of interleaved data comprising M pieces of read data and corresponding M pieces of data identifiers, each of the read data and the data identifier being generated and fed back by any slave device based on a read command issued by a master device, M≥N>1; obtaining L buffer areas pre-divided in a storage resource pool, each of the buffer areas corresponding to a data identifier, N≤L<M; storing interleaved data belonging to the same data identifier in the buffer area corresponding to the same data identifier according to the M pieces of data identifiers; transmitting the interleaved data stored in the L buffer areas to the master device based on a preset priority transmission rule; wherein the transmitting the interleaved data stored in the L buffer areas to the master device based on the preset priority transmission rule comprises: in a case where one of the L buffer areas stores interleaved data, transmitting the interleaved data stored in the one buffer area to the master device based on the preset priority transmission rule; or, in a case where multiple buffer areas of the L buffer areas store interleaved data, transmitting the interleaved data stored in the buffer areas storing the first pieces of interleaved data corresponding to different data identifiers to the master device in a time sequence of storage of the first pieces of interleaved data corresponding to the different data identifiers based on the preset priority transmission rule; in a case where there is no buffer area storing the first pieces of interleaved data in the multiple buffer areas, transmitting the interleaved data stored in the buffer area storing the interleaved data comprising a target read flag bit to the master device in a time sequence of storage of the interleaved data comprising the target read flag bit, the target read flag bit being used to indicate that the interleaved data of the same data identifier has been completely stored in the L buffer areas.

2. The method of claim 1, wherein, The M pieces of interleaved data comprise an i-th piece of interleaved data, i≤M, the i-th piece of interleaved data comprising an i-th data identifier; the storage resource pool further comprises L candidate buffer areas, the L candidate buffer areas corresponding to the L buffer areas one by one; The storing interleaved data belonging to the same data identifier in the buffer area corresponding to the same data identifier according to the M pieces of data identifiers comprises: storing the i-th piece of interleaved data in the buffer area corresponding to the i-th data identifier according to the i-th data identifier, i≤M; The storing the i-th piece of interleaved data in the buffer area corresponding to the i-th data identifier according to the i-th data identifier comprises: judging whether there is a target candidate buffer area in the L candidate buffer areas, the target candidate buffer area storing interleaved data comprising the i-th data identifier; if the target candidate buffer area exists, storing the i-th piece of interleaved data in the target candidate buffer area, and storing the interleaved data stored in the target candidate buffer area in the buffer area corresponding to the target candidate buffer area when a state of the buffer area corresponding to the target candidate buffer area is an unfull state. If the target candidate buffer does not exist, it is determined whether a target buffer exists in the L buffers, the target buffer storing interleaved data including the i-th data identifier; If the target buffer does not exist, the i-th interleaved data is stored in any one of the L buffers which is an empty buffer; If the target buffer exists, it is determined whether the state of the target buffer is a full storage state; If yes, the i-th interleaved data is stored in the candidate buffer corresponding to the target buffer, and when the state of the target buffer is an under storage state, the interleaved data stored in the candidate buffer corresponding to the target buffer is stored in the target buffer; If no, the i-th interleaved data is stored in the target buffer.

3. The method of claim 2, wherein, The method further comprises: In a case where the state of one of the L candidate buffers is a full storage state, the reception of interleaved data returned by the N slave devices is stopped.

4. The method of claim 3, wherein, Each of the interleaved data further comprises a read state bit and a read flag bit, the read state bit being used to indicate whether the read data is read successfully, and the read flag bit being used to indicate whether interleaved data of the same data identifier has been completely stored in the L buffers.

5. The method of claim 4, wherein, The buffer storing the interleaved data including the target read flag bit comprises a first buffer and a second buffer, the storage time of the interleaved data of the target read flag bit in the first buffer being a first storage time, and the storage time of the interleaved data of the target read flag bit in the second buffer being a second storage time; The transmission of the interleaved data stored in the buffer storing the interleaved data including the target read flag bit to the master device comprises: If the first storage time is prior to the second storage time, the interleaved data stored in the first buffer is transmitted to the master device; When it is detected that the state of the first buffer is empty and the first buffer has transmitted interleaved data including the target read flag bit, the interleaved data stored in the second buffer is transmitted to the master device.

6. The method of claim 1, wherein, Before the L buffers pre-divided in the storage resource pool are acquired, the method further comprises: The maximum number of the maximum interleaved data in the M interleaved data is acquired; According to the maximum number, the depth of each buffer is determined; According to the total amount of data of the M interleaved data and the depth, the number L of the buffers pre-divided in the storage resource pool is determined.

7. A data processing apparatus, characterized by, The device comprises: An acquisition module is configured to receive M interleaved data returned by N slave devices, the M interleaved data comprising M read data and corresponding M data identifiers, each of the read data and the data identifier being generated and fed back by any slave device based on a read command issued by a master device, and M≥N>1; The acquisition module is configured to acquire L buffers pre-divided in a storage resource pool, each of the buffers corresponding to a data identifier, and N≤L≤M; A processing module is configured to store interleaved data belonging to the same data identifier in the buffer corresponding to the same data identifier according to the M data identifiers. The processing module is further configured to transmit the interleaved data stored in the L buffer areas to the host device based on a preset priority transmission rule. The processing module is specifically configured to, in a case where one buffer area of the L buffer areas stores interleaved data, transmit the interleaved data stored in the one buffer area to the host device based on the preset priority transmission rule. Or, in a case where a plurality of buffer areas of the L buffer areas store interleaved data, transmit the interleaved data stored in the buffer areas storing the first pieces of interleaved data corresponding to different data identifiers to the host device in a storage time sequence of the first pieces of interleaved data corresponding to the different data identifiers based on the preset priority transmission rule. In a case where there is no buffer area of the plurality of buffer areas storing the first pieces of interleaved data, transmit the interleaved data stored in the buffer areas storing the interleaved data including the target read flag to the host device in a storage time sequence of the interleaved data including the target read flag, the target read flag being used to indicate that the interleaved data of a same data identifier has been completely stored in the L buffer areas.

8. A computer device, comprising: Comprise: A memory and a processor, which are in communication connection with each other, the memory stores computer instructions, and the processor executes the computer instructions to perform the data processing method in any one of claims 1 to 6.

9. A computer-readable storage medium, characterized in that, The computer readable storage medium stores computer instructions, and the computer instructions are used to make the computer execute the data processing method in any one of claims 1 to 6.

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