Display device and manufacturing method thereof

By using a stacking structure and a thinning process in an organic glow display device to form a silicon -pores, the problem of a large number of leaders in existing technologies and the difficulty of manufacturing process in existing technologies, realizing the effect of reducing the number of points and reducing manufacturing costs, reducing the number of points and reducing manufacturing costs Essence

CN119365015AInactive Publication Date: 2025-01-24北京缔姿伟业科技发展有限公司
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Patent Information

Application Number
CN202411295004.7
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-09-14
Publication Date
2025-01-24
Estimated Expiration
Not applicable · inactive patent

AI Technical Summary

Technical Problem

The existing organic light emitting display devices have a high manufacturing cost due to the complex semiconductor process and a large number of leads, making the manufacturing process difficult.

Method used

The stacking structure and thinning process are used to form the through silicon via leads, and the leads are conducted in the vertical direction, converting a large number of leads of the pixel array into the gate and source scan lines of the drive circuit, reducing the number of leads and the difficulty of process manufacturing.

Benefits of technology

It greatly reduces the leading number, reduces the difficulty of manufacturing process and the cost of manufacturing, while increasing the opening rate.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention provides a display device and a manufacturing method thereof, and the device comprises a first stacking member which is internally provided with a pixel driving circuit, a first surface is provided with a pixel electrode, and a second surface is provided with a driving electrode; the second stacking piece is internally provided with a circuit wire, the first surface of the second stacking piece is provided with a contact electrode corresponding to the driving electrode of the first stacking piece, and the second surface of the second stacking piece is provided with an extraction electrode; the substrate is provided with connecting electrodes of an area array, and the connecting electrodes are connected to the extraction electrodes of the second face of the second stacking piece in an attached mode; the second face of the first stacking piece is attached to the first face of the second stacking piece in an aligned mode. The manufacturing process difficulty of the display device can be reduced, the production cost is reduced, and use is more convenient.
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Description

Technical Field

[0001] The present invention relates to an organic light emitting display device and a manufacturing method thereof, and more particularly to an organic light emitting display device with improved aperture ratio and a manufacturing method thereof Background Art

[0002] With the development of electronic products, display devices are increasingly used in electronic devices. The display device has an organic light-emitting element and a transistor driving the organic light-emitting element. Among them, an organic light-emitting diode (OLED) is a common organic light-emitting element with low power consumption, fast response time, high lighting efficiency, high brightness and wide viewing angle. However, the semiconductor process of the existing organic light-emitting element is complex and the manufacturing cost is very high. Summary of the invention

[0003] In order to solve the above technical problems, the present invention provides a display device and a manufacturing method thereof, comprising:

[0004] A first stacked member, wherein a pixel driving circuit is disposed inside, a pixel electrode is disposed on a first surface, and a driving electrode is disposed on a second surface;

[0005] A second stacked component, wherein a circuit line is arranged inside, a first surface of which is provided with a contact electrode corresponding to the driving electrode of the first stacked component, and a second surface of which is provided with a lead-out electrode;

[0006] A substrate having a planar array of connecting electrodes disposed thereon and attached to the lead-out electrodes on the second surface of the second stack;

[0007] The second surface of the first stack is aligned with the first surface of the second stack.

[0008] Further, including:

[0009] The pixel electrode is grown on the pixel electrode on the first surface of the first stack.

[0010] Further, including:

[0011] The substrate is also provided with a DDIC circuit interface, or a DDIC circuit is provided on the substrate.

[0012] Further, including:

[0013] A transistor circuit is arranged in the first stack, and a driving electrode is arranged on the second surface as a gate and a source connection.

[0014] Further, including:

[0015] An IC capacitor is disposed on the second stack, and gate and source contact lines corresponding to the pixel electrode are formed on the first surface.

[0016] Furthermore, it includes: engraving deep grooves on the second surface of the second stack to form external lead-out interfaces for gate and source contact lines.

[0017] Further, according to another aspect of the present invention, a method for manufacturing a display device is also provided, the method comprising:

[0018] stacking semiconductor materials on a first substrate, and etching the semiconductor material layer to form a first stack;

[0019] A pixel electrode is disposed on a first surface of the first stack, and a driving electrode is formed on a second surface;

[0020] stacking a semiconductor material on a second substrate, and etching the semiconductor material layer to form a second stack;

[0021] Forming contact electrodes corresponding to the driving electrodes of the first stack on the first surface of the second stack, and cutting grooves inside to form gate and source contact lines;

[0022] The second surface of the first stack is aligned with the first surface of the second stack.

[0023] Furthermore, the first surface of the first stack is thinned to expose the pixel electrode and grow the light emitting element.

[0024] Furthermore, the second surface of the second stack is thinned to expose the gate and source contact lines to form lead-out electrodes.

[0025] Furthermore, the lead-out electrode is bonded to the substrate through a BGA interface.

[0026] Furthermore, the substrate is connected to a DDIC chip; or the DDIC chip is attached and then connected to an external device through an FPC interface. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figure 1 : Schematic diagram of traditional pixel array circuit;

[0028] Figure 2 : Schematic diagram of pixel driving circuit 2T1C;

[0029] Figure 3 : Schematic diagram of the stacked structure of the display device of the present invention;

[0030] Figure 4 : Schematic diagram of the surface connection between the first stack and the second stack of the present invention;

[0031] Figure 5 : Schematic diagram of the first stack structure;

[0032] Figure 6 : Schematic diagram of thinning the first stack to expose the electrodes;

[0033] Figure 7 : Schematic diagram of the second stack structure;

[0034] Figure 8 : Schematic diagram of the bonding connection between the first stacking member and the second stacking member;

[0035] Fig. 9 : Schematic diagram of the display device of the present invention connected to the DDIC chip;

[0036] Fig.10 : Schematic diagram of the display device of the present invention being bonded to the DDIC chip. DETAILED DESCRIPTION

[0037] The technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the protection scope of the present invention.

[0038] In the present invention, the same or corresponding components are denoted by the same reference numerals regardless of the figure numbers.

[0039] Throughout the book, when terms "first", "second", etc. may be used to describe various components, these components are not necessarily limited to the above terms.

[0040] The above wording is only used to distinguish one component from another. In the description of this application, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection, an electrical connection, or can communicate with each other; it can be directly connected, or indirectly connected through an intermediate medium, and it can be the internal connection of two elements or the interaction relationship between two elements. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to the specific circumstances.

[0041] Figure 1 It shows a simplified overall structure diagram of pixel scanning according to a conventional light emitting device, which is equipped with a pixel array 101. 100 represents the pixel array part, 102 represents the source signal line driving circuit: 103 represents the write gate signal line driving circuit, and 104 represents the initialization gate signal line driving circuit.

[0042] The conventional pixel driving circuit adopts a 2T1C circuit. As shown in the figure, a schematic diagram of the structure of the conventional 2T1C pixel circuit is shown. The 2T1C pixel driving circuit includes a first transistor T10, a second transistor T20, a storage capacitor Cst and an organic light emitting element OLED. The gate of the first transistor T10 is electrically connected to a scan signal Scan. The timing diagram of the scan signal Scan is shown in FIG. Figure 3 As shown, the source is electrically connected to the data signal Data, the drain is electrically connected to the gate of the second transistor T20 and one end of the storage capacitor Cst; the source of the second transistor T20 is electrically connected to the positive power supply voltage VDD, and the drain is electrically connected to the anode of the organic light emitting diode OLED; the cathode of the organic light emitting diode OLED is electrically connected to the negative power supply voltage VSS; one end of the storage capacitor Cst is electrically connected to the drain of the first transistor T10, and the other end is electrically connected to the source of the second transistor T20. When displaying, the scan signal Scan controls the first transistor T10 to open, and the data signal Data passes through the first transistor T10 to enter the gate of the second transistor T20 and the storage capacitor Cst, and then the first transistor T10 is closed. Due to the storage function of the storage capacitor Cst, the gate voltage of the second transistor T20 can continue to maintain the data signal voltage, so that the second transistor T20 is in a conducting state, and the driving current passes through the second transistor T20 to enter the organic light emitting diode OLED, driving the organic light emitting diode OLED to emit light.

[0043] According to an embodiment of the present invention, based on the above pixel display device, the present invention provides a display device, such as Figure 3 As shown, including:

[0044] A first stacked member, wherein a pixel driving circuit is disposed inside, a pixel electrode is disposed on a first surface, and a driving electrode is disposed on a second surface;

[0045] A second stacked component, wherein a circuit line is arranged inside, a first surface of which is provided with a contact electrode corresponding to the driving electrode of the first stacked component, and a second surface of which is provided with a lead-out electrode;

[0046] A substrate having a planar array of connecting electrodes disposed thereon and attached to the lead-out electrodes on the second surface of the second stack;

[0047] The second surface of the first stack is aligned with the first surface of the second stack.

[0048] like Figure 3 As shown, the first stack 303, the second stack 302, and the substrate 301 are stacked and connected in sequence, and the first stack 303 and the second stack 302 together form a pixel driving display component 30, and the first stack 303 is provided with a pixel driving circuit, such as Figure 4As shown, the first stack 303 further includes a first surface 3031 and a second surface 3032, the first surface 3031 is provided with a pixel electrode, and the second surface 3032 is provided with a driving electrode; an OLED pixel layer 304, a sealing layer 305, and a glass layer 306 may also be provided above the first stack;

[0049] Specifically, the pixel electrode is grown on the pixel electrode on the first surface of the first stack, such as Figure 5 The first surface is the B surface in the figure, and the second surface is the A surface. A driving electrode is grown on one side of the A surface. The pixel electrode is as shown in FIG. Figure 2 In the 2T1C circuit shown, T1, T2, etc. are grown in the circuit on the A side, and the driving electrode surface is exposed for electrical connection. In one embodiment, the first stack is a pixel wafer for growing light-emitting pixel elements thereon.

[0050] Further, such as Figure 6 As shown, a silicon blind hole is provided inside the first stack. Assuming that the thickness of the first stack is h1 and the depth of the blind hole is h2, the tip of the blind hole is exposed by thinning the B surface, for example, by thinning the B surface by a thickness of h3, thereby forming a through silicon via (TSV). Figure 6 As shown), it is used as a pixel electrode for growing a light-emitting element such as an OLED. Optionally, in one embodiment, the thickness of the first stack is 10 um, the depth of the blind hole h2 is 7 um, and h3 is 4 um.

[0051] Furthermore, a transistor circuit is arranged in the first stack, and a driving electrode is arranged on the second surface, and the driving electrode is used as a gate and source lead of a row and column pixel scanning circuit.

[0052] Furthermore, an IC capacitor may be disposed on the second stack, and gate and source contact lines corresponding to the pixel electrode may be formed on the first surface.

[0053] Further, see, 4, the second stack has a circuit trace inside, a contact electrode 3021 corresponding to the drive electrode of the first stack is provided on the first surface, and an extraction electrode 3022 is provided on the second surface; Figure 7As shown, surface A is the first surface of the second stack, on which a contact electrode is exposed for contacting the driving electrode on the second surface of the first stack; surface B is the second surface of the second stack, wherein a silicon blind hole is etched inside the second stack, and the tip of the silicon blind hole is exposed through a thinning process to form a through silicon via TSV', and the through silicon via TSV' is used to further electrically connect with subsequent components; specifically, a silicon blind hole is formed on the first surface of the second stack by engraving a deep groove, and a through silicon via is formed after thinning by thinning the surface B, and the metal plating part exposed in the through silicon via serves as an external lead-out interface for the gate and source contact lines, that is, the lead-out electrode 3022 is formed on the second surface.

[0054] The present invention uses the stacked structure and the through silicon via leads formed by the thinning process to connect the leads in the vertical direction, thereby converting a large number of leads of the pixel array into gate and source scanning lines of the driving circuit, thereby greatly reducing the number of leads.

[0055] The substrate is usually a silicon substrate or a PCB board, on which the external lead-out interface electrode 3022 on the second surface of the second stack can be electrically connected to each other through a BGA interface 3025;

[0056] Furthermore, a DDIC circuit interface is also provided, such as Figure 9-10 As shown, the substrate is connected to the DDIC chip circuit interface through an FPC cable, and then the DDIC chip is connected to other electronic devices; or a DDIC circuit is provided on the substrate, that is, the DDIC circuit is directly attached to the PCB substrate, and then connected to a video interface such as a MIPI interface of an external electronic device through an FPC circuit cable.

[0057] Through the above structure, the present invention reduces the number of connecting leads required for the original pixel resolution M*N and the bit depth B from M*N*B to only M*B+N lead points, greatly reducing the number of lead points and the difficulty of the manufacturing process. At the same time, the process manufacturing cost is reduced by thinning to form vertical silicon vias connecting the electrodes on the upper and lower surfaces.

[0058] Further, according to another aspect of the present invention, a method for manufacturing a display device is also provided, the method comprising:

[0059] A semiconductor material is stacked on a first substrate, wherein the semiconductor material is a silicon wafer, and the semiconductor material layer is etched to form a first stacked component; specifically, a pixel circuit can be etched on the first stacked component by photolithography or the like;

[0060] By etching, a pixel electrode is arranged on the first surface of the first stack. Further, a silicon blind hole is etched on the first stack to thin the first surface of the first stack to expose the coating of the silicon blind hole to form a pixel electrode. Further, a light-emitting element is grown on the pixel electrode to form an array pixel.

[0061] Further, a driving electrode is formed by etching on the second surface;

[0062] Further, stacking a semiconductor material on a second substrate, and etching the semiconductor material layer to form a second stacked member;

[0063] Further, the first surface of the second stack is etched to form a contact electrode corresponding to the driving electrode of the first stack, and grooves are cut inside the second stack to make gate and source contact lines; specifically, the B surface is the second surface of the second stack, wherein a silicon blind hole is etched inside the second stack, and the tip of the silicon blind hole is exposed through a thinning process to form a through silicon via TSV', and the through silicon via TSV' is used to further electrically connect with subsequent components; specifically, a silicon blind hole is formed by engraving a deep groove on the first surface of the second stack, and the B surface is thinned by a process to form a through silicon via after thinning, and the metal plating part exposed by the through silicon via serves as an external lead-out interface for the gate and source contact lines, that is, the lead-out electrode 3022 is formed on the second surface.

[0064] Then, the second surface of the first stack is aligned with the first surface of the second stack, so that the driving electrodes of the first stack are connected to the contact electrodes of the second stack in a one-to-one correspondence within the plane;

[0065] Furthermore, the second side of the second stack is thinned to expose the silicon blind hole, thereby forming a through silicon via TSV', and the through silicon via TSV' is used to further electrically connect with subsequent components; specifically, a silicon blind hole is formed on the first side of the second stack by engraving a deep groove, and the B side is thinned to form a through silicon via after thinning, and the metal plating part exposed in the through silicon via serves as an external lead-out interface for the gate and source contact lines, that is, the lead-out electrode 3022 is formed on the second side.

[0066] Furthermore, the present invention attaches the lead-out electrode to the substrate through a BGA interface. The substrate has solder joints corresponding to the BGA interface;

[0067] Furthermore, the substrate is connected to a DDIC chip; or a DDIC chip is attached, and then an external device is connected via an FPC interface. The external device usually has a MIPI interface as a video transmission interface, which is interconnected with the DDIC for video transmission. The present invention uses the above-mentioned lamination process, and the silicon through-hole leads formed by the thinning process to perform leads in the vertical direction, and converts a large number of leads of the pixel array into gate and source scan line leads of the driving circuit, which greatly reduces the number of leads and the difficulty of process manufacturing, and reduces the manufacturing and processing costs.

[0068] Although the above describes the illustrative specific embodiments of the present invention to facilitate those skilled in the art to understand the present invention, and it should be clear that the present invention is not limited to the scope of the specific embodiments, for those of ordinary skill in the art, as long as various changes are within the spirit and scope of the present invention as defined and determined by the attached claims, these changes are obvious, and all inventions and creations using the concept of the present invention are protected.

Claims

1. A display device, characterized in that: include: A first stacked component, wherein a pixel driving circuit is disposed inside, a pixel electrode is disposed on a first surface, and a driving electrode is disposed on a second surface; A second stacked component, wherein a circuit line is arranged inside, a first surface of which is provided with a contact electrode corresponding to the driving electrode of the first stacked component, and a second surface of which is provided with a lead-out electrode; A substrate having a planar array of connecting electrodes disposed thereon and attached to the lead-out electrodes on the second surface of the second stack; The second surface of the first stack is aligned with the first surface of the second stack.

2. A display device according to claim 1, characterized in that: include: The pixel electrode is grown on the pixel electrode on the first surface of the first stack.

3. A display device according to claim 1, characterized in that: include: The substrate is also provided with a DDIC circuit interface, or a DDIC circuit is provided on the substrate.

4. A display device according to claim 1, characterized in that: include: A transistor circuit is arranged in the first stack, and a driving electrode is arranged on the second surface as a gate and a source connection.

5. A display device according to claim 1, characterized in that: include: An IC capacitor is disposed on the second stack, and gate and source contact lines corresponding to the pixel electrode are formed on the first surface.

6. A display device according to claim 1, characterized in that: include: The second surface of the second stack is provided with a deep groove to form an external lead-out interface for gate and source contact lines.

7. A method for manufacturing a display device, for manufacturing the display device according to any one of claims 1 to 6, characterized in that: The method comprises: stacking semiconductor materials on a first substrate, and etching the semiconductor material layer to form a first stack; A pixel electrode is disposed on a first surface of the first stack, and a driving electrode is formed on a second surface; stacking a semiconductor material on a second substrate, and etching the semiconductor material layer to form a second stack; Forming contact electrodes corresponding to the driving electrodes of the first stack on the first surface of the second stack, and cutting grooves inside to form gate and source contact lines; The second surface of the first stack is aligned with the first surface of the second stack.

8. A method for manufacturing a display device according to claim 7, characterized in that: The first surface of the first stack is thinned to expose the pixel electrode and grow the light emitting element.

9. A method for manufacturing a display device according to claim 7, characterized in that: Thinning the second surface of the second stack to expose the gate and source contact lines to form extraction electrodes; and The lead-out electrode is attached to the substrate through the BGA interface.

10. A method for manufacturing a display device according to claim 7, characterized in that: The substrate is connected to a DDIC chip; or a DDIC chip is attached to the substrate and then connected to an external device via an FPC interface.