Display panel, control method thereof, and display device

By connecting a second switch in series in the array MUX test circuit of the display panel and controlling its off state, and using the driver chip to send touch signals, the fanout area limitation in the narrow bezel design is solved, the touch function of the narrow bezel display panel is realized, the wiring is simplified and the cost is reduced.

CN119380637BActive Publication Date: 2025-11-18WUHAN TIANMA MICROELECTRONICS CO LTD SHANGHAI BRANCH +1
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Patent Information

Application Number
CN202411813982.6
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2024-12-10
Publication Date
2025-11-18
Estimated Expiration
2044-12-10

AI Technical Summary

Technical Problem

Existing technologies make it difficult to achieve narrow bezel display panels, especially due to the height limitation of the fanout area, which prevents the bezel of the display panel from being further reduced.

Method used

In the array MUX test circuit of the display panel, by connecting a second switch in series in the target unit and controlling multiple second switches to be turned off in touch driving mode, the touch function is realized by sending touch signals to the touch signal line using the driver chip, without adding an additional MUX circuit.

Benefits of technology

Without adding MUX circuitry, a narrow bezel design for the display panel was achieved, signal interference from the touch signal lines was reduced, wiring was simplified, and costs were lowered.

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Abstract

The application provides a display panel and a control method thereof and a display device, and relates to the technical field of display. The array MUX test circuit of the display panel is conventionally multiplexed, and the array MUX test circuit is improved, so that at least one first pad in a target unit is connected with a first switch in series with a second switch, and then one end of a touch signal line is electrically connected with a first end of the first switch in the connection path with the second switch in series. When the display panel realizes a touch function, a plurality of second switches are controlled to be in an open state, a data signal line is short-circuited, and then a driving chip sends a touch signal to the touch signal line based on the array MUX test circuit to realize the touch function. Moreover, the application is beneficial to the narrow-frame design of the display panel without adding a new MUX circuit.
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Description

Technical Field

[0001] This application relates to the field of display technology, and in particular to a display panel and its control method and display device. Background Technology

[0002] Narrow bezel display panels, with their advantages of simplicity, aesthetics, and high screen-to-body ratio, have become one of the development trends in high-end display panels. Currently, the development of narrow bezel technology has reached a bottleneck, making it particularly difficult to further reduce the bezel size and improve product specifications. The height of the fanout area (also known as the bottom bezel) is a crucial factor that hinders the realization of narrow bezel display panels. Summary of the Invention

[0003] In view of the above problems, this application provides a display panel and its control method and display device to achieve the purpose of narrow bezel design. The specific solution is as follows:

[0004] The first aspect of this application provides a display panel, the display panel comprising: an array MUX test circuit, a driver chip, data signal lines, and touch signal lines;

[0005] The array MUX test circuit includes multiple first pads, multiple second pads, multiple first switches, and N clock signal input terminals; N≥2, and N is a positive integer;

[0006] A target unit is composed of N first pads, N first switches, and one second pad; in the target unit, the N first pads are electrically connected to the first terminals of the N first switches in a one-to-one correspondence, and the second terminals of the N first switches are all electrically connected to one second pad; the control terminals of the N first switches are electrically connected to the N clock signal input terminals in a one-to-one correspondence.

[0007] One end of the data signal line is electrically connected to the first pad, and the other end extends toward the display area of ​​the display panel;

[0008] The display panel further includes: a plurality of second switches; at least one first pad in the target unit is connected in series with a second switch on the connection path between the first switch and the first switch, and one end of the touch signal line is electrically connected to the first end of the first switch on the target connection path; the target connection path is at least one of the connection paths in the target unit with the second switch connected in series.

[0009] The other end of the touch signal line extends toward the display area of ​​the display panel and is electrically connected to the touch electrode block;

[0010] The driver chip is electrically connected to the array MUX test circuit via the second pad; in the touch driving mode of the display panel, the plurality of second switches are in the off state, and the driver chip sends touch signals to the touch signal line.

[0011] A second aspect of this application provides a method for controlling a display panel, wherein the method for controlling the display panel includes:

[0012] In the touch-driven mode of the display panel, multiple second switches are controlled to be in the off state;

[0013] The control driver chip sends touch signals to the touch signal line.

[0014] A third aspect of this application provides a display device, the display device including the display panel described above.

[0015] By employing the above technical solution, this application provides a display panel and its control method and display device. It reuses the conventional array MUX test circuit of the display panel and improves upon it by connecting at least one first pad in the target unit to a first switch via a second switch in series. Then, one end of the touch signal line is electrically connected to the first end of the first switch on the connection path with the second switch in series. When the display panel implements touch functionality, multiple second switches are controlled to be in an open state, short-circuiting the data signal line. The driver chip then sends touch signals to the touch signal line based on the array MUX test circuit to achieve the touch function. Furthermore, this application facilitates narrow bezel design of the display panel without adding a new MUX circuit. Attached Figure Description

[0016] The above and other features, advantages, and aspects of the embodiments of this disclosure will become more apparent from the accompanying drawings and the following detailed description. Throughout the drawings, the same or similar reference numerals denote the same or similar elements. It should be understood that the drawings are schematic, and the originals and elements are not necessarily drawn to scale.

[0017] Figure 1 This is a schematic diagram of the structure of a display panel provided in an embodiment of the present invention;

[0018] Figure 2 This is a schematic diagram of the structure of a fan-out area of ​​a display panel provided in an embodiment of the present invention;

[0019] Figure 3 This is a schematic diagram of the structure of an array MUX test circuit provided in an embodiment of the present invention;

[0020] Figure 4 This is a schematic diagram of another array MUX test circuit provided in an embodiment of the present invention;

[0021] Figure 5 This is a schematic diagram of another array MUX test circuit provided in an embodiment of the present invention;

[0022] Figure 6 This is a schematic diagram of another array MUX test circuit provided in an embodiment of the present invention;

[0023] Figure 7 This is a schematic diagram of another array MUX test circuit provided in an embodiment of the present invention;

[0024] Figure 8 This is a schematic diagram of another array MUX test circuit provided in an embodiment of the present invention;

[0025] Figure 9 This is a schematic diagram of another display panel fan-out area provided in an embodiment of the present invention;

[0026] Figure 10 This is a schematic diagram of the structure of another display panel fan-out area provided in an embodiment of the present invention;

[0027] Figure 11 This is a schematic diagram of the structure of another display panel fan-out area provided in an embodiment of the present invention;

[0028] Figure 12 This is a schematic diagram of the structure of another display panel fan-out area provided in an embodiment of the present invention;

[0029] Figure 13 This is a schematic diagram of the structure of another display panel fan-out area provided in an embodiment of the present invention;

[0030] Figure 14 This is a schematic diagram of the structure of another display panel fan-out area provided in an embodiment of the present invention;

[0031] Figure 15 This is a schematic diagram of the structure of another display panel fan-out area provided in an embodiment of the present invention;

[0032] Figure 16 This is a schematic diagram of the structure of another display panel fan-out area provided in an embodiment of the present invention;

[0033] Figure 17 This is a schematic diagram of the structure of another display panel fan-out area provided in an embodiment of the present invention;

[0034] Figure 18 This is a schematic diagram of the structure of another display panel fan-out area provided in an embodiment of the present invention;

[0035] Figure 19 This is a schematic diagram of the structure of another display panel fan-out area provided in an embodiment of the present invention;

[0036] Figure 20 This is a schematic diagram of the structure of another display panel fan-out area provided in an embodiment of the present invention;

[0037] Figure 21 This is a schematic diagram of the structure of another display panel fan-out area provided in an embodiment of the present invention;

[0038] Figure 22 A flowchart illustrating a control method for a display panel provided in an embodiment of the present invention;

[0039] Figure 23 This is a schematic diagram of the structure of a display device provided in an embodiment of the present invention. Detailed Implementation

[0040] The embodiments of this application are described below with reference to the accompanying drawings. The terminology used in the implementation section of this application is only for explaining specific embodiments and is not intended to limit the application. Those skilled in the art will recognize that, with technological advancements and the emergence of new scenarios, the technical solutions provided in the embodiments of this application are also applicable to similar technical problems.

[0041] To make the above-mentioned objects, features and advantages of the present invention more apparent and understandable, the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0042] It should be noted that the directional terms used in this invention are based on the relative positional relationships shown in the accompanying drawings and should not be taken as absolute limitations on this application.

[0043] refer to Figure 1 , Figure 1 This is a schematic diagram of the structure of a display panel provided in an embodiment of the present invention; see reference. Figure 2 , Figure 2 This is a schematic diagram of the structure of a fan-out area of ​​a display panel provided in an embodiment of the present invention; see reference. Figure 3 , Figure 3 This is a schematic diagram of an array MUX test circuit provided in an embodiment of the present invention. The display panel 100 provided in this embodiment of the present invention includes a display area AA and a border area BB that at least partially surrounds the display area AA. In this embodiment of the present invention, the border area BB fully surrounds the display area AA as an example.

[0044] The lower border area of ​​the border area BB includes the fan-out area, such as... Figure 2 As shown, the fan-out region within the domain is sometimes also called the step region.

[0045] like Figure 2As shown, the display panel 100 provided in this embodiment of the invention further includes an array MUX test circuit 11, a driver chip IC, a data signal line L, and a touch signal line T. The array MUX test circuit 11 and the driver chip IC are located in the fan-out region.

[0046] In this embodiment of the invention, the driver chip IC is described using a driver chip that integrates touch and display functions as an example. Here, MUX refers to a multiplexer.

[0047] The array MUX test circuit 11 includes multiple first pads S, multiple second pads A, multiple first switches K1, and N clock signal input terminals; N ≥ 2, and N is a positive integer. For example... Figure 2 As shown, taking N=4 as an example, it includes clock signal input terminals CKH1, CKH2, CKH3, and CKH4.

[0048] like Figure 2 As shown, the multiple first pads S are illustrated by taking the first first pad S1, the second first pad S2, the third first pad S3, and the fourth first pad S4 as examples; the multiple second pads A are illustrated by taking the first second pad A1, the second second pad A2, the third second pad A3, and the fourth second pad A4 as examples.

[0049] N first pads S, N first switches K1, and one second pad A constitute a target unit 12. For example... Figure 3 As shown, taking N=4 as an example, a target unit 12 includes four first pads S, four first switches K1 and one second pad A.

[0050] In the target unit 12, N first pads S are electrically connected to the first terminals of N first switches K1 in a one-to-one correspondence, and the second terminals of the N first switches K1 are all electrically connected to a second pad A; the control terminals of the N first switches K1 are electrically connected to the N clock signal input terminals in a one-to-one correspondence.

[0051] Among them, such as Figure 2 and Figure 3 As shown, one end of the data signal line L is electrically connected to the first pad S, and the other end extends to the display area AA of the display panel 100.

[0052] like Figure 3As shown, the display panel 100 provided in this embodiment of the invention further includes: a plurality of second switches K2; a second switch K2 is connected in series on the connection path between at least one first pad S and the first switch K1 in the target unit 12, and one end of the touch signal line T is electrically connected to the first end of the first switch K1 on the target connection path; the target connection path is at least one connection path in the target unit 12 in which the second switch K2 is connected in series.

[0053] Among them, such as Figure 2 and Figure 3 As shown, the other end of the touch signal line T extends towards the display area AA of the display panel 100 and is electrically connected to the touch electrode block. It should be noted that the touch electrode block is not illustrated in this embodiment of the invention. It is understood that one touch electrode block corresponds to one touch signal line T.

[0054] like Figure 2 As shown, the driver chip IC is electrically connected to the array MUX test circuit 11 via the second pad A; in the touch driving mode of the display panel 100, multiple second switches K2 are in the off state, and the driver chip IC sends touch signals to the touch signal line T. Figure 2 As shown, the second pad A is connected to the pad C on the driver chip IC, realizing the electrical connection between the driver chip IC and the array MUX test circuit 11.

[0055] It should be noted that, in an optional embodiment of the present invention, the first switch K1 and the second switch K2 are both PMOS transistors, that is, in the touch driving mode of the display panel 100, the control signal SW is a high level signal, which controls the multiple second switches K2 to be in the off state. At this time, the data signal line L is short-circuited, and the driver chip IC sends a touch signal to the touch signal line T.

[0056] It should be further noted that the clock signals received by the N clock signal input terminals are high-level signals or low-level signals with different timing sequences, so as to control the conduction state of the first switch K1 on different connection links.

[0057] like Figure 3 As shown, in target unit 12, a second switch K2 is connected in series on the connection path between each first pad S and the first switch K1. Each target connection path is connected to one touch signal line T.

[0058] Specifically, for a display panel 100 including self-capacitive touch functionality, a touch signal line T corresponding to a touch electrode block in the display panel 100 can be understood as a self-capacitive TP (Touch Panel) signal channel. The applicant has found that for large-size display panels with numerous self-capacitive TP signal channels, the driver chip IC does not have enough space to add many pads C to connect to the touch signal lines T. Therefore, in the prior art, large-size display panels with self-capacitive touch functionality employ a MUX circuit design to achieve touch functionality. Although this reduces the number of pads C in the driver chip IC to some extent, the newly designed MUX circuit occupies the bezel area BB of the display panel 100. Typically, the MUX circuit is placed in the fan-out area, thus occupying a certain amount of space in the fan-out area, severely impacting the narrow bezel design of the display panel 100.

[0059] During the fabrication of the array substrate in the display panel 100, the array MUX test circuit 11 in the fan-out area is also fabricated, and the data signal line L is also fabricated. The data signal line L is electrically connected to the array MUX test circuit 11. Before the pixels are deposited, line defects are tested based on the array MUX test circuit 11. At this time, the driver chip IC has not yet been set, and the touch signal line T has not yet been fabricated.

[0060] After the test is completed, the array MUX test circuit 11 will no longer operate. Following this, processes such as driver chip IC bonding, pixel evaporation, TFE (Thin Film Encapsulation) packaging, and TP (Thin Film Transistor) fabrication will be performed. The array substrate is also known in the field as a TFT (Thin Film Transistor) substrate. Touch signal lines T and other touch components will be formed during the TP process.

[0061] Since the TP process follows TFE packaging, this application reuses the conventional array MUX test circuit of the display panel 100. During the fabrication of the array MUX test circuit, improvements are made to connect a second switch K2 in series with at least one first pad S in the target unit 12 and the first switch K1, forming the array MUX test circuit 11 of this application. Then, during the TP process, one end of the touch signal line T is electrically connected to the first end of the first switch K1 in the connection path with the second switch K2. When the display panel 100 implements the touch function, multiple second switches K2 are controlled to be in the open state, short-circuiting the data signal line L. Then, the driver chip IC sends a touch signal to the touch signal line T based on the array MUX test circuit 11, realizing the touch function. Since the data signal line L connected to the array MUX test circuit 11 is short-circuited by the second switch K2 in the touch driving mode of the display panel 100, this design will not affect the normal display of the display panel 100.

[0062] As can be seen from the above description, the technical solution of this application reuses the array MUX test circuit in the display panel 100 and improves it to enable the large-size display panel with self-capacitive touch function to realize the touch function, which is beneficial to the narrow bezel design of the display panel 100 without adding a new MUX circuit.

[0063] Furthermore, since the touch signal line T is not electrically connected to the array MUX test circuit 11 during the online defect testing phase, the improved array MUX test circuit 11 only adds one control to the second switch K2 compared to the conventional array MUX test circuit. For example, by making the second switch K2 in the conducting state during the online defect testing phase, normal online defect testing can be achieved.

[0064] In an optional embodiment of the present invention, reference is made to... Figure 4 , Figure 4 This is a schematic diagram of another array MUX test circuit provided in an embodiment of the present invention; see reference. Figure 5 , Figure 5 This is a schematic diagram of another array MUX test circuit provided in an embodiment of the present invention. In target unit 12, at least one target connection path is spaced apart, and a touch signal line T is connected to each target connection path.

[0065] Specifically, in the embodiments of the present invention, such as Figure 4 As shown, in target unit 12, after a target connection path is spaced apart, a touch signal line T is connected to the corresponding target connection path; as... Figure 5 As shown, in target unit 12, after two target connection paths, a touch signal line T is connected to the corresponding target connection path.

[0066] Since the number of data signal lines L in the display panel 100 is much greater than the number of touch signal lines T, the connection methods between the touch signal lines T and the array MUX test circuit 11 are diverse. In this embodiment of the invention, connecting a touch signal line T to a target connection path in the target unit 12 after at least one target connection path interval ensures that the distance between two adjacent touch signal lines T is relatively long, thereby reducing signal interference between adjacent touch signal lines T and improving the signal quality of the signal transmitted by each touch signal line T.

[0067] In an optional embodiment of the present invention, reference is made to... Figure 6 , Figure 6 This is a schematic diagram of another array MUX test circuit provided in an embodiment of the present invention; see reference. Figure 7 , Figure 7 This is a schematic diagram of another array MUX test circuit provided in an embodiment of the present invention. A second switch K2 is connected in series on the connection path after at least one connection path in the target unit 12.

[0068] Specifically, in this embodiment of the invention, since the number of data signal lines L in the display panel 100 is much greater than the number of touch signal lines T, the connection methods between the touch signal lines T and the array MUX test circuit 11 are diverse. That is to say, not all connection paths require the second switch K2 to be connected in series, such as... Figure 6 As shown, a second switch K2 is connected in series on the connection path after a gap in the connection path in the target unit 12; as Figure 7 As shown, a second switch K2 is connected in series on the connection path after two connection paths in target unit 12. Further, as... Figure 6 and Figure 7 As shown, each of the target connection paths corresponds to one of the touch signal lines T.

[0069] Compared Figure 4 and Figure 6 In the structure shown, each target unit 12 can save two second switches K2; compared to Figure 5 and Figure 7 In terms of the structure shown, each target unit 12 can also save two second switches K2, thereby simplifying the circuit and reducing costs.

[0070] In an optional embodiment of the present invention, reference is made to... Figure 8 , Figure 8 This is a schematic diagram of another array MUX test circuit provided in an embodiment of the present invention. The number of touch signal lines T connected to each target unit 12 is different. Specifically, in an embodiment of the present invention, as shown... Figure 8As shown, from left to right, the first target unit 12 is connected to one touch signal line T, the second target unit 12 is connected to two touch signal lines T, and the third target unit is connected to three touch signal lines T.

[0071] In other words, the connection relationship between the touch signal line T and the array MUX test circuit 11 in the technical solution of this application is diverse. The connection relationship between the touch signal line T and the array MUX test circuit 11 can be reasonably determined based on the position of the touch electrode block corresponding to each touch signal line T, or by considering other routing factors. This is not limited in the embodiments of the present invention.

[0072] In an optional embodiment of the present invention, such as Figures 2-8 As shown, the first pad S is electrically connected to the first terminal of the first switch K1 via the first signal line M.

[0073] One end of the touch signal line T is shorted to the first signal line M.

[0074] Specifically, in this embodiment of the invention, the first signal line M can be disposed on one side of the array film layer, and the touch signal line T can be disposed on one side of the TP film layer. The touch signal line T can be shorted to the first signal line M through a film layer via, thereby realizing the connection between the touch signal line T and the array MUX test circuit 11.

[0075] In an optional embodiment of the present invention, reference is made to... Figure 9 , Figure 9 This is a schematic diagram of another display panel fan-out area provided in an embodiment of the present invention. The touch signal line T is located between two adjacent first pads S.

[0076] Specifically, in this embodiment of the invention, the interval area between two adjacent first pads S is reasonably utilized to route the touch signal line T through the interval area between two adjacent first pads S, without increasing the additional routing space, thereby simplifying the routing method of the touch signal line T and simplifying the connection method between the touch signal line T and the array MUX test circuit 11.

[0077] In an optional embodiment of the present invention, reference is made to... Figure 10 , Figure 10 This is a schematic diagram of the structure of another fan-out area of ​​a display panel provided in an embodiment of the present invention; see reference. Figure 11 , Figure 11 This is a schematic diagram of another display panel fan-out area provided in an embodiment of the present invention. The number of touch signal lines between two adjacent first pads is H1, and the number of touch signal lines between two adjacent first pads is H2.

[0078] Where H1≠H2.

[0079] Specifically, in the embodiments of the present invention, such as Figure 10 As shown, there is no touch signal line T between the first pad S1 and the second pad S2; two touch signal lines T are provided between the second pad S2 and the third pad S3; and one touch signal line T is provided between the third pad S3 and the fourth pad S4. Figure 11 As shown, a touch signal line T is provided between the first first pad S1 and the second first pad S2, two touch signal lines T are provided between the second first pad S2 and the third first pad S3, and a touch signal line T is provided between the third first pad S3 and the fourth first pad S4.

[0080] There may be other signal lines in the gap area between two adjacent first pads S. In this embodiment of the invention, the number of touch signal lines T between the two first pads S can be reasonably set based on the number of other signal lines in the gap area between the two adjacent first pads S. This simplifies the wiring of the touch signal lines T and also reduces signal interference between the touch signal lines T and other signal lines.

[0081] like Figure 10 As shown, when there are many other signal lines between the first first pad S1 and the second first pad S2, it is obvious that a touch signal line T may not be set between the first first pad S1 and the second first pad S2.

[0082] In an optional embodiment of the present invention, reference is made to... Figure 12 , Figure 12 This is a schematic diagram of the structure of another fan-out area of ​​a display panel provided in an embodiment of the present invention; see reference. Figure 13 , Figure 13 This is a schematic diagram of the structure of another display panel fan-out area provided in an embodiment of the present invention. The array MUX test circuit 11 includes multiple third pads D, which are located on the same side as multiple first pads S.

[0083] Multiple third pads D are in an unconnected state.

[0084] like Figure 13 As shown, the touch signal line T is located between two adjacent third pads D.

[0085] It should be noted that, as Figure 12 and Figure 13 As shown, the third pad D includes the first third pad D1, the second third pad D2, the third third pad D3, and the fourth third pad D4 as an example for explanation.

[0086] Specifically, in the embodiments of the present invention, such as Figure 12 As shown, the array MUX test circuit 11 includes multiple third pads D, and the touch signal line T is located between two adjacent first pads S; as Figure 13 As shown, the array MUX test circuit 11 includes multiple third pads D, and the touch signal line T is located between two adjacent third pads D.

[0087] After the array MUX test circuit 11 is electrically connected to the data signal line L, a portion of the third pad D will remain unconnected to the data signal line L. At this point, the area where the third pad D is located does not have the wiring of the data signal line L. Therefore, in this embodiment of the invention, the touch signal line T is positioned between two adjacent third pads D to achieve the purpose of being far away from the data signal line L, reducing signal interference between the data signal line L and the touch signal line D, and further simplifying the wiring method of the touch signal line T and the connection method between the touch signal line T and the array MUX test circuit 11.

[0088] In an optional embodiment of the present invention, reference is made to... Figure 14 , Figure 14 This is a schematic diagram of the structure of another fan-out area of ​​a display panel provided in an embodiment of the present invention; see reference. Figure 15 , Figure 15 This is a schematic diagram of the structure of another fan-out area of ​​a display panel provided in an embodiment of the present invention. The number of touch signal lines T between two adjacent third pads D is Y1, and the number of touch signal lines T between two adjacent third pads D is Y2.

[0089] Where Y1≠Y2.

[0090] Specifically, in the embodiments of the present invention, such as Figure 14 As shown, there is no touch signal line T between the first third pad D1 and the second third pad D2; two touch signal lines T are provided between the second third pad D2 and the third third pad D3; and one touch signal line T is provided between the third third pad D3 and the fourth third pad D4. Figure 15 As shown, a touch signal line T is provided between the first third pad D1 and the second third pad D2, two touch signal lines T are provided between the second third pad D2 and the third third pad D3, and a touch signal line T is provided between the third third pad D3 and the fourth third pad D4.

[0091] There may be other signal lines in the gap area between two adjacent third pads D. In this embodiment of the invention, the number of touch signal lines T between the two third pads D can be reasonably set based on the number of other signal lines in the gap area between the two adjacent third pads D. This simplifies the wiring of the touch signal lines T and also reduces signal interference between the touch signal lines T and other signal lines.

[0092] like Figure 14 As shown, when there are many other signal lines between the first third pad D1 and the second third pad D2, it is obvious that a touch signal line T may not be set between the first third pad D1 and the second third pad D2.

[0093] In an optional embodiment of the present invention, reference is made to... Figure 16 , Figure 16 This is a schematic diagram of another display panel fan-out area provided in an embodiment of the present invention. A portion of the touch signal lines T are located between two adjacent first pads S, and a portion of the touch signal lines T are located between two adjacent third pads D.

[0094] Specifically, in this embodiment of the invention, if the touch signal lines T are all located between two adjacent first pads S, that is, when the touch signal lines T are located in the area where the first pads S are located, the wiring difficulty between the touch signal lines T and the touch electrode blocks in the right display area AA will increase; if the touch signal lines T are all located between two adjacent third pads D, that is, when the touch signal lines T are located in the area where the third pads D are located, the wiring difficulty between the touch signal lines T and the touch electrode blocks in the left display area AA will increase.

[0095] Therefore, in this embodiment of the invention, a portion of the touch signal lines T are located between two adjacent first pads S, and a portion of the touch signal lines T are located between two adjacent third pads D. This reduces the wiring difficulty between the touch signal lines T and all touch electrode blocks. For example, the touch signal lines T located in the area of ​​the first pad S are connected to the touch electrode blocks in the left display area AA, the touch signal lines T located in the area of ​​the third pad D are connected to the touch electrode blocks in the right display area AA, and the touch signal lines T located in the middle are connected to the touch electrode blocks in the middle display area AA. This greatly reduces the wiring difficulty between the touch signal lines T and the touch electrode blocks.

[0096] In an optional embodiment of the present invention, reference is made to... Figure 17 , Figure 17 This is a schematic diagram of another display panel fan-out area provided in an embodiment of the present invention. The number of touch signal lines T located between two adjacent first pads S is W1, and the number of touch signal lines T located between two adjacent third pads D is W2.

[0097] Where W1≠W2.

[0098] Specifically, in the embodiments of the present invention, such as Figure 17 As shown, a touch signal line T is provided between the first first pad S1 and the second first pad S2, a touch signal line T is provided between the second first pad S2 and the third first pad S3, and a touch signal line T is provided between the third first pad S3 and the fourth first pad S4; a touch signal line T is provided between the first third pad D1 and the second third pad D2, two touch signal lines T are provided between the second third pad D2 and the third third pad D3, and a touch signal line T is provided between the third third pad D3 and the fourth third pad D4.

[0099] In other words, when the touch signal line T is distributed in both the area of ​​the first pad S and the area of ​​the third pad D, the wiring method of the touch signal line T can be flexibly configured. In this embodiment of the invention, no limitation is made. All wiring methods are intended to simplify the wiring difficulty.

[0100] In an optional embodiment of the present invention, reference is made to... Figure 18 , Figure 18 This is a schematic diagram of the structure of another display panel fan-out area provided in an embodiment of the present invention, with reference to... Figure 19 , Figure 19 This is a schematic diagram of the fan-out area of ​​a display panel according to another embodiment of the present invention. The third pad D is located on the first film layer, and the touch signal line T is located on the second film layer. The first film layer and the second film layer are different layers.

[0101] The orthographic projection of the touch signal line T onto the plane of the display panel 100 overlaps with the orthographic projection of the third pad D onto the plane of the display panel 100.

[0102] Specifically, in the embodiments of the present invention, such as Figure 18 As shown, by routing the touch signal line T on the bottom layer of the third pad D, the influence of the third pad D on the routing of the touch signal line T is reduced, the routing difficulty of the touch signal line T is reduced, and the number of touch signal lines T that can be set in the area where the third pad D is located can be increased by setting the touch signal line T on a different layer from the third pad D.

[0103] Furthermore, such as Figure 19 As shown, the touch signal line T in the area where the third pad D is located is partly located between two adjacent third pads D and partly routed from the bottom layer of the third pad D. In order to achieve connection with the array MUX test circuit 11, the number of touch signal lines T that can be set in the area where the third pad D is located is further increased.

[0104] In an optional embodiment of the present invention, reference is made to... Figure 20 , Figure 20 This is a schematic diagram of the structure of another display panel fan-out area provided in an embodiment of the present invention.

[0105] The third pad D is connected in series on the touch signal line T.

[0106] Specifically, in this embodiment of the invention, after the array MUX test circuit 11 is electrically connected to the data signal line L, a portion of the third pad D, which is not connected to the data signal line L, remains unconnected. At this time, the area where the third pad D is located does not have the wiring of the data signal line L. Therefore, in this embodiment of the invention, connecting the third pad D in series with the touch signal line T is equivalent to utilizing the third pad D, making it a part of the touch signal line T and also possessing signal transmission functionality. Furthermore, this simplifies the wiring method of the touch signal line T and the connection method between the touch signal line T and the array MUX test circuit 11.

[0107] In some other alternative embodiments, reference is made to Figure 21 , Figure 21 This is a schematic diagram of another display panel fan-out area provided in an embodiment of the present invention. The touch signal line T in the area where the third pad D is located is partly located between two adjacent third pads D, partly routed from the bottom layer of the third pad D, and partly connected in series on the touch signal line T by the third pad D. This further increases the number of touch signal lines T that can be set in the area where the third pad D is located, while achieving connection with the array MUX test circuit 11.

[0108] Obviously, there are other variations regarding the position of the touch signal line T, which will not be listed here.

[0109] Based on the above embodiments of the present invention, a method for controlling a display panel is also provided in another embodiment of the present invention, see reference. Figure 22 , Figure 22 This is a flowchart illustrating a control method for a display panel according to an embodiment of the present invention. The control method is based on the display panel 100 described in the above embodiment and includes:

[0110] S101: In the touch drive mode of the display panel 100, control multiple second switches K2 to be in the off state.

[0111] S102: Control driver chip IC to send touch signal to touch signal line T.

[0112] Based on the above embodiments of the present invention, correspondingly, this application also provides a display device, see reference. Figure 23 , Figure 23 This is a schematic diagram of a display device according to an embodiment of the present invention. The display device 200 includes the display panel 100 described in the above embodiments of this application. The display device 200 can be any display device with display function, such as a touch screen, mobile phone, tablet computer, laptop computer, e-reader, or television.

[0113] The above provides a detailed description of a display panel and its control method and display device provided by the present invention. Specific examples have been used to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only for the purpose of helping to understand the method and core ideas of the present invention. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of the present invention. Therefore, the content of this specification should not be construed as a limitation of the present invention.

[0114] It should be noted that the various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. Regarding the apparatus disclosed in the embodiments, since it corresponds to the method disclosed in the embodiments, the description is relatively simple; relevant parts can be referred to in the method section.

[0115] It should also be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that elements inherent to a process, method, article, or apparatus that comprises a list of elements, or elements inherent to such processes, methods, articles, or apparatus, are also included. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0116] The above description of the disclosed embodiments enables those skilled in the art to make or use the invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the invention. Therefore, the invention is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A display panel, characterized in that, The display panel includes: an array MUX test circuit, a driver chip, data signal lines, and touch signal lines; The array MUX test circuit includes multiple first pads, multiple second pads, multiple first switches, and N clock signal input terminals; N≥2, and N is a positive integer; A target unit is composed of N first pads, N first switches, and one second pad; in the target unit, the N first pads are electrically connected to the first terminals of the N first switches in a one-to-one correspondence, and the second terminals of the N first switches are all electrically connected to one second pad; the control terminals of the N first switches are electrically connected to the N clock signal input terminals in a one-to-one correspondence. One end of the data signal line is electrically connected to the first pad, and the other end extends toward the display area of ​​the display panel; The display panel further includes: a plurality of second switches; at least one first pad in the target unit is connected in series with a second switch on the connection path between the first switch and the first switch, and one end of the touch signal line is electrically connected to the first end of the first switch on the target connection path; the target connection path is at least one of the connection paths in the target unit with the second switch connected in series. The other end of the touch signal line extends toward the display area of ​​the display panel and is electrically connected to the touch electrode block; The driver chip is electrically connected to the array MUX test circuit via the second pad; in the touch driving mode of the display panel, the plurality of second switches are in the off state, and the driver chip sends touch signals to the touch signal line.

2. The display panel according to claim 1, characterized in that, In the target unit, a second switch is connected in series on the connection path between each of the first pads and the first switch.

3. The display panel according to claim 2, characterized in that, In the target unit, at least one target connection path is spaced apart from the target connection path, and one touch signal line is connected to each target connection path.

4. The display panel according to claim 1, characterized in that, The target unit has at least one second switch connected in series on the connection path after a gap of one connection path.

5. The display panel according to claim 1, 2, or 4, characterized in that, Each of the target connection paths corresponds to one of the touch signal lines.

6. The display panel according to claim 1, characterized in that, The first pad is electrically connected to the first terminal of the first switch via a first signal line; One end of the touch signal line is shorted to the first signal line.

7. The display panel according to claim 1, characterized in that, The touch signal line is located between two adjacent first pads.

8. The display panel according to claim 7, characterized in that, The number of touch signal lines between two adjacent first pads is H1, and the number of touch signal lines between two adjacent first pads is H2. Where H1≠H2.

9. The display panel according to claim 1, characterized in that, The array MUX test circuit includes multiple third pads, and the multiple third pads are located on the same side as the multiple first pads; Multiple of the third pads are in an unconnected state.

10. The display panel according to claim 9, characterized in that, The touch signal line is located between two adjacent third pads.

11. The display panel according to claim 10, characterized in that, The number of touch signal lines between two adjacent third pads is Y1, and the number of touch signal lines between two adjacent third pads is Y2. Where Y1≠Y2.

12. The display panel according to claim 9, characterized in that, A portion of the touch signal lines are located between two adjacent first pads, and a portion of the touch signal lines are located between two adjacent third pads.

13. The display panel according to claim 12, characterized in that, The number of touch signal lines located between two adjacent first pads is W1, and the number of touch signal lines located between two adjacent third pads is W2; Where W1≠W2.

14. The display panel according to claim 9, characterized in that, The third pad is located on the first film layer, and the touch signal line is located on the second film layer. The first film layer and the second film layer are different layers. The orthographic projection of the touch signal line onto the plane of the display panel overlaps with the orthographic projection of the third pad onto the plane of the display panel.

15. The display panel according to claim 9, characterized in that, The third pad is connected in series on the touch signal line.

16. The display panel according to claim 1, characterized in that, The clock signals received by the N clock signal input terminals are either high-level signals or low-level signals with different timing sequences.

17. The display panel according to claim 1, characterized in that, Both the first switch and the second switch are PMOS transistors.

18. A method for controlling a display panel, characterized in that, Based on the display panel according to any one of claims 1-17, the control method of the display panel includes: In the touch-driven mode of the display panel, multiple second switches are controlled to be in the off state; The control driver chip sends touch signals to the touch signal line.

19. A display device, characterized in that, The display device includes the display panel as described in any one of claims 1-17.

Citation Information

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