A time-division multiplexing multi-beam synthesizer based on current sharing

Abstract

The present invention discloses a time-division multiplexing multi-beam synthesizer based on current sharing, which includes M channels, supports N independent beams, and supports bidirectional operation of transmission and reception. Each channel is composed of a channel-end IO circuit and N-way bidirectional phase-shift attenuators, and the N beam-end IO circuits synthesize the radio frequency signals from the M channels. Both the channel-end IO circuit and the beam-end IO circuit use a common source splitter and a common gate synthesizer to complete signal distribution and synthesis. The bidirectional phase-shift attenuator is composed of two parallel I / Q paths, and the two I / Q paths are connected in series in the order of "digital transconductance array-I / Q phase-shift network-digital transconductance array". The beam synthesizer realizes different functions such as phase shift control, gain change, and transmission and reception switching by configuring the bias state of the transistor, and adopts current sharing technology to achieve low power consumption and small area, and supports scalable M channels and N beams.

Description

Technical Field

[0001] The present invention relates to the field of integrated circuits, and in particular to a time-division multiplexing multi-beam synthesizer based on current sharing. Background Art

[0002] Beamformer is an important component in beamforming technology that generates multiple beams of different phases and synthesizes them. It has been widely used in 5G communication, satellite communication and other fields. Multi-beam technology gives phased arrays the ability to communicate with multiple users in real time through space division multiplexing, which is of great significance for improving the capacity of communication systems.

[0003] Traditional time-division multiplexing multi-beam synthesizers are implemented based on discrete devices, resulting in high energy consumption and large size of the array system. With the advancement of semiconductor technology, monolithic integrated time-division multiplexing multi-beam synthesizers have gradually emerged. However, the number of amplitude and phase control modules integrated in the multi-beam synthesizer is equal to the number of channels N. E and the number of beams N B As a result, the multi-beam synthesizer still faces problems such as large chip area and high power consumption.

[0004] The traditional passive beamforming circuit architecture uses passive attenuators, passive phase shifters, and Wilkinson power synthesizers to achieve amplitude phase control and power synthesis, which has a large chip area and complex connection relationships. Secondly, the high-precision passive phase shifters and passive attenuators have large insertion losses, and additional active amplifiers are required to compensate for the gain, thereby reducing the power consumption advantage of the passive beamforming network. Currently, there is an urgent need for a new type of time-division multiplexing multi-beam synthesizer that can achieve low power consumption and small area while ensuring phase shift and attenuation control of multi-channel multi-beams. Summary of the invention

[0005] In view of the shortcomings of the prior art, the present invention proposes a time-division multiplexing multi-beam synthesizer based on current sharing, and the specific technical solution is as follows:

[0006] The present invention includes M channels, supports N beams, and satisfies the function of bidirectional signal transmission and reception;

[0007] In any channel, the channel end IO circuit is connected to one end of the N-way bidirectional phase shift attenuator; at the same time, the other ends of the i-th bidirectional phase shift attenuators of all M channels are combined together to form N beams, which are respectively connected to the i-th beam end IO circuit; where i∈ [1, N], and i is a positive integer;

[0008] The channel-end IO circuit and the beam-end IO circuit both include a common-source splitter and a common-gate synthesizer;

[0009] The bidirectional phase-shift attenuator comprises an I-phase shift network and a Q-phase shift network connected in parallel, and a digital transconductance array located at both ends of each phase-shift network;

[0010] After the multi-beam synthesizer is configured in a receiving or transmitting mode, the channel-end IO circuit, the bidirectional phase shift attenuator and the beam-end IO circuit module share a DC current.

[0011] Compared with the prior art, the present invention has the following beneficial effects:

[0012] (1) The time-division multiplexing multi-beam synthesizer adopts current sharing technology to integrate modules such as channel-end IO circuit, bidirectional phase shift attenuator, and beam-end IO circuit, adopts active power synthesis and distribution method, and uses a single power supply to effectively reduce chip area and power consumption. In addition, the architecture is easy to expand in terms of the number of channels and the number of beams.

[0013] (2) The time-division multiplexing multi-beam synthesizer can realize bidirectional beam synthesis for transmission and reception by changing the DC operating point, shutting down some common-source splitters and common-gate synthesizers, and configuring the working state of the bidirectional phase-shift attenuator, thereby supporting time-division multiplexing. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0015] Figure 1 It is a system architecture diagram of a time-division multiplexing multi-beam synthesizer based on current sharing of the present invention;

[0016] Figure 2 It is a schematic diagram of a common source splitter of a time-division multiplexing multi-beam synthesizer based on current sharing of the present invention;

[0017] Figure 3 It is a common-grid synthesizer principle diagram of a time-division multiplexing multi-beam synthesizer based on current sharing of the present invention;

[0018] Figure 4 It is a principle diagram of a digital transconductance array of a time-division multiplexing multi-beam synthesizer based on current sharing of the present invention;

[0019] Figure 5 It is a principle diagram of an I-channel phase shift network of a time-division multiplexing multi-beam synthesizer based on current sharing of the present invention;

[0020] Figure 6The present invention discloses a Q-path phase shift network principle diagram of a time-division multiplexing multi-beam synthesizer based on current sharing. DETAILED DESCRIPTION

[0021] The present invention will be described in detail below according to the accompanying drawings and preferred embodiments, and the purpose and effect of the present invention will become more clear. The present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention.

[0022] It should also be noted that, in order to avoid obscuring the present invention due to unnecessary details, only structures and / or processing steps closely related to the solutions according to the present invention are shown in the accompanying drawings, while other details that are not closely related to the present invention are omitted.

[0023] Also, in the description of the present invention, the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc., indicating the orientation or positional relationship, are based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operate in a specific orientation, and therefore cannot be understood as limiting the present invention. In addition, the terms "first" and "second" are used for descriptive purposes only and cannot be understood as indicating or implying relative importance.

[0024] Figure 1 It is a time-division multiplexing multi-beam synthesizer based on current sharing, such as Figure 1 As shown, it includes M channels, supports N beams, and satisfies the function of bidirectional signal reception and transmission; in any channel, the channel-end IO circuit is connected to one end of the N-way bidirectional phase-shift attenuator; at the same time, the other ends of the i-th (i∈ [1, N], and i is a positive integer) bidirectional phase-shift attenuators of all M channels are merged together to form N beams, which are respectively connected to the i-th beam-end IO circuit; the channel-end IO circuit and the beam-end IO circuit both include a common-source splitter and a common-gate synthesizer; the bidirectional phase-shift attenuator is formed by connecting I and Q paths in parallel, and the I path (or Q path) is connected in series with a digital transconductance array, an I path (or Q path) phase shift network, and a digital transconductance array; after the multi-beam synthesizer is configured in receiving or transmitting mode, the channel-end IO circuit, the bidirectional phase-shift attenuator, and the beam-end IO circuit modules share a DC current.

[0025] Furthermore, the channel-end IO circuit 101 has the following structure: the input end of the common-source splitter 102 and the output end of the common-gate synthesizer 103 are signal interfaces of the channel-end IO circuit 101; the output end of the common-source splitter 102 is connected to the input end of the common-gate synthesizer 103, and is connected to a passive one-to-N network 104, and the remaining N ports of the network are respectively connected to N bidirectional phase-shift attenuators of the same channel.

[0026] Furthermore, the bidirectional phase shift attenuator 105 is formed by connecting two paths, I and Q, in parallel, wherein the I path is connected in series with a digital transconductance array 106, an I path phase shift network 110 and a digital transconductance array 107 in sequence; wherein the Q path is connected in series with a digital transconductance array 108, a Q path phase shift network 111 and a digital transconductance array 109 in sequence; the circuit topology of all digital transconductance arrays (106, 107, 108, 109) is the same, and has two working modes, forward or reverse.

[0027] Furthermore, the beam end IO circuit 112 has the following structure: the input end of the common-source splitter 114 and the output end of the common-gate synthesizer 115 are signal interfaces of the beam end IO circuit 112; the output end of the common-source splitter 114 is connected together with the input end of the common-gate synthesizer 115, and is connected to a passive M-in-one network 113, and the remaining M ports of the network are respectively connected to M-way bidirectional phase-shift attenuators located in different channels.

[0028] Figure 2 The common source splitters 102 and 114 in this embodiment have the same circuit topology structure, including a transformer X 1 , transistor M a1 and M a2 ;Signal interface IP 1 , IN 1 Connected to transformer X 1 Both ends of the primary coil; Transformer X 1 One end of the secondary coil is connected to node V IP1 , and connected to transistor M a1 The gate of transformer X 1 The other end of the secondary coil is connected to node V IN1 , and connected to transistor M a2 The gate of transformer X 1 The center tap of the secondary coil is connected to the bias voltage port V G1 ; Transistor M a1 and M a2 The source is connected to port V S1 , transistor M a1 The drain is connected to port V OP1 , transistor M a2 The drain is connected to port V ON1; Port V OP1 and V ON1 Common output differential signal.

[0029] Figure 3 The common-gate synthesizer 103 and 115 in this embodiment have the same circuit topology structure, including a transformer X 2 , transistor M b1 and M b2 ; The positive end of the input differential signal is V IP2 , the negative terminal is V IN2 ; Port V IP2 Connect to transistor M b1 The source terminal, port V IN2 Connect to transistor M b2 The source of transistor M b1 and M b2 The gates of the G2 ; Transistor M b1 The drain is connected to node V OP2 , and connected to transformer X 2 One end of the primary coil; transistor M b2 The drain is connected to node V ON2 , and connected to transformer X 2 The other end of the primary coil of the transformer X 2 The center tap of the primary coil is connected to port V D2 ; Transformer X 2 The secondary coil is connected to the output port OP 2 and ON 2 , port OP 2 and ON 2 Common output differential signal.

[0030] Figure 4 The digital transconductance arrays 106, 107, 108, and 109 in this embodiment have the same circuit topology structure and all include a radio frequency signal port IP. 3 , IN 3 OP 3 and ON 3 , and consists of K groups of common-gate cross-connected amplifiers and a bias voltage control circuit; the bias voltage control circuit generates a body terminal voltage V B3 , K groups of cross-connected amplifier control voltage V GP3 and V GN3 , used to configure the working status of the digital transconductance array.

[0031] Furthermore, each group of common-gate cross-connected amplifiers includes four transistors M c1 、M c2、M c3 and M c4 , transistor M c1 and M c2 Source connection port IP 3 , transistor M c3 and M c4 The source connection port IN 3 , transistor M c1 and M c3 The drain connection port OP 3 , transistor M c2 and M c4 The drain connection port is ON 3 , transistor M c1 、M c2 、M c3 and M c4 The body terminal is connected to V B3 , transistor M c1 and M c4 The gate connection V GP3 , transistor M c2 and M c3 The gate connection V GN3 .

[0032] Figure 5 1 is a schematic diagram of an I-phase shifting network. The I-phase shifting network 110 in this embodiment includes a capacitor C d1 and C d2 , inductance L d1 and L d2 , RF signal port IP 4 , IN 4 OP 4 and ON 4 ;Port IP 4 Connect capacitor C d1 One end of the capacitor C d1 The other end is connected to port OP 4 , port IN 4 Connect capacitor C d2 One end of the capacitor C d2 Connect the other end to port ON 4 , port IP 4 Connection inductance L d1 One end of the inductor L d1 Connect the other end to port IN 4 , port OP 4 Connection inductance L d2 One end of the inductor L d2 The other end of the connection port ON 4 ; Inductance L d1 The middle tap node of the coil and the inductance L d2The middle tap nodes of the coils are connected to realize DC conduction. The phase shift network of path I realizes the high-pass filter characteristics of passing high frequencies and blocking low frequencies based on series capacitors and parallel inductors.

[0033] Figure 6 The Q-path phase shift network 111 in this embodiment includes a capacitor C d3 and C d4 , inductance L d3 and L d4 , RF signal port IP 5 , IN 5 OP 5 and ON 5 ;Port IP 5 Connect capacitor C d3 One end of the capacitor C d3 Connect the other end to port IN 5 , port OP 5 Connect capacitor C d4 One end of the capacitor C d4 Connect the other end to port ON 5 , port IP 5 Connection inductance L d3 One end of the inductor L d3 The other end is connected to port OP 5 , port IN 5 Connection inductance L d4 One end of the inductor L d4 The other end of the connection port ON 5 The Q-path phase-shifting network realizes the low-pass filter characteristics of passing low frequencies and blocking high frequencies based on series inductance and parallel capacitance. After setting the appropriate cut-off frequency according to the needs, the I-path phase-shifting network and the Q-path phase-shifting network with low-pass characteristics can output orthogonal signals with a phase difference of 90 degrees respectively when the same-phase initial signal is input, and have bidirectional conductivity.

[0034] The working principle of the time-division multiplexing multi-beam synthesizer based on current sharing described in the present invention is as follows:

[0035] Receive multi-beam synthesizer working mode: by controlling the transistor bias state, the common source splitter 102 and the common gate synthesizer 115 are working, and the common source splitter 114 and the common gate synthesizer 103 are turned off; in the bidirectional phase shift attenuator 105, as Figure 4 As shown, the body bias voltage V B3 Equal to port IP 3 and IN 3 DC voltage to form a common-gate amplifier structure to amplify the received signal; in the common-gate synthesizer 115 (circuit structure Figure 3 ) of the load transformer X 2The center tap is connected to port V D2 It is the DC power supply end, in the common source splitter 102 (circuit structure Figure 2 ) port V S1 is the DC ground terminal; at port V D2 When the connected DC voltage is higher than the voltage at which a single transistor used in the multi-beam synthesizer can work reliably for a long time, the transistor used in the multi-beam synthesizer can work reliably for a long time by properly configuring the bias state of each module. Figure 1 The flow path from left to right in the figure is: common-source splitter 102-passive one-to-N network 104-bidirectional phase-shift attenuator 105-passive M-to-one network 113-common-gate synthesizer 115. Since all modules on this path are connected in series and share DC current, the chip area and power consumption are effectively reduced, and the architecture is easy to expand in terms of the number of channels and the number of beams.

[0036] Transmit multi-beam synthesizer operation mode: by controlling the transistor bias state, the common source splitter 102 and the common gate synthesizer 115 are turned off, and the common source splitter 114 and the common gate synthesizer 103 are working; in the bidirectional phase shift attenuator 105, the body end bias voltage V B3 Equal to port OP 3 and ON 3 The DC voltage is used to form a common-gate amplifier structure to amplify the transmission signal; the load transformer X of the common-gate synthesizer 103 2 The center tap is connected to port V D2 is the DC power supply end, at the port V of the common source splitter 114 S1 is the DC ground terminal; at port V D2 When the connected DC voltage is higher than the voltage at which a single transistor used in the multi-beam synthesizer can work reliably for a long time, the transistor used in the multi-beam synthesizer can work reliably for a long time by properly configuring the bias state of each module. Figure 1 The flow path from right to left in the figure is: common-source splitter 114-passive M-in-one network 113-bidirectional phase-shift attenuator 105-passive one-to-N network 104-common-gate synthesizer 103. Since all modules on this path are connected in series and share DC current, the chip area and power consumption are effectively reduced, and the architecture is easy to expand in terms of the number of channels and the number of beams.

[0037] The receiving multi-beam synthesizer working mode and the transmitting multi-beam synthesizer working mode can realize the receiving and transmitting bidirectional beam synthesis by changing the DC working points at both ends, shutting down some common source splitters and common gate synthesizers, and configuring the working state of the bidirectional phase shift attenuator, and supporting time division multiplexing. The multi-beam synthesizer adopts an active circuit structure to complete the multi-channel distribution and multi-beam synthesis of RF signals in the current domain. In both the receiving and transmitting working modes, the common source splitter, the bidirectional phase shift attenuator and the common gate synthesizer all share the DC current, which effectively reduces the chip area and power consumption.

[0038] The embodiments of the present invention are described above in conjunction with the accompanying drawings, but the present invention is not limited to the above-mentioned specific implementation modes, which are merely illustrative rather than restrictive. Under the guidance of the present invention, ordinary technicians in this field can also make many forms without departing from the scope of protection of the present invention and the claims, all of which are within the protection of the present invention.

Claims

1. A time-division multiplexing multi-beam synthesizer based on current sharing, characterized in that: It contains M channels, supports N beams, and satisfies the function of bidirectional signal transmission and reception; In any channel, the channel end IO circuit is connected to one end of the N-way bidirectional phase shift attenuator; at the same time, the other ends of the i-th bidirectional phase shift attenuators of all M channels are combined together to form N beams, which are respectively connected to the i-th beam end IO circuit; Where i∈ [1, N], and i is a positive integer; The channel-end IO circuit and the beam-end IO circuit both include a common-source splitter and a common-gate synthesizer; The bidirectional phase-shift attenuator comprises an I-phase shift network and a Q-phase shift network connected in parallel, and a digital transconductance array located at both ends of each phase-shift network; After the multi-beam synthesizer is configured in a receiving or transmitting mode, the channel-end IO circuit, the bidirectional phase shift attenuator and the beam-end IO circuit module share a DC current; The common source splitter includes a transformer X1, a transistor M a1 and transistor M a2 ; Signal interfaces IP1 and IN1 are connected to both ends of the primary coil of transformer X1 respectively; one end of the secondary coil of transformer X1 is connected to node V IP1 , and connected to transistor M a1 The other end of the secondary coil of transformer X1 is connected to node V IN1 , and connected to transistor M a2 The gate of transformer X1; the center tap of the secondary coil is connected to the bias voltage port V G1 ; Transistor M a1 and M a2 The source is connected to port V S1 , transistor M a1 The drain is connected to port V OP1 , transistor M a2 The drain is connected to port V ON1 ; Port V OP1 and V ON1 Commonly output differential signals; The common-gate synthesizer includes a transformer X2, a transistor M b1 and transistor M b2 ; The positive end of the input differential signal is V IP2 , the negative terminal is V IN2 ; Port V IP2 Connect to transistor M b1 The source terminal, port V IN2 Connect to transistor M b2 The source of Transistor M b1 and transistor M b2 The gates of the G2 ; Transistor M b1 The drain is connected to node V OP2 , and connected to one end of the primary coil of transformer X2; transistor M b2 The drain is connected to node V ON2 , and connected to the other end of the primary coil of transformer X2; the center tap of the primary coil of transformer X2 is connected to port V D2 The secondary coil of the transformer X2 is connected to the output port OP2 and the output port ON2, and the output port OP2 and the output port ON2 jointly output a differential signal; The digital transconductance array comprises radio frequency signal ports IP3, IN3, OP3 and ON3, and is composed of K groups of common-gate cross-connected amplifiers and a bias voltage control circuit; the bias voltage control circuit generates a body terminal voltage V B3 , K groups of cross-connected amplifier control voltage V GP3 and V GN3 , used to configure the working state of the digital transconductance array; The phase shifting network of path I includes capacitor C d1 and C d2 , inductance L d1 and L d2 RF signal ports IP4, IN4, OP4 and ON4; port IP4 is connected to capacitor C d1 One end of the capacitor C d1 The other end is connected to port OP4, and port IN4 is connected to capacitor C d2 One end of the capacitor C d2 The other end is connected to port ON4; port IP4 is connected to inductor L d1 One end of the inductor L d1 The other end is connected to port IN4, and port OP4 is connected to inductor L d2 One end of the inductor L d2 The other end of the inductor is connected to port ON4; d1 The middle tap node of the coil and the inductance L d2 The middle tap nodes of the coils are connected to achieve DC conduction; The Q-path phase shifting network includes a capacitor C d3 and C d4 , inductance L d3 and L d4 RF signal ports IP5, IN5, OP5 and ON5; port IP5 is connected to capacitor C d3 One end of the capacitor C d3 The other end is connected to port IN5, and port OP5 is connected to capacitor C d4 One end of the capacitor C d4 The other end is connected to port ON5, and port IP5 is connected to inductor L d3 One end of the inductor L d3 The other end is connected to port OP5, and port IN5 is connected to inductor L d4 One end of the inductor L d4 Connect the other end to port ON5.

2. A time-division multiplexing multi-beam synthesizer based on current sharing according to claim 1, characterized in that: The channel-end IO circuit has the following structure: the input end of the common-source splitter and the output end of the common-gate synthesizer are signal interfaces of the channel-end IO circuit; the output end of the common-source splitter and the input end of the common-gate synthesizer are connected together and connected to a single entrance on one side of a passive one-to-N network, and the N ports on the other side of the passive one-to-N network are respectively connected to N bidirectional phase-shift attenuators of the same channel.

3. The time-division multiplexing multi-beam synthesizer based on current sharing according to claim 1, characterized in that: The digital transconductance array circuits at both ends of each phase shift network have the same topological structure and have two working modes: forward or reverse.

4. The time-division multiplexing multi-beam synthesizer based on current sharing according to claim 1, characterized in that: The beam end IO circuit has the following structure: the input end of the common-source splitter and the output end of the common-gate synthesizer are the signal interfaces of the beam end IO circuit; the output end of the common-source splitter and the input end of the common-gate synthesizer are connected together and connected to a single entrance on one side of the passive M-in-one network, and the M ports on the other side of the passive M-in-one network are respectively connected to M bidirectional phase-shift attenuators located in different channels.

5. The time-division multiplexing multi-beam synthesizer based on current sharing according to claim 1, characterized in that: Each group of common-gate cross-connected amplifiers includes four transistors M c1 、M c2 、M c3 and M c4 , transistor M c1 and M c2 The source of the transistor M is connected to port IP3. c3 and M c4 The source of transistor M is connected to port IN3. c1 and M c3 The drain of transistor M is connected to port OP3. c2 and M c4 The drain of transistor M is connected to port ON3. c1 、M c2 、M c3 and M c4 The body terminal is connected to V B3 , transistor M c1 and M c4 The gate connection V GP3 , transistor M c2 and M c3 The gate connection V GN3 .

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