A high-precision timekeeping method suitable for embedded devices

Abstract

The invention discloses a high-precision timekeeping method suitable for embedded devices, including second pulse timekeeping and TOD time information timekeeping; the second pulse timekeeping includes the following steps: 11) frequency deviation state detection; 12) frequency deviation data collection; 13) time de-jittering; 14) time compensation value calculation; 15) local time counting; 16) embedded software processing; TOD time information timekeeping includes the following steps: 21) second pulse loss detection; 22) time information collection; 23) embedded software processing; 24) time information output. The timekeeping method of the invention can accurately provide time when the satellite navigation signal is unstable, thereby improving the reliability of the device.

Description

Technical Field

[0001] The present invention relates to the technical field of timekeeping, and in particular to a high-precision timekeeping method suitable for embedded devices. Background Art

[0002] High-precision time frequency plays a vital role in many fields. Satellite navigation signals can provide very stable clock signals, so they are widely used in all walks of life. The 1PPS pulse-per-second signal and the TOD time information signal are the commonly used satellite navigation timing signal combinations. However, the stability of the satellite navigation module receiving the satellite navigation signal is affected by many factors such as weather, and the problem of satellite navigation signal loss may occur. The reliability of the timekeeping equipment needs to be improved. Summary of the invention

[0003] In view of the above-mentioned defects or deficiencies in the prior art, it is desirable to provide a high-precision timekeeping method suitable for embedded devices, which can accurately provide time when the satellite navigation signal is unstable, thereby improving the reliability of the device.

[0004] The present invention provides a high-precision timekeeping method suitable for embedded devices, including second pulse timekeeping and TOD time information timekeeping;

[0005] The pulse-per-second timing comprises the following steps:

[0006] 11) Frequency deviation status detection: when the rising edge of the second pulse is detected, the deviation between the external time count output by the embedded software processing module and the local time count is compared to determine its frequency deviation status;

[0007] 12) Frequency deviation data collection: according to different frequency deviation states, either directly update the local time count through the external time count value and proceed to step 16), or calculate the corresponding frequency deviation data and proceed to step 13);

[0008] 13) Time de-jitter: when the frequency deviation data is less than the preset de-jitter threshold, the external second pulse and external time count are ignored as second pulse jitter; when the frequency deviation data is greater than the de-jitter threshold, the external time count is used to update the local time count value;

[0009] 14) Time compensation value calculation: calculate the sliding average of a preset number of frequency deviation data and update the time compensation value based on the sliding average;

[0010] 15) Local time count, update the local time count through the external time count value, and then synchronize the external time count with the local time count, and update the local time count increment in real time according to the calculated time compensation value;

[0011] 16) Embedded software processing: the embedded software processing module provides external time counting to the second pulse timing logic module;

[0012] The TOD time information punctuality comprises the following steps:

[0013] 21) Second pulse loss detection: the second pulse loss detection module sets a second counter to count the number of clock cycles of whole seconds; if the second counter counts to a whole second within a preset number of times and detects a second pulse, then proceed to step 22), otherwise, a second pulse loss signal is output and the process proceeds to step 23);

[0014] 22) Time information collection: the time information collection module determines the type of the time information packet according to the header data of the collected time information packet, extracts the corresponding bytes of the time information packet to form the time information data, and transmits it to the embedded software processing module; the embedded software processing module receives the time information data, adds 1 second to it, and then transmits it to the time information output module, and enters step 24);

[0015] 23) Embedded software processing: the embedded software processing module directly extracts the existing time information from the output time information register, adds 1s to it and returns it to the output time information register; the time information output module extracts the time information data from the output time information register;

[0016] 24) Time information output: After the time information output module detects the sending of the second pulse, it sends the received time information data through the serial port.

[0017] Further, in step 11), the frequency deviation state includes:

[0018] State state1, the deviation of the second count part of the external time count value E and the local time count value L is greater than 1s;

[0019] State state2, the second count part of the external time count value E is the same as the second count part of the local time count value L, and the clock cycle count part of the external time count value E is greater than the clock cycle count part of the local time count value L;

[0020] State state3, the second count part of the external time count value E is the same as the second count part of the local time count value L, and the clock cycle count part of the external time count value E is smaller than the clock cycle count part of the local time count value L;

[0021] In state 4, the second count part of the external time count value E is 1 second greater than the second count part of the local time count value L;

[0022] In state 5, the second count portion of the external time count value E is 1 second smaller than the second count portion of the local time count value L.

[0023] Furthermore, in step 12), in state 1, it is not necessary to collect frequency deviation data, and the local time count is updated by the external time count value and the process goes to step 16);

[0024] In state2, frequency deviation data = EL;

[0025] In state3, frequency deviation data = LE;

[0026] In state 4, frequency deviation data = CNT_1S + EL;

[0027] In state 5, frequency deviation data = CNT_1S + LE;

[0028] Wherein, CNT_1S is the number of clock cycles per second of the local clock.

[0029] Furthermore, in step 12), the frequency deviation data is converted into a signed two's complement;

[0030] In any frequency deviation state of state2, state3, state4 or state5, if the frequency deviation data is less than the de-jitter threshold value M1, the signed number complement = 0;

[0031] In state 2 or state 4, if the frequency deviation data is greater than the preset error threshold M2, the signed number complement = M2, otherwise the signed number complement = frequency deviation data;

[0032] In state 3 or state 5, if the frequency deviation data is greater than the preset error threshold M2, the signed number complement = 0-M2, otherwise the signed number complement = 0-frequency deviation data.

[0033] Furthermore, in step 14), when the signed complement of 32 frequency deviation data is collected, the average value thereof is calculated, and the average value is the frequency deviation average value m1 per second; thereafter, each time one frequency deviation data is collected, the sliding average value m1 of the 32 frequency deviation data is calculated. i ;

[0034] Time compensation value per second t j The calculation formula is:

[0035] ;

[0036] When t j When the positive overflow value M3 is greater than the preset value, t j =M3; when t j When the negative overflow value is less than the preset value -M3, t j =-M3.

[0037] Furthermore, in the step 15), the clock cycle counting part of the local time counting increases with the local clock. If the compensation enable signal is detected and the time compensation value is a positive number, the counter increment of the local time counting is equal to the time compensation value; if the compensation enable signal is detected and the time compensation value is a negative number, the counter increment is restored to 0, and the clock cycle counting part stops, and after waiting for the inverse clock cycle of the time compensation value, the counting continues, and the counter increment is restored to 1; in other cases, the counter increment is 1; when it is detected that the clock cycle counting part counts to 1s of the local clock, the second counting part is +1;

[0038] The number of compensation cycles of the 1s clock cycle count of the preset local time count is a, and the compensation cycle frequency deviation value b=t j / a, a compensation cycles within 1s clock cycle count are respectively +b.

[0039] Compared with the prior art, the beneficial effects of the present invention are:

[0040] The timekeeping method of the present invention is based on the signal (second pulse) output by the satellite navigation module, and performs timekeeping processing on the second pulse; through frequency deviation state detection, frequency deviation data collection, time de-jittering, time compensation value calculation, local time counting, and embedded software processing, the synchronization of locally generated second pulses and satellite navigation module second pulses is achieved, and the generation of second pulses is maintained when there is no satellite navigation module second pulse; for TOD time information timekeeping, through second pulse loss detection, time information collection, embedded software processing, and time information output, the forwarding of TOD time information of the satellite navigation module is achieved, and the normal sending of TOD time information when the satellite navigation module signal is lost is achieved, thereby greatly improving the reliability of the equipment.

[0041] It should be understood that the contents described in the summary of the invention are not intended to limit the key or important features of the embodiments of the present invention, nor are they intended to limit the scope of the present invention. Other features of the present invention will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] Other features, objects and advantages of the present invention will become more apparent from the detailed description of non-limiting embodiments made with reference to the following drawings:

[0043] Figure 1 Flow chart for timing the pulse per second;

[0044] Figure 2 Flowchart for keeping time information for TOD. DETAILED DESCRIPTION

[0045] The present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It is to be understood that the specific embodiments described herein are only used to explain the relevant invention, rather than to limit the invention. It should also be noted that, for ease of description, only the parts related to the invention are shown in the accompanying drawings.

[0046] It should be noted that, in the absence of conflict, the embodiments of the present invention and the features in the embodiments can be combined with each other. The present invention will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.

[0047] Please refer to Figure 1~Figure 2 , an embodiment of the present invention provides a high-precision timekeeping method suitable for embedded devices, including second pulse timekeeping and TOD time information timekeeping;

[0048] Pulse-second timing includes the following steps:

[0049] 11) Frequency deviation status detection: when the rising edge of the second pulse is detected, the deviation between the external time count output by the embedded software processing module and the local time count is compared to determine its frequency deviation status;

[0050] Frequency deviation states include:

[0051] State state1, the deviation of the second count part of the external time count value E and the local time count value L is greater than 1s;

[0052] State state2, the second count part of the external time count value E is the same as the second count part of the local time count value L, and the clock cycle count part of the external time count value E is greater than the clock cycle count part of the local time count value L;

[0053] State state3, the second count part of the external time count value E is the same as the second count part of the local time count value L, and the clock cycle count part of the external time count value E is smaller than the clock cycle count part of the local time count value L;

[0054] In state 4, the second count part of the external time count value E is 1 second greater than the second count part of the local time count value L;

[0055] In state 5, the second count part of the external time count value E is 1 second less than the second count part of the local time count value L;

[0056] 12) Frequency deviation data collection: according to different frequency deviation states, either directly update the local time count through the external time count value and proceed to step 16), or calculate the corresponding frequency deviation data and proceed to step 13);

[0057] In state 1, there is no need to collect frequency deviation data, and the local time count is updated by the external time count value and the process goes to step 16);

[0058] In state2, frequency deviation data = EL;

[0059] In state3, frequency deviation data = LE;

[0060] In state 4, frequency deviation data = CNT_1S + EL;

[0061] In state 5, frequency deviation data = CNT_1S + LE;

[0062] Where CNT_1S is the number of clock cycles per second of the local clock;

[0063] Convert the frequency deviation data into a signed complement;

[0064] In any frequency deviation state of state2, state3, state4 or state5, if the frequency deviation data is less than the de-jitter threshold value M1, the signed number complement = 0;

[0065] In state 2 or state 4, if the frequency deviation data is greater than the preset error threshold M2, the signed number complement = M2, otherwise the signed number complement = frequency deviation data;

[0066] In state 3 or state 5, if the frequency deviation data is greater than the preset error threshold value M2, the signed number complement = 0-M2, otherwise the signed number complement = 0-frequency deviation data;

[0067] 13) Time de-jitter: when the frequency deviation data is less than the preset de-jitter threshold, the external second pulse and external time count are ignored as second pulse jitter; when the frequency deviation data is greater than the de-jitter threshold, the external time count is used to update the local time count value;

[0068] 14) Time compensation value calculation: calculate the sliding average of a preset number of frequency deviation data and update the time compensation value based on the sliding average;

[0069] When the signed complement of 32 frequency deviation data is collected, the average value is calculated, which is the average value of the frequency deviation per second m1; after that, each time one frequency deviation data is collected, the sliding average value m of the 32 frequency deviation data is calculated. i ;

[0070] Time compensation value per second t j The calculation formula is:

[0071] ;

[0072] When t j When the positive overflow value M3 is greater than the preset value, t j=M3; when t j When the negative overflow value is less than the preset value -M3, t j =-M3;

[0073] 15) Local time count, update the local time count through the external time count value, and then synchronize the external time count with the local time count, and update the local time count increment in real time according to the calculated time compensation value;

[0074] The clock cycle count part of the local time count increases with the local clock. If the compensation enable signal is detected and the time compensation value is a positive number, the counter increment of the local time count is equal to the time compensation value; if the compensation enable signal is detected and the time compensation value is a negative number, the counter increment is restored to 0, and the clock cycle count part stops, and after waiting for the inverse clock cycle of the time compensation value, it continues to count and the counter increment is restored to 1; in other cases, the counter increment is 1; when it is detected that the clock cycle count part counts to 1s of the local clock, the second count part is +1;

[0075] The number of compensation cycles of the 1s clock cycle count of the preset local time count is a, and the compensation cycle frequency deviation value b=t j / a, a compensation cycles within 1s clock cycle count are respectively +b;

[0076] 16) Embedded software processing: the embedded software processing module provides external time counting to the second pulse timing logic module;

[0077] TOD time information punctuality includes the following steps:

[0078] 21) Second pulse loss detection: the second pulse loss detection module sets a second counter to count the number of clock cycles of whole seconds; if the second counter counts to a whole second within a preset number of times and detects a second pulse, then proceed to step 22), otherwise, a second pulse loss signal is output and the process proceeds to step 23);

[0079] 22) Time information collection: the time information collection module determines the type of the time information packet according to the header data of the collected time information packet, extracts the corresponding bytes of the time information packet to form the time information data, and transmits it to the embedded software processing module; the embedded software processing module receives the time information data, adds 1 second to it, and then transmits it to the time information output module, and enters step 24);

[0080] 23) Embedded software processing: the embedded software processing module directly extracts the existing time information from the output time information register, adds 1s to it and returns it to the output time information register; the time information output module extracts the time information data from the output time information register;

[0081] 24) Time information output: After the time information output module detects the sending of the second pulse, it sends the received time information data through the serial port.

[0082] In this embodiment, for the second pulse signal output by the satellite navigation module, the frequency deviation state detection module and the frequency deviation data acquisition module receive the satellite navigation module signal, the external time count value output by the embedded software processing module and the local time count value output by the local time count module, and output the frequency deviation data; the frequency deviation data is input into the time de-jitter module to remove the invalid external time count value collected due to the jitter of the satellite navigation module signal, and the valid external time count value is selected to input into the local time count module to realize the synchronization of the external time count and the local time count; at the same time, the frequency deviation data is input into the time compensation value calculation module to calculate the time compensation value required for the synchronization of the local time count module output signal and the satellite navigation module signal, and the time compensation value is input into the local time count module, thereby realizing deviation control; when the satellite navigation module signal cannot be input, the local time count module and the existing time compensation value can ensure the normal output of the second pulse, thereby realizing punctuality.

[0083] When counting the local time, we do not provide the compensation value directly to the local time count, but distribute the compensation value evenly to each part of the one-second clock cycle count of the local time count; for example, the number of one-second clock cycles of the local time count is 1000 clock cycles, 2 compensation cycles are set, and the compensation value is 10. When the clock cycle count of the local time count reaches 500 and 1000, 5 (compensation value / number of compensation cycles) is added respectively.

[0084] For the TOD time information signal output by the satellite navigation module, the second pulse loss is first detected. If the second pulse loss is not detected, the time information of the input time information register is read and added with 1s; if the second pulse loss is detected, the time information of the output time information register is read and added with 1s; then it is transmitted to the time information output module to synchronize with the output second pulse of the local time counting module and output the time information.

[0085] The timekeeping method of the present invention is based on the signal (second pulse) output by the satellite navigation module, and performs timekeeping processing on the second pulse; the synchronization of the locally generated second pulse and the satellite navigation module second pulse is achieved through the second pulse timekeeping, and the second pulse generation is maintained when there is no satellite navigation module second pulse; the forwarding of the satellite navigation module TOD time information is achieved through the TOD time information timekeeping, and the normal sending of the TOD time information when the satellite navigation module signal is lost, which greatly improves the reliability of the equipment.

[0086] In the description of this specification, the description of the terms "one embodiment", "some embodiments", etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described can be combined in any one or more embodiments or examples in a suitable manner.

[0087] The above are only preferred embodiments of the present application and are not intended to limit the present application. For those skilled in the art, the present application may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims

1. A high-precision timekeeping method suitable for embedded devices, characterized in that: Including pulse-second timekeeping and TOD time information timekeeping; The pulse-per-second timing comprises the following steps: 11) Frequency deviation status detection: when the rising edge of the second pulse is detected, the deviation between the external time count output by the embedded software processing module and the local time count is compared to determine its frequency deviation status; 12) Frequency deviation data collection: according to different frequency deviation states, either directly update the local time count through the external time count value and proceed to step 16), or calculate the corresponding frequency deviation data and proceed to step 13); 13) Time de-jitter: when the frequency deviation data is less than the preset de-jitter threshold, the external second pulse and external time count are ignored as second pulse jitter; When the frequency deviation data is greater than the de-jitter threshold, the external time count is used to update the local time count value; 14) Time compensation value calculation: calculate the sliding average of a preset number of frequency deviation data and update the time compensation value based on the sliding average; 15) Local time count, update the local time count through the external time count value, and then synchronize the external time count with the local time count, and update the local time count increment in real time according to the calculated time compensation value; 16) Embedded software processing: the embedded software processing module provides external time counting to the second pulse timing logic module; The TOD time information punctuality comprises the following steps: 21) Second pulse loss detection: the second pulse loss detection module sets a second counter to count the number of clock cycles of whole seconds; if the second counter counts to a whole second within a preset number of times and detects a second pulse, then proceed to step 22), otherwise, a second pulse loss signal is output and the process proceeds to step 23); 22) Time information collection: the time information collection module determines the type of the time information packet according to the header data of the collected time information packet, extracts the corresponding bytes of the time information packet to form the time information data, and sends it uplink to the embedded software processing module; The embedded software processing module receives the time information data, adds 1 second to it, and transmits it to the time information output module, and then proceeds to step 24); 23) Embedded software processing: the embedded software processing module directly extracts the existing time information from the output time information register, adds 1s to it and returns it to the output time information register; the time information output module extracts the time information data from the output time information register; 24) Time information output: After the time information output module detects the sending of the second pulse, it sends the received time information data through the serial port.

2. The high-precision timekeeping method suitable for embedded devices according to claim 1, characterized in that: In the step 11), the frequency deviation state includes: State state1, the deviation of the second count part of the external time count value E and the local time count value L is greater than 1s; State state2, the second count part of the external time count value E is the same as the second count part of the local time count value L, and the clock cycle count part of the external time count value E is greater than the clock cycle count part of the local time count value L; State state3, the second count part of the external time count value E is the same as the second count part of the local time count value L, and the clock cycle count part of the external time count value E is smaller than the clock cycle count part of the local time count value L; In state 4, the second count part of the external time count value E is 1 second greater than the second count part of the local time count value L; In state 5, the second count portion of the external time count value E is 1 second smaller than the second count portion of the local time count value L.

3. The high-precision timekeeping method suitable for embedded devices according to claim 2, characterized in that: In step 12), in state 1, there is no need to collect frequency deviation data, and the local time count is updated by the external time count value and the process goes to step 16); In state2, frequency deviation data = EL; In state3, frequency deviation data = LE; In state 4, frequency deviation data = CNT_1S + EL; In state5, frequency deviation data = CNT_1S + LE; Wherein, CNT_1S is the number of clock cycles per second of the local clock.

4. The high-precision timekeeping method applicable to embedded devices according to claim 3, characterized in that: In the step 12), the frequency deviation data is converted into a signed complement; In any frequency deviation state of state2, state3, state4 or state5, if the frequency deviation data is less than the de-jitter threshold value M1, the signed number complement = 0; In state 2 or state 4, if the frequency deviation data is greater than the preset error threshold M2, the signed number complement = M2, otherwise the signed number complement = frequency deviation data; In state 3 or state 5, if the frequency deviation data is greater than the preset error threshold M2, the signed number complement = 0-M2, otherwise the signed number complement = 0-frequency deviation data.

5. The high-precision timekeeping method applicable to embedded devices according to claim 4, characterized in that: In the step 14), when the signed complement of 32 frequency deviation data is collected, the average value is calculated, and the average value is the average value of the frequency deviation per second m1; after that, each time one frequency deviation data is collected, the sliding average value m1 of the 32 frequency deviation data is calculated. i ; Time compensation value per second t j The calculation formula is: ； When t j When it is greater than the preset positive overflow value M3, t j =M3; when t j When the negative overflow value is less than the preset value -M3, t j =-M3.

6. The high-precision timekeeping method applicable to embedded devices according to claim 5, characterized in that: In the step 15), the clock cycle counting part of the local time counting increases with the local clock. If the compensation enable signal is detected and the time compensation value is a positive number, the counter increment of the local time counting is equal to the time compensation value; if the compensation enable signal is detected and the time compensation value is a negative number, the counter increment is restored to 0, and the clock cycle counting part stops, and after waiting for the inverse clock cycle of the time compensation value, the counting continues, and the counter increment is restored to 1; in other cases, the counter increment is 1; when it is detected that the clock cycle counting part counts to 1s of the local clock, the second counting part is +1; The number of compensation cycles of the 1s clock cycle count of the preset local time count is a, and the compensation cycle frequency deviation value b=t j / a, a compensation cycles within 1s clock cycle count are respectively +b.

Images