Electrical isolation structure, manufacturing method thereof and multi-die package structure

Abstract

The invention provides an electric isolation structure, a manufacturing method thereof and a multi-tube-core packaging structure. The manufacturing method of the isolation structure comprises the following steps: forming a connecting layer on a first surface and a second surface, which are opposite to each other, of a glass substrate; respectively forming patterned conductive layers on the connecting layers on the first surface and the second surface, wherein the patterned conductive layers comprise a first conductive layer and a second conductive layer; the glass substrate is cut to separate the plurality of electrical isolation structures, and at least one of the first conductive layer and the second conductive layer forms at least one of an isolation inductor, an isolation capacitor, and an isolation transformer. The conductive layers are formed on the two surfaces of the glass substrate by adopting a double-sided process to form an electrical isolation structure, so that the pressure resistance is improved.

Description

Technical Field

[0001] The present disclosure relates to the technical field of semiconductor devices, and in particular to an electrical isolation structure and a manufacturing method thereof and a multi-die packaging structure. Background Art

[0002] Multi-die packaging is an integrated circuit packaging technology in which multiple dies, each containing a specific functional module or part of the circuit, are manufactured independently and then combined together in the packaging process to form a complete chip.

[0003] In a multi-die package, the high-voltage die needs to be isolated from the low-voltage die to improve the stability and safety of the circuit. Common high- and low-voltage isolation technologies mainly include magnetic isolation, capacitive isolation, and inductive isolation. For example, two dies made of a silicon substrate are stacked and packaged, and the two stacked dies are connected by organic materials. The conductive layers in the two dies and the organic materials form an isolator to achieve high- and low-voltage isolation. However, the silicon substrate between the two conductive layers is a semiconductor material rather than an insulating material. Therefore, the coupling performance of the isolator is poor, and because the thickness uniformity of the organic material is difficult to control and holes are easily formed, the overall voltage resistance performance of the isolator and the stacked die is not stable.

[0004] Therefore, a new electrical isolation structure and a method for manufacturing a multi-die packaging structure are needed to solve the above problems. Summary of the invention

[0005] In view of the above problems, the purpose of the present invention is to provide an electrical isolation structure and a manufacturing method thereof and a multi-die packaging structure, which adopts a double-sided process to form a conductive layer on both surfaces of a glass substrate to constitute an electrical isolation structure, which can not only meet the connection and isolation requirements between multiple dies, but also improve the voltage resistance performance of the electrical isolation structure.

[0006] According to a first aspect of an embodiment of the present disclosure, there is provided a method for manufacturing an isolation structure, comprising: forming a connection layer on a first surface and a second surface opposite to each other of a glass substrate;

[0007] forming patterned conductive layers on the connection layers on the first surface and the second surface respectively; and

[0008] cutting the glass substrate to separate the plurality of electrical isolation structures,

[0009] In the electrical isolation structure, the conductive layer located on the first surface is a first conductive layer, and the conductive layer located on the second surface is a second conductive layer.

[0010] At least one of the first conductive layer and the second conductive layer forms at least one of an isolation inductor, an isolation capacitor, and an isolation transformer.

[0011] Optionally, it also includes:

[0012] forming a first photolithography layer and a second photolithography layer on the connection layer located on the first surface and the second surface respectively; and

[0013] The first photolithography layer and the second photolithography layer are patterned to form a first photolithography mask and a second photolithography mask to expose a portion of the connection layer located on the first surface and the second surface.

[0014] The conductive layer is electroplated on the exposed connection layer through the first photolithography mask and the second photolithography mask, thereby forming the patterned conductive layer.

[0015] Optionally, the connection layer is formed on the first surface and the second surface by using a chemical metal plating process or a sputtering metal process.

[0016] The material of the connection layer includes a titanium compound.

[0017] Optionally, the method further includes: forming a metal coating layer on the patterned conductive layer by using the first photolithography mask and the second photolithography mask.

[0018] Optionally, it also includes:

[0019] removing the first photolithography mask and the second photolithography mask after forming the patterned conductive layer; and

[0020] The exposed connection layer is removed to expose the cutting portion of the glass substrate.

[0021] Optionally, the first conductive layer is a single conductive layer or a plurality of conductive stacked layers, and the second conductive layer is a single conductive layer or a plurality of conductive stacked layers.

[0022] Optionally, the method further includes: forming an interlayer dielectric layer and an interlayer connection layer between two adjacent conductive stacked layers.

[0023] Optionally, the method further includes: before forming the connection layer, roughening the glass substrate to enhance the adhesion of the metal and / or metal compound on the surface of the glass substrate.

[0024] According to a second aspect of an embodiment of the present disclosure, there is provided an electrical isolation structure, comprising:

[0025] A glass substrate having a first surface and a second surface opposite to each other;

[0026] a first connecting layer, located on the first surface;

[0027] a second connecting layer, located on the second surface;

[0028] A first conductive layer, located on the first connecting layer; and

[0029] a second conductive layer, located on the second connecting layer,

[0030] At least one of the first conductive layer and the second conductive layer forms at least one of an isolation inductor, an isolation capacitor, and an isolation transformer.

[0031] Optionally, the first conductive layer is a single conductive layer or a plurality of conductive stacked layers, and the second conductive layer is a single conductive layer or a plurality of conductive stacked layers.

[0032] Optionally, the interlayer dielectric layer and the interlayer connection layer are located between two adjacent conductive stacked layers.

[0033] According to a third aspect of an embodiment of the present disclosure, a multi-die packaging structure is provided, including a first die, a second die, and an electrical isolation structure formed by the manufacturing method as described above, wherein the electrical isolation structure is electrically connected to the first die and the second die respectively.

[0034] According to a fourth aspect of an embodiment of the present disclosure, a method for manufacturing a multi-die package structure is provided, comprising forming a first die, forming a second die, and forming the electrical isolation structure by using the manufacturing method as described above, wherein the electrical isolation structure is electrically connected to the first die and the second die respectively,

[0035] The multi-die package structure manufacturing method further comprises:

[0036] forming a first adhesive layer over a surface of the first conductive layer; and

[0037] The electrical isolation structure is fixed to the first tube core via the first adhesive layer.

[0038] The material of the first adhesive layer includes conductive glue, and the first conductive layer is electrically connected to the top metal layer of the first tube core through the first adhesive layer.

[0039] Optionally, it also includes:

[0040] forming a second adhesive layer over a surface of the second conductive layer; and

[0041] The electrical isolation structure and the second tube core are mounted and fixed via the second adhesive layer,

[0042] The material of the second adhesive layer includes conductive glue, and the second conductive layer is electrically connected to the top metal layer of the second tube core through the second adhesive layer.

[0043] Optionally, it also includes:

[0044] The first conductive layer is electrically connected to the top metal layer of the first die by a wire bonding process, and / or

[0045] The second conductive layer is electrically connected to the top metal layer of the second die through a wire bonding process.

[0046] Optionally, the first tube core is one of a high voltage tube core and a low voltage tube core, and the second tube core is the other of the high voltage tube core and the low voltage tube core, and the electrical isolation structure is used to improve the voltage resistance performance of the first tube core and the second tube core.

[0047] Optionally, the method further includes forming a packaging layer, wherein the packaging layer is used to cover the first tube core, the second tube core and the electrical isolation structure.

[0048] One of the above technical solutions has the following beneficial effects:

[0049] A double-sided process is adopted to form a first conductive layer and a second conductive layer on the upper and lower surfaces of a glass substrate respectively. The glass substrate, the first conductive layer and the second conductive layer constitute an isolator structure, for example, forming at least one of an isolation inductor, an isolation capacitor and an isolation transformer. The separately manufactured electrical isolation structure is then electrically connected to the first tube core and the second tube core respectively, thereby meeting the requirements of connection and signal isolation transmission between the first tube core and the second tube core.

[0050] At the same time, the first conductive layer and the second conductive layer are separated by a glass substrate. Compared with the solution of stacking two tube cores made of silicon substrates, the glass substrate is hard and the thickness uniformity is easy to control, and it is not easy to have holes. The pressure resistance of the glass material can reach 35V / μm, so it can improve the coupling performance of the isolator and the overall pressure resistance performance of the multi-tube core packaging structure. In addition, the price of glass is relatively cheap, which can reduce the manufacturing cost of the packaging structure.

[0051] Furthermore, the first tube core, the second tube core and the electrical isolation structure are manufactured separately, which reduces the manufacturing difficulty of the first tube core, the second tube core and the electrical isolation structure and improves the yield rate.

[0052] It should be noted that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0053] The above and other objects, features and advantages of the present disclosure will become more apparent through the following description of the embodiments of the present disclosure with reference to the accompanying drawings, in which:

[0054] Figure 1 A schematic diagram of a multi-die packaging structure in the related art is shown;

[0055] Figure 2 A schematic structural diagram of an electrical isolation structure according to a first embodiment of the present disclosure is shown;

[0056] Figure 3 A schematic structural diagram of a multi-die packaging structure according to a first embodiment of the present disclosure is shown;

[0057] Figures 4 to 9 A schematic cross-sectional view showing a portion of the stages in the method for manufacturing the electrical isolation structure according to the first embodiment of the present disclosure;

[0058] Fig.10 A schematic structural diagram of an electrical isolation structure according to a second embodiment of the present disclosure is shown. DETAILED DESCRIPTION

[0059] Various embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. In each of the accompanying drawings, the same elements or modules are represented by the same or similar reference numerals. For the sake of clarity, the various parts in the accompanying drawings are not drawn to scale.

[0060] The present disclosure will be described in more detail below with reference to the accompanying drawings. In each of the drawings, the same elements are represented by similar reference numerals. For the sake of clarity, the various parts in the drawings are not drawn to scale. In addition, some well-known parts may not be shown. For the sake of simplicity, the semiconductor structure obtained after several steps can be described in one figure.

[0061] It should be understood that when describing the structure of a device, when a layer or a region is referred to as being "on" or "over" another layer or another region, it may mean that it is directly on the other layer or another region, or that other layers or regions are included between it and the other layer or another region. Furthermore, if the device is turned over, the layer or a region will be "below" or "beneath" another layer or another region.

[0062] If the purpose is to describe the situation of being directly on another layer or another area, this article will use expressions such as "directly on..." or "on... and adjacent to...".

[0063] Many specific details of the present disclosure are described below, such as device structure, materials, dimensions, processing technology and techniques, so as to more clearly understand the present disclosure. However, as those skilled in the art will appreciate, the present disclosure may not be implemented in accordance with these specific details.

[0064] At the same time, certain words are used in this patent specification and claims to refer to specific components. It should be understood by those skilled in the art that hardware manufacturers may use different terms to refer to the same component. This patent specification and claims do not use differences in names as a way to distinguish components, but rather use differences in components' functions as the criteria for distinction.

[0065] In addition, it should be noted that, in this article, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that the process, method, article or equipment including a series of elements includes not only those elements, but also includes other elements not explicitly listed, or also includes elements inherent to such process, method, article or equipment. In the absence of more restrictions, the elements defined by the statement "comprise one..." do not exclude the existence of other identical elements in the process, method, article or equipment including the elements.

[0066] Figure 1 A schematic structural diagram of a multi-die packaging structure in the related art is shown.

[0067] like Figure 1 As shown, in the related art, the multi-die package structure includes a first die 10, a second die 20 and a dielectric layer 30. The first die 10 includes a silicon substrate 11 and a FAB top metal 12 located on the silicon substrate 11. The second die 20 includes a silicon substrate 21 and a FAB top metal 22 located on the silicon substrate 21, wherein the FAB top metal is a metal layer added in the last stage of the manufacturing process of the die. The die is a crystal grain before the chip is packaged, which is a small piece cut from a wafer.

[0068] The first tube core 10 and the second tube core 20 are stacked and packaged, and the dielectric layer 30 is located between the FAB top metal 12 and the silicon substrate 21, and is used to fix the stacked first tube core 10 and the second tube core 20. The material of the dielectric layer 30 is pre-impregnated resin fiberglass cloth (prepreg, PP), which is an organic insulating material, and serves as an electrical isolation medium between the FAB top metal 12 and the FAB top metal 22.

[0069] See also Figure 1In addition to the electrical isolation medium composed of PP material, there is also a silicon substrate 21 between the FAB top metal 12 and the FAB top metal 22. The thickness of the silicon substrate 21 increases the distance between the FAB top metal 12 and the FAB top metal 22. Moreover, the silicon substrate 21 is a semiconductor material and is also conductive, resulting in poor coupling performance of the isolator. In addition, since the PP material is an organic material, its thickness uniformity is difficult to control and it is easy to form holes. If the withstand voltage of the isolator is required to reach 3000V, the holes or process impurities in the PP material can easily cause the area to be easily broken down, resulting in the overall withstand voltage performance of the isolator being unstable.

[0070] In view of the above problems, the purpose of the present disclosure is to provide an electrical isolation structure and a multi-die packaging structure thereof, wherein a conductive layer is formed on two surfaces of a glass substrate using a double-sided process to form an electrical isolation structure, wherein the electrical isolation structure is electrically connected to a first die and a second die respectively, and the first conductive layer and the second conductive layer in the electrical isolation structure are separated by a glass substrate, which not only meets the connection and isolation requirements between multiple die, but also improves the isolation withstand voltage performance of each die.

[0071] Figure 2 shows a schematic structural diagram of the electrical isolation structure of the first embodiment of the present disclosure, Figure 3 A schematic structural diagram of a multi-die packaging structure according to a first embodiment of the present disclosure is shown.

[0072] like Figure 2 As shown, the multi-die package structure of the first embodiment of the present disclosure includes: an electrical isolation structure 100 , a first die 200 and a second die 400 .

[0073] In the present embodiment, the electrical isolation structure 100 includes a glass substrate 110 , a first connection layer 121 , a second connection layer 122 , a first conductive layer 131 , a second conductive layer 132 , a first metal coating layer 141 , and a second metal coating layer 142 .

[0074] The glass substrate 110 has two opposite surfaces, namely a first surface 101 and a second surface 102. Along the direction from the second surface 102 to the first surface 101, the first connection layer 121, the first conductive layer 131 and the first metal coating layer 141 are sequentially stacked on the first surface 101 of the glass substrate 110. Along the direction from the first surface 101 to the second surface 102, the second connection layer 122, the second conductive layer 132 and the second metal coating layer 142 are sequentially stacked on the second surface 102 of the glass substrate 110.

[0075] The first conductive layer 131, the glass substrate 110, and the second conductive layer 132 in the electrical isolation structure 100 constitute an isolator, wherein the first conductive layer 131 and the second conductive layer 132 are electrically isolated through the glass substrate 110. At least one of the first conductive layer 131 and the second conductive layer 132 forms at least one of an isolation inductor, an isolation capacitor, and an isolation transformer. In some specific embodiments, the first conductive layer 131 and the second conductive layer 132 are two plates of an isolation capacitor, or the first conductive layer 131 and the second conductive layer 132 are two inductor coils of an isolation transformer.

[0076] The materials of the first connection layer 121 and the second connection layer 122 include titanium compounds, such as TiW, TiCu, etc., and the materials of the first conductive layer 131 and the second conductive layer 132 are metals, such as Cu, Al, Ag, etc. The materials of the first metal plating layer 141 and the second metal plating layer 142 are, for example, Ni, Au, etc., wherein, when the material of the first conductive layer 131 and the second conductive layer 132 is Cu, since the material of Cu is very hard, it is not conducive to the subsequent wire bonding process, so it is necessary to form a metal plating layer on the surface of the first conductive layer 131 and the second conductive layer 132. If the material of the first conductive layer 131 and the second conductive layer 132 is Al, which is a softer material, the metal plating layer may not be provided.

[0077] However, the embodiments of the present disclosure are not limited thereto, and those skilled in the art may make other arrangements for the materials of the connection layer, the conductive layer, and the metal plating layer as required.

[0078] like Figure 3 As shown, in this embodiment, the multi-die packaging structure further includes: a first adhesive layer 300, a packaging frame 501, a packaging frame 502 and a packaging layer (not shown).

[0079] The first tube core 200 and the second tube core 400 include, for example, a semiconductor layer and a FAB top metal layer located above the semiconductor layer, wherein the semiconductor layer is, for example, a Si, SiC substrate or a stacked structure consisting of a substrate and an epitaxial layer, wherein a CMOS circuit is formed by processes such as doping. The electrical isolation structure 100 and the FAB top metal layer of the first tube core 200 are mounted and fixedly connected through the first adhesive layer 300, wherein the first adhesive layer 300 is, for example, a conductive die bonding adhesive, thereby realizing the electrical connection between the first conductive layer 131 and the first tube core 200.

[0080] The first tube core 200 carries the electrical isolation structure 100 and is located on the packaging frame 501, and the first tube core 200 is connected to the pad 520 on the packaging frame 501 by wire bonding. The second tube core 400 is located on the packaging frame 502, and the second tube core 400 is electrically connected to the pad 510 through the wiring on the packaging frame 502, and the pad 510 on the packaging frame 502 is connected to the second metal coating layer 142 of the electrical isolation structure 100 by wire bonding, thereby realizing the electrical connection between the second conductive layer 132 and the second tube core 400. The packaging layer is used to cover the first tube core 200, the second tube core 400 and the electrical isolation structure 100.

[0081] The present disclosure also provides a chip having the following Figure 3 In the multi-die packaging structure shown, the high and low voltage isolation circuit of the chip is generally composed of a transmitting end, a receiving end and an isolator. The transmitting end is composed of a circuit in the first die 200, and the receiving end is composed of a circuit in the second die 400. The first die 200 is one of the high voltage die and the low voltage die, and the second die 400 is the other of the high voltage die and the low voltage die. The types of the first die 200 and the second die 400 are not limited here, and technicians in this field can set them according to the specific requirements of the circuit function.

[0082] However, the embodiments of the present disclosure are not limited thereto, and those skilled in the art may make other settings for the connection between the lead frame, the electrical isolation structure 100, the first tube core 200 and the second tube core 400 as needed. For example, in some other embodiments, the second metal plating layer 142 is connected to the FAB top metal layer of the second tube core 400 by wire bonding. In some other embodiments, the multi-die packaging structure further includes a second adhesive layer, and the electrical isolation structure 100 and the FAB top metal layer of the second tube core 400 are mounted and fixedly connected by the second adhesive layer, wherein the second adhesive layer is, for example, a conductive mounting glue, so as to realize the electrical connection between the second conductive layer 132 and the second tube core 400.

[0083] Figures 4 to 9 A schematic cross-sectional view showing a portion of a method for manufacturing an electrical isolation structure according to a first embodiment of the present disclosure is shown.

[0084] The electrical isolation structure of the first embodiment of the present disclosure is formed based on a glass substrate 110, and the glass substrate 110 needs to be pre-treated, including cleaning and roughening the glass substrate 110, so as to ensure the surface cleanliness of the glass substrate 110, and at the same time increase the surface activity of the glass substrate 110, thereby improving the adhesion of metals and / or metal compounds on the surface of the glass substrate 110 in subsequent processes.

[0085] Furthermore, a connection layer 120 is formed on the first surface 101 and the second surface 102 of the glass substrate 110, such as Figure 4 shown.

[0086] In this step, for example, a chemical metal plating process or a sputtering metal process is used to form the connection layer 120. In the present embodiment, the material of the connection layer 120 includes titanium compounds, such as TiW, TiCu, etc. Among them, the connection layer 120 is, for example, a seed layer, which refers to a small piece of already formed crystal layer introduced during the crystal growth process, which is used as the starting point for crystal growth. During the crystal growth process, the seed layer can help control the orientation, shape and size of the crystal, thereby improving the quality and uniformity of the crystal. In the subsequent electroplating process, the connection layer 120 can increase the adhesion of the metal to the glass substrate 110. However, the embodiments of the present disclosure are not limited to this, and those skilled in the art can make other settings for the material of the connection layer 120 as needed.

[0087] Furthermore, a first photolithography layer 41 and a second photolithography layer 42 are formed on the connection layer 120 located on the first surface 101 and the second surface 102, respectively. Figure 5 shown.

[0088] In this step, for example, a spin-on photoresist process is used to form the first photoresist layer 41 and the second photoresist layer 42 .

[0089] Further, the first photolithography layer 41 and the second photolithography layer 42 are patterned to form a first photolithography mask 51 and a second photolithography mask 52, as shown in FIG. Figure 6 shown.

[0090] In this step, for example, the first photoresist layer 41 and the second photoresist layer 42 are patterned by exposure and development, so as to expose a portion of the connection layer 120 on the first surface 101 and the second surface 102 .

[0091] Furthermore, patterned conductive layers are formed on the connection layer 120 located on the first surface 101 and the second surface 102 through the first photolithography mask 51 and the second photolithography mask 52, respectively. Figure 7 The conductive layer located on the first surface 101 is the first conductive layer 131 , and the conductive layer located on the second surface 102 is the second conductive layer 132 .

[0092] In this step, for example, a metal is electroplated on the exposed connection layer 120 by using an electroplating process, and a solution containing an electrolyte is set in the electroplating tank. The solution is, for example, a mixture of copper sulfate (CuSO4) and sulfuric acid (H2SO4). Preferably, other additives are added to improve the quality of the electroplated layer. A pure copper plate is used as an anode and connected to the positive pole of a power supply. Copper loses electrons (oxidizes) at the anode to form copper ions (Cu 2+ ) into the solution. Then, a copper conductive layer is formed on the exposed connection layer 120.

[0093] In this embodiment, double-sided electroplating is adopted. Double-sided electroplating is generally performed by vertical continuous electroplating through a series of vertically arranged electroplating tanks, each tank performing different electroplating or pretreatment steps.

[0094] However, the embodiments of the present disclosure are not limited thereto, and those skilled in the art may make other settings for the material of the conductive layer as needed, for example, the conductive layer may also be Al or Ag.

[0095] Furthermore, a metal coating layer is formed on the patterned conductive layer through the first photolithography mask 51 and the second photolithography mask 52, such as Figure 7 shown.

[0096] In this step, for example, a metal is electroplated on the first conductive layer 131 and the second conductive layer 132 by an electroplating process to form a first metal plating layer 141 and a second metal plating layer 142. In this embodiment, the material of the first metal plating layer 141 and the second metal plating layer 142 is, for example, Ni, Au, etc. When the material of the first conductive layer 131 and the second conductive layer 132 is Cu, since the material of Cu is very hard, it is not conducive to the subsequent wire bonding process, so it is necessary to form a metal plating layer on the surface of the first conductive layer 131 and the second conductive layer 132. If the material of the first conductive layer 131 and the second conductive layer 132 is Al, which is a softer material, the metal plating layer may not be provided.

[0097] Furthermore, the first photolithography mask and the second photolithography mask are removed to expose the connection layer 120 not covered by the first conductive layer 131 and the second conductive layer 132. Figure 8 shown.

[0098] Further, for example, an etching process is used to remove the exposed connection layer 120 to expose the cut portion of the glass substrate 110, such as Fig. 9 As shown. The glass substrate 110 is then cut to separate multiple electrical isolation structures 100. In each electrical isolation structure 100, at least one of the first conductive layer 131 and the second conductive layer 132 forms at least one of an isolation inductor, an isolation capacitor, and an isolation transformer. Afterwards, the electrical isolation structure 100 is electrically connected to the first tube core 200 and the second tube core 400 respectively by mounting and / or wire bonding.

[0099] Fig.10 A schematic structural diagram of an electrical isolation structure according to a second embodiment of the present disclosure is shown.

[0100] like Fig.10As shown, the similarities between the electrical isolation structure 101a of the second embodiment of the present disclosure and the electrical isolation structure 100 of the first embodiment are not repeated. The difference is that the electrical isolation structure 101a has a stacked structure 103 and a stacked structure 104. The stacked structure 103 is located on the connection layer 121. The stacked structure 103 is composed of alternately stacked conductive layers 131a, interlayer dielectric layers 151 and interlayer connection layers 161, and the top layer of the stacked structure 103 is the conductive layer 131a. The first metal coating layer 141 is located on the surface of the top conductive layer 131a of the stacked structure 103. The stacked structure 104 is located on the connection layer 122. The stacked structure 104 is composed of alternately stacked conductive layers 132a, interlayer dielectric layers 152 and interlayer connection layers 162, and the top layer of the stacked structure 104 is the conductive layer 132a. The second metal coating layer 142 is located on the surface of the top conductive layer 132a of the stacked structure 104. Among them, the conductive layers 131a and 132a are made of metal materials, such as Cu, Al, Ag, etc., the interlayer isolation layers 151 and 152 are made of PP materials, ABF materials, etc., and the interlayer connection layers 161 and 162 are titanium compounds, such as TiCu, TiW, etc. The multiple conductive layers 131a stacked in the stacked structure 103 of this embodiment can replace the first conductive layer 131 of the first embodiment, or the first conductive layer 131 includes multiple conductive stacks. Similarly, the multiple conductive layers 132a stacked in the stacked structure 104 can replace the second conductive layer 132 of the first embodiment, or the second conductive layer 132 includes multiple conductive stacks. The multiple conductive stacks serve as one of the plates of the isolation capacitor or one of the inductors of the isolation transformer.

[0101] According to the embodiments of the present disclosure as above, these embodiments do not describe all the details in detail, nor do they limit the invention to specific embodiments. Obviously, many modifications and changes can be made based on the above description. This specification selects and specifically describes these embodiments in order to better explain the principles and practical applications of the present disclosure, so that those skilled in the art can make good use of the present disclosure and the modifications based on the present disclosure. The scope of protection of the present disclosure shall be based on the scope defined by the claims of the present disclosure and their equivalents.

Claims

1. A method for manufacturing an electrical isolation structure, comprising: forming a connection layer on a first surface and a second surface opposite to each other on the glass substrate; forming patterned conductive layers on the connection layers on the first surface and the second surface respectively; as well as cutting the glass substrate to separate the plurality of electrical isolation structures, In the electrical isolation structure, the conductive layer located on the first surface is a first conductive layer, and the conductive layer located on the second surface is a second conductive layer. At least one of the first conductive layer and the second conductive layer forms at least one of an isolation inductor, an isolation capacitor, and an isolation transformer.

2. The manufacturing method according to claim 1, further comprising: forming a first photolithography layer and a second photolithography layer on the connection layer located on the first surface and the second surface respectively; as well as The first photolithography layer and the second photolithography layer are patterned to form a first photolithography mask and a second photolithography mask to expose a portion of the connection layer located on the first surface and the second surface. The conductive layer is electroplated on the exposed connection layer through the first photolithography mask and the second photolithography mask, thereby forming the patterned conductive layer.

3. The manufacturing method according to claim 2, wherein: The connection layer is formed on the first surface and the second surface by using a chemical metal plating process or a sputtering metal process, The material of the connection layer includes a titanium compound.

4. The manufacturing method according to claim 2, further comprising: A metal coating layer is formed on the patterned conductive layer through the first photolithography mask and the second photolithography mask.

5. The manufacturing method according to claim 2, further comprising: removing the first photolithography mask and the second photolithography mask after forming the patterned conductive layer; as well as The exposed connection layer is removed to expose the cutting portion of the glass substrate.

6. The manufacturing method according to claim 1, wherein: The first conductive layer is a single conductive layer or a plurality of conductive stacked layers, and the second conductive layer is a single conductive layer or a plurality of conductive stacked layers.

7. The manufacturing method according to claim 6, further comprising: An interlayer dielectric layer and an interlayer connection layer are formed between two adjacent conductive stacked layers.

8. The manufacturing method according to claim 1, further comprising: Before forming the connection layer, the glass substrate is roughened to enhance the adhesion of the metal and / or metal compound on the surface of the glass substrate.

9. An electrical isolation structure comprising: A glass substrate having a first surface and a second surface opposite to each other; a first connecting layer, located on the first surface; a second connecting layer, located on the second surface; A first conductive layer, located on the first connecting layer; as well as a second conductive layer, located on the second connecting layer, At least one of the first conductive layer and the second conductive layer forms at least one of an isolation inductor, an isolation capacitor, and an isolation transformer.

10. The electrical isolation structure according to claim 9, wherein: The first conductive layer is a single conductive layer or a plurality of conductive stacked layers, and the second conductive layer is a single conductive layer or a plurality of conductive stacked layers.

11. The electrical isolation structure according to claim 9, further comprising an interlayer dielectric layer and an interlayer connection layer located between two adjacent conductive stacked layers.

12. A multi-die packaging structure, comprising a first die, a second die and the electrical isolation structure formed by the manufacturing method according to any one of claims 1 to 8, wherein the electrical isolation structure is electrically connected to the first die and the second die respectively.

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