A multi-mode frequency conversion control method for a three-phase four-wire Vienna rectifier

Abstract

The application discloses a kind of multi-mode variable frequency control methods of three-phase four-wire Vienna rectifier, it includes carrier reset pulse generation unit and modulation unit;Carrier reset pulse generation unit includes and gate, first integrator and first RS flip-flop;Modulation unit includes or gate, second integrator and second RS flip-flop, and gate output is as the input of or gate first input port.This application uses logic circuit to realize CCM-CRM-DCM multi-mode variable frequency control, improves the input current quality when light load;And by adding gain compensation in the modulation signal voltage in control loop, offset the control loop gain variation caused by variable frequency control, realizes the average current unified control under different working mode, reduces the zero current distortion under DCM mode, avoids the oscillation and impact caused by different mode control switching, further improves the current quality, improves rectifier performance.

Description

Technical Field

[0001] This invention relates to the field of power electronics technology, specifically to a control method for a three-phase four-wire Vienna rectifier. Background Technology

[0002] Vienna rectifiers typically employ output voltage and input current control to stabilize the output DC voltage and ensure a sinusoidal input current. Near the zero-crossing point of the input voltage, the inductor current of the Vienna rectifier experiences a very small rate of rise, making it difficult for the inductor current to track the reference current. Furthermore, under light loads, the inductor current operates discontinuously, resulting in a small current loop gain and bandwidth, further hindering the inductor current from tracking the reference current. This leads to distortion of the input current at the zero-crossing point of the input voltage, particularly pronounced in applications with high grid frequencies. Under light load conditions, the phase difference between the reference voltage and the input current causes zero-crossing distortion of the output current, leading to increased input harmonics and deterioration of other electrical performance parameters, thus affecting the rectifier's output quality. Moreover, current Vienna rectifier control methods are geared towards a single mode; without a fixed control method, it is impossible to simultaneously meet the requirements of multiple operating modes. Therefore, finding a control method capable of enabling multi-mode operation of Vienna rectifiers is crucial. Summary of the Invention

[0003] In view of this, the purpose of this invention is to provide a multi-mode frequency conversion control method for a three-phase four-wire Vienna rectifier, in order to solve the technical problem that the power factor at the input end of the Vienna rectifier decreases under average current control when light load or near zero crossing due to the occurrence of discontinuous inductor current mode, thus affecting current quality, and to solve the problem that a single control method cannot be applied to multiple operating modes such as CCM / CRM / DCM.

[0004] The present invention provides a multi-mode frequency conversion control method for a three-phase four-wire Vienna rectifier, which includes a carrier reset pulse generation unit and a modulation unit;

[0005] The carrier reset pulse generation unit includes an AND gate, a first integrator, and a first RS flip-flop. The maximum switching frequency of the switching transistor is used as the first input of the first integrator. When the output of the first integrator is ≥1, the output of the first integrator is used as the second input of the first integrator. The output of the first integrator is used as the input of the S port of the first RS flip-flop, and the output of the AND gate is used as the input of the R port of the first RS flip-flop. The input logic of the first input port of the AND gate is always 1, and the second input port of the AND gate uses the output of the Q port of the first RS flip-flop as its input.

[0006] The modulation unit includes an OR gate, a second integrator, and a second RS flip-flop. The output of the AND gate is used as the input to the first input port of the OR gate. The minimum switching frequency of the switching transistor is used as the first input of the second integrator, and the output of the OR gate is used as the second input of the second integrator. When the output of the second integrator is ≥1, the output of the second integrator is used as the second input of the OR gate. The output of the OR gate is subtracted from the modulation signal voltage of the phase where the controlled switching transistor is located, and used as the input to the R port of the second RS flip-flop. The output of the OR gate is used as the input to the S port of the second RS flip-flop. The Q port of the second RS flip-flop outputs a control signal to the controlled switching transistor.

[0007] In CCM mode, the output logic of the AND gate to OR gate is always 0, the second integrator is not reset, and the output frequency of the second integrator is the triangular carrier of the minimum switching frequency. That is, in CCM mode, the operating frequency of the control switch is always the minimum switching frequency.

[0008] In CRM operating mode, when the inductor current of the phase where the controlled switch is located gradually decreases to the point of zero, the logic of the AND gate output to the OR gate is 1, which makes the OR gate output a high-level signal to reset the second integrator to change the frequency of the output triangular carrier. At this moment, the controlled switch is turned on to make the inductor current rise again, so as to maintain the CRM operating mode.

[0009] In DCM mode, when the inductor finishes discharging and the inductor current is zero, the falling edge of the first integrator output has not yet appeared, meaning the output logic of the first RS flip-flop has not yet been set to 1, and the output logic of the AND gate is 0. When the falling edge of the first integrator output arrives, the output logic of the AND gate is 1, meaning that the switching frequency is maintained at the maximum switching frequency in DCM mode.

[0010] Furthermore, the modulation signal voltage is composed of the product of the carrier amplitude, the operating time of the controlled switch, and the power factor correction control output based on the input impedance;

[0011] The carrier amplitude is obtained in real time by doubling the output triangular carrier of the second integrator after low-pass filtering.

[0012] The operating time of the controlled switch is obtained by determining whether the inductor current of the phase containing the controlled switch is greater than zero and performing low-pass filtering.

[0013] Furthermore, the power factor correction control output based on input impedance is obtained as follows:

[0014] The output voltage control signal voltage is obtained by subtracting the rated output voltage and the actual output voltage of the Vienna rectifier and performing proportional-integral processing. The voltage equalization control output is obtained by subtracting the voltages of the two separate capacitors in the Vienna rectifier and performing proportional amplification. The voltage equalization control output is then added to the inductor current of the phase where the controlled switch is located, and the absolute value is taken. This absolute value is then divided by the output voltage control signal voltage and then limited to obtain the power factor correction control output based on the input impedance.

[0015] The beneficial effects of this invention are:

[0016] 1. The multi-mode frequency conversion control method for a three-phase four-wire Vienna rectifier of the present invention, based on the design of the input-side inductance and frequency conversion boundary, utilizes logic circuits to realize CCM-CRM-DCM multi-mode frequency conversion control, thereby improving the input current quality under light load.

[0017] 2. The multi-mode frequency conversion control method for the three-phase four-wire Vienna rectifier of the present invention, by adding gain compensation to the modulation signal voltage in the control loop, cancels the change in control loop gain caused by frequency conversion control, realizes unified control of average current under different operating modes, reduces the zero-crossing distortion of current in DCM mode, avoids oscillation and impact caused by switching between different control modes, further improves current quality, and improves rectifier performance. Attached Figure Description

[0018] Figure 1 This is a schematic diagram of the CCM-CRM-DCM multi-mode frequency converter control method used in a three-phase four-wire Vienna rectifier; where N is the midpoint of the three-phase input of the power grid, v a v b v c These are the three-phase input voltages (A, B, and C), and L... a L b L c These are the three-phase input inductors a, b, and c, respectively, and i La i Lb i Lc These represent the three-phase input inductor currents (A, B, and C), diodes D1-D6, switching transistors Q1-Q6, and separate capacitors C1 and C2. V p V n These are the voltages of the separate capacitors C1 and C2, respectively, and R... load V is the load resistance. out V is the output voltage. cdiff For the output of voltage equalization control, V ref The rated output voltage, V loop V is the output voltage control signal voltage. cona Let a be the three-phase modulated signal voltage, f max f minThese are the maximum and minimum switching frequencies, respectively. a Ramp is the reset pulse for phase a carrier. a For phase a carrier, V ma Let D be the carrier amplitude of phase a. a For the operating time of phase a switch, PWM a PWM b PWM c These are the control signals for the abc phase switching transistors, respectively.

[0019] Figure 2 i is the phase A inductor current when the rectifier load is 10%. La After filtering, the inductor current of phase A is... and carrier waveform diagram;

[0020] Figure 3 The inductor current i when the rectifier load is 10% L Filtered inductor current Input voltage v in Output voltage V out and the voltage V of the split capacitor p V n Waveform diagram. Detailed Implementation

[0021] The present invention will be further described below with reference to the accompanying drawings and embodiments.

[0022] like Figure 1 As shown, the multi-mode frequency conversion control method for the three-phase four-wire Vienna rectifier in this embodiment includes a carrier reset pulse generation unit and a modulation unit.

[0023] The carrier reset pulse generation unit includes an AND gate, a first integrator, and a first RS flip-flop. The maximum switching frequency of the switching transistor is used as the first input of the first integrator. When the output of the first integrator is ≥1, the output of the first integrator is used as the second input of the first integrator. The output of the first integrator is used as the input of the S port of the first RS flip-flop, and the output of the AND gate is used as the input of the R port of the first RS flip-flop. The input logic of the first input port of the AND gate is always 1, and the second input port of the AND gate takes the output of the Q port of the first RS flip-flop as its input.

[0024] The modulation unit includes an OR gate, a second integrator, and a second RS flip-flop. The output of the AND gate is used as the input of the first input port of the OR gate. The minimum switching frequency of the switching transistor is used as the first input of the second integrator, and the output of the OR gate is used as the second input of the second integrator. When the output of the second integrator is ≥1, the output of the second integrator is used as the second input of the OR gate. The output of the OR gate is subtracted from the modulation signal voltage of the phase where the controlled switching transistor is located, and used as the input of the R port of the second RS flip-flop. The output of the OR gate is used as the input of the S port of the second RS flip-flop. The Q port of the second RS flip-flop outputs a control signal to the controlled switching transistor.

[0025] The switching transistor control methods for phases a, b, and c of a three-phase four-wire Vienna rectifier are the same. The following example uses phase a:

[0026] In Continuous Conduction Mode (CCM), the inductor current i in phase a is... La The output logic of the AND gate paired with the OR gate is always greater than 0, meaning the carrier reset pulse output by the AND gate is always 0. a The frequency is always low, and the second integrator is not reset. The output frequency of the second integrator is a triangular carrier wave of the minimum switching frequency. That is, in CCM mode, the operating frequency of the control switch is always the minimum switching frequency.

[0027] In Critical Conduction Mode (CRM), when the inductor current of the phase containing the controlled switch gradually decreases to the point where it crosses zero (i.e., i... La As the time gradually decreases until it reaches a point where zero is encountered, the output of the AND gate is determined to be high. Since the R port of the first RS flip-flop was low in the previous moment, the Q terminal is high at this moment, and the AND gate output is high. This output then sets the R terminal high, causing the Q terminal to reset low in the next moment. Therefore, the output of the AND gate at time i... La The instantaneous value of 0 is represented by a very short high-level pulse signal, Pulse. a That is, the logic of the AND gate output to the OR gate is 1. This pulse signal causes the OR gate to output a high-level signal, resetting the second integrator and changing the frequency of the triangular carrier wave output by the second integrator. At this moment, the controlled switch is turned on, causing the inductor current to rise again, thus maintaining the CRM operating mode. The switching frequency in CRM mode is necessarily higher than that in CCM mode. In CRM mode, the second integrator is only affected by the Pulse gate. a Reset. In CRM mode, the operating frequency of the switching transistor is at the minimum switching frequency f. min ~Maximum switching frequency f max The changes between them.

[0028] In discontinuous conduction mode (DCM), after the inductor finishes discharging, the inductor current i... La At the instant the output of the first integrator is zero, the falling edge of the first integrator output has not yet appeared, meaning the output logic of the first RS flip-flop has not yet been set to 1, and the output logic of the AND gate is 0. When the falling edge of the first integrator output arrives, the output logic of the AND gate is 1, meaning that the switching frequency is maintained at the maximum switching frequency in DCM mode.

[0029] In DCM mode, based on the voltage-to-second balance of the inductor, we obtain:

[0030]

[0031] In the formula, T ona T offa T sw These represent the turn-on time, turn-off time, and switching cycle of the switching transistor, respectively. D offa D represents the duty cycle during the off-time. a =D ona +D offa In CCM and CRM models, D a =1, D in DCM mode a <1. In DCM mode, the input impedance Z of phase a is <1. ina for:

[0032]

[0033] Will Substituting into the above equation, we get:

[0034]

[0035] It can be seen that the input impedance is affected by D a Impact, and D a It can be expressed by the following formula:

[0036]

[0037] It can be seen from the expression that D a Make Z ina During DCM mode, it no longer exhibits purely resistive characteristics. Therefore, it is necessary to modulate the signal V in phase a. cona The following compensation is added to offset the losses:

[0038]

[0039] In the formula, V ma It is the carrier amplitude of phase a. V is the filtered current of phase a inductor. loopThe output voltage control signal voltage;

[0040] Therefore, as an improvement to the multi-mode frequency conversion control method of the aforementioned three-phase four-wire Vienna rectifier, the modulation signal V is adjusted in the control loop. cona Compensation is performed on the modulation signal voltage V cona From carrier amplitude V m Operating time D of the controlled switch a and power factor correction control output V based on input impedance ca The product is formed by the product of the two.

[0041] By outputting the triangular carrier wave Ramp from the second integrator a The carrier amplitude V is obtained in real time by doubling the value after low-pass filtering. ma .

[0042] By controlling the inductor current |i of the phase where the controlled switch is located La Perform a check to see if it is greater than zero and apply a low-pass filter to obtain the operating time D of the controlled switch. a .

[0043] In this embodiment, the power factor correction control output V based on input impedance is described. ca This is obtained through the following:

[0044] The rated output voltage V of the Vienna rectifier ref and actual output voltage V dc After subtraction, proportional-integral processing is performed to obtain the output voltage control signal voltage V. loop The voltage V between the two separate capacitors in the Vienna rectifier p and V n The equalization control output V is obtained by subtracting and then proportionally amplifying the result. cdiff The equalization control output V cdiff With the a-phase inductor current i of the Vienna rectifier La Add them together, take the absolute value, and then divide by the output voltage control signal voltage V. loop Then, after limiting, the power factor correction control output V based on the input impedance is obtained. ca .

[0045] The output voltage control output result is as follows:

[0046]

[0047] The output result of the equalization control is:

[0048] V cdiff =k pc (V p -V n )

[0049] The power factor correction control output based on input impedance is:

[0050]

[0051] The multi-mode frequency conversion control method of the three-phase four-wire Vienna rectifier described in this embodiment is then simulated and verified. The relevant parameters of the rectifier are shown in Table 1.

[0052] Table 1

[0053]

[0054] Simulation Verification 1: Figure 2 i is the phase A inductor current when the rectifier load is 10%. La After filtering, the inductor current of phase A is... And carrier waveform diagram.

[0055] from Figure 2 It can be seen that within one cycle of phase A operation, there are three modes: CCM, CRM, and DCM. In CCM mode, it operates at the minimum frequency; in CRM mode, the operating frequency changes continuously; and in DCM mode, it operates at the maximum frequency, with the inductor current exhibiting a stable sinusoidal pattern. This demonstrates that the control method can achieve multi-mode frequency conversion operation of the Vienna rectifier, encompassing CCM, CRM, and DCM modes.

[0056] Simulation Verification 2: Figure 3 The inductor current i when the rectifier load is 10% L Filtered inductor current Input voltage v in Output voltage V out and the voltage V of the split capacitor p V n Waveform diagram.

[0057] from Figure 3 It can be seen that the inductor current and input voltage of all three phases can maintain in-phase operation; the output voltage remains around 800V; and the voltages of the two separate capacitors remain around 400V. This indicates that the control method can achieve power factor correction, voltage midpoint balance, and suppression of zero-crossing issues of the input current under light load conditions.

[0058] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit it. Although the present invention has been described in detail with reference to preferred embodiments, those skilled in the art should understand that modifications or equivalent substitutions can be made to the technical solutions of the present invention without departing from the spirit and scope of the technical solutions of the present invention, and all such modifications or substitutions should be covered within the scope of the claims of the present invention.

Claims

1. A multi-mode frequency conversion control method for a three-phase four-wire Vienna rectifier, characterized in that: Includes a carrier reset pulse generation unit and a modulation unit; The carrier reset pulse generation unit includes an AND gate, a first integrator, and a first RS flip-flop. The maximum switching frequency of the switching transistor is used as the first input of the first integrator. When the output of the first integrator is ≥1, the output of the first integrator is used as the second input of the first integrator. The output of the first integrator is used as the input of the S port of the first RS flip-flop, and the output of the AND gate is used as the input of the R port of the first RS flip-flop. The input logic of the first input port of the AND gate is always 1, and the second input port of the AND gate uses the output of the Q port of the first RS flip-flop as its input. The modulation unit includes an OR gate, a second integrator, and a second RS flip-flop. The output of the AND gate is used as the input of the first input port of the OR gate. The minimum switching frequency of the switching transistor is used as the first input of the second integrator, and the output of the OR gate is used as the second input of the second integrator. When the output of the second integrator is ≥1, the output of the second integrator is used as the second input of the OR gate. The output of the second integrator is subtracted from the modulation signal voltage of the phase where the controlled switching transistor is located and used as the input of the R port of the second RS flip-flop. The output of the OR gate is used as the input of the S port of the second RS flip-flop. The Q port of the second RS flip-flop outputs a control signal to the controlled switch transistor; In CCM mode, the output logic of the AND gate to OR gate is always 0, the second integrator is not reset, and the output frequency of the second integrator is the triangular carrier of the minimum switching frequency. That is, in CCM mode, the operating frequency of the control switch is always the minimum switching frequency. In CRM operating mode, when the inductor current of the phase where the controlled switch is located gradually decreases to the point of zero, the logic of the AND gate output to the OR gate is 1, which makes the OR gate output a high-level signal to reset the second integrator to change the frequency of the output triangular carrier. At this moment, the controlled switch is turned on to make the inductor current rise again, so as to maintain the CRM operating mode. In DCM mode, when the inductor finishes discharging and the inductor current is zero, the falling edge of the first integrator output has not yet appeared, meaning the output logic of the first RS flip-flop has not yet been set to 1, and the output logic of the AND gate is 0. When the falling edge of the first integrator output arrives, the output logic of the AND gate is 1, meaning that the switching frequency is maintained at the maximum switching frequency in DCM mode.

2. The multi-mode frequency conversion control method for a three-phase four-wire Vienna rectifier according to claim 1, characterized in that: The modulation signal voltage is composed of the product of the carrier amplitude, the operating time of the controlled switch, and the power factor correction control output based on the input impedance. The carrier amplitude is obtained in real time by doubling the output triangular carrier of the second integrator after low-pass filtering. The operating time of the controlled switch is obtained by determining whether the inductor current of the phase containing the controlled switch is greater than zero and performing low-pass filtering.

3. The multi-mode frequency conversion control method for a three-phase four-wire Vienna rectifier according to claim 2, characterized in that: The power factor correction control output based on input impedance is obtained as follows: The output voltage control signal voltage is obtained by subtracting the rated output voltage and the actual output voltage of the Vienna rectifier and performing proportional-integral processing. The voltage equalization control output is obtained by subtracting the voltages of the two separate capacitors in the Vienna rectifier and performing proportional amplification. The voltage equalization control output is then added to the inductor current of the phase where the controlled switch is located, and the absolute value is taken. This absolute value is then divided by the output voltage control signal voltage and then limited to obtain the power factor correction control output based on the input impedance.

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