Multilayer ceramic capacitor

Abstract

The invention provides a laminated ceramic capacitor (1) which is small in size, large in capacitance and capable of suppressing reduction of moisture resistance. The multilayer ceramic capacitor (1) has: a first corner (C1) that bends across a first main surface (M1) and a first main part side surface (SS1) of a capacitor main part (3); a second corner (C2) that bends across a second main surface (M2) and the first main part side surface (SS1); a third corner (C3) that bends across the first main surface (M1) and a second main part side surface (SS2); and a fourth corner (C4) that bends across the second main surface (M2) and the second main part side surface (SS2). The first insulating portion (8a) covers the first corner portion (C1) and the second corner portion (C2), the second insulating portion (8b) covers the third corner portion (C3) and the fourth corner portion (C4), the roughness of the first corner portion (C1) is larger than the roughness of the first outer corner portion (K1), the roughness of the second corner portion (C2) is larger than the roughness of the second outer corner portion (K2), and the roughness of the third corner portion (C3) is larger than the roughness of the third outer corner portion (K3). The roughness of the fourth corner section (C4) is greater than the roughness of the fourth outer corner section (K4).

Description

Technical Field

[0001] The present invention relates to a laminated ceramic electronic component, and in particular to a laminated ceramic capacitor. Background Art

[0002] In recent years, with the miniaturization of electronic devices equipped with electronic components, the size of electronic components has also been reduced. If the size of the electronic component is reduced, the area where the internal electrodes overlap each other will also be reduced, so small and large capacitance becomes a problem. Therefore, the following method is known, that is, by exposing the internal electrode layer on the side, and later setting a dielectric layer stack on the side of the chip, the area of ​​the internal electrode in the side direction is maximized. Patent document 1 records related technology.

[0003] Prior Art Literature

[0004] Patent Literature

[0005] Patent Document 1: Japanese Patent Application Laid-Open No. 62-237714 Summary of the invention

[0006] Problem that the invention aims to solve

[0007] However, in the electronic components manufactured in this way, the adhesion between the end of the insulating layer and the main part of the capacitor is not sufficient, and water may penetrate from the end of the insulating layer, thereby reducing the moisture resistance. Therefore, the object of the present invention is to provide a small and large-capacitance laminated ceramic capacitor that can suppress the reduction of moisture resistance.

[0008] Technical solutions to solve problems

[0009] A laminated ceramic capacitor comprises a laminated body, a first external electrode and a second external electrode, the laminated body comprises a capacitor main part, a first insulating part and a second insulating part, the capacitor main part comprises a plurality of laminated dielectric layers, and comprises: a first main surface and a second main surface, which are opposite to each other in a lamination direction; a first main part side surface and a second main part side surface, which are opposite to each other in a width direction orthogonal to the lamination direction; a first end surface and a second end surface, which are opposite to each other in a length direction orthogonal to the lamination direction and the width direction; a first internal electrode layer, which is alternately laminated with the plurality of dielectric layers and exposed at the first end surface, the first main part side surface and the second main part side surface; and a second internal electrode layer, which is alternately stacked with the plurality of dielectric layers and exposed at the second end face, the first main portion side face and the second main portion side face, the first insulating portion is arranged at the first main portion side face of the capacitor main portion, the second insulating portion is arranged at the second main portion side face of the capacitor main portion, the first external electrode is arranged to go around from the first end face to the first main face, the second main face, the surface of the first insulating portion and the surface of the second insulating portion, the second external electrode is arranged to go around from the second end face to the first main face, the second main face, the surface of the first insulating portion and the surface of the second insulating portion, the capacitor The main part has a first corner portion bent across the first main surface of the capacitor main part and the side surface of the first main part, a second corner portion bent across the second main surface and the side surface of the first main part, a third corner portion bent across the first main surface and the side surface of the second main part, and a fourth corner portion bent across the second main surface and the side surface of the second main part, the first insulating part covers the first corner portion and the second corner portion, the second insulating part covers the third corner portion and the fourth corner portion, the surface of the first insulating part opposite to the surface in contact with the side surface of the first main part is set as the first side surface of the stacked body, and the surface of the second insulating part opposite to the surface in contact with the side surface of the second main part is set as the first side surface of the stacked body The second side surface of the stack, the first insulating portion has a first outer corner where the first main surface and the first side surface intersect, and a second outer corner where the second main surface and the first side surface intersect, the second insulating portion has a third outer corner where the first main surface and the second side surface intersect, and a fourth outer corner where the second main surface and the second side surface intersect, the roughness of the first corner is greater than the roughness of the first outer corner, the roughness of the second corner is greater than the roughness of the second outer corner, the roughness of the third corner is greater than the roughness of the third outer corner, and the roughness of the fourth corner is greater than the roughness of the fourth outer corner.

[0010] Effects of the Invention

[0011] According to the present invention, it is possible to provide a multilayer ceramic capacitor which is small in size and has a large capacitance while suppressing a decrease in moisture resistance. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] Figure 1 It is a perspective view of a multilayer ceramic capacitor according to an embodiment of the present invention.

[0013] Figure 2 It is a perspective view of a laminated body according to an embodiment of the present invention.

[0014] Figure 3 It is a perspective view of a main part of a capacitor according to an embodiment of the present invention.

[0015] Figure 4 yes Figure 1 I-I line cross-sectional view.

[0016] Figure 5 yes Figure 1 Sectional view along line II-II.

[0017] Figure 6 (a) Yes Figure 2 The III-III line cross-sectional view of FIG. (b) is a conventional multilayer ceramic capacitor equivalent to Figure 2 FIG. 3 is a cross-sectional view of the line III-III.

[0018] Figure 7 is another embodiment of the present invention equivalent to Figure 2 FIG. 3 is a cross-sectional view of the line III-III.

[0019] Figure 8 Another embodiment of the present invention is shown in Figure 7 Graph of region R.

[0020] Fig. 9 It is a perspective view showing a part of the capacitor main part according to the embodiment of the present invention.

[0021] Fig.10 This is a perspective view showing a part of a capacitor main part according to another embodiment of the present invention. DETAILED DESCRIPTION

[0022] Hereinafter, an example of an embodiment of the present invention will be described with reference to the drawings. In the following description, a laminated ceramic capacitor will be described as an example of a laminated ceramic electronic component. In addition, in each figure, the same reference numerals are given to the same or corresponding parts.

[0023] <Outline of Multilayer Ceramic Capacitor>

[0024] based on Figure 1 , an outline of the appearance of the multilayer ceramic capacitor 1 will be described. Figure 11 is a perspective view showing a multilayer ceramic capacitor 1 according to the present embodiment. The multilayer ceramic capacitor 1 includes a laminate 2 and external electrodes 20. The external electrodes 20 include a first external electrode 20a and a second external electrode 20b.

[0025] <Definition of direction>

[0026] exist Figures 1 to 7 In FIG. 1 , the L direction, the W direction, and the T direction are shown. The L direction is the length direction L of the multilayer ceramic capacitor 1. The W direction is the width direction W of the multilayer ceramic capacitor 1. The T direction is the stacking direction T of the multilayer ceramic capacitor 1. Thus, Figure 4 The section shown is called the LT section. Figure 5 The cross section shown is referred to as a WT cross section. The length direction L, the width direction W, and the stacking direction T are not necessarily mutually orthogonal. The length direction L, the width direction W, and the stacking direction T may also be mutually intersecting.

[0027] <Laminate appearance>

[0028] like Figure 1 As shown, the stacked body 2 has a substantially rectangular parallelepiped shape. The stacked body 2 has two main faces M, two end faces E, and two side faces S. The main faces M are faces opposite to each other in the stacking direction T. The end faces E are faces opposite to each other in the length direction L. The side faces S are faces opposite to each other in the width direction W. The two main faces M are set as the first main face M1 and the second main face M2. The two end faces E are set as the first end face E1 and the second end face E2. The two side faces S are set as the first side face S1 and the second side face S2.

[0029] It is preferred that the corners of the laminate 2 be rounded. The so-called corner is a portion where at least two surfaces of the laminate 2 intersect. Furthermore, concavities and convexities may be formed on a part or all of the surfaces of the two main surfaces M, the two end surfaces E, and the two side surfaces S. In addition, the size of the laminate 2 is not particularly limited.

[0030] <Capacitor main part>

[0031] based on Figure 2 as well as Figure 3 The structure of the laminated body 2 will be described. Figure 2 It is a perspective view of the laminated body 2 according to the embodiment of the present invention. Figure 31 is a perspective view of a capacitor main part 3 according to an embodiment of the present invention. The laminate 2 includes a capacitor main part 3 and two insulating parts 8. One of the two insulating parts 8 is a first insulating part 8a, and the other is a second insulating part 8b. The capacitor main part 3 includes a plurality of dielectric layers 4 and a plurality of internal electrode layers 10. The plurality of dielectric layers 4 and the plurality of internal electrode layers 10 are stacked on each other in a stacking direction T. The internal electrode layer 10 includes a first internal electrode layer 10a and a second internal electrode layer 10b. The details of the internal electrode layer 10 will be described later.

[0032] Here, in the capacitor main part 3, two surfaces facing each other in the width direction W are referred to as main part side surfaces SS. Figure 3 As shown, one of the two main part side surfaces SS is set as the first main part side surface SS1, and the other is set as the second main part side surface SS2. The laminate 2 is formed by configuring the insulating portion 8 on each of the two main part side surfaces SS of the capacitor main part 3. Specifically, the first insulating portion 8a is configured on the first main part side surface SS1, and the second insulating portion 8b is configured on the second main part side surface SS2.

[0033] <Insulation part>

[0034] The insulating portion 8 is a member disposed on the two main portion side surfaces SS of the capacitor main portion 3. The insulating portion 8 has a sheet shape. There is no particular limitation on the material constituting the insulating portion 8 as long as it has insulating properties. The main component of the material constituting the insulating portion 8 may be the same component as the material constituting the dielectric layer 4. Alternatively, the material constituting the insulating portion 8 may be a resin component.

[0035] <Surfaces of laminate and capacitor main part>

[0036] As described above, the laminate 2 is constructed by configuring the insulating portion 8 on the two main part side surfaces SS of the capacitor main part 3. Therefore, the end surface E of the laminate 2 is the same as the end surface E in the capacitor main part 3. Similarly, the main surface M of the laminate 2 is the same as the main surface M in the capacitor main part 3. In contrast, the side surface M of the laminate 2 becomes the surface of the insulating portion 8 configured on the main part side surface SS of the capacitor main part 3. Specifically, the surface of the first insulating portion 8a that is opposite to the first main part side surface SS1 becomes the first side surface S1 of the laminate 2. Similarly, the surface of the second insulating portion 8b that is opposite to the second main part side surface SS2 becomes the second side surface S2 of the laminate 2.

[0037] The internal electrode layer 10 is exposed from the two main part side surfaces SS and the two end surfaces E of the capacitor main part 3. Specifically, the first internal electrode layer 10a is exposed from the first end surface E1 of the capacitor main part 3, and the second internal electrode layer 10b is exposed from the second end surface E2 of the capacitor main part 3. In addition, the first internal electrode layer 10a and the second internal electrode layer 10b are exposed from the first main part side surface SS1 and the second main part side surface SS2 of the capacitor main part 3. By configuring the first insulating portion 8a on the first main part side surface SS1 and configuring the second insulating portion 8b on the second main part side surface SS2, the first internal electrode layer 10a and the second internal electrode layer 10b exposed from the first main part side surface SS1 and the second main part side surface SS2 are insulated from the outside. In addition, the first internal electrode layer 10a and the second internal electrode layer 10b can also be prevented from being exposed from the first main part side surface SS1 and the second main part side surface SS2. That is, the first internal electrode layer 10a and the second internal electrode layer 10b may be covered by the dielectric layer 4 on the first main portion side surface SS1 and the second main portion side surface SS2. Figure 4 as well as Figure 5 Provide explanation.

[0038] <Internal structure of the laminate (LT cross section)>

[0039] based on Figure 4 , the internal structure of the stacked body 2 is described. Figure 4 yes Figure 1 A cross-sectional view taken along line II of the multilayer ceramic capacitor shown. Figure 4 The cross section of the portion of the laminate 2 shown is the LT cross section of the corresponding portion of the capacitor main portion 3. Figure 4 As shown, the laminate 2 includes a plurality of dielectric layers 4 and a plurality of internal electrode layers 10. The plurality of dielectric layers 4 and the plurality of internal electrode layers 10 are laminated in a lamination direction T with respect to each other.

[0040] <Inner layer and outer layer>

[0041] The laminated body 2 has an inner layer portion IL and two outer layer portions OL in the lamination direction T. The outer layer portion OL includes a first outer layer portion OL1 and a second outer layer portion OL2. The first outer layer portion OL1 and the second outer layer portion OL2 are arranged to sandwich the inner layer portion IL.

[0042] The inner layer portion IL includes a portion of the plurality of dielectric layers 4 and the plurality of internal electrode layers 10. In the inner layer portion IL, the plurality of internal electrode layers 10 are arranged opposite to each other with the dielectric layer 4 interposed therebetween. The inner layer portion IL is a portion that forms electrostatic capacitance and is a portion that substantially functions as a capacitor. Therefore, the inner layer portion IL can also be referred to as an effective portion.

[0043] The first outer layer portion OL1 is arranged on the first main surface M1 side of the stacked body 2, and the second outer layer portion OL2 is arranged on the second main surface M2 side of the stacked body 2. Specifically, the first outer layer portion OL1 is arranged between the internal electrode layer 10 closest to the first main surface M1 among the plurality of internal electrode layers 10 and the first main surface M1. The second outer layer portion OL2 is arranged between the internal electrode layer 10 closest to the second main surface M2 among the plurality of internal electrode layers 10 and the second main surface M2. The first outer layer portion OL1 and the second outer layer portion OL2 do not include the internal electrode layer 10, and include the remaining dielectric layers 4 among the plurality of dielectric layers 4 except the dielectric layers 4 for the inner layer portion IL. The first outer layer portion OL1 and the second outer layer portion OL2 function as protective layers for the inner layer portion IL.

[0044] <Dielectric layer>

[0045] The dielectric layer 4 includes an outer dielectric layer 5 and an inner dielectric layer 6 .

[0046] <Outer dielectric layer>

[0047] The outer dielectric layer 5 is a dielectric layer 4 constituting the first outer layer portion OL1 and the second outer layer portion OL2 of the dielectric layer 4. The outer dielectric layer 5 is located between the first main surface M1 and the internal electrode layer 10 closest to the first main surface M1 and between the second main surface M2 and the internal electrode layer 10 closest to the second main surface M2.

[0048] <Inner dielectric layer>

[0049] The inner dielectric layer 6 is located between the internal electrode layers 10, and is the dielectric layer 4 constituting the inner layer portion IL together with the internal electrode layer 10. The inner dielectric layer 6 is located between a first internal electrode layer 10a and a second internal electrode layer 10b described below.

[0050] <Number of dielectric layers>

[0051] The number of dielectric layers 4 stacked in the stacked body 2 can be, for example, 5 or more and 2000 or less. The number of dielectric layers 4 includes the number of outer dielectric layers 5 and the number of inner dielectric layers 6.

[0052] <Material of dielectric layer>

[0053] As the material of the dielectric layer 4, for example, dielectric ceramics containing BaTiO3, CaTiO3, SrTiO3, CaZrO3, etc. as main components can be used. In addition, materials containing Mn compounds, Fe compounds, Cr compounds, Co compounds, Ni compounds, etc. as secondary components added to these main components can also be used.

[0054] The dielectric layer 4 may have a plurality of crystal grains containing a perovskite compound having a basic structure of BaTiO3. Here, when the thickness of the dielectric layer 4 is thin, the capacitance of the capacitor becomes larger. Therefore, the crystal grain diameter is preferably less than 1 μm. In addition, as the thickness of the dielectric layer continues to become thinner, the crystal grains continue to become smaller, but if the crystal grains become too small, the relative dielectric constant decreases due to the size effect. Therefore, the size of the crystal grains can be appropriately designed according to the thickness of the dielectric layer.

[0055] When piezoelectric ceramics are used for the laminated body 2, the laminated ceramic electronic component functions as a ceramic piezoelectric element. Specific examples of piezoelectric ceramic materials include, for example, PZT (lead zirconate titanate)-based ceramic materials.

[0056] When semiconductor ceramics are used for the laminated body 2, the laminated ceramic electronic component functions as a thermistor element. Specific examples of semiconductor ceramic materials include spinel ceramic materials and the like.

[0057] In addition, when magnetic ceramics are used for the laminate, the laminated ceramic electronic component functions as an inductor element. In addition, when the laminated ceramic electronic component functions as an inductor element, the internal electrode layer becomes a coil-shaped conductor. As specific examples of magnetic ceramic materials, for example, ferrite ceramic materials can be cited.

[0058] <Thickness of dielectric layer>

[0059] The thickness of the dielectric layer 4 can be set to, for example, 0.3 μm or more and 100 μm or less. In addition, the outer dielectric layer 5 may be a plurality of layers or a single layer.

[0060] <Internal electrode layer>

[0061] The internal electrode layer 10 includes a first internal electrode layer 10a and a second internal electrode layer 10b. The first internal electrode layer 10a is an internal electrode layer 10 connected to the first external electrode 20a. The second internal electrode layer 10b is an internal electrode layer 10 connected to the second external electrode 20b. The external electrode 20 will be described later. The first internal electrode layer 10a extends from the first end face E1 toward the second end face E2. The second internal electrode layer 10b extends from the second end face E2 toward the first end face E1.

[0062] <Opposing part and lead-out part>

[0063] The first internal electrode layer 10a and the second internal electrode layer 10b each include an opposing electrode portion 11 and an extraction electrode portion 12. The opposing electrode portion 11 is a portion of the internal electrode layer 10 where the first internal electrode layer 10a and the second internal electrode layer 10b are opposed to each other in the stacking direction T. The extraction electrode portion 12 is a portion of the internal electrode layer 10 that is extracted from the opposing electrode portion 11 to the end surface E1 or the end surface E2 of the stacked body 2.

[0064] The counter electrode portion 11 of the first internal electrode layer 10a is referred to as the first counter electrode portion 11a, and the lead electrode portion 12 of the first internal electrode layer 10a is referred to as the first lead electrode portion 12a. The first lead electrode portion 12a is a portion led out from the first counter electrode portion 11a to the first end surface E1 of the laminate 2. Similarly, the counter electrode portion 11 of the second internal electrode layer 10b is referred to as the second counter electrode portion 11b, and the lead electrode portion 12 of the second internal electrode layer 10b is referred to as the second lead electrode portion 12b. The second lead electrode portion 12b is a portion led out from the second counter electrode portion 11b to the second end surface E2 of the laminate 2.

[0065] <Number of internal electrode layers>

[0066] The number of internal electrode layers 10 can be, for example, not less than 10 and not more than 2000. The number of internal electrode layers 10 includes the number of first internal electrode layers 10a and the number of second internal electrode layers 10b.

[0067] <Thickness of internal electrode layer>

[0068] The thickness of the internal electrode layer 10 is, for example, 0.1 μm or more and 5.0 μm or less, and preferably 0.2 μm or more and 2.0 μm or less. When the thickness of the internal electrode layer 10 is 0.5 μm or more, a plated film is easily grown when a metal layer of the external electrode 20 is formed by plating. The metal layer will be described later.

[0069] <Material of internal electrode layer>

[0070] The material of the internal electrode layer 10 can be, for example, metals such as Ni, Cu, Ag, Pd, and Au, alloys of Ni and Cu, alloys of Ag and Pd, etc. Alternatively, the material of the internal electrode layer 10 may include dielectric particles of the same composition as the ceramic included in the dielectric layer 4 .

[0071] <Electrode facing part>

[0072] The division in the length direction L of the stack 2 is explained. The stack 2 has an electrode opposing portion LF and two end spacers EG in the length direction L. The end spacer EG has a first end spacer EG1 and a second end spacer EG2. The electrode opposing portion LF is a portion where the first internal electrode layer 10a and the second internal electrode layer 10b are opposed in the stacking direction T. In the electrode opposing portion LF, the first opposing electrode portion 11a and the second opposing electrode portion 11b are opposed in the stacking direction T. The electrode opposing portion LF is located in the central portion in the length direction L of the stack 2. A capacitor is formed by the first opposing electrode portion 11a and the second opposing electrode portion 11b being opposed via the inner dielectric layer 6. Therefore, the electrode opposing portion LF can also be called an effective portion.

[0073] <End spacer>

[0074] The end spacer is a portion where the first internal electrode layer 10a and the second internal electrode layer 10b are not opposite to each other in the stacking direction T. Specifically, a portion where the first internal electrode layer 10a is disposed but the second internal electrode layer 10b is not disposed in the stacking direction T is the first end spacer EG1. Similarly, a portion where the second internal electrode layer 10b is disposed but the first internal electrode layer 10a is not disposed is the second end spacer EG2.

[0075] The first end spacer EG1 corresponds to the portion where the first lead electrode portion 12a is arranged, and the second end spacer EG2 corresponds to the portion where the second lead electrode portion 12b is arranged. The first end spacer EG1 functions as a lead electrode of the first internal electrode layer 10a toward the first end surface E1, and the second end spacer EG2 functions as a lead electrode of the second internal electrode layer 10b toward the second end surface E2. The end spacer EG is a division in the length direction L, and is therefore also referred to as an L spacer.

[0076] The length of the end spacer portion EG in the longitudinal direction L can be set to, for example, 5 μm or more and 30 μm or less.

[0077] In addition, the specific structure of the internal electrode layer 10 and the like can be changed in various ways. For example, the shape of the first opposing electrode portion 11a of the first internal electrode layer 10a is not particularly limited, but is preferably a rectangular shape. However, the corners may be rounded, or the corners may be inclined. That is, the corners may be tapered. In addition, the corners may be tapered with an inclination toward any edge of the first opposing electrode portion 11a.

[0078] Similarly, the shape of the second opposing electrode portion 11b of the second internal electrode layer 10b is not particularly limited, but is preferably a rectangular shape. However, the corners may be rounded, or the corners may be inclined. That is, the corners may be tapered. In addition, the corners may be tapered with an inclination toward any edge of the second opposing electrode portion 11b.

[0079] Similarly, the shape of the first lead electrode portion 12a of the first internal electrode layer 10a is not particularly limited, but is preferably a rectangular shape. However, the corners may be rounded, or the corners may be inclined. That is, the corners may be tapered. In addition, the corners may be tapered with an inclination toward any edge of the first lead electrode portion 12a.

[0080] Similarly, the shape of the second lead electrode portion 12b of the second internal electrode layer 10b is not particularly limited, but is preferably a rectangular shape. However, the corners may be rounded, or the corners may be inclined. That is, the corners may be tapered. In addition, the corners may be tapered with an inclination toward any edge of the second lead electrode portion 12b.

[0081] The width of the first counter electrode portion 11 a of the first internal electrode layer 10 a and the width of the first lead electrode portion 12 a of the first internal electrode layer 10 a may be formed to be the same width, or the width of either one may be formed to be narrow.

[0082] The width of the second counter electrode portion 11 b of the second internal electrode layer 10 b and the width of the second lead electrode portion 12 b of the second internal electrode layer 10 b may be formed to be the same width, or the width of either one may be formed to be narrow.

[0083] The first lead electrode portion 12 a of the first internal electrode layer 10 a may be bent toward the center of the first end surface E1 of the laminate 2 .

[0084] The second lead electrode portion 12 b of the second internal electrode layer 10 b may be bent toward the center of the second end surface E2 of the laminate 2 .

[0085] The distance between the internal electrode layer 10 closest to the first principal surface M1 and the internal electrode layer 10 closest to the second principal surface M2 among the internal electrode layers 10 extended to each end surface E may be shorter than the distance between the opposing electrode portion 11 closest to the first principal surface M1 and the opposing electrode portion 11 closest to the second principal surface M2.

[0086] In the multilayer ceramic capacitor 1 of the present embodiment, the opposing electrode portions 11 of the internal electrode layer 10 are opposed to each other via the dielectric layer 4, thereby forming a capacitor and showing the characteristics of a capacitor. In order to make the capacitance of the capacitor high, it is necessary to increase the surface area of ​​the internal electrode layer 10. Therefore, the coverage of the LW surface of the internal electrode layer 10 is preferably 90% or more. The so-called coverage of the LW surface is defined by the ratio of the remaining area after subtracting the area of ​​the gap from the area of ​​the inside of the edge of the internal electrode layer 10 when observing the internal electrode layer 10 from the LW surface to the area of ​​the inside of the edge of the internal electrode layer 10.

[0087] When the coverage of the LW surface is high, the capacitance of the capacitor becomes higher. When the coverage of the LW surface is low, the dielectric layers 4 are bonded to each other via gaps, so the bonding strength between the layers becomes high, and interlayer delamination becomes less likely to occur.

[0088] Furthermore, the internal electrode layer 10 preferably has a uniform thickness, but the thickness of the edge portion in the width direction W may be thicker than the thickness of the center portion in the width direction W.

[0089] <Staircase>

[0090] In addition, a step layer may be arranged at the L interval (i.e., the end interval EG). The so-called step layer is a dielectric layer 4 additionally arranged at the end interval EG in order to reduce the difference in length between the end interval EG and the electrode opposing portion LF in the stacking direction T. The step layer may also be arranged so that the internal electrode layer 10 covers a portion of the step layer. Alternatively, the step layer may be arranged to cover a portion of the internal electrode layer 10 in contrast thereto. The step layer preferably has the same thickness as the internal electrode layer 10. In addition, the step layer preferably has the same composition as the dielectric layer 4. However, the composition of the dielectric layer 4 is not limited thereto.

[0091] <Dummy electrode layer>

[0092] A dummy electrode layer may also be arranged at the L interval. The dummy electrode layer can be arranged at least one of the inner layer portion IL and the outer layer portion OL. Here, the outer layer portion OL includes a first outer layer portion OL1 and a second outer layer portion OL2. When the dummy electrode layer is arranged at the outer layer portion OL, the dummy electrode layer is preferably arranged at a portion corresponding to the place where the L interval is parallel moved in the stacking direction T. That is, the dummy electrode layer is preferably arranged at a position corresponding to the L interval in the length direction L of the outer layer portion OL.

[0093] The dummy electrode layer can include a first dummy electrode layer and a second dummy electrode layer. The first dummy electrode layer is preferably the same thickness as the sum of the thicknesses of the first internal electrode layers 10a. In other words, the first dummy electrode layer is preferably the same thickness as (the thickness of the first internal electrode layer 10a×the number of first internal electrode layers 10a). The first dummy electrode layer may be one sheet or a plurality of sheets as long as it has the same thickness as the sum of the thicknesses of the first internal electrode layers 10a.

[0094] The second dummy electrode layer is also the same as the first dummy electrode layer. That is, the second dummy electrode layer is preferably the same thickness as the sum of the thicknesses of the second internal electrode layers 10b. That is, the second dummy electrode layer is preferably the same thickness as (the thickness of the second internal electrode layer 10b×the number of second internal electrode layers 10b). The second dummy electrode layer may be one sheet or a plurality of sheets as long as it has the same thickness as the sum of the thicknesses of the second internal electrode layers 10b.

[0095] <External electrodes>

[0096] The external electrode 20 includes a first external electrode 20 a and a second external electrode 20 b .

[0097] <First external electrode>

[0098] The first external electrode 20a is an external electrode 20 disposed on the first end surface E1 of the stacked body 2. The first external electrode 20a is electrically connected to the first internal electrode layer 10a.

[0099] <Second external electrode>

[0100] The second external electrode 20b is an external electrode 20 disposed on the second end surface E2 of the laminate 2. The second external electrode 20b is electrically connected to the second internal electrode layer 10b.

[0101] <External electrodes on each surface>

[0102] The external electrode 20 extends from the end surface E to a portion of the two main surfaces M and a portion of the two side surfaces S. The portion of the external electrode 20 arranged on the end surface E is referred to as the end surface external electrode 25. The portion of the external electrode 20 arranged on a portion of the main surface M is referred to as the main surface external electrode 26. The portion of the external electrode 20 arranged on a portion of the side surface S is referred to as the side surface external electrode 27.

[0103] Specifically, the portion of the first external electrode 20a disposed on the first end surface E1 is set as the first end surface external electrode 25a. The portion of the first external electrode 20a disposed on a portion of the first main surface M1 or a portion of the second main surface M2 is set as the first main surface external electrode 26a. The portion of the first external electrode 20a disposed on a portion of the first side surface S1 or a portion of the second side surface S2 is set as the first side surface external electrode 27a.

[0104] In addition, as with the first external electrode 20a, the portion of the second external electrode 20b disposed on the second end surface E2 is set as the second end surface external electrode 25b. The portion of the second external electrode 20b disposed on a portion of the first main surface M1 or a portion of the second main surface M2 is set as the second main surface external electrode 26b. The portion of the second external electrode 20b disposed on a portion of the first side surface S1 or a portion of the second side surface S2 is set as the second side surface external electrode 27b.

[0105] <Layer structure of external electrodes>

[0106] based on Figure 4 as well as Figure 5 , the layer structure of the external electrode 20 is described. The external electrode 20 includes three layers, namely, a base electrode layer 21, an inner plating layer 23, and a surface plating layer 24. These layers are arranged in the order of the base electrode layer 21, the inner plating layer 23, and the surface plating layer 24 from the end surface E of the laminate 2. Specifically, the first external electrode 20a includes the first base electrode layer 21a, the first inner plating layer 23a, and the first surface plating layer 24a. Similarly, the second external electrode 20b includes the second base electrode layer 21b, the second inner plating layer 23b, and the second surface plating layer 24b.

[0107] <Base electrode layer>

[0108] The first foundation electrode layer 21a is arranged on and covers the first end face E1 of the laminate 2. The first foundation electrode layer 21a may extend from the first end face E1 to a portion of the first principal face M1, a portion of the second principal face M2, a portion of the first side face S1, and a portion of the second side face S2.

[0109] Similarly, the second base electrode layer 21b is arranged on and covers the second end surface E2 of the stacked body 2. The second base electrode layer 21b may extend from the second end surface E2 to a portion of the first principal surface M1, a portion of the second principal surface M2, a portion of the first side surface S1, and a portion of the second side surface S2.

[0110] The first foundation electrode layer 21 a and the second foundation electrode layer 21 b include at least one selected from a baked layer, a conductive resin layer, a thin film layer, a direct plating layer, and the like.

[0111] <Burn layer>

[0112] The sintered layer contains a glass component and a metal. As the glass component, it contains at least one selected from B, Si, Ba, Mg, Al, Li, etc. As the metal, it contains at least one selected from Cu, Ni, Ag, Pd, Ag-Pd alloy, Au, etc. The sintered layer can also be a plurality of layers. In addition, the sintered layer is a sintered layer that is sintered after applying a conductive paste containing a glass component and a metal to the stacked body 2. This sintering (i.e., firing) can be performed simultaneously with the firing of the internal electrode layer 10, or it can be fired separately after the internal electrode layer 10 is fired.

[0113] The thickness of the first sintered layer and the second sintered layer at the center in the stacking direction T of the first foundation electrode layer 21a located at the first end face E1 and the second foundation electrode layer 21b located at the second end face E2 is preferably 0.1 μm or more and 200 μm or less, for example.

[0114] When a sintered layer is provided on the first main surface M1 and the second main surface M2 and the first side surface S1 and the second side surface S2, the thickness of the sintered layer at the center portion in the longitudinal direction of the base electrode layer 21 on each surface is preferably, for example, not less than 0.1 μm and not more than 200 μm.

[0115] <Conductive resin layer>

[0116] Next, a description will be given of a case where the first foundation electrode layer 21 a and the second foundation electrode layer 21 b include a conductive resin layer.

[0117] The conductive resin layer contains a thermosetting resin and a metal. The conductive resin layer contains a thermosetting resin. Therefore, it is more flexible than a conductive layer composed of a plated film or a sintered product of a conductive paste. Therefore, even when a physical impact or an impact caused by a thermal cycle is applied to a ceramic electronic component such as the laminated ceramic capacitor 1, the conductive resin layer functions as a buffer layer, thereby preventing cracks from being generated in the capacitor.

[0118] As the metal contained in the conductive resin layer, Ag, Cu or an alloy thereof can be used. In addition, as the metal, a metal coated with Ag on the surface of a metal powder can be used. In the case of using a metal coated with Ag on the surface of a metal powder as the metal, Cu and Ni are preferably used as the metal powder. In addition, as the metal, a metal treated with oxidation resistance for Cu can also be used. The reason for using Ag conductive metal powder as the conductive metal is that Ag has a particularly low specific resistance among metals and is therefore suitable for electrode materials. In addition, Ag is a precious metal and is therefore non-oxidizable and has high resistance. In addition, the reason for using a metal coated with Ag is that the use amount of Ag can be reduced while effectively utilizing the above-mentioned characteristics of Ag, thereby making the metal of the base material cheaper.

[0119] The metal preferably contains 35 vol% or more and 75 vol% or less relative to the volume of the entire conductive resin. The shape of the metal contained in the conductive resin layer is not particularly limited. The shape of the metal (in other words, the shape of the conductive filler) may also be spherical or flat. The average particle size of the metal contained in the conductive resin layer is not particularly limited. The average particle size of the metal (e.g., the conductive filler) can be, for example, 0.3 μm or more and 10 μm or less.

[0120] Here, the metal contained in the conductive resin layer mainly bears the electrical conductivity of the conductive resin layer. Specifically, the conductive fillers are in contact with each other, thereby forming an electrical path inside the conductive resin layer. As for the metal contained in the conductive resin layer, spherical metal, flat metal, etc. can be used, but it is preferable to use a mixture of spherical metal powder and flat metal powder.

[0121] As the resin for the conductive resin layer, for example, various known thermosetting resins such as epoxy resin, phenolic resin, polyurethane resin, silicone resin, polyimide resin, etc. can be used. Among them, epoxy resin with excellent heat resistance, moisture resistance, adhesion, etc. is one of the most suitable resins. In addition, the resin contained in the conductive resin layer preferably contains more than 25vol% and less than 65vol% relative to the volume of the conductive resin as a whole. Furthermore, the conductive resin layer preferably contains a curing agent together with the thermosetting resin. As a curing agent, when using epoxy resin as a base resin, various known compounds such as phenolics, amines, acid anhydrides, imidazoles, etc. can be used as a curing agent for epoxy resin.

[0122] The conductive resin layer may be disposed on the sintered layer so as to cover the sintered layer, or may be disposed directly on the laminate 2. In addition, the conductive resin layer may be a plurality of layers.

[0123] The thickness of the first and second conductive resin layers at the center portions in the stacking direction T of the first foundation electrode layer 21a located at the first end face E1 and the second foundation electrode layer 21b located at the second end face E2 is preferably about 10 μm to 200 μm, for example.

[0124] When a conductive resin layer is provided on the first and second main surfaces M1 and M2 and the first and second side surfaces S1 and S2 , the thickness of the conductive resin layer at the center in the longitudinal direction of the base electrode layer 21 on each surface is preferably, for example, 5 μm or more and 50 μm or less.

[0125] <Thin film layer>

[0126] Next, when the first foundation electrode layer 21 a and the second foundation electrode layer 21 b include a thin film layer, the thin film layer can be a layer of 1 μm or less formed by depositing metal particles by a thin film forming method such as sputtering or vapor deposition.

[0127] <Direct plating layer>

[0128] The external electrode 20 may include a direct plating layer. The direct plating layer is a plating layer directly formed on the surface of the laminate 2. That is, the laminated ceramic capacitor 1 may also have a structure including a direct plating layer electrically connected to the first internal electrode layer 10a or the second internal electrode layer 10b. When the direct plating layer is formed, the direct plating layer may be formed after a catalyst is arranged on the surface of the laminate 2 as a pretreatment.

[0129] The direct plating layer preferably contains at least one metal selected from Cu, Ni, Sn, Pb, Au, Ag, Pd, Bi or Zn, or an alloy containing the metal. For example, when Ni is used to form the first internal electrode layer 10a and the second internal electrode layer 10b, the direct plating layer is preferably formed using Cu having good bonding properties with Ni. The thickness of each layer of the direct plating layer is preferably not less than 1.0 μm and not more than 15 μm. In addition, the plating layer preferably does not contain glass. The metal ratio per unit volume of the plating layer is preferably not less than 99 volume %.

[0130] The plating layer on the base electrode layer 21 may be a single layer or a plurality of layers. When the plating layer is two layers, it is preferred to set it in the order of a Ni plating layer and a Sn plating layer from the bottom. In addition, when the plating layer is three layers, it is preferred to set it in the order of a Sn plating layer, a Ni plating layer, and a Sn plating layer from the bottom. Among them, a two-layer structure of a Ni plating layer and a Sn plating layer is preferred. Hereinafter, the case where the plating layer is two layers of an inner plating layer 23 and a surface plating layer 24 will be described.

[0131] <Inner plating layer>

[0132] The inner plating layer 23 is disposed on the base electrode layer 21 and covers at least a portion of the base electrode layer 21 .

[0133] <Surface plating layer>

[0134] The surface plating layer 24 is disposed on the inner plating layer 23 and covers at least a portion of the inner plating layer 23 .

[0135] Including the inner plating layer 23 and the surface plating layer 24, the plating layer preferably includes at least one selected from metals such as Cu, Ni, Ag, Pd, Au and Sn, and alloys such as Ag-Pd alloy. Among them, the inner plating layer 23 is particularly preferably a Ni plating layer, and the surface plating layer 24 is particularly preferably a Sn plating layer. The Ni plating layer can prevent the base electrode layer from being corroded by the solder when the ceramic electronic components are installed. The Sn plating layer can improve the wettability of the solder when the ceramic electronic components are installed, which can make the installation easier. By setting the surface plating layer 24 to a Sn plating layer, the wettability of the solder to the external electrode 20 can be improved. The thickness of each layer of the plating layer is preferably greater than 1.0μm and less than 15μm.

[0136] <Internal structure of the laminate (WT cross section)>

[0137] based on Figure 5 , the internal structure of the stacked body 2 is described, and in particular, the internal structure is described from the second end surface E2. Figure 5 yes Figure 1 The II-II line cross-sectional view of the multilayer ceramic capacitor shown. The multilayer body 2 has an electrode opposing portion WF and a side spacer SG in which the internal electrode layer 10 is opposed in the width direction W. The side spacer SG includes a first side spacer SG1 and a second side spacer SG2. The first side spacer SG1 and the second side spacer SG2 are configured to sandwich the electrode opposing portion WF. The first side spacer SG1 is located between the electrode opposing portion WF and the first side surface S1, and the second side spacer SG2 is located between the electrode opposing portion WF and the second side surface S2.

[0138] Specifically, the first side spacer SG1 is located between the end of the first side surface S1 of the internal electrode layer 10 and the first side surface S1, and the second side spacer SG2 is located between the end of the second side surface S2 of the internal electrode layer 10 and the second side surface S2. The first side spacer SG1 and the second side spacer SG2 do not include the internal electrode layer 10, but only include the dielectric layer 4. The first side spacer SG1 and the second side spacer SG2 function as a protective layer for the internal electrode layer 10. The side spacer SG is a division in the width direction W, and is therefore also referred to as a W spacer.

[0139] The length of the side spacer SG in the width direction W can be set to, for example, 5 μm or more and 50 μm or less.

[0140] <Size of Multilayer Ceramic Capacitors>

[0141] The size of the multilayer ceramic capacitor 1 is not particularly limited. The size of the multilayer ceramic capacitor 1 can be set, for example, as follows. That is, the dimension in the length direction L of the multilayer ceramic capacitor 1 including the multilayer body 2 and the external electrode 20 is set to the L dimension. The L dimension is preferably greater than 0.2 mm and less than 6.5 mm. In addition, the dimension in the stacking direction T of the multilayer ceramic capacitor 1 including the multilayer body 2 and the external electrode 20 is set to the T dimension. The T dimension is preferably greater than 0.1 mm and less than 6.5 mm. Furthermore, the dimension in the width direction W of the multilayer ceramic capacitor 1 including the multilayer body 2 and the external electrode 20 is set to the W dimension. The W dimension is preferably greater than 0.1 mm and less than 5.5 mm. In addition, the length of each part of the multilayer body 2 and the external electrode 20 can be measured with a micrometer or an optical microscope.

[0142] In addition, in the present embodiment, the multilayer ceramic capacitor 1 is used as a two-terminal capacitor.

[0143] <Corner>

[0144] The multilayer ceramic capacitor 1 of the present embodiment is characterized by the corners of the capacitor main portion 3. Figure 6 as well as Figure 7 Provide explanation. Figure 6 (a) Yes Figure 2 The III-III line cross-sectional view of FIG. (b) is a conventional multilayer ceramic capacitor equivalent to Figure 2 FIG. 3 is a cross-sectional view of the line III-III. Figure 7 is another embodiment of the present invention equivalent to Figure 2 FIG. 3 is a cross-sectional view of the line III-III.

[0145] In the multilayer ceramic capacitor 1 of the present embodiment, the corner C, which is the portion where the main surface M and the main portion side surface SS intersect in the capacitor main portion 3 , is bent. The corner C is covered by the insulating portion 8 .

[0146] <Definition of corner>

[0147] In the capacitor main part 3, the corner where the first main surface M1 and the first main part side surface SS1 intersect is set as corner C1, and the corner where the second main surface M2 and the first main part side surface SS1 intersect is set as corner C2. Similarly, in the capacitor main part 3, the corner where the first main surface M1 and the second main part side surface SS2 intersect is set as corner C3, and the corner where the second main surface M2 and the second main part side surface SS2 intersect is set as corner C4.

[0148] <Corner bend>

[0149] In the multilayer ceramic capacitor 1 of the present embodiment, the corner C is bent. Figure 6 As shown in (b), in the conventional multilayer ceramic capacitor 1, when viewed from the length direction L of the capacitor main portion 3, in other words, in the WT cross section, the corner C is bent at a substantially right angle. In contrast, in the multilayer ceramic capacitor 1 of the present embodiment, Figure 6 As shown in (a), the corner C is bent. Specifically, the corner C1 is bent across the first main surface M1 and the first main part side SS1. The other corners C are the same. The corner C2 is bent across the second main surface M2 and the first main part side SS1. The corner C3 is bent across the first main surface M1 and the second main part side SS2. The corner C4 is bent across the second main surface M2 and the second main part side SS2.

[0150] <Coating with insulation>

[0151] The insulating portion 8 covers the bent corner C. That is, Figure 6 As shown in (a), when viewed from the longitudinal direction L of the capacitor main portion 3, in other words, in the WT cross section, the insulating portion 8 covers the corner portion C.

[0152] The second corner C2 is used as an example for explanation. The outer edge of the second corner C2 does not pass through the point P3 where the second main surface M2 and the first main portion side surface SS1 intersect. This is because the outer dielectric layer 5 does not exist near the point P3, so the second corner C2 is bent.

[0153] A point on the first main portion side surface SS1 that is closer to the first main surface M1 than point P3 is set as point P2. In addition, a point on the second main surface M2 that is closer to the second main portion side surface SS2 than point P3 is set as point P4. The second corner C2 is curved in a shape that connects point P2 and point P4 with a curve.

[0154] Furthermore, the first insulating portion 8a is also disposed in a portion surrounded by the point P2, the point P3, and the point P4. Thus, the second corner C2 is covered by the first insulating portion 8a from the point P2 to the point P4.

[0155] The same is true for the corners other than the first corner C1 (i.e., the second corner C2, the third corner C3, and the fourth corner C4). As described above, the first insulating portion 8a covers the first corner C1 and the second corner C2, and the second insulating portion 8b covers the third corner C3 and the fourth corner C4.

[0156] <Continuous covering>

[0157] When the capacitor main part 3 is viewed from the length direction L of the capacitor main part 3, the insulating part 8 continuously covers the corner part C. In particular, the insulating part 8 takes the end point on the main part side surface SS of the corner part C as the starting point and continuously covers the corner part C from the starting point. The second corner part C2 is used as an example for explanation. Figure 6 As shown in (a), in the second corner portion C2, the first insulating portion 8a continuously covers the second corner portion C2 from point P2 to point P4 without being separated from the capacitor main portion 3.

[0158] Here, point P2 is the end point on the first main portion side surface SS1 in the second corner C2. Therefore, it can be said that when the laminate 2 is observed from the length direction L of the laminate 2, the first insulating portion 8a continuously covers the second corner C2 from the first main portion side surface SS1. The same is true for the corners C other than the second corner C2.

[0159] As described above, when the capacitor main part 3 is viewed from the longitudinal direction L of the capacitor main part 3, the first insulating part 8a continuously covers the first corner C1 and the second corner C2, and similarly, the second insulating part 8b continuously covers the third corner C3 and the fourth corner C4.

[0160] <Coverage rate>

[0161] In addition, when the capacitor main part 3 is viewed from the length direction L of the capacitor main part 3, the insulating part 8 covers more than 50% of the corner part C along the shape of the corner part C from the end point on the main part side surface SS of the corner part C. The second corner part C2 is used as an example for description. Figure 6 As shown in (a), in the second corner C2, the first insulating portion 8a continuously covers the second corner C2 from point P2 to point P4 without being separated from the capacitor main portion 3. Point P2 is the endpoint on the first main portion side surface SS1 in the second corner C2. Therefore, when the laminate 2 is observed from the length direction L of the laminate 2, the first insulating portion 8a covers more than 50% of the second corner C2 along the shape of the second corner C2 from point P2 which is the endpoint on the first main portion side surface SS1 of the second corner C2. The same is true for the corners C other than the second corner C2.

[0162] As described above, when observed from the length direction L of the capacitor main portion 3, the first insulating portion 8a covers more than 50% of the first corner portion C1 and the second corner portion C2 from the end point on the first main portion side surface SS1 of the first corner portion C1 and the second corner portion C2 along the shape of the first corner portion C1 and the second corner portion C2. Similarly, the second insulating portion 8b covers more than 50% of the third corner portion C3 and the fourth corner portion C4 from the end point on the second main portion side surface SS2 of the third corner portion C3 and the fourth corner portion C4 along the shape of the third corner portion C3 and the fourth corner portion C4.

[0163] <Surface roughness>

[0164] Next, the roughness of the corner C is described. In the multilayer ceramic capacitor 1 of the present embodiment, the roughness of the corner C is greater than the roughness of the insulating portion 8 located on the corner C. In other words, the roughness of the corner C is greater than the roughness of the corner of the laminated body 2 corresponding to the corner C. The following is a description.

[0165] <Outer corner>

[0166] In the first insulating portion 8a, the corner where the first main surface M1 and the first side surface S1 intersect is set as the first outer corner K1. In addition, in the first insulating portion 8a, the corner where the second main surface M2 and the first side surface S1 intersect is set as the second outer corner K2. Similarly, in the second insulating portion 8b, the corner where the first main surface M1 and the second side surface S2 intersect is set as the third outer corner K3. In addition, in the second insulating portion 8b, the corner where the second main surface M2 and the second side surface S2 intersect is set as the third outer corner K4. In addition, as mentioned above, the so-called first side surface S1 is a surface in the first insulating portion 8a that is opposite to the surface in contact with the first main portion side surface SS1. In addition, the so-called second side surface S2 is a surface in the second insulating portion 8b that is opposite to the surface in contact with the second main portion side surface SS2.

[0167] In the multilayer ceramic capacitor 1 of the present embodiment, the roughness of the first corner C1 is greater than the roughness of the first outer corner K1. Similarly, the roughness of the second corner C2 is greater than the roughness of the second outer corner K2, the roughness of the third corner C3 is greater than the roughness of the third outer corner K3, and the roughness of the fourth corner C4 is greater than the roughness of the fourth outer corner K4.

[0168] By increasing the roughness of the corner portion C in this manner, the adhesion between the capacitor main portion 3 and the insulating portion 8 can be increased by the anchor effect based on the surface shape of the corner portion C. This can prevent or suppress the occurrence of peeling.

[0169] The roughness of the corner C is preferably 0.05 μm or more and less than 1.00 μm. If the roughness is less than 0.05 μm, the anchoring effect is likely to be insufficient. In addition, if the roughness is 1.00 μm or more, the surface irregularities become too large, so the capacitor main part 3 and the insulating part 8 cannot be sufficiently adhered, which may cause pores and peeling.

[0170] <Measurement method of surface roughness>

[0171] The surface roughness can be measured as follows. That is, the 1 / 2WT surface section of the stack 2 is observed using an SEM. Then, the stack 2 and the insulating portion 8 are binarized, and the roughness of the corner C of the capacitor main portion 3 and the outer corner K of the stack 2 are measured. In addition, the outer corner K of the stack 2 and the outer corner K of the insulating portion 8 have the same meaning and represent the same position. More specifically, based on the contour lines of the corner C of the capacitor main portion 3 and the outer corner K of the stack 2, the roughness is measured using an image analysis software using a digital microscope manufactured by KEYENCE. The roughness measured by the image analysis software is the surface roughness Sa according to the ISO-25178 standard.

[0172] <Other corner shapes>

[0173] Other shapes of the corner portion C will be described. Figure 7 is another embodiment of the present invention equivalent to Figure 2 The III-III line cross-sectional view of the figure. Figure 7 In another embodiment shown in FIG. 1 , a convex portion V is provided at the corner portion C and protrudes toward the width direction W. Specifically, as shown in FIG. Figure 7 As shown, in the first outer layer portion OL1, a first convex portion V1 protruding in the direction of the first insulating portion 8a is arranged at the corner C1, and a third convex portion V3 protruding in the direction of the second insulating portion 8b is arranged at the corner C3. Similarly, in the second outer layer portion OL2, a second convex portion V2 protruding in the direction of the first insulating portion 8a is arranged at the corner C2, and a fourth convex portion V4 protruding in the direction of the second insulating portion 8b is arranged at the corner C4.

[0174] The second corner C2 is used as an example for explanation. Figure 7 In the second convex portion V2 disposed at the second corner portion C2, the vertex of the second convex portion V2 in the direction of the first insulating portion 8a is shown by point P5. Figure 7 As shown, point P5, which is the vertex of the second protrusion V2, protrudes from the first main part side surface SS1 of the capacitor main part 3 toward the first side surface S1 of the laminate 2. The length D5 of the point P5, which is the vertex of the second protrusion V2, protruding from the first main part side surface SS1 of the capacitor main part 3 toward the first side surface S1 of the laminate 2 is preferably greater than 0.5 μm and less than 10.0 μm, for example.

[0175] Next, the position of the protrusion V in the stacking direction T will be described. Figure 7 In FIG. 1 , the thickness of the second outer layer portion OL2 in the stacking direction T is indicated by D1. Figure 7The line L1 shown in FIG. 1 shows a position of the second outer layer portion OL2 that is 10% of the thickness of the second outer layer portion OL2 in the stacking direction T from the second main surface M2. That is, D1:D2=100:10. Figure 7 The line L2 shown indicates a position of the second outer layer portion OL2 which is away from the second main surface M2 by 60% of the thickness of the second outer layer portion OL2 in the stacking direction T. That is, D1:D3=100:60.

[0176] like Figure 7 As shown, the point P5 as the vertex of the second convex portion V2 is located in the range from the line L1 to the line L2 in the stacking direction T in the second outer layer portion OL2. That is, the point P5 as the vertex of the second convex portion V2 is arranged at a position which is at a distance from the second main surface M2 by a length of more than 10% and less than 60% of the thickness of the second outer layer portion OL2 in the stacking direction T. The arrangement of the second convex portion V2 is also the same for convex portions V other than the second convex portion V2. As described above, the convex portion V is arranged at a position which is at a distance from the first main surface M1 or the second main surface M2 by a length of more than 10% and less than 60% of the thickness of the outer layer portion OL in the stacking direction T of the stack 2. In addition, the position of the convex portion V is set to the position of the vertex in the width direction W of the convex portion V.

[0177] <Other shapes of convex parts>

[0178] In addition, the shape of the convex portion V can be variously modified. Figure 8 , showing an example thereof. Figure 8 This is a diagram showing another embodiment of the convex portion V. Figure 8 is corresponding to Figure 7 The area R of the graph. Figure 7 In the convex portion V4 shown in FIG. 1 , the convex portion V4 is formed to span the entire region in the stacking direction T of the outer dielectric layer 5. In other words, the edge surface of the outer dielectric layer 5 does not include a straight line portion parallel to the second main portion side surface SS2. Figure 8 The convex portion V4 shown has a flat portion V4F between the convex portion V4 and the inner layer portion IL in the stacking direction T. The flat portion V4F is a straight line portion parallel to the second main portion side surface SS2 in the edge surface of the outer dielectric layer 5 .

[0179] exist Figure 8 In the convex portion V4 shown, the adhesion between the capacitor main portion 3 and the second insulating portion 8b at the boundary between the second outer layer portion OL2 and the inner layer portion IL is easily improved in the second main portion side surface SS2. As a result, it is possible to further suppress the occurrence of interlayer peeling between the second outer layer portion OL2 and the inner layer portion IL, and the intrusion of moisture and the like into the space between the second outer layer portion OL2 and the inner layer portion IL.

[0180] <Shape of the convex portion in the longitudinal direction>

[0181] Next, based on Fig. 9 as well as Fig.10 , the shape of the convex portion V in the length direction L is described. Fig. 9 It is a perspective view showing a part of the capacitor main part 3 . Fig.10 1 is a perspective view showing a portion of the capacitor main part 3 in another embodiment. In more detail, Fig. 9 as well as Fig.10 Yes Figure 7 The capacitor main part 3 included in the region R is a partial perspective view of the capacitor main part 3 showing a portion of the length in the length direction L of the capacitor main part 3. Fig. 9 The convex portion V and Fig.10 In the convex portion V shown, the value D5 which is the height of the convex portion V varies in the longitudinal direction L.

[0182] Fig. 9 The height D5 of the convex portion V shown is constant in the longitudinal direction L. That is, the convex portion V is formed continuously in the longitudinal direction L.

[0183] However, the convex portion V need not be Fig. 9 As shown in FIG. 1 , the convex portion V is continuously formed in the longitudinal direction L. By changing the height D5 of the convex portion V in the longitudinal direction L, it is also possible to have a form in which a plurality of peaks exist. That is, the convex portion V can also be set to a form that is uneven or discontinuous in the longitudinal direction L. In addition, in the discontinuous form, the peak portions can be arranged at fixed intervals, or can be arranged at irregular intervals.

[0184] exist Fig.10 An example of a form having multiple peaks is shown. Fig.10 Point P5 shows the point where D5 becomes maximum in the length direction L. That is, point P5 shows the position of the top of the peak. In contrast, Fig.10 Point B1 shows the point where D5 becomes the smallest in the length direction L. That is, point B1 shows the position of the peak and the valley of the peak. Fig.10 As shown, the convex portion V can be formed in the longitudinal direction L so that the point P5 and the point B1 are repeated multiple times. Thereby, the convex portion V having a shape in which a plurality of peaks exist in the longitudinal direction L can be realized.

[0185] In addition, the protrusion V is not in contact with any of the first internal electrode layer 10a and the second internal electrode layer 10b. The second protrusion V2 is used as an example for description. Figure 7 In FIG. 1 , the boundary between the first outer layer portion OL1 and the inner layer portion IL on the first main portion side surface SS1 is shown by point P1. Figure 7As shown in FIG. 1 , the second convex portion V2 does not extend beyond the point P1 and exists within the range of the inner layer portion IL. Therefore, the second convex portion V2 is not in contact with any of the first internal electrode layer 10a and the second internal electrode layer 10b. This is also the same for the convex portions V other than the second convex portion V2. As described above, the convex portion V is not in contact with any of the first internal electrode layer 10a and the second internal electrode layer 10b. In other words, the convex portion V is not bonded to the internal electrode layer 10.

[0186] In addition, the convex portion V can be set as a protrusion different from the protrusion caused by the roughness on the corner C. That is, it can be set as a protrusion that is not continuous with the concavo-convex of the corner C. Alternatively, the convex portion V can also be set as a protrusion that is continuous with the concavo-convex of the corner C. That is, the convex portion V can be set as a protrusion that extends from the corner C. In addition, the width of the protrusion of the convex portion V is preferably wider than the width of the protrusion related to the roughness of the corner C. Here, the width of the protrusion and the convex means the width in the WT section.

[0187] In addition, it is preferable that the main component of the material forming the protrusion V be the same as that of the dielectric layer 4 .

[0188] By disposing the convex portion V as described above, when moisture enters from the interface between the laminated body 2 and the insulating portion 8 , the convex portion V can prevent the moisture from entering the effective portion.

[0189] <Insulation part>

[0190] The insulating portion is described below. The thickness of the insulating portion 8 is preferably not less than 10 μm and not more than 50 μm. If the thickness of the insulating portion 8 becomes less than 10 μm, it becomes impossible to fully cover the interface exposed on the main portion side surface SS of the capacitor main portion 3. Therefore, the moisture resistance reliability is sometimes reduced. On the other hand, if the thickness of the insulating portion 8 becomes more than 50 μm, the size of the stacked body 2 becomes too large. Therefore, the degree of freedom of mounting of the stacked ceramic capacitor 1 is reduced.

[0191] In addition, the insulating portion 8 may be a single layer or a double layer. When the insulating portion 8 is a double layer, the total thickness of the two layers may be set to be greater than 10 μm and less than 50 μm, or the thickness of each layer may be set to be greater than 10 μm and less than 50 μm. By setting the insulating portion 8 to be a double layer, the moisture resistance can be further improved.

[0192] In the above description, the first to fourth corners C are described as being the same corners. However, the first to fourth corners C do not need to be the same, and for example, the above-mentioned shapes etc. may be different for each corner C.

[0193] <Method for producing a multilayer ceramic electronic component>

[0194] Next, a method for manufacturing a multilayer ceramic electronic component will be described by taking the multilayer ceramic capacitor 1 as an example. In the following description, the method for manufacturing the multilayer ceramic capacitor 1 of the present embodiment will be mainly described with characteristic parts.

[0195] <Making of stacked blocks>

[0196] Conductive paste for dielectric sheets and internal electrode layers is prepared. The conductive paste for dielectric sheets and internal electrode layers contains an adhesive and a solvent. As for the adhesive and solvent, a known organic adhesive and an organic solvent can be used. For example, the conductive paste for the internal electrode layer is printed in a given pattern on the dielectric sheet by screen printing, gravure printing, etc., so as to form a pattern of the internal electrode layer. A given number of dielectric sheets for outer layers without the pattern of the internal electrode layer printed are stacked, and dielectric sheets with the pattern of the internal electrode layer printed thereon are sequentially stacked, and a given number of dielectric sheets for another outer layer are stacked thereon, so as to make a laminated sheet. The laminated sheets are pressed in the stacking direction by means such as isostatic pressing, so as to make a laminated block.

[0197] <Production of laminated small pieces>

[0198] The stacked block is cut into a given size to cut out stacked small pieces. The stacked small pieces are fired to form the capacitor main part 3. Hereinafter, the capacitor main part 3 before firing is sometimes referred to as a capacitor main part precursor. After the stacked small pieces are cut out, the corners of the stacked small pieces are rounded by roller grinding or the like. At this time, a convex portion is formed around the corner by changing the roller grinding time or the rotation speed or both.

[0199] <Corner processing>

[0200] When the corners of the stacked small pieces are rounded, they can be ground with sandpaper or the surface of the corners can be roughened by sandblasting or the like so that the corners have a desired roughness. When sandpaper is used, the surface of the corners can be made rougher by using sandpaper with a rougher roughness. In addition, the desired roughness can be achieved by changing the amount of sandpaper pressed. When sandblasting is used, the desired roughness can be achieved by controlling the intensity or time of the blasting or both. In addition, the method of roughening the corners so that the corners have a desired roughness is not limited to the aforementioned method, and various methods can be used.

[0201] When the corners of the stacked small pieces are rounded, for example, by changing the amount of sandpaper pressed, a convex portion V of a desired shape can be formed. The method for forming the convex portion V is not limited thereto. For example, the convex portion V can also be formed by depositing the ground material.

[0202] <Formation of insulating portion>

[0203] After the corners are processed, insulating portions 8 are formed on the two main side surfaces SS of the precursor of the capacitor main portion 3 having a given corner shape. The insulating portion 8 may be formed by punching an insulating sheet on the main side surface SS or by dipping.

[0204] When the insulating portion 8 is formed by a punching method using an insulating sheet, the insulating portion 8 can be formed to cover any position from the main portion side surface SS to the corner by making the elastic body used for punching have a desired hardness and adjusting the amount of pressing.

[0205] When the insulating portion 8 is formed by a dipping method, the insulating portion can be formed into a desired shape by changing the amount of pressure applied during dipping, the amount of insulating paste, or both.

[0206] <Firing>

[0207] Next, the stacked small pieces are fired to produce the stacked body 2. The firing temperature depends on the materials of the dielectric layer 4 and the internal electrode layer 10, but is preferably 900° C. or higher and 1400° C. or lower. Insulating portion 8 may be formed after firing the stacked small pieces, or insulating portion 8 may be formed before firing and the stacked small pieces provided with insulating portion 8 may be fired.

[0208] It is preferable to round the outer corner K of the laminate 2 (in other words, the outer corner K of the insulating portion 8) before or after the aforementioned firing. In addition, at this time, the outer corner K can also be roughened to a predetermined roughness. The same method as the processing of the corner of the aforementioned laminated small piece can be used for the method of forming the rounded corner and the method of roughening the surface.

[0209] <External electrodes>

[0210] Next, the formation of the external electrode 20 will be described.

[0211] <Case where the base electrode layer is a sintered layer>

[0212] First, a conductive paste to be the base electrode layer 21 is applied to both end faces E of the laminate 2 to form the base electrode layer 21. In the case of forming a sintered layer, for example, a conductive paste containing a glass component and a metal is applied by dipping or the like, and then sintered to form the base electrode layer 21. The sintering temperature at this time is preferably 700° C. or higher and 900° C. or lower. Then, plating is performed on the surface of the sintered layer as needed.

[0213] <When a conductive resin layer is provided>

[0214] When the base electrode layer 21 is formed by a conductive resin layer, the conductive resin layer can be formed by the following method. In addition, the conductive resin layer can be formed on the surface of the sintered layer, or the conductive resin layer can be directly formed on the laminate 2 with a monomer without forming a sintered layer. As a method for forming the conductive resin layer, a conductive resin paste containing a thermosetting resin and a metal component is applied to the sintered layer or the laminate 2, and heat-treated at a temperature above 250° C. and below 550° C. to thermally cure the resin, thereby forming a conductive resin layer. The atmosphere during the heat treatment at this time is preferably an N2 atmosphere. In addition, in order to prevent the scattering of the resin and the oxidation of various metal components, the oxygen concentration is preferably suppressed to below 100 ppm.

[0215] <When a thin film layer is provided>

[0216] When the foundation electrode layer 21 is formed of a thin film layer, the foundation electrode layer 21 can be formed by a thin film forming method such as sputtering or vapor deposition. The foundation electrode layer 21 formed of a thin film layer is a layer of 1 μm or less in which metal particles are deposited.

[0217] <When direct plating is provided>

[0218] A direct plating layer may also be provided on the exposed portion of the internal electrode layer 10 of the laminate 2. In this case, it can be formed by the following method. That is, the first end face E1 and the second end face E2 of the laminate 2 are plated to form a direct plating film on the exposed portion of the internal electrode layer 10. When the plating process is performed, either electrolytic plating or electroless plating may be used. However, regarding electroless plating, in order to increase the deposition rate of the plating layer, it is necessary to perform pretreatment using a catalyst, etc., which has the disadvantage of complicating the process. Therefore, electrolytic plating is usually preferably used. As a plating method, drum plating is preferably used. In addition, an upper plating electrode, which is usually formed on the surface of a lower plating electrode, may also be formed in the same manner as required.

[0219] Then, a plating layer is formed on the surface of the base electrode layer, the surface of the conductive resin layer, or the surface of the direct plating layer. In this embodiment, a Ni plating layer and a Sn plating layer are formed on the sintered layer. The Ni plating layer and the Sn plating layer are formed in sequence, for example, by a barrel plating method. In this way, a laminated ceramic capacitor 1 is obtained.

[0220] As mentioned above, although embodiment of this invention was described, this invention is not limited to the said embodiment, Various changes and deformation|transformation are possible.

[0221] For example, the method for forming the external electrode 20 is not limited to the above method. For example, Ni is screen-printed on both end faces E of the laminate 2. Then, the two end faces E are immersed in Cu to form a Cu layer on Ni. Then, Ni plating and Sn plating can also be performed to form the external electrode 20.

[0222] In addition, in the above description, the description is centered on the portion where two surfaces of the laminate 2 or the capacitor main part 3 intersect. However, the case where the corner is curved and the case where the corner has a given roughness is not limited to the corner where two surfaces intersect. Alternatively, even in the portion where three surfaces of the laminate 2 or the capacitor main part 3 intersect, it is possible to make it curved, or make the surface rough, or both.

[0223] <1>

[0224] A laminated ceramic capacitor, wherein:

[0225] A laminated body, a first external electrode and a second external electrode are provided.

[0226] The laminate includes a capacitor main portion, a first insulating portion, and a second insulating portion.

[0227] The capacitor main part includes a plurality of stacked dielectric layers and comprises:

[0228] The first main surface and the second main surface are opposite to each other in the stacking direction;

[0229] The first main portion side surface and the second main portion side surface are opposite to each other in a width direction orthogonal to the stacking direction;

[0230] The first end face and the second end face are opposite to each other in a length direction orthogonal to the stacking direction and the width direction;

[0231] a first internal electrode layer, which is alternately stacked with the plurality of dielectric layers and exposed on the first end surface, the first main portion side surface, and the second main portion side surface; and

[0232] The second internal electrode layer is alternately stacked with the plurality of dielectric layers and exposed at the second end surface, the first main portion side surface, and the second main portion side surface.

[0233] The first insulating portion is arranged on a first main portion side surface of the capacitor main portion,

[0234] The second insulating portion is arranged on a side surface of the second main portion of the capacitor main portion,

[0235] The first external electrode is provided so as to extend from the first end surface to the first main surface, the second main surface, the surface of the first insulating portion, and the surface of the second insulating portion.

[0236] The second external electrode is provided so as to extend from the second end surface to the first main surface, the second main surface, the surface of the first insulating portion, and the surface of the second insulating portion.

[0237] The capacitor main portion has a first corner portion bent across a first main surface of the capacitor main portion and a first main portion side surface, a second corner portion bent across a second main surface and the first main portion side surface, a third corner portion bent across the first main surface and the second main portion side surface, and a fourth corner portion bent across the second main surface and the second main portion side surface.

[0238] The first insulating portion covers the first corner portion and the second corner portion,

[0239] The second insulating portion covers the third corner portion and the fourth corner portion,

[0240] The surface of the first insulating portion that is opposite to the surface in contact with the side surface of the first main portion is set as the first side surface of the laminate.

[0241] The surface of the second insulating portion that is opposite to the surface in contact with the side surface of the second main portion is set as the second side surface of the laminate.

[0242] The first insulating portion has a first outer corner where the first main surface and the first side surface intersect, and a second outer corner where the second main surface and the first side surface intersect,

[0243] The second insulating portion has a third outer corner where the first main surface and the second side surface intersect, and a fourth outer corner where the second main surface and the second side surface intersect,

[0244] The roughness of the first corner portion is greater than the roughness of the first outer corner portion,

[0245] The roughness of the second corner is greater than the roughness of the second outer corner,

[0246] The roughness of the third corner is greater than the roughness of the third outer corner.

[0247] The roughness of the fourth corner portion is greater than the roughness of the fourth outer corner portion.

[0248] This structure can provide a multilayer ceramic capacitor that is small and has a large capacitance while suppressing a decrease in moisture resistance. This is because the surface of the corner portion becomes rough, so that the insulating portion and the corner portion can be firmly bonded.

[0249] <2>

[0250] The multilayer ceramic capacitor according to <1>,

[0251] The surface roughness of the first corner portion, the second corner portion, the third corner portion, and the fourth corner portion is greater than or equal to 0.05 μm and less than or equal to 1.00 μm.

[0252] <3>

[0253] The multilayer ceramic capacitor according to <1> or <2>, wherein:

[0254] The capacitor main part comprises:

[0255] An inner layer portion formed by alternately stacking the first inner electrode layer, the dielectric layer, and the second inner electrode layer;

[0256] a first outer layer portion located on the first main surface side of the inner layer portion in the stacking direction and composed of the dielectric layer; and

[0257] The second outer layer portion is located on the second main surface side of the inner layer portion in the stacking direction and is composed of the dielectric layer.

[0258] A first protrusion protruding in the direction of the first insulating portion and a third protrusion protruding in the direction of the second insulating portion are arranged at a position in the first outer layer portion that is 10% or more and 60% or less of the thickness of the first outer layer portion in the stacking direction from the first main surface,

[0259] A second protrusion protruding toward the first insulating portion and a fourth protrusion protruding toward the second insulating portion are arranged at a position in the second outer layer portion that is more than 10% and less than 60% of the thickness of the second outer layer portion in the stacking direction away from the second main surface.

[0260] This structure can further suppress the intrusion of water and the like into the inner layer portion. This is because the convex portion can further suppress the intrusion of water from the outer layer portion into the inner layer portion.

[0261] <4>

[0262] The multilayer ceramic capacitor according to <3>,

[0263] The first protrusion, the second protrusion, the third protrusion, and the fourth protrusion are not in contact with any of the first internal electrode layer and the second internal electrode layer.

[0264] This structure can further suppress the intrusion of moisture and the like into the inner layer portion. This is because inclusions are less likely to be interposed between the internal electrode and the insulating portion, and the adhesion between the inner layer portion and the insulating portion becomes stronger.

[0265] <5>

[0266] The multilayer ceramic capacitor according to any one of <1> to <4>,

[0267] The thickness of the first insulating portion and the second insulating portion in the width direction is greater than or equal to 10.0 μm and less than or equal to 50.0 μm.

[0268] <6>

[0269] The multilayer ceramic capacitor according to any one of <1> to <5>,

[0270] When viewed from the length direction of the capacitor main part,

[0271] The first insulating portion continuously covers the first corner portion and the second corner portion,

[0272] The second insulating portion continuously covers the third corner portion and the fourth corner portion.

[0273] This structure can further suppress the intrusion of moisture and the like into the inner layer portion. This is because the intrusion of moisture and the like into the inner layer portion can be suppressed on both sides in the stacking direction.

[0274] <7>

[0275] The multilayer ceramic capacitor according to any one of <1> to <6>,

[0276] When viewed from the length direction of the capacitor main part,

[0277] The first insulating portion covers more than 50% of the first corner portion and the second corner portion along the shapes of the first corner portion and the second corner portion from the end points on the side surfaces of the first main portions of the first corner portion and the second corner portion,

[0278] The second insulating portion covers more than 50% of the third corner and the fourth corner from end points on the side surfaces of the second main portions of the third corner and the fourth corner along the shapes of the third corner and the fourth corner.

[0279] Description of Reference Numerals

[0280] 1: Multilayer ceramic capacitor;

[0281] 2: laminate;

[0282] 3: Main part of capacitor;

[0283] 4: Dielectric layer;

[0284] 5: Outer dielectric layer;

[0285] 6: Inner dielectric layer;

[0286] 8: Insulation part;

[0287] 10: internal electrode layer;

[0288] 11: Opposing electrode portion;

[0289] 12: Lead-out electrode portion;

[0290] 20: external electrode;

[0291] 21: base electrode layer;

[0292] 23: inner plating layer;

[0293] 24: surface plating layer;

[0294] 25: end surface external electrode;

[0295] 26: main surface external electrode;

[0296] 27: lateral external electrode;

[0297] IL: inner layer;

[0298] OL: Outer layer;

[0299] LF: electrode facing part;

[0300] EG: end interval;

[0301] WF: electrode facing part;

[0302] SG: lateral septum;

[0303] C: Corner;

[0304] K: lateral corner;

[0305] V: convex part;

[0306] M: main surface;

[0307] E: end face;

[0308] S: side;

[0309] SS: main side;

[0310] T: stacking direction;

[0311] L: length direction;

[0312] W: width direction.

Claims

1. A laminated ceramic capacitor, wherein: A laminated body, a first external electrode and a second external electrode are provided. The laminate includes a capacitor main portion, a first insulating portion, and a second insulating portion. The capacitor main part includes a plurality of stacked dielectric layers and comprises: The first main surface and the second main surface are opposite to each other in the stacking direction; The first main portion side surface and the second main portion side surface are opposite to each other in a width direction orthogonal to the stacking direction; The first end face and the second end face are opposite to each other in a length direction orthogonal to the stacking direction and the width direction; a first internal electrode layer, which is alternately stacked with the plurality of dielectric layers and exposed at the first end surface, the first main portion side surface, and the second main portion side surface; as well as The second internal electrode layer is alternately stacked with the plurality of dielectric layers and exposed at the second end surface, the first main portion side surface, and the second main portion side surface. The first insulating portion is arranged on a first main portion side surface of the capacitor main portion, The second insulating portion is arranged on a side surface of the second main portion of the capacitor main portion, The first external electrode is provided so as to extend from the first end surface to the first main surface, the second main surface, the surface of the first insulating portion, and the surface of the second insulating portion. The second external electrode is provided so as to extend from the second end surface to the first main surface, the second main surface, the surface of the first insulating portion, and the surface of the second insulating portion. The capacitor main portion has a first corner portion bent across a first main surface of the capacitor main portion and a first main portion side surface, a second corner portion bent across a second main surface and the first main portion side surface, a third corner portion bent across the first main surface and the second main portion side surface, and a fourth corner portion bent across the second main surface and the second main portion side surface. The first insulating portion covers the first corner portion and the second corner portion, The second insulating portion covers the third corner portion and the fourth corner portion, The surface of the first insulating portion that is opposite to the surface in contact with the side surface of the first main portion is set as the first side surface of the laminate. The surface of the second insulating portion that is opposite to the surface in contact with the side surface of the second main portion is set as the second side surface of the laminate. The first insulating portion has a first outer corner where the first main surface and the first side surface intersect, and a second outer corner where the second main surface and the first side surface intersect, The second insulating portion has a third outer corner where the first main surface and the second side surface intersect, and a fourth outer corner where the second main surface and the second side surface intersect, The roughness of the first corner portion is greater than the roughness of the first outer corner portion, The roughness of the second corner is greater than the roughness of the second outer corner, The roughness of the third corner is greater than the roughness of the third outer corner. The roughness of the fourth corner portion is greater than the roughness of the fourth outer corner portion.

2. The multilayer ceramic capacitor according to claim 1, wherein The surface roughness of the first corner portion, the second corner portion, the third corner portion, and the fourth corner portion is greater than or equal to 0.05 μm and less than or equal to 1.00 μm.

3. The multilayer ceramic capacitor according to claim 1 or 2, wherein: The capacitor main part comprises: An inner layer portion formed by alternately stacking the first inner electrode layer, the dielectric layer, and the second inner electrode layer; a first outer layer portion located on the first main surface side of the inner layer portion in the stacking direction and composed of the dielectric layer; and The second outer layer portion is located on the second main surface side of the inner layer portion in the stacking direction and is composed of the dielectric layer. A first protrusion protruding in the direction of the first insulating portion and a third protrusion protruding in the direction of the second insulating portion are arranged at a position in the first outer layer portion that is 10% or more and 60% or less of the thickness of the first outer layer portion in the stacking direction from the first main surface, A second protrusion protruding toward the first insulating portion and a fourth protrusion protruding toward the second insulating portion are arranged at a position in the second outer layer portion that is more than 10% and less than 60% of the thickness of the second outer layer portion in the stacking direction away from the second main surface.

4. The multilayer ceramic capacitor according to claim 3, wherein: The first protrusion, the second protrusion, the third protrusion, and the fourth protrusion are not in contact with any of the first internal electrode layer and the second internal electrode layer.

5. The multilayer ceramic capacitor according to claim 1 or 2, wherein: The thickness of the first insulating portion and the second insulating portion in the width direction is greater than or equal to 10.0 μm and less than or equal to 50.0 μm.

6. The multilayer ceramic capacitor according to claim 1 or 2, wherein: When viewed from the length direction of the capacitor main part, The first insulating portion continuously covers the first corner portion and the second corner portion, The second insulating portion continuously covers the third corner portion and the fourth corner portion.

7. The multilayer ceramic capacitor according to claim 1 or 2, wherein: When viewed from the length direction of the capacitor main part, The first insulating portion covers more than 50% of the first corner portion and the second corner portion along the shapes of the first corner portion and the second corner portion from the end points on the side surfaces of the first main portions of the first corner portion and the second corner portion, The second insulating portion covers more than 50% of the third corner and the fourth corner from end points on the side surfaces of the second main portions of the third corner and the fourth corner along the shapes of the third corner and the fourth corner.

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