Decoder-side motion vector refinement for affine motion models

By dividing the video data blocks into multiple sub-blocks, calculating the bilateral matching cost based on the initial affine motion model, selecting the lowest cost offset to modify the affine motion model, the problem of high complexity of bidirectional prediction affine merge candidates in the prior art is solved, and a more efficient video decoding process is achieved.

CN119547441APending Publication Date: 2025-02-28QUALCOMM INC
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Patent Information

Application Number
CN202380052696.X
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2023-07-12
Filing Date
2023-07-13
Publication Date
2025-02-28

AI Technical Summary

Technical Problem

The existing video decoding technology is of high complexity when performing bidirectional prediction of affine merge candidates, resulting in increased processing power consumption.

Method used

By dividing the video data block into multiple sub-blocks, generating the initial motion vector according to the initial affine motion model, calculating the bilateral matching cost of the sub-block, selecting the lowest cost offset to modify the affine motion model, and finally decoding the current block.

Benefits of technology

Reduces the number of times a video decoder generates a sub-block sports field when performing bidirectional prediction of affine merge candidates, reduces processing power consumption, and improves implementation efficiency.

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Abstract

An example apparatus includes one or more processors configured to determine a plurality of sub-blocks for a current block of video data. For each sub-block, the one or more processors (a) generate an initial motion vector for the first prediction direction and for the second prediction direction according to an affine motion model, and (b) determine a sub-block bilateral matching cost for each respective offset among the plurality of offsets based on the initial motion vector. For each respective offset, the one or more processors determine a respective sum of sub-block bilateral matching costs. The one or more processors determine a lowest sum of sub-block bilateral matching costs. The one or more processors select an offset associated with a lowest sum of sub-block bilateral matching costs. The one or more processors modify the affine motion model based on the selected offset and code the current block based on the modified affine motion model.
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Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to U.S. Patent Application No. 18 / 351,342, filed on July 12, 2023, and U.S. Provisional Application No. 63 / 368,576, filed on July 15, 2022, the entire contents of which are incorporated herein by reference. U.S. Patent Application No. 18 / 351,342, filed on July 12, 2023, claims the benefit of U.S. Provisional Application No. 63 / 368,576, filed on July 15, 2022. Technical Field

[0003] The present disclosure relates to video encoding and video decoding. Background Art

[0004] Digital video capabilities may be incorporated into a wide range of devices, including digital televisions, digital live broadcast systems, wireless broadcast systems, personal digital assistants (PDAs), laptop or desktop computers, tablet computers, e-book readers, digital cameras, digital recording devices, digital media players, video game devices, video game consoles, cellular or satellite radio telephones, so-called "smart phones", video teleconferencing devices, video streaming devices, and the like. Digital video devices implement video coding techniques, such as those described in the standards defined by MPEG-2, MPEG-4, ITU-T H.263, ITU-T H.264 / MPEG-4, Part 10, Advanced Video Coding (AVC), ITU-T H.265 / High Efficiency Video Coding (HEVC), ITU-T H.266 / Versatile Video Coding (VVC), and extensions of such standards, as well as proprietary video codecs / formats such as AOMedia Video 1 (AV1) developed by the Alliance for Open Media. Video devices may more efficiently transmit, receive, encode, decode, and / or store digital video information by implementing such video coding techniques.

[0005] Video coding techniques include spatial (intra-picture) prediction and / or temporal (inter-picture) prediction to reduce or remove redundancy inherent in video sequences. For block-based video coding, a video slice (e.g., a video picture or a portion of a video picture) may be partitioned into video blocks, which may also be referred to as coding tree units (CTUs), coding units (CUs), and / or coding nodes. Video blocks in an intra-coded (I) slice of a picture are encoded using spatial predictions of reference samples in neighboring blocks in the same picture. Video blocks in an inter-coded (P or B) slice of a picture may use spatial predictions of reference samples in neighboring blocks in the same picture or temporal predictions of reference samples in other reference pictures. Pictures may be referred to as frames, and reference pictures may be referred to as reference frames. Summary of the invention

[0006] In general, the present disclosure describes techniques for inter-frame prediction in video decoding. More specifically, the present disclosure describes techniques related to affine motion refinement, for example, by a video decoder. Compared to other techniques involving decoder-side motion vector refinement (DMVR) for bi-predictive affine merge candidates, the techniques disclosed herein may be less complex and more practical. For example, the techniques of the present disclosure may reduce the number of times a video decoder generates sub-block motion fields when performing DMVR for bi-predictive affine merge candidates, which may result in easier implementation of the techniques of the present disclosure and / or save processing power.

[0007] In one example, a method includes determining a plurality of sub-blocks for a current block of video data; for each sub-block of the plurality of sub-blocks: (a) generating an initial motion vector, the initial motion vector comprising at least one initial motion vector for a first prediction direction and at least one initial motion vector for a second prediction direction according to an affine motion model, and (b) determining a sub-block bilateral matching cost for each of a plurality of offsets based on the initial motion vector; for each respective offset among the plurality of offsets, determining a respective sum of sub-block bilateral matching costs associated with the plurality of sub-blocks, thereby generating a plurality of sums of sub-block bilateral matching costs; determining a lowest sum of sub-block bilateral matching costs from the plurality of sums of sub-block bilateral matching costs; selecting an offset from the plurality of offsets associated with the lowest sum of sub-block bilateral matching costs to determine a selected offset; modifying the affine motion model based on the selected offset to generate a modified affine motion model; and decoding the current block based on the modified affine motion model.

[0008] In another example, a device includes: a memory configured to store video data and one or more processors implemented in circuitry and communicatively coupled to the memory, the one or more processors configured to: determine a plurality of sub-blocks for a current block of the video data; for each of the plurality of sub-blocks: (a) generate an initial motion vector, the initial motion vector comprising at least one initial motion vector for a first prediction direction and at least one initial motion vector for a second prediction direction according to an affine motion model, and (b) determine a sub-block bilateral matching cost for each of a plurality of offsets based on the initial motion vector; for each respective offset of the plurality of offsets, determine a respective sum of sub-block bilateral matching costs associated with the plurality of sub-blocks, thereby generating a plurality of sums of sub-block bilateral matching costs; determine a lowest sum of sub-block bilateral matching costs from the plurality of sums of sub-block bilateral matching costs; select an offset from the plurality of offsets associated with the lowest sum of sub-block bilateral matching costs to determine a selected offset; modify the affine motion model based on the selected offset to generate a modified affine motion model; and decode the current block based on the modified affine motion model.

[0009] In another example, an apparatus includes: means for determining a plurality of sub-blocks for a current block of video data; means for generating, for each of the plurality of sub-blocks, initial motion vectors, the initial motion vectors including at least one initial motion vector for a first prediction direction and at least one initial motion vector for a second prediction direction according to an affine motion model, and means for determining, based on the initial motion vectors and for each of the plurality of sub-blocks, a sub-block bilateral matching cost for each of a plurality of offsets; means for determining, for each possible offset among the plurality of offsets, a respective sum of sub-block bilateral matching costs associated with the plurality of sub-blocks thereby generating a plurality of sums of sub-block bilateral matching costs; means for determining a minimum sum of sub-block bilateral matching costs from the plurality of sums of sub-block bilateral matching costs; means for selecting an offset from the plurality of offsets associated with the minimum sum of sub-block bilateral matching costs to determine a selected offset; means for modifying the affine motion model based on the selected offset to generate a modified affine motion model; and means for decoding the current block based on the modified affine motion model.

[0010] In another example, a computer-readable storage medium is encoded with instructions that, when executed, cause one or more programmable processors to: determine a plurality of sub-blocks for a current block of video data; for each sub-block of the plurality of sub-blocks: (a) generate an initial motion vector, the initial motion vector comprising at least one initial motion vector for a first prediction direction and at least one initial motion vector for a second prediction direction according to an affine motion model, and (b) determine a sub-block bilateral matching cost for each of a plurality of offsets based on the initial motion vector; for each possible offset among the plurality of offsets, determine a respective sum of the sub-block bilateral matching costs associated with the plurality of sub-blocks, thereby generating a plurality of sums of sub-block bilateral matching costs; determine a lowest sum of the sub-block bilateral matching costs from the plurality of sums of the sub-block bilateral matching costs; select an offset from the plurality of offsets associated with the lowest sum of the sub-block bilateral matching costs to determine a selected offset; modify the affine motion model based on the selected offset to generate a modified affine motion model; and decode the current block based on the modified affine motion model.

[0011] The details of one or more examples are set forth in the accompanying drawings and the description below. Other features, objects, and advantages will be apparent from the description, drawings, and claims. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] Figure 1 is a block diagram illustrating an example video encoding and decoding system that may perform the techniques of this disclosure.

[0013] Figure 2A is a conceptual diagram showing a 6-parameter affine motion model based on control points.

[0014] Figure 2B is a conceptual diagram showing a 4-parameter affine motion model based on control points.

[0015] Figure 3 is a conceptual diagram illustrating an example of bilateral matching.

[0016] Figure 4 is a block diagram illustrating an example video encoder that may perform the techniques of this disclosure.

[0017] Figure 5 is a block diagram illustrating an example video decoder that may perform the techniques of this disclosure.

[0018] Figure 6 is a flow chart illustrating an example DMVR technique according to one or more aspects of the present disclosure.

[0019] Figure 7 is a flowchart illustrating an example method for encoding a current block according to the techniques of this disclosure.

[0020] Figure 8 is a flow chart illustrating an example method for decoding a current block according to the techniques of this disclosure. DETAILED DESCRIPTION

[0021] Certain techniques for decoder-side motion vector refinement (DMVR) of bi-directional predictive affine merge candidates increase the complexity of video decoders that implement such techniques. The techniques described in the present disclosure may be less complex and more practical than certain techniques discussed above. This may result in easier implementation of the techniques disclosed herein and / or save processing power. Some DMVRs for bi-directional predictive affine merge candidate techniques include generating a sub-block motion field for each sub-block of a block according to each of a plurality of offsets. In other words, the technique includes generating a sub-block motion field for a sub-block of the block for each of a plurality of possible offsets, and repeating this operation for each sub-block of the block. The techniques disclosed herein may generate a motion field for each of the sub-blocks once rather than as many times as there are possible offsets. Thus, the techniques disclosed herein may greatly reduce the number of times a video decoder generates a sub-block motion field when performing DMVR for a bi-directional predictive affine merge candidate, thereby saving processing power and processing resources and / or extending battery charge.

[0022] Figure 1 1 is a block diagram illustrating an example video encoding and decoding system 100 that may perform the techniques of the present disclosure. The techniques of the present disclosure generally relate to decoding (encoding and / or decoding) video data. In general, video data includes any data used to process video. Thus, video data may include original, unencoded video, encoded video, decoded (e.g., reconstructed) video, and video metadata, such as signaling data.

[0023] like Figure 1 As shown, in this example, the system 100 includes a source device 102 that provides encoded video data to be decoded and displayed by a destination device 116. Specifically, the source device 102 provides the video data to the destination device 116 via a computer-readable medium 110. The source device 102 and the destination device 116 may include any of a wide range of devices, including a desktop computer, a notebook (e.g., laptop) computer, a mobile device, a tablet computer, a set-top box, a telephone handset such as a smart phone, a television, a camera, a display device, a digital media player, a video game console, a video streaming device, a broadcast receiver device, or the like. In some cases, the source device 102 and the destination device 116 may be equipped for wireless communication and may therefore be referred to as wireless communication devices.

[0024] exist Figure 1In the example of , the source device 102 includes a video source 104, a memory 106, a video encoder 200, and an output interface 108. The destination device 116 includes an input interface 122, a video decoder 300, a memory 120, and a display device 118. According to the present disclosure, the video encoder 200 of the source device 102 and the video decoder 300 of the destination device 116 can be configured to apply a technique for affine motion refinement. Therefore, the source device 102 represents an example of a video encoding device, and the destination device 116 represents an example of a video decoding device. In other examples, the source device and the destination device may include other components or arrangements. For example, the source device 102 may receive video data from an external video source (e.g., an external camera). Similarly, the destination device 116 can be docked with an external display device instead of including an integrated display device.

[0025] like Figure 1 The system 100 shown is only an example. In general, any digital video encoding and / or decoding device can perform techniques for affine motion refinement. The source device 102 and the destination device 116 are only examples of such decoding devices, wherein the source device 102 generates decoded video data for transmission to the destination device 116. The present disclosure refers to a "decoding" device as a device that performs decoding (encoding and / or decoding) of data. Therefore, the video encoder 200 and the video decoder 300 represent examples of decoding devices, specifically, video encoders and video decoders, respectively. In some instances, the source device 102 and the destination device 116 can operate in a substantially symmetrical manner, so that each of the source device 102 and the destination device 116 includes a video encoding and decoding component. Therefore, the system 100 can support one-way or two-way video transmission between the source device 102 and the destination device 116, such as for video streaming, video playback, video broadcasting or video telephony.

[0026] In general, the video source 104 represents a source of video data (i.e., raw, unencoded video data) and provides a series of consecutive pictures (also referred to as "frames") of the video data to the video encoder 200, which encodes the data of the pictures. The video source 104 of the source device 102 may include a video capture device, such as a camera, a video archive containing previously captured raw video, and / or a video feed interface for receiving video from a video content provider. As another alternative, the video source 104 may generate computer graphics-based data as the source video, or a combination of live video, archived video, and computer-generated video. In each case, the video encoder 200 encodes the captured, pre-captured, or computer-generated video data. The video encoder 200 may rearrange the pictures from the order in which they are received (sometimes referred to as "display order") into a decoding order for decoding. The video encoder 200 may generate a bitstream including the encoded video data. The source device 102 may then output the encoded video data to the computer-readable medium 110 via the output interface 108 for reception and / or retrieval by, for example, the input interface 122 of the destination device 116.

[0027] The memory 106 of the source device 102 and the memory 120 of the destination device 116 represent general purpose memories. In some examples, the memories 106, 120 can store raw video data, for example, raw video from the video source 104 and raw decoded video data from the video decoder 300. In addition or alternatively, the memories 106, 120 can store software instructions that can be executed by, for example, the video encoder 200 and the video decoder 300, respectively. Although the memory 106 and the memory 120 are shown separately from the video encoder 200 and the video decoder 300 in this example, it should be understood that the video encoder 200 and the video decoder 300 can also include internal memories for functionally similar or equivalent purposes. In addition, the memories 106, 120 can store, for example, encoded video data output from the video encoder 200 and input to the video decoder 300. In some instances, portions of the memories 106, 120 can be allocated as one or more video buffers, for example to store raw, decoded and / or encoded video data.

[0028] The computer-readable medium 110 may represent any type of medium or device capable of transmitting the encoded video data from the source device 102 to the destination device 116. In one example, the computer-readable medium 110 represents a communication medium that enables the source device 102 to transmit the encoded video data directly to the destination device 116 in real time, for example, via a radio frequency network or a computer-based network. According to a communication standard (e.g., a wireless communication protocol), the output interface 108 can modulate a transmission signal including the encoded video data, and the input interface 122 can demodulate the received transmission signal. The communication medium may include any wireless or wired communication medium, such as a radio frequency (RF) spectrum or one or more physical transmission lines. The communication medium may form part of a packet-based network (e.g., a local area network, a wide area network, or a global network such as the Internet). The communication medium may include a router, a switch, a base station, or any other device that can be used to facilitate communication from the source device 102 to the destination device 116.

[0029] In some examples, source device 102 may output the encoded data from output interface 108 to storage device 112. Similarly, destination device 116 may access the encoded data from storage device 112 via input interface 122. Storage device 112 may include any of a variety of distributed or locally accessed data storage media, such as a hard drive, Blu-ray disc, DVD, CD-ROM, flash memory, volatile or non-volatile memory, or any other suitable digital storage medium for storing encoded video data.

[0030] In some examples, source device 102 may output the encoded video data to file server 114 or another intermediate storage device that may store the encoded video data generated by source device 102. Destination device 116 may access the stored video data from file server 114 via streaming or downloading.

[0031] The file server 114 may be any type of server device capable of storing encoded video data and transmitting the encoded video data to the destination device 116. The file server 114 may represent a web server (e.g., for a website), a server configured to provide a file transfer protocol service (e.g., File Transfer Protocol (FTP) or File Delivery over Unidirectional Transport (FLUTE) protocol), a content delivery network (CDN) device, a hypertext transfer protocol (HTTP) server, a Multimedia Broadcast Multicast Service (MBMS) or enhanced MBMS (eMBMS) server, and / or a network attached storage (NAS) device. Additionally or alternatively, the file server 114 may implement one or more HTTP streaming protocols, such as HTTP Dynamic Adaptive Streaming (DASH), HTTP Live Streaming (HLS), Real Time Streaming Protocol (RTSP), HTTP Dynamic Streaming, or the like.

[0032] Destination device 116 may access the encoded video data from file server 114 through any standard data connection, including an Internet connection. This may include a wireless channel (e.g., a Wi-Fi connection), a wired connection (e.g., a digital subscriber line (DSL), a cable modem, etc.), or a combination of both, suitable for accessing the encoded video data stored on file server 114. Input interface 122 may be configured to operate according to any one or more of the various protocols discussed above for retrieving or receiving media data from file server 114 or other such protocols for retrieving media data.

[0033] Output interface 108 and input interface 122 may represent wireless transmitters / receivers, modems, wired networking components (e.g., Ethernet cards), wireless communication components that operate according to any of the various IEEE 802.11 standards, or other physical components. In examples where output interface 108 and input interface 122 include wireless components, output interface 108 and input interface 122 may be configured to transfer data (such as encoded video data) according to a cellular communication standard (e.g., 4G, 4G-LTE (Long Term Evolution), LTE Advanced, 5G, or the like). In some examples where output interface 108 includes a wireless transmitter, output interface 108 and input interface 122 may be configured to transfer data (such as encoded video data) according to other wireless standards (e.g., IEEE 802.11 specifications, IEEE 802.15 specifications (e.g., ZigBee TM ),Bluetooth TM Standard or the like). In some examples, source device 102 and / or destination device 116 may include corresponding system-on-chip (SoC) devices. For example, source device 102 may include a SoC device to perform the functions attributed to video encoder 200 and / or output interface 108, and destination device 116 may include a SoC device to perform the functions attributed to video decoder 300 and / or input interface 122.

[0034] The techniques disclosed herein may be applied to support video decoding for any of a variety of multimedia applications, such as over-the-air television broadcasts, cable television transmissions, satellite television transmissions, Internet streaming video transmissions (e.g., HTTP Dynamic Adaptive Streaming (DASH)), digital video encoded onto a data storage medium, decoding of digital video stored on a data storage medium, or other applications.

[0035] The input interface 122 of the destination device 116 receives an encoded video bitstream from the computer-readable medium 110 (e.g., a communication medium, a storage device 112, a file server 114, or the like). The encoded video bitstream may include signaling information defined by the video encoder 200 and also used by the video decoder 300, such as syntax elements with values ​​describing characteristics and / or processing of video blocks or other decoding units (e.g., slices, pictures, groups of pictures, sequences, etc.). The display device 118 displays decoded pictures of the decoded video data to a user. The display device 118 may represent any of a variety of display devices, such as a liquid crystal display (LCD), a plasma display, an organic light emitting diode (OLED) display, or another type of display device.

[0036] although Figure 1 Not shown, but in some examples, the video encoder 200 and the video decoder 300 may each be integrated with an audio encoder and / or an audio decoder, and may include appropriate MUX-DEMUX units or other hardware and / or software to process a multiplexed stream including both audio and video in a common data stream.

[0037] The video encoder 200 and the video decoder 300 can each be implemented as any of a variety of suitable encoder and / or decoder circuits, such as one or more microprocessors, digital signal processors (DSPs), application specific integrated circuits (ASICs), field programmable gate arrays (FPGAs), discrete logic, software, hardware, firmware, or any combination thereof. When the technology is partially implemented in software, the device can store instructions for the software in a suitable non-transitory computer-readable medium, and use one or more processors to execute the instructions in hardware to perform the technology of the present disclosure. Each of the video encoder 200 and the video decoder 300 can be included in one or more encoders or decoders, and any of the multiple encoders or decoders can be integrated as part of a combined encoder / decoder (CODEC) in the corresponding device. The device including the video encoder 200 and / or the video decoder 300 may include an integrated circuit, a microprocessor, and / or a wireless communication device, such as a cellular phone.

[0038] The video encoder 200 and the video decoder 300 may operate according to a video coding standard such as ITU-T H.265, also known as high-efficiency video coding (HEVC) or an extension thereof, such as multi-view and / or scalable video coding extension. Alternatively, the video encoder 200 and the video decoder 300 may operate according to other proprietary or industry standards such as ITU-T H.266, also known as universal video coding (VVC). In other examples, the video encoder 200 and the video decoder 300 may operate according to a proprietary video codec / format such as AOMedia Video 1 (AV1), an extension of AV1, and / or a subsequent version of AV1 (e.g., AV2). In other examples, the video encoder 200 and the video decoder 300 may operate according to other proprietary formats or industry standards. However, the technology of the present disclosure is not limited to any particular decoding standard or format. In general, the video encoder 200 and the video decoder 300 may be configured to perform the technology of the present disclosure in conjunction with any video coding technology using affine motion refinement.

[0039] Typically, the video encoder 200 and the video decoder 300 can perform block-based decoding of a picture. The term "block" generally refers to a structure that includes data to be processed (e.g., encoded, decoded, or otherwise used in an encoding and / or decoding process). For example, a block may include a two-dimensional matrix of samples of luminance and / or chrominance data. Typically, the video encoder 200 and the video decoder 300 can decode video data represented in a YUV (e.g., Y, Cb, Cr) format. That is, the video encoder 200 and the video decoder 300 can decode luminance components and chrominance components instead of decoding red, green, and blue (RGB) data of samples of a picture, wherein the chrominance component may include both a red hue chrominance component and a blue hue chrominance component. In some examples, the video encoder 200 converts the received RGB formatted data to a YUV representation before encoding, and the video decoder 300 converts the YUV representation to an RGB format. Alternatively, a pre-processing and post-processing unit (not shown) can perform these conversions.

[0040] The present disclosure may generally refer to the coding (e.g., encoding and decoding) of a picture to include the process of encoding or decoding data of a picture. Similarly, the present disclosure may refer to the coding of a block of a picture to include the process of encoding or decoding data of the block, such as prediction and / or residual coding. The encoded video bitstream generally includes a series of values ​​for syntax elements that represent coding decisions (e.g., coding modes) and partitioning of the picture into blocks. Therefore, references to coding a picture or a block should generally be understood as coding the values ​​of the syntax elements that form the picture or the block.

[0041] HEVC defines various blocks, including coding units (CUs), prediction units (PUs), and transform units (TUs). According to HEVC, a video coder (such as video encoder 200) divides a coding tree unit (CTU) into CUs according to a quadtree structure. That is, the video coder partitions the CTU and the CU into four equal, non-overlapping squares, and each node of the quadtree has zero or four child nodes. A node without child nodes may be referred to as a "leaf node", and the CU of such a leaf node may include one or more PUs and / or one or more TUs. The video coder may further partition the PU and the TU. For example, in HEVC, a residual quadtree (RQT) represents the partitioning of a TU. In HEVC, a PU represents inter-prediction data, and a TU represents residual data. An intra-predicted CU includes intra-prediction information, such as an intra-mode indication.

[0042] As another example, the video encoder 200 and the video decoder 300 may be configured to operate according to VVC. According to VVC, a video decoder (such as the video encoder 200) divides a picture into a plurality of coding tree units (CTUs). The video encoder 200 may partition the CTU according to a tree structure (e.g., a quadtree-binary tree (QTBT) structure or a multi-type tree (MTT) structure). The QTBT structure removes the concept of multiple partition types, such as the separation between CU, PU, ​​and TU of HEVC. The QTBT structure includes two levels: a first level partitioned according to quadtree partitioning and a second level partitioned according to binary tree partitioning. The root node of the QTBT structure corresponds to the CTU. The leaf nodes of the binary tree correspond to coding units (CUs).

[0043] In the MTT partitioning structure, quadtree (QT) partitioning, binary tree (BT) partitioning, and one or more types of triple tree (TT) (also known as ternary tree, TT) partitioning can be used to partition blocks. Ternary tree or ternary tree partitioning is a partitioning in which a block is divided into three sub-blocks. In some examples, the ternary tree or ternary tree partitioning divides the block into three sub-blocks instead of dividing the original block through the center. The partitioning types in MTT (e.g., QT, BT, and TT) can be symmetric or asymmetric.

[0044] When operating according to the AV1 codec, the video encoder 200 and the video decoder 300 may be configured to decode the video data in blocks. In AV1, the largest decoding block that can be processed is called a super block. In AV1, a super block may be 128×128 luma samples or 64×64 luma samples. However, in subsequent versions of the video coding format (e.g., AV2), super blocks may be defined by different (e.g., larger) luma sample sizes. In some instances, the super block is the top level of the block quadtree. The video encoder 200 may also divide the super block into smaller decoding blocks. The video encoder 200 may divide the super block and other decoding blocks into smaller blocks using square or non-square partitioning. Non-square blocks may include N / 2×N, N×N / 2, N / 4×N, and N×N / 4 blocks. The video encoder 200 and the video decoder 300 may perform separate prediction and transform processing on each decoding block.

[0045] AV1 also defines tiles of video data. A tile is a rectangular array of super blocks that can be decoded independently of other tiles. That is, the video encoder 200 and the video decoder 300 can encode and decode the coded blocks within a tile, respectively, without using video data from other tiles. However, the video encoder 200 and the video decoder 300 can perform filtering across tile boundaries. The size of the tile can be uniform or non-uniform. Tile-based decoding can implement parallel processing and / or multi-threading for encoder and decoder implementations.

[0046] In some examples, the video encoder 200 and the video decoder 300 may use a single QTBT or MTT structure to represent each of the luma component and the chroma components, while in other examples, the video encoder 200 and the video decoder 300 may use two or more QTBT or MTT structures, such as one QTBT / MTT structure for the luma component and another QTBT / MTT structure for the two chroma components (or two QTBT / MTT structures for the corresponding chroma components).

[0047] The video encoder 200 and the video decoder 300 may be configured to use quadtree partitioning, QTBT partitioning, MTT partitioning, super block partitioning, or other partitioning structures.

[0048] In some examples, a CTU includes a coding tree block (CTB) of luma samples, two corresponding CTBs of chroma samples of a picture with three sample arrays, or a CTB of samples of a monochrome picture, or a CTB of samples of a picture coded using three separate color planes and syntax structures for coding samples. A CTB may be an N×N block of samples for some value of N, such that the division of a component into a CTB is a partition. A component is an array or a single sample of one of the three arrays (luminance and two chroma) that make up a 4:2:0, 4:2:2, or 4:4:4 color format picture, or an array or a single sample of an array that makes up a monochrome format picture. In some examples, a coding block is an M×N block of samples for some values ​​of M and N, such that the division of a CTB into coding blocks is a partition.

[0049] Blocks (e.g., CTUs or CUs) may be grouped in a picture in various ways. As an example, a brick may refer to a rectangular area of ​​a CTU row within a particular tile in a picture. A tile may be a rectangular area of ​​a CTU within a particular tile column and a particular tile row in a picture. A tile column refers to a rectangular area of ​​a CTU having a height equal to the height of the picture and a width specified by a syntax element (such as in a picture parameter set). A tile row refers to a rectangular area of ​​a CTU having a height specified by a syntax element (e.g., in a picture parameter set) and a width equal to the width of the picture.

[0050] In some instances, a tile may be partitioned into multiple blocks, each of which may include one or more CTU rows within the tile. Tiles that are not partitioned into multiple blocks may also be referred to as blocks. However, blocks that are true subsets of tiles may not be referred to as tiles. Blocks in a picture may also be arranged in slices. A slice may be an integer number of blocks of a picture that may be exclusively contained in a single network abstraction layer (NAL) unit. In some instances, a slice includes a continuous sequence of multiple complete tiles or only complete blocks of one tile.

[0051] This disclosure may use "N×N" and "N by N" interchangeably to refer to the sample dimensions of a block (e.g., a CU or other video block) in terms of vertical and horizontal dimensions, such as 16×16 samples or 16 by 16 samples. In general, a 16×16 CU will have 16 samples in the vertical direction (y=16) and 16 samples in the horizontal direction (x=16). Likewise, an N×N CU typically has N samples in the vertical direction and N samples in the horizontal direction, where N represents a non-negative integer value. The samples in a CU may be arranged in rows and columns. Furthermore, a CU does not necessarily need to have the same number of samples in the horizontal direction as in the vertical direction. For example, a CU may include N×M samples, where M is not necessarily equal to N.

[0052] The video encoder 200 encodes the video data of the CU representing the prediction and / or residual information and other information. The prediction information indicates how to predict the CU in order to form a prediction block for the CU. The residual information generally represents the sample-by-sample difference between the samples of the CU before encoding and the prediction block.

[0053] In order to predict a CU, the video encoder 200 can generally form a prediction block for the CU by inter-frame prediction or intra-frame prediction. Inter-frame prediction generally refers to predicting a CU from data of a previously decoded picture, while intra-frame prediction generally refers to predicting a CU from previously decoded data of the same picture. In order to perform inter-frame prediction, the video encoder 200 can use one or more motion vectors to generate a prediction block. The video encoder 200 can generally perform a motion search to identify a reference block that closely matches the CU, for example, in terms of the difference between the CU and the reference block. The video encoder 200 can calculate a difference metric using the sum of absolute differences (SAD), the sum of squared differences (SSD), the mean absolute difference (MAD), the mean square difference (MSD), or other such difference calculations to determine whether the reference block closely matches the current CU. In some examples, the video encoder 200 can use unidirectional prediction or bidirectional prediction to predict the current CU.

[0054] Some examples of VVC also provide an affine motion compensation mode, which can be considered an inter-prediction mode. In the affine motion compensation mode, the video encoder 200 can determine two or more motion vectors representing non-translational motion (such as zooming in or out, rotation, perspective motion, or other irregular motion types).

[0055] To perform intra prediction, the video encoder 200 can select an intra prediction mode to generate a prediction block. Some instances of VVC provide sixty-seven intra prediction modes, including various directional modes, as well as plane modes and DC modes. Typically, the video encoder 200 selects an intra prediction mode that describes the neighboring samples of the current block (e.g., a block of a CU), and predicts the samples of the current block from the neighboring samples of the current block. Assuming that the video encoder 200 encodes the CTU and CU in a raster scan order (from left to right, from top to bottom), such samples can typically be above, above and to the left, or to the left of the current block in the same picture as the current block.

[0056] The video encoder 200 encodes data representing the prediction mode of the current block. For example, for inter-frame prediction mode, the video encoder 200 can encode data indicating which of the various available inter-frame prediction modes is used and motion information of the corresponding mode. For example, for unidirectional or bidirectional inter-frame prediction, the video encoder 200 can encode motion vectors using advanced motion vector prediction (AMVP) or merge mode. The video encoder 200 can use a similar mode to encode motion vectors for affine motion compensation mode.

[0057] AV1 includes two general techniques for encoding and decoding coding blocks of video data. The two general techniques are intra prediction (e.g., intra prediction or spatial prediction) and inter prediction (e.g., inter prediction or temporal prediction). In the context of AV1, when predicting a block of a current video data frame using an intra prediction mode, the video encoder 200 and the video decoder 300 do not use video data from other video data frames. For most intra prediction modes, the video encoder 200 encodes a block of the current frame based on the difference between the sample values ​​in the current block and the prediction values ​​generated from reference samples in the same frame. The video encoder 200 determines the prediction values ​​generated from the reference samples based on the intra prediction mode.

[0058] After prediction (such as intra-frame prediction or inter-frame prediction of a block), the video encoder 200 can calculate residual data for the block. The residual data (such as a residual block) represents the sample-by-sample difference between the block and the prediction block for the block formed using the corresponding prediction mode. The video encoder 200 can apply one or more transforms to the residual block to generate transform data in a transform domain rather than a sample domain. For example, the video encoder 200 can apply a discrete cosine transform (DCT), an integer transform, a wavelet transform, or a conceptually similar transform to the residual video data. In addition, the video encoder 200 can apply a secondary transform after the first transform, such as a mode-dependent non-separable secondary transform (MDNSST), a signal-dependent transform, a Karhunen-Loeve transform (KLT), etc. The video encoder 200 generates transform coefficients after applying one or more transforms.

[0059] As described above, after any transform to produce transform coefficients, the video encoder 200 may perform quantization of the transform coefficients. Quantization generally refers to the process of quantizing the transform coefficients to possibly reduce the amount of data used to represent the transform coefficients, thereby providing further compression. By performing the quantization process, the video encoder 200 may reduce the bit depth associated with some or all of the transform coefficients. For example, the video encoder 200 may round down an n-bit value to an m-bit value during quantization, where n is greater than m. In some examples, to perform quantization, the video encoder 200 may perform a bitwise right shift of the value to be quantized.

[0060] After quantization, the video encoder 200 can scan the transform coefficients to produce a one-dimensional vector from a two-dimensional matrix including the quantized transform coefficients. The scan can be designed to place higher energy (and therefore lower frequency) transform coefficients in front of the vector and lower energy (and therefore higher frequency) transform coefficients in the back of the vector. In some examples, the video encoder 200 can scan the quantized transform coefficients using a predefined scan order to produce a serialized vector, and then entropy encode the quantized transform coefficients of the vector. In other examples, the video encoder 200 can perform adaptive scanning. After scanning the quantized transform coefficients to form a one-dimensional vector, the video encoder 200 can entropy encode the one-dimensional vector, for example, according to context adaptive binary arithmetic coding (CABAC). The video encoder 200 can also entropy encode the values ​​of the syntax elements used to describe the metadata associated with the encoded video data for use by the video decoder 300 when decoding the video data.

[0061] To perform CABAC, video encoder 200 may assign context within a context model to a symbol to be sent. The context may relate to, for example, whether neighboring values ​​of the symbol are zero values. The probability determination may be based on the context assigned to the symbol.

[0062] The video encoder 200 may also generate syntax data (such as block-based syntax data, picture-based syntax data, and sequence-based syntax data) to the video decoder 300, for example, in a picture header, a block header, a slice header, or other syntax data (such as a sequence parameter set (SPS), a picture parameter set (PPS), or a video parameter set (VPS). The video decoder 300 may also decode such syntax data to determine how to decode the corresponding video data.

[0063] In this way, the video encoder 200 can generate a bitstream including the encoded video data, for example, a syntax element describing the division of a picture into blocks (e.g., CUs) and prediction and / or residual information for the blocks. Finally, the video decoder 300 can receive the bitstream and decode the encoded video data.

[0064] In general, the video decoder 300 performs a process that is inverse to the process performed by the video encoder 200 to decode the encoded video data of the bitstream. For example, the video decoder 300 may decode the values ​​of the syntax elements of the bitstream using CABAC in a manner substantially similar to, but inverse to, the CABAC encoding process of the video encoder 200. The syntax elements may define partitioning information for partitioning a picture into CTUs and partitioning each CTU according to a corresponding partitioning structure (such as a QTBT structure) to define CUs of the CTUs. The syntax elements may further define prediction and residual information for a block (e.g., a CU) of video data.

[0065] The residual information may be represented by, for example, quantized transform coefficients. The video decoder 300 may inverse quantize and inverse transform the quantized transform coefficients of the block to reproduce a residual block for the block. The video decoder 300 uses the signaled prediction mode (intra-frame or inter-frame prediction) and related prediction information (e.g., motion information for inter-frame prediction) to form a prediction block for the block. The video decoder 300 may then combine the prediction block and the residual block (on a sample-by-sample basis) to reproduce the original block. The video decoder 300 may perform additional processing, such as performing a deblocking process to reduce visual artifacts along the boundaries of blocks.

[0066] The present disclosure may generally refer to "signaling" certain information, such as syntax elements. The term "signaling" may generally refer to the communication of values ​​of syntax elements and / or other data used to decode encoded video data. That is, the video encoder 200 may signal the values ​​of syntax elements in the bitstream. Generally, signaling refers to producing values ​​in the bitstream. As mentioned above, the source device 102 may transmit the bitstream to the destination device 116 in substantially real time or non-real time, such as may occur when storing syntax elements to the storage device 112 for later retrieval by the destination device 116.

[0067] According to the techniques of the present disclosure, a video decoder such as video decoder 300 may divide a current block of video data into multiple sub-blocks; generate corresponding initial motion vectors for two prediction directions for each sub-block according to an initial affine motion model; determine a corresponding sub-block bilateral matching cost for each possible offset among multiple offsets for each sub-block; determine a corresponding accumulated sub-block bilateral matching cost for each possible offset, each corresponding accumulated sub-block bilateral matching cost corresponding to a corresponding bilateral matching cost of the current block for one of the possible offsets; select a possible offset among the possible offsets based on the corresponding bilateral matching cost for the current block having a lowest bilateral matching cost among each corresponding accumulated sub-block bilateral matching cost; and decode the current block based on the selected possible offset.

[0068] The affine mode is now described. Figure 2A is a conceptual diagram showing a 6-parameter affine motion model based on control points. Figure 2A As shown, the affine motion field of the block is described by the motion information of two control points (170A and 170B), also known as a 4-parameter model. Figure 2B is a conceptual diagram showing a 4-parameter affine motion model based on control points. Figure 6 As shown in FIG. 1B , the affine motion field of the block is described by the motion information of three control points ( 172A- 172C ) and the three control point motion vectors, which is also called a 6-parameter model.

[0069] For example, the affine motion model can be described as

[0070]

[0071] where (v x , v y ) is the motion vector at the coordinate (x, y), and a, b, c, d, e, and f are the six affine parameters. This affine motion model can be referred to as a six-parameter affine motion model. In a typical video decoder (which may be represented by the video encoder 200 or the video decoder 300 in some instances), a picture is segmented into blocks for block-based decoding. The affine motion model of a block can also be described by three motion vectors (MVs) and described at three different positions that are not all along the same line. The three positions are typically referred to as control points, and the three motion vectors are referred to as control point motion vectors (CPMVs). In the case where the three control points are at the three corners of the block, the affine motion can be described as

[0072]

[0073] where blkW and blkH are the width and height of the block, respectively.

[0074] In the affine mode, different motion vectors can be derived for each pixel in the block according to the associated affine motion model. Thus, motion compensation can be performed pixel by pixel. However, to reduce complexity, sub-block-based motion compensation is typically employed or utilized, where the block is segmented into multiple sub-blocks (each sub-block having a smaller size than the block), and each sub-block is associated with one motion vector for block-based motion compensation. For example, the video encoder 200 or the video decoder 300 can associate each sub-block with a motion vector. The motion vector of each sub-block can be derived using the representative coordinates of the sub-block. Typically, the center position is used. In one example, the block is segmented into non-overlapping sub-blocks. If the block width is blkW, the block height is blkH, the sub-block width is sbW, and the sub-block height is sbH, then there are blkH / sbH rows of sub-blocks and blkW / sbW sub-blocks in each row. For the six-parameter affine motion model, the motion vector of the sub-block (referred to as sub-block MV) at the i-th row (0 <= i < blkW / sbW) and the j-th column (0 <= j < blkH / sbH) is derived as

[0075]

[0076] The sub-block MV can be rounded to a predefined precision and stored in a motion buffer for motion compensation and motion vector prediction. For example, the video encoder 200 or the video decoder 300 can round the sub-block MV.

[0077] The simplified four-parameter affine model (for scaling and rotation motions) is described as

[0078]

[0079] Similarly, the 4-parameter affine model of the block can be represented by 2 CPMVs and are described at the 2 corners of the block (usually the top left and top right). The motion field is then described as

[0080]

[0081] The MV of the sub-block at row i and column j is derived as

[0082]

[0083] The prediction refinement of the affine mode is now described. After performing sub-block based affine motion compensation, the prediction signal can be refined by adding the offset derived based on the pixel-by-pixel motion and the gradient of the prediction signal. For example, the video encoder 200 or the video decoder 300 can add the offset to the prediction signal. The offset at the position (m, n) can be calculated as:

[0084] ΔI(m,n)=g x (m,n)*Δv x (m,n)+g y (m,n)*Δv y (m,n)

[0085] where g x (m,n) and g y (m,n) are the horizontal and vertical gradients of the predicted signal respectively. Δv x (m,n) and Δv y (m,n) is the difference in x and y components between the motion vector calculated at position pixel position (m,n) and the sub-block MV. In one example, the coordinates of the top left sample of the sub-block are (0,0) and the center of the sub-block is Given the affine motion parameters a, b, c and d, Δv x (m,n) and Δv y (m,n) can be derived as:

[0086]

[0087] In the control point based affine motion model, the affine motion parameters a, b, c and d can be calculated from the CPMV as

[0088]

[0089] Decoder-side motion vector refinement is now discussed. In the Universal Video Coding Standard (VVC), decoder-side motion vector refinement (DMVR) based on bilateral matching is applied to improve the accuracy of the MV of the bi-predictive merge candidate. The video decoder 300 can use the bilateral matching technique to calculate the SAD between two candidate blocks in the reference picture list L0 and list L1.

[0090] Figure 3 is a conceptual diagram showing an example of bilateral matching. Figure 3 As shown, the SAD between blocks 180 and 182 is calculated for each MV candidate around the initial MV. The MV candidate with the lowest SAD becomes the refined MV and is used to generate the bidirectional prediction signal. The SAD of the initial MV is subtracted by 1 / 4 of the SAD value. The temporal distances (e.g., picture order count (POC) difference) from the two reference pictures to the current picture should be the same (in some instances), so MVD0 is just the opposite sign of MVD1.

[0091] The refinement search range can be two integer brightness samples from the initial MV. The search includes an integer sample offset search stage and a fractional sample refinement stage. A 25-point full search can be applied to the integer sample offset search. First, the SAD of the initial MV pair (for example, the MV in the L0 direction and the MV in the L1 direction) is calculated. If the SAD of the initial MV pair is less than a threshold, the integer sample stage of DMVR is terminated. Otherwise, the SAD of the remaining 24 points is calculated and checked in raster scan order. The point with the smallest SAD can be selected as the output of the integer sample offset search stage.

[0092] The integer sample search is followed by fractional sample refinement. For example, the video decoder 300 may perform fractional sample refinement. To save computational complexity, fractional sample refinement may be derived by using a parameter error surface equation instead of an additional search using SAD comparison. Fractional sample refinement may be conditionally called based on the output of the integer sample search stage. When the integer sample search stage terminates with a center having a minimum SAD in the first iteration or the second iteration search, fractional sample refinement may be further applied.

[0093] In the parametric error surface based sub-pixel offset estimation, the center position cost and the costs at four neighboring positions from the center are used to fit a 2-D parabolic error surface equation of the following form:

[0094] E(x,y)=A(x min ) 2 +B(yy min ) 2 +C (1)

[0095] Where (x min ,ymin ) corresponds to the fractional position with the minimum cost, and corresponds to the minimum cost value. By solving the above equation using the cost values ​​of the five search points, (x min ,y min ) is calculated as:

[0096] x min =(E(-1,0)-E(1,0)) / (2(E(-1,0)+E(1,0)-2E(0,0))) (2)

[0097] y min =(E(0,-1)-E(0,1)) / (2((E(0,-1)+E(0,1)-2E(0,0))) (3)

[0098] x min and min The value of is automatically constrained between -8 and 8, since all cost values ​​are positive and the minimum is E(0,0). This corresponds to a half-pixel shift with 1 / 16 pixel MV accuracy in VVC. The calculated fraction (x min ,y min ) is added to the integer distance refinement MV to obtain the sub-pixel accurate refinement ΔMV.

[0099] In VVC, the resolution of MV is 1 / 16 luma sample. Samples at fractional positions are interpolated using an 8-tap interpolation filter. For example, the video decoder 300 can interpolate samples at fractional positions. In DMVR, the search points are around the initial fractional pixel MV with an integer sample offset, so samples at those fractional positions need to be interpolated for the DMVR search process. In order to reduce computational complexity, a bilinear interpolation filter can be used to generate fractional samples for the search process in DMVR. Another important effect is that by using a bilinear filter with a 2-sample search range, DVMR does not access more reference samples than the normal motion compensation process. After the refined MV is obtained through the DMVR search process, a normal 8-tap interpolation filter can be applied to generate the final prediction. In order not to access more reference samples than the normal MC process, samples that are not required by the interpolation process based on the original MV but are required by the interpolation process based on the refined MV can be filled from those available samples.

[0100] When the width and / or height of the CU is greater than 16 luma samples, the CU may be further divided into sub-blocks with a width and / or height equal to 16 luma samples for the DMVR process.

[0101] In VVC, the DMVR process can be applied to CUs decoded with the following modes and / or features: a) CU-level merge mode with bidirectional prediction MV; b) relative to the current image, one reference image is in the past and the other reference image is in the future; c) the distances from the two reference images to the current image (e.g., POC difference) are the same; d) both reference images are short-term reference images; e) the CU has more than 64 luma samples; f) both the CU height and the CU width are greater than or equal to 8 luma samples; g) the BCW weight index indicates equal weight; h) WP is not enabled for the current block; and / or i) the current block does not use CIIP mode.

[0102] Now discuss decoder-side motion vector refinement for affine merge mode. In Chen et al.'s "Non-EE2: DMVR for Affine Merged Coding Blocks", the 27th Joint Video Experts Group (JVET) teleconference of ISO / IEC JTC 1 / SC 29 / WG 11 and ITU-T SG16WP 3 held on July 13-22, 2022, and JVET-AA0144, decoder-side motion vector refinement (DMVR) for bidirectionally predicted affine merge candidates was proposed. If the candidate meets the DMVR condition, the video decoder 300 can apply the translational MV offset to all CPMVs of the candidate in the affine merge list. And the MV offset can be derived by minimizing the bilateral matching cost, which is the same as conventional DMVR. The MV offset search process is the same as the first pass of multi-pass DMVR (prediction unit level) in ECM (Enhanced Compression Model). A 3x3 square search pattern may be used to cycle through the search range [-8, +8] in the horizontal direction and [-8, +8] in the vertical direction to find the best integer MV offset. A half-pixel search may be performed around the best integer position and an error surface estimation may be performed to find the MV offset with 1 / 16 precision.

[0103] To calculate the bilateral matching cost for a given offset, the video decoder 300 may apply the following steps: a) first add the offset to each of the CPMVs in both directions; b) derive sub-block motion fields based on the updated CPMVs; c) apply sub-block based motion compensation based on the sub-block motion fields in each direction; and d) apply prediction refinement for affine motion (as described above) to refine the predictor generated from step c).

[0104] For example, the video decoder 300 may add an offset to each CPMV in both directions. The video decoder 300 may derive a sub-block motion field based on the updated CPMV. The video decoder 300 may apply sub-block based motion compensation based on the sub-block motion field in each direction. The video decoder 300 may apply prediction refinement (as described above) for affine motion to refine the predictor generated by applying sub-block based motion compensation based on the sub-block motion field in each direction. Such techniques may significantly increase the complexity of the DMVR for affine merge candidates.

[0105] According to the technology of the present disclosure, a less complex and more practical DMVR design for affine motion model is revealed. The DMVR design can be summarized as the following steps: 1) divide the current block into sub-blocks; 2) generate initial motion vectors (in two prediction directions) for each sub-block (sub-block motion field) according to the initial affine motion model; 3) loop over each sub-block and calculate bilateral matching costs for all possible offset sub-blocks; 4) for each possible offset, accumulate the sub-block bilateral matching costs to generate a bilateral matching cost corresponding to the entire block; and 5) determine the best offset by selecting a block with the minimum bilateral matching cost corresponding to the entire block.

[0106] For example, the video decoder 300 may divide the current block into sub-blocks. The video decoder 300 may generate an initial motion vector (in both prediction directions) for each sub-block (e.g., a sub-block motion field) according to an initial affine motion model. The video decoder 300 may loop over each sub-block and calculate a bilateral matching cost for each sub-block of a possible offset. For each of the possible offsets, the video decoder 300 may accumulate the sub-block bilateral matching costs of the possible offsets on all sub-blocks of the block to generate a bilateral matching cost corresponding to the entire block. The video decoder 300 may determine the best (e.g., lowest cost) offset by selecting an offset among the possible offsets with the lowest bilateral matching cost corresponding to the entire block. For example, the video decoder 300 may select an offset corresponding to the lowest accumulated sub-block bilateral matching cost for use in refining the predictor. In this way, the sub-block motion field is generated only once, rather than for each candidate offset, which may reduce computational complexity and save power.

[0107] The sub-block size used in the above techniques can be the same as the sub-block size used for affine motion compensation, which is typically 4×4. The sub-block size can also be a different size. In some examples, the sub-block size can be a larger sub-block (e.g., 8×8, 16×16), which can result in a smaller total number of sub-blocks in the current block to reduce the complexity of the DMVR process.

[0108] In step 3), the sub-block bilateral matching cost is calculated for all possible offsets. Given the offset and the initial motion vector (generated in step 2), a candidate motion vector can be derived (in the case of mirror bilateral matching, the offset is added to the motion vector in one direction and subtracted from the motion vector in the other direction), and then motion compensation is performed to generate a predictor for the corresponding sub-block. For example, the video decoder 300 can derive a candidate motion vector and perform motion compensation to generate a predictor for the sub-block. In some examples, prediction refinement can be skipped for simplicity. In addition, note that interpolation can be applied to generate predictors for all possible offsets in one step, which can significantly reduce computational complexity. For example, the video decoder 300 can apply interpolation to generate samples that may not be at integer positions. Bilinear interpolation can be used instead of the 8-tap (6-tap or 12-tap) interpolation filter typically used for final motion compensation.

[0109] Sub-pixel offset estimation based on a parametric error surface may also be applied after step 5) to generate the sub-pixel offset. For example, the video decoder 300 may estimate the sub-pixel offset using a parametric error surface technique.

[0110] Certain size constraints may be applied. For example, the video decoder 300 may only apply DMVR to affine blocks larger than N×N, where N is set equal to 8, 16, 32, or another integer. In another example, the size constraint depends on the sub-block size used in the DMVR process, and N is set equal to the sub-block size.

[0111] A high-level syntax may be used to control whether DMVR is applied to affine blocks, and this high-level syntax may be signaled in the bitstream. For example, the video encoder 200 may signal a syntax element indicating whether DMVR is used for affine blocks in a sequence parameter set, a picture header, a slice header, etc. The video decoder 300 may parse the syntax element to determine whether DMVR is applied to affine blocks.

[0112] Figure 4 is a block diagram illustrating an example video encoder 200 that may perform the techniques of this disclosure. Figure 4 The present disclosure is provided for the purpose of explanation and should not be considered as limiting the techniques as widely exemplified and described in this disclosure. For the purpose of explanation, this disclosure describes a video encoder 200 according to techniques of VVC (ITU-T H.266, under development) and HEVC (ITU-T H.265). However, the techniques of this disclosure may be performed by video encoding devices configured for other video coding standards and video coding formats (e.g., AV1 and subsequent versions of the AV1 video coding format).

[0113] exist Figure 4In the example of , the video encoder 200 includes a video data memory 230, a mode selection unit 202, a residual generation unit 204, a transform processing unit 206, a quantization unit 208, an inverse quantization unit 210, an inverse transform processing unit 212, a reconstruction unit 214, a filter unit 216, a decoded picture buffer (DPB) 218, and an entropy coding unit 220. Any one or all of the video data memory 230, the mode selection unit 202, the residual generation unit 204, the transform processing unit 206, the quantization unit 208, the inverse quantization unit 210, the inverse transform processing unit 212, the reconstruction unit 214, the filter unit 216, the DPB 218, and the entropy coding unit 220 can be implemented in one or more processors or in processing circuits. For example, the units of the video encoder 200 can be implemented as one or more circuits or logic elements, as part of a hardware circuit, or as part of a processor, ASIC, or FPGA. In addition, the video encoder 200 may include additional or alternative processors or processing circuits to perform these and other functions.

[0114] Video data memory 230 may store video data to be encoded by components of video encoder 200. Video encoder 200 may receive video data from, for example, video source 104 ( Figure 1 ) receives video data stored in video data memory 230. DPB218 can act as a reference picture memory that stores reference video data for predicting subsequent video data by video encoder 200. Video data memory 230 and DPB 218 can be formed by any of a variety of memory devices, such as dynamic random access memory (DRAM) (including synchronous DRAM (SDRAM)), magnetoresistive RAM (MRAM), resistive RAM (RRAM) or other types of memory devices. Video data memory 230 and DPB 218 can be provided by the same memory device or a separate memory device. In various instances, video data memory 230 can be on-chip with other components of video encoder 200 as shown, or off-chip relative to those components.

[0115] In the present disclosure, references to the video data memory 230 should not be interpreted as being limited to a memory inside the video encoder 200 (unless specifically described as such), or a memory outside the video encoder 200 (unless specifically described as such). Rather, references to the video data memory 230 should be understood as a reference memory that stores video data received by the video encoder 200 for encoding (e.g., video data of a current block to be encoded). Figure 1 The memory 106 may also provide temporary storage of outputs from the various units of the video encoder 200 .

[0116] Figure 4Various units are shown to help understand the operations performed by the video encoder 200. The units may be implemented as fixed-function circuits, programmable circuits, or a combination thereof. A fixed-function circuit refers to a circuit that provides a specific functionality and is preset on the operations that can be performed. A programmable circuit refers to a circuit that can be programmed to perform various tasks and provide flexible functions in the operations that can be performed. For example, a programmable circuit can execute software or firmware that causes the programmable circuit to operate in a manner defined by instructions of the software or firmware. A fixed-function circuit can execute software instructions (e.g., receive parameters or output parameters), but the type of operation performed by the fixed-function circuit is generally immutable. In some examples, one or more of the units may be different circuit blocks (fixed-function or programmable), and in some examples, one or more of the units may be integrated circuits.

[0117] The video encoder 200 may include an arithmetic logic unit (ALU), an elementary function unit (EFU), a digital circuit, an analog circuit, and / or a programmable core formed by a programmable circuit. In an example where the operation of the video encoder 200 is performed using software executed by a programmable circuit, the memory 106 ( Figure 1 ) may store instructions (eg, object code) for software received and executed by the video encoder 200, or another memory (not shown) within the video encoder 200 may store such instructions.

[0118] The video data memory 230 is configured to store received video data. The video encoder 200 may retrieve pictures of video data from the video data memory 230 and provide the video data to the residual generation unit 204 and the mode selection unit 202. The video data in the video data memory 230 may be original video data to be encoded.

[0119] The mode selection unit 202 includes a motion estimation unit 222, a motion compensation unit 224, and an intra prediction unit 226. The mode selection unit 202 may include additional functional units for performing video prediction according to other prediction modes. As an example, the mode selection unit 202 may include a palette unit, an intra-block copy unit (which may be part of the motion estimation unit 222 and / or the motion compensation unit 224), an affine unit, a linear model (LM) unit, or the like.

[0120] The mode selection unit 202 generally coordinates multiple encoding passes to test combinations of encoding parameters and the resulting rate-distortion values ​​for these combinations. The encoding parameters may include partitioning of a CTU into CUs, a prediction mode for a CU, a transform type for residual data of a CU, a quantization parameter for residual data of a CU, etc. The mode selection unit 202 may ultimately select a combination of encoding parameters that has a better rate-distortion value than other tested combinations.

[0121] The video encoder 200 may partition the picture retrieved from the video data memory 230 into a series of CTUs, and pack one or more CTUs into a slice. The mode selection unit 202 may partition the CTUs of the picture according to a tree structure (e.g., an MTT structure, a QTBT structure, a super block structure, or a quadtree structure described above). As described above, the video encoder 200 may form one or more CUs by partitioning the CTUs according to the tree structure. This CU may also be generally referred to as a "video block" or "block".

[0122] In general, the mode selection unit 202 also controls its components (e.g., the motion estimation unit 222, the motion compensation unit 224, and the intra prediction unit 226) to generate a prediction block for a current block (e.g., a current CU, or in HEVC, the overlapping portion of a PU and a TU). For inter prediction of the current block, the motion estimation unit 222 may perform a motion search to identify one or more closely matching reference blocks in one or more reference pictures (e.g., one or more previously decoded pictures stored in the DPB 218). Specifically, the motion estimation unit 222 may calculate a value indicating how similar a potential reference block is to the current block, for example, based on a sum of absolute differences (SAD), a sum of squared differences (SSD), a mean absolute difference (MAD), a mean squared difference (MSD), or the like. The motion estimation unit 222 may generally perform these calculations using the sample-by-sample differences between the current block and the reference block under consideration. The motion estimation unit 222 may identify the reference block having the lowest value resulting from these calculations, indicating a reference block that closely matches the current block.

[0123] The motion estimation unit 222 may form one or more motion vectors (MVs) that define the position of a reference block in a reference picture relative to the position of a current block in a current picture. The motion estimation unit 222 may then provide the motion vectors to the motion compensation unit 224. For example, for unidirectional inter prediction, the motion estimation unit 222 may provide a single motion vector, while for bidirectional inter prediction, the motion estimation unit 222 may provide two motion vectors. The motion compensation unit 224 may then use the motion vectors to generate a prediction block. For example, the motion compensation unit 224 may use the motion vectors to retrieve data for the reference block. As another example, if the motion vectors have fractional sample precision, the motion compensation unit 224 may interpolate values ​​for the prediction block according to one or more interpolation filters. In addition, for bidirectional inter prediction, the motion compensation unit 224 may retrieve data for two reference blocks identified by the corresponding motion vectors, and combine the retrieved data, for example, by sample-by-sample averaging or weighted averaging.

[0124] When operating according to the AV1 video coding format, the motion estimation unit 222 and the motion compensation unit 224 may be configured to encode coding blocks of video data (e.g., both luma and chroma coding blocks) using translational motion compensation, affine motion compensation, overlapped block motion compensation (OBMC), and / or composite inter-intra prediction.

[0125] As another example, for intra prediction or intra prediction coding, the intra prediction unit 226 can generate a prediction block from samples adjacent to the current block. For example, for directional mode, the intra prediction unit 226 can generally mathematically combine the values ​​of the adjacent samples and pad these calculated values ​​in a defined direction on the current block to produce a prediction block. As another example, for DC mode, the intra prediction unit 226 can calculate the average of the adjacent samples of the current block and generate a prediction block to include the resulting average for each sample of the prediction block.

[0126] When operating according to the AV1 video coding format, the intra prediction unit 226 may be configured to encode coding blocks of video data (e.g., luma and chroma coding blocks) using directional intra prediction, non-directional intra prediction, recursive filter intra prediction, luma chroma (CFL) prediction, intra block copy (IBC), and / or palette mode. The mode selection unit 202 may include additional functional units for performing video prediction according to other prediction modes.

[0127] The mode selection unit 202 provides the prediction block to the residual generation unit 204. The residual generation unit 204 receives the original uncoded version of the current block from the video data memory 230 and receives the prediction block from the mode selection unit 202. The residual generation unit 204 calculates the sample-by-sample difference between the current block and the prediction block. The resulting sample-by-sample difference defines a residual block for the current block. In some examples, the residual generation unit 204 may also determine the difference between the sample values ​​in the residual block to generate the residual block using residual differential pulse coding modulation (RDPCM). In some examples, the residual generation unit 204 may be formed using one or more subtractor circuits that perform binary subtraction.

[0128] In an instance where the mode selection unit 202 partitions a CU into PUs, each PU may be associated with a luma prediction unit and a corresponding chroma prediction unit. The video encoder 200 and the video decoder 300 may support PUs of various sizes. As indicated above, the size of a CU may refer to the size of the luma coding block of the CU, and the size of a PU may refer to the size of the luma prediction unit of the PU. Assuming that the size of a particular CU is 2N×2N, the video encoder 200 may support PU sizes of 2N×2N or N×N for intra-prediction, and symmetric PU sizes of 2N×2N, 2N×N, N×2N, N×N, or similar sizes for inter-prediction. The video encoder 200 and the video decoder 300 may also support asymmetric partitioning of PU sizes of 2N×nU, 2N×nD, nL×2N, and nR×2N for inter-prediction.

[0129] In an example where mode select unit 202 does not further partition a CU into PUs, each CU may be associated with a luma coding block and a corresponding chroma coding block. As above, the size of a CU may refer to the size of the luma coding block of the CU. Video encoder 200 and video decoder 300 may support CU sizes of 2N×2N, 2N×N, or N×2N.

[0130] For other video coding techniques (e.g., intra-block copy mode coding, affine mode coding, and linear model (LM) mode coding), as some examples, mode selection unit 202 generates a prediction block for the current block being encoded via a corresponding unit associated with the coding technique. In some examples, such as palette mode coding, mode selection unit 202 may not generate a prediction block, but instead generate syntax elements indicating how to reconstruct the block based on the selected palette. In such modes, mode selection unit 202 may provide these syntax elements to entropy encoding unit 220 for encoding.

[0131] As described above, the residual generation unit 204 receives video data for a current block and a corresponding prediction block. The residual generation unit 204 then generates a residual block for the current block. To generate the residual block, the residual generation unit 204 calculates the sample-by-sample difference between the prediction block and the current block.

[0132] The transform processing unit 206 applies one or more transforms to the residual block to generate a block of transform coefficients (referred to herein as a "transform coefficient block"). The transform processing unit 206 may apply various transforms to the residual block to form a transform coefficient block. For example, the transform processing unit 206 may apply a discrete cosine transform (DCT), a directional transform, a Karhunen-Loeve transform (KLT), or a conceptually similar transform to the residual block. In some examples, the transform processing unit 206 may perform multiple transforms on the residual block, for example, a primary transform and a secondary transform such as a rotation transform. In some examples, the transform processing unit 206 does not apply a transform to the residual block.

[0133] When operating according to AV1, the transform processing unit 206 may apply one or more transforms to the residual block to generate a block of transform coefficients (referred to herein as a "transform coefficient block"). The transform processing unit 206 may apply various transforms to the residual block to form a transform coefficient block. For example, the transform processing unit 206 may apply a horizontal / vertical transform combination, which may include a discrete cosine transform (DCT), an asymmetric discrete sine transform (ADST), a flipped ADST (e.g., an ADST in reverse order), and an identity transform (IDTX). When the identity transform is used, the transform is skipped in one of the vertical or horizontal directions. In some instances, the transform process may be skipped.

[0134] The quantization unit 208 may quantize the transform coefficients in the transform coefficient block to produce a quantized transform coefficient block. The quantization unit 208 may quantize the transform coefficients of the transform coefficient block according to a quantization parameter (QP) value associated with the current block. The video encoder 200 (e.g., via the mode selection unit 202) may adjust the degree of quantization applied to the transform coefficient block associated with the current block by adjusting the QP value associated with the CU. Quantization may introduce information loss, and therefore, the quantized transform coefficients may have lower precision than the original transform coefficients produced by the transform processing unit 206.

[0135] The inverse quantization unit 210 and the inverse transform processing unit 212 may apply inverse quantization and inverse transform to the quantized transform coefficient block, respectively, to reconstruct a residual block from the transform coefficient block. The reconstruction unit 214 may generate a reconstructed block corresponding to the current block (although possibly with a certain degree of distortion) based on the reconstructed residual block and the prediction block generated by the mode selection unit 202. For example, the reconstruction unit 214 may add samples of the reconstructed residual block to corresponding samples from the prediction block generated by the mode selection unit 202 to generate a reconstructed block.

[0136] Filter unit 216 may perform one or more filter operations on the reconstructed block. For example, filter unit 216 may perform a deblocking operation to reduce blockiness artifacts along the edge of the CU. In some examples, the operations of filter unit 216 may be skipped.

[0137] When operating according to AV1, filter unit 216 may perform one or more filter operations on the reconstructed block. For example, filter unit 216 may perform a deblocking operation to reduce blockiness artifacts along the edge of the CU. In other examples, filter unit 216 may apply a constrained directional enhancement filter (CDEF) applied after deblocking, and may include applying a non-separable nonlinear low-pass directional filter based on the estimated edge direction. Filter unit 216 may also include a loop recovery filter applied after CDEF, and may include a separable symmetric normalized Wiener filter or a dual self-guided filter.

[0138] The video encoder 200 stores the reconstructed blocks in the DPB 218. For example, in an example where the operation of the filter unit 216 is not performed, the reconstruction unit 214 can store the reconstructed blocks to the DPB 218. In an example where the operation of the filter unit 216 is performed, the filter unit 216 can store the filtered reconstructed blocks to the DPB 218. The motion estimation unit 222 and the motion compensation unit 224 can retrieve a reference picture formed by the reconstructed (and potentially filtered) blocks from the DPB 218 to perform inter-frame prediction on blocks of subsequently encoded pictures. In addition, the intra-frame prediction unit 226 can use the reconstructed blocks in the DPB 218 of the current picture to perform intra-frame prediction on other blocks in the current picture.

[0139] In general, the entropy coding unit 220 may entropy encode syntax elements received from other functional components of the video encoder 200. For example, the entropy coding unit 220 may entropy encode a block of quantized transform coefficients from the quantization unit 208. As another example, the entropy coding unit 220 may entropy encode prediction syntax elements (e.g., motion information for inter-frame prediction or intra-frame mode information for intra-frame prediction) from the mode selection unit 202. The entropy coding unit 220 may perform one or more entropy coding operations on the syntax elements (which is another example of video data) to generate entropy-encoded data. For example, the entropy coding unit 220 may perform a context-adaptive variable length coding (CAVLC) operation, a CABAC operation, a variable to variable (V2V) length coding operation, a syntax-based context-adaptive binary arithmetic coding (SBAC) operation, a probability interval partitioning entropy (PIPE) coding operation, an exponential Golomb coding operation, or another type of entropy coding operation on the data. In some examples, the entropy coding unit 220 may operate in a bypass mode, in which the syntax elements are not entropy encoded.

[0140] The video encoder 200 may output a bitstream including entropy-encoded syntax elements required to reconstruct a block of a slice or picture. Specifically, the entropy encoding unit 220 may output a bitstream.

[0141] According to AV1, the entropy coding unit 220 may be configured as a symbol-to-symbol adaptive multi-symbol arithmetic decoder. The syntax elements in AV1 include an alphabet of N elements, and the context (e.g., a probability model) includes a set of N probabilities. The entropy coding unit 220 may store the probabilities as an n-bit (e.g., 15-bit) cumulative distribution function (CDF). The entropy coding unit 220 may perform recursive scaling to update the context with an update factor based on the size of the alphabet.

[0142] The operations described above are described with respect to blocks. Such descriptions should be understood as operations for luma coding blocks and / or chroma coding blocks. As described above, in some examples, the luma coding blocks and chroma coding blocks are the luma components and chroma components of a CU. In some examples, the luma coding blocks and chroma coding blocks are the luma components and chroma components of a PU.

[0143] In some examples, operations performed on luma coding blocks do not need to be repeated for chroma coding blocks. As an example, operations to identify a motion vector (MV) and reference picture for a luma coding block do not need to repeat the vectors used to identify the MV and reference picture for the chroma blocks. Instead, the MV of the luma coding block may be scaled to determine the MV of the chroma blocks, and the reference picture may be the same. As another example, the intra prediction process may be the same for luma coding blocks and chroma coding blocks.

[0144] The video encoder 200 represents an example of a device configured to encode video data, which includes a memory configured to store the video data, and one or more processing units implemented in circuits and configured to divide a current block of the video data into a plurality of sub-blocks; generate initial motion vectors for two prediction directions for each sub-block according to an initial affine motion model; determine a corresponding sub-block bilateral matching cost for each possible offset among a plurality of offsets for each sub-block; determine a corresponding accumulated sub-block bilateral matching cost for each possible offset, each corresponding accumulated sub-block bilateral matching cost corresponding to a corresponding bilateral matching cost of the current block for one of the possible offsets; select a possible offset among the possible offsets based on the corresponding bilateral matching cost for the current block having a lowest bilateral matching cost among each corresponding accumulated sub-block bilateral matching cost; and decode the current block based on the selected possible offset.

[0145] Figure 5 is a block diagram illustrating an example video decoder 300 that may perform the techniques of this disclosure. Figure 5 ,and Figure 5 The techniques as extensively exemplified and described in this disclosure are not limited. For purposes of explanation, this disclosure describes a video decoder 300 according to techniques of VVC (ITU-T H.266, under development) and HEVC (ITU-T H.265). However, the techniques of this disclosure may be performed by video coding devices configured for other video coding standards.

[0146] exist Figure 5 In the example of , the video decoder 300 includes a coded picture buffer (CPB) memory 320, an entropy decoding unit 302, a prediction processing unit 304, an inverse quantization unit 306, an inverse transform processing unit 308, a reconstruction unit 310, a filter unit 312, and a decoded picture buffer (DPB) 314. Any or all of the CPB memory 320, the entropy decoding unit 302, the prediction processing unit 304, the inverse quantization unit 306, the inverse transform processing unit 308, the reconstruction unit 310, the filter unit 312, and the DPB 314 may be implemented in one or more processors or in processing circuits. For example, the units of the video decoder 300 may be implemented as one or more circuits or logic elements, as part of a hardware circuit, or as part of a processor, ASIC, or FPGA. In addition, the video decoder 300 may include additional or alternative processors or processing circuits to perform these and other functions.

[0147] The prediction processing unit 304 includes a motion compensation unit 316 and an intra prediction unit 318. The prediction processing unit 304 may include additional units that perform predictions according to other prediction modes. As an example, the prediction processing unit 304 may include a palette unit, an intra-block copy unit (which may form part of the motion compensation unit 316), an affine unit, a linear model (LM) unit, or the like. In other examples, the video decoder 300 may include more, fewer, or different functional components.

[0148] When operating according to AV1, the compensation unit 316 may be configured to decode coding blocks of video data (e.g., both luma and chroma coding blocks) using translational motion compensation, affine motion compensation, OBMC, and / or composite inter-intra prediction, as described above. The intra prediction unit 318 may be configured to decode coding blocks of video data (e.g., both luma and chroma coding blocks) using directional intra prediction, non-directional intra prediction, recursive filter intra prediction, CFL, intra block copy (IBC), and / or palette mode, as described above.

[0149] CPB memory 320 may store video data, such as an encoded video bitstream, to be decoded by components of video decoder 300. For example, the video bitstream may be obtained from computer readable medium 110 ( Figure 1) obtains video data stored in CPB memory 320. CPB memory 320 may include a CPB that stores encoded video data (e.g., syntax elements) from an encoded video bitstream. In addition, CPB memory 320 may store video data other than syntax elements of decoded pictures, such as temporary data representing outputs from various units of video decoder 300. DPB 314 typically stores decoded pictures, and video decoder 300 may output and / or use decoded pictures as reference video data when decoding subsequent data or pictures of the encoded video bitstream. CPB memory 320 and DPB 314 may be formed by any of a variety of memory devices, such as DRAM, including SDRAM, MRAM, RRAM or other types of memory devices. CPB memory 320 and DPB 314 may be provided by the same memory device or a separate memory device. In various instances, CPB memory 320 may be on-chip with other components of video decoder 300, or off-chip relative to those components.

[0150] Additionally or alternatively, in some examples, video decoder 300 may retrieve the video from memory 120 ( Figure 1 ) retrieves the decoded video data. That is, memory 120 may store data as discussed above with respect to CPB memory 320. Likewise, when some or all of the functionality of video decoder 300 is implemented in software to be executed by processing circuitry of video decoder 300, memory 120 may store instructions to be executed by video decoder 300.

[0151] Figure 5 The various units shown in FIG. 3 are shown to help understand the operations performed by the video decoder 300. The units may be implemented as fixed function circuits, programmable circuits, or a combination thereof. Figure 4 , fixed-function circuits refer to circuits that provide specific functions and are preset in the operations that can be performed. Programmable circuits refer to circuits that can be programmed to perform various tasks and provide flexible functions in the operations that can be performed. For example, a programmable circuit can execute software or firmware that causes the programmable circuit to operate in a manner defined by the instructions of the software or firmware. Fixed-function circuits can execute software instructions (e.g., receive parameters or output parameters), but the types of operations performed by fixed-function circuits are generally immutable. In some examples, one or more of the units may be different circuit blocks (fixed-function or programmable), and in some examples, one or more of the units may be integrated circuits.

[0152] The video decoder 300 may include an ALU, an EFU, a digital circuit, an analog circuit, and / or a programmable core formed by a programmable circuit. In an example where the operation of the video decoder 300 is performed by software executed on a programmable circuit, an on-chip or off-chip memory may store instructions (e.g., object code) of the software received and executed by the video decoder 300.

[0153] The entropy decoding unit 302 may receive the encoded video data from the CPB and entropy decode the video data to reproduce the syntax elements. The prediction processing unit 304, the inverse quantization unit 306, the inverse transform processing unit 308, the reconstruction unit 310, and the filter unit 312 may generate decoded video data based on the syntax elements extracted from the bitstream.

[0154] Typically, the video decoder 300 reconstructs a picture on a block-by-block basis. The video decoder 300 may perform a reconstruction operation on each block individually (where a block currently being reconstructed (ie, decoded) may be referred to as a "current block").

[0155] The entropy decoding unit 302 may entropy decode syntax elements defining quantized transform coefficients of the quantized transform coefficient block, as well as transform information, such as a quantization parameter (QP) and / or a transform mode indication. The inverse quantization unit 306 may use the QP associated with the quantized transform coefficient block to determine a degree of quantization, and likewise, determine a degree of inverse quantization to be applied by the inverse quantization unit 306. The inverse quantization unit 306 may, for example, perform a bitwise left shift operation to inverse quantize the quantized transform coefficients. The inverse quantization unit 306 may thereby form a transform coefficient block including the transform coefficients.

[0156] After the inverse quantization unit 306 forms the transform coefficient block, the inverse transform processing unit 308 may apply one or more inverse transforms to the transform coefficient block to generate a residual block associated with the current block. For example, the inverse transform processing unit 308 may apply an inverse DCT, an inverse integer transform, an inverse Karhunen-Loeve transform (KLT), an inverse rotational transform, an inverse directional transform, or another inverse transform to the transform coefficient block.

[0157] In addition, prediction processing unit 304 generates a prediction block based on the prediction information syntax element entropy decoded by entropy decoding unit 302. For example, if the prediction information syntax element indicates that the current block is inter-predicted, then motion compensation unit 316 can generate a prediction block. In this case, the prediction information syntax element can indicate a reference picture in DPB 314 from which to retrieve the reference block, and a motion vector that identifies the position of the reference block in the reference picture relative to the position of the current block in the current picture. Motion compensation unit 316 can generally generate a prediction block in the same manner as described for motion compensation unit 224 ( Figure 4 ) is performed in a manner substantially similar to that described herein.

[0158] As another example, if the prediction information syntax element indicates that the current block is intra-predicted, then the intra-prediction unit 318 may generate a prediction block according to the intra-prediction mode indicated by the prediction information syntax element. Again, the intra-prediction unit 318 may generally generate a prediction block in the same manner as described with respect to the intra-prediction unit 226 ( Figure 4 The intra prediction process is performed in a manner substantially similar to that described in the foregoing description. The intra prediction unit 318 may retrieve data of neighboring samples of the current block from the DPB 314.

[0159] The reconstruction unit 310 may reconstruct the current block using the prediction block and the residual block. For example, the reconstruction unit 310 may add samples of the residual block to corresponding samples of the prediction block to reconstruct the current block.

[0160] The filter unit 312 may perform one or more filter operations on the reconstructed block. For example, the filter unit 312 may perform a deblocking operation to reduce blockiness artifacts along the edges of the reconstructed block. The operations of the filter unit 312 may not necessarily be performed in all examples.

[0161] The video decoder 300 may store the reconstructed block in the DPB 314. For example, in examples where the operation of the filter unit 312 is not performed, the reconstruction unit 310 may store the reconstructed block to the DPB 314. In examples where the operation of the filter unit 312 is performed, the filter unit 312 may store the filtered reconstructed block to the DPB 314. As discussed above, the DPB 314 may provide reference information (such as samples of the current picture for intra-frame prediction and samples of previously decoded pictures for subsequent motion compensation) to the prediction processing unit 304. In addition, the video decoder 300 may output a decoded picture (e.g., a decoded video) from the DPB 314 for subsequent presentation on a display device (such as a video). Figure 1 on a display device 118).

[0162] In this way, the video decoder 300 represents an example of a video decoding device, which includes a memory configured to store video data, and one or more processing units implemented in a circuit and configured to divide a current block of the video data into a plurality of sub-blocks; generate initial motion vectors for two prediction directions for each sub-block according to an initial affine motion model; determine a corresponding sub-block bilateral matching cost for each possible offset among a plurality of offsets for each sub-block; determine a corresponding accumulated sub-block bilateral matching cost for each possible offset, each corresponding accumulated sub-block bilateral matching cost corresponding to a corresponding bilateral matching cost of the current block for one of the possible offsets; select a possible offset among the possible offsets based on the corresponding bilateral matching cost for the current block having a lowest bilateral matching cost among each corresponding accumulated sub-block bilateral matching cost; and decode the current block based on the selected possible offset.

[0163] Figure 6 is a flow chart illustrating an example DMVR technique according to one or more aspects of the present disclosure. Video encoder 200 or video decoder 300 may determine a plurality of sub-blocks for a current block of video data (330). For example, video encoder 200 or video decoder 300 may divide the current block into a plurality of sub-blocks.

[0164] For each sub-block in the plurality of sub-blocks, the video encoder 200 or the video decoder 300 may a) generate an initial motion vector, the initial motion vector comprising at least one initial motion vector for a first prediction direction and at least one initial motion vector for a second prediction direction according to an affine motion model, and b) determine a sub-block bilateral matching cost for each of the plurality of offsets based on the initial motion vectors (332). For example, the video encoder 200 or the video decoder 300 may determine, for each sub-block in the plurality of sub-blocks, one or more initial motion vectors in the L0 direction and one or more initial motion vectors in the L1 direction. The video encoder 200 or the video decoder 300 may also determine a sub-block bilateral matching cost for each possible offset in the plurality of offsets based on the initial motion vectors.

[0165] The video encoder 200 or the video decoder 300 may determine a respective sum of sub-block bilateral matching costs associated with the plurality of sub-blocks for each respective offset in the plurality of offsets, thereby generating a plurality of sums of sub-block bilateral matching costs (334). For example, the video encoder 200 or the video decoder 300 may sum the sub-block bilateral matching costs for each sub-block for each offset. Each sum of sub-block bilateral matching costs in the plurality of sums of sub-block bilateral matching costs may be associated with a respective possible offset.

[0166] Video encoder 200 or video decoder 300 may determine a lowest sum of sub-block bilateral matching costs from the plurality of sums of sub-block bilateral matching costs (336). For example, video encoder 200 or video decoder 300 may determine which of the plurality of sums has a lowest value.

[0167] Video encoder 200 or video decoder 300 may select an offset from the plurality of offsets associated with the lowest sum of sub-block bilateral matching costs to determine the selected offset (338). For example, video encoder 200 or video decoder 300 may select the sum with the lowest value as the selected offset.

[0168] The video encoder 200 or the video decoder 300 may modify the affine motion model based on the selected offset to generate a modified affine motion model (340). For example, the video encoder 200 or the video decoder may modify the CPMV by adding and / or subtracting the selected offset from the CPMV. The video encoder 200 or the video decoder 300 may encode the current block based on the modified affine motion model (342). For example, the video encoder 200 may decode the current block using the modified affine motion model, and the video decoder 300 may decode the current block using the modified affine motion model.

[0169] In some examples, each sum of the sub-block bilateral matching costs represents a corresponding bilateral matching cost for the current block.In some examples, the sub-block sizes of the plurality of sub-blocks include at least one of 4×4, 8×8, or 16×16.

[0170] In some examples, generating the initial motion vector includes deriving a candidate motion vector. In some examples, modifying the affine motion model based on the selected offset to generate a modified affine motion model includes modifying a first motion vector for a first prediction direction based on the selected offset and modifying a second motion vector for a second prediction direction based on the selected offset.

[0171] In some examples, video encoder 200 or video decoder 300 may apply interpolation to generate a motion vector predictor for each of the plurality of offsets. In some examples, applying interpolation includes applying bilinear interpolation.

[0172] In some examples, video encoder 200 or video decoder 300 may estimate sub-pixel offsets using a parametric error surface.In some examples, video encoder 200 or video decoder 300 may determine whether the size of the current block satisfies a predetermined threshold, and determine a plurality of sub-blocks based on determining that the size of the current block satisfies the predetermined threshold.

[0173] In some examples, video encoder 200 or video decoder 300 may determine whether the size of each of the plurality of sub-blocks will be greater than a predetermined threshold, and determine the plurality of sub-blocks based on determining that the size of each of the plurality of sub-blocks will be greater than the predetermined threshold. In some examples, decoding includes decoding, and video encoder 200 or video decoder 300 may determine a value of a syntax element signaled in a bitstream, the value of the syntax element indicating that decoder-side motion vector refinement is applied to the current block. In some examples, the affine motion model includes control point motion vectors.

[0174] Figure 7 2 is a flowchart illustrating an example method for encoding a current block according to the techniques of the present disclosure. The current block may include a current CU. Although relative to the video encoder 200 ( Figure 1 and 2) are described, but it should be understood that other devices may be configured to perform similar Figure 7 method of method of method.

[0175] In this example, the video encoder 200 initially predicts the current block (350). For example, the video encoder 200 may form a prediction block for the current block. The video encoder 200 may then calculate a residual block for the current block (352). To calculate the residual block, the video encoder 200 may calculate the difference between the original uncoded block and the prediction block for the current block. The video encoder 200 may then transform the residual block and quantize the transform coefficients of the residual block (354). Next, the video encoder 200 may scan the quantized transform coefficients of the residual block (356). During or after the scan, the video encoder 200 may entropy encode the transform coefficients (358). For example, the video encoder 200 may encode the transform coefficients using CAVLC or CABAC. The video encoder 200 may then output entropy encoded data for the block (360).

[0176] Figure 8 1 is a flowchart illustrating an example method for decoding a current block of video data according to the techniques of the present disclosure. The current block may include a current CU. Although with respect to the video decoder 300 ( Figure 1 and 4 ), but it should be understood that other devices may be configured to perform similar Figure 8 method of method of method.

[0177] The video decoder 300 may receive entropy coded data for a current block, such as entropy coded prediction information and entropy coded data for transform coefficients of a residual block corresponding to the current block (370). The video decoder 300 may entropy decode the entropy coded data to determine prediction information for the current block and reproduce transform coefficients of the residual block (372). The video decoder 300 may predict the current block (374), for example, using an intra-frame or inter-frame prediction mode indicated by the prediction information for the current block to calculate a prediction block for the current block. The video decoder 300 may then reverse scan the reproduced transform coefficients (376) to create a quantized transform coefficient block. The video decoder 300 may then inverse quantize the transform coefficients and apply an inverse transform to the transform coefficients to produce a residual block (378). The video decoder 300 may ultimately decode the current block (380) by combining the prediction block and the residual block.

[0178] Item 1A. A method for decoding video data, the method comprising: dividing a current block of the video data into a plurality of sub-blocks; generating initial motion vectors for two prediction directions for each sub-block based on an initial affine motion model; determining a corresponding sub-block bilateral matching cost for each possible offset of a plurality of offsets for each sub-block; determining a corresponding accumulated sub-block bilateral matching cost for each possible offset, each corresponding accumulated sub-block bilateral matching cost corresponding to a corresponding bilateral matching cost of a current block for one of the possible offsets; selecting a possible offset among the possible offsets based on the corresponding bilateral matching cost for the current block having a lowest bilateral matching cost among each corresponding accumulated sub-block bilateral matching cost; and decoding the current block based on the selected possible offset.

[0179] Clause 2A. The method of Clause 1A, further comprising generating a sub-block motion field for each possible offset suppression.

[0180] Clause 3A. The method of clause 1A or clause 2A, wherein sub-block sizes of the plurality of sub-blocks comprise 4x4, 8x8, or 16x16.

[0181] Clause 4A. The method of any of Clauses 1A-3A, wherein determining a corresponding sub-block bilateral matching cost for each possible offset in a plurality of offsets for each sub-block comprises deriving a candidate motion vector.

[0182] Clause 5A. The method of clause 4A, wherein determining the corresponding sub-block bilateral matching cost for each possible offset in the plurality of offsets further comprises adding the corresponding offset to the corresponding motion vector in one direction and subtracting the corresponding offset from the corresponding motion vector in another direction.

[0183] Clause 6A. The method of any of clauses 1A-3A, wherein determining a respective sub-block bilateral matching cost for each possible offset in a plurality of offsets for each sub-block comprises applying interpolation to generate motion vector predictors for all possible offsets.

[0184] Clause 7A. The method of Clause 6A, further comprising applying bilinear interpolation for final motion compensation.

[0185] Clause 8A. The method of any of Clauses 1A-7A, further comprising estimating superpixel shifts using a parametric error surface.

[0186] Clause 9A. The method of any of clauses 1A to 8A, further comprising determining, prior to dividing the current block of video data into a plurality of sub-blocks, that a size of the current block satisfies a predetermined threshold.

[0187] Clause 10A. The method of any of clauses 1A to 8A, further comprising determining, prior to dividing the current block of video data into a plurality of sub-blocks, that a size of each of the plurality of sub-blocks will be greater than a predetermined threshold.

[0188] Clause 11A. The method of any of clauses 1A-10A, further comprising determining a value of a syntax element signaled in the bitstream, the value of the syntax element indicating application of decoder-side motion vector refinement to the current block.

[0189] Clause 12A. The method of any of Clauses 1A-11A, wherein decoding comprises decoding.

[0190] Clause 13A. The method of any of clauses 1A-12A, wherein decoding comprises encoding.

[0191] Clause 14A. An apparatus for decoding video data, the apparatus comprising one or more components for performing the method of any of Clauses 1A-13A.

[0192] Clause 15A. The apparatus of Clause 14A, wherein the one or more components include one or more processors implemented in circuitry.

[0193] Clause 16A. The apparatus of any of Clauses 14A or 15A, further comprising a memory for storing the video data.

[0194] Clause 17A. The apparatus of any of Clauses 14A to 16A, further comprising a display configured to display the decoded video data.

[0195] Clause 18A. The device of any of clauses 14A-17A, wherein the device comprises one or more of a camera, a computer, a mobile device, a broadcast receiver device, or a set-top box.

[0196] Clause 19A. The apparatus of any of clauses 14A-18A, wherein the apparatus comprises a video decoder.

[0197] Clause 20A. The apparatus of any of clauses 14A-19A, wherein the apparatus comprises a video encoder.

[0198] Clause 21A. A computer-readable storage medium having stored thereon instructions that, when executed, cause one or more processors to perform the method of any of clauses 1A-11A.

[0199] Item 1B. A method for decoding video data, the method comprising: determining multiple sub-blocks for a current block of the video data; for each sub-block of the multiple sub-blocks: (a) generating an initial motion vector, the initial motion vector comprising at least one initial motion vector for a first prediction direction and at least one initial motion vector for a second prediction direction according to an affine motion model, and (b) determining a sub-block bilateral matching cost for each of a plurality of offsets based on the initial motion vector; for each corresponding offset of the multiple offsets, determining a corresponding sum of sub-block bilateral matching costs associated with the multiple sub-blocks, thereby generating a plurality of sums of sub-block bilateral matching costs; determining a minimum sum of sub-block bilateral matching costs from the multiple sums of sub-block bilateral matching costs; selecting an offset from a plurality of offsets associated with the minimum sum of sub-block bilateral matching costs to determine a selected offset; modifying the affine motion model based on the selected offset to generate a modified affine motion model; and decoding the current block based on the modified affine motion model.

[0200] Clause 2B. The method of clause 1B, wherein each sum of the sub-block bilateral matching costs represents a corresponding bilateral matching cost for the current block.

[0201] Clause 3B. The method of clause 1B or clause 2B, wherein sub-block sizes of the plurality of sub-blocks comprise at least one of 4x4, 8x8, or 16x16.

[0202] Clause 4B. The method of any of clauses 1B-3B, wherein generating the initial motion vector comprises deriving a candidate motion vector.

[0203] Clause 5B. A method according to any of clauses 1B-4B, wherein modifying the affine motion model based on the selected offset to generate a modified affine motion model includes modifying a first motion vector for a first prediction direction based on the selected offset and modifying a second motion vector for a second prediction direction based on the selected offset.

[0204] Clause 6B. The method of any of clauses 1B-5B, further comprising applying interpolation to generate a motion vector predictor for each of the plurality of offsets.

[0205] Clause 7B. The method of Clause 6B, wherein applying interpolation comprises applying bilinear interpolation.

[0206] Clause 8B. The method of any of Clauses 1B-7B, further comprising estimating sub-pixel offsets using a parametric error surface.

[0207] Clause 9B. The method of any one of clauses 1B-8B, further comprising: determining whether the size of the current block satisfies a predetermined threshold; and

[0208] Based on a determination that the size of the current block satisfies the predetermined threshold, the plurality of sub-blocks are determined.

[0209] Clause 10B. The method according to any one of clauses 1B-9B further includes: determining whether the size of each of the multiple sub-blocks will be greater than a predetermined threshold; and determining the multiple sub-blocks based on the determination that the size of each of the multiple sub-blocks will be greater than the predetermined threshold.

[0210] Clause 11B. The method of any of clauses 1B-10B, wherein decoding comprises decoding, the method further comprising determining a value of a syntax element signaled in the bitstream, the value of the syntax element indicating application of decoder-side motion vector refinement to the current block.

[0211] Clause 12B. The method of any of clauses 1B-11B, wherein the affine motion model comprises control point motion vectors.

[0212] Clause 13B. A device for decoding video data, the device comprising: a memory configured to store the video data; and one or more processors implemented in circuitry and communicatively coupled to the memory, the one or more processors configured to: determine a plurality of sub-blocks for a current block of the video data; for each of the plurality of sub-blocks: (a) generate an initial motion vector, the initial motion vector comprising at least one initial motion vector for a first prediction direction and at least one initial motion vector for a second prediction direction according to an affine motion model, and (b) determine based on the initial motion vector The invention relates to a method for decoding a current block in a first embodiment of the present invention, wherein the first offset is a sub-block bilateral matching cost and the second offset is a sub-block bilateral matching cost associated with the plurality of sub-blocks. The method comprises: determining a sub-block bilateral matching cost for each offset in a plurality of offsets; determining, for each corresponding offset in the plurality of offsets, a corresponding sum of sub-block bilateral matching costs associated with the plurality of sub-blocks, thereby generating a plurality of sums of sub-block bilateral matching costs; determining a lowest sum of sub-block bilateral matching costs from the plurality of sums of sub-block bilateral matching costs; selecting an offset from the plurality of offsets associated with the lowest sum of sub-block bilateral matching costs to determine a selected offset; modifying the affine motion model based on the selected offset to generate a modified affine motion model; and decoding a current block based on the modified affine motion model.

[0213] Clause 14B. The apparatus of clause 13B, wherein each sum of the sub-block bilateral matching costs represents a corresponding bilateral matching cost for the current block.

[0214] Clause 15B. The apparatus of clause 13B or clause 14B, wherein sub-block sizes of the plurality of sub-blocks comprise at least one of 4x4, 8x8, or 16x16.

[0215] Clause 16B. The apparatus of any of clauses 13B to 15B, wherein as part of generating the initial motion vector, the one or more processors are configured to derive a candidate motion vector.

[0216] Clause 17B. The apparatus of any of clauses 13B-16B, wherein each sum of sub-block bilateral matching costs represents a corresponding bilateral matching cost for the current block.

[0217] Clause 18B. The apparatus of any of clauses 13B-17B, wherein the one or more processors are further configured to apply interpolation to generate a motion vector predictor for each of the plurality of offsets.

[0218] Clause 19B. The apparatus of Clause 18B, wherein as part of applying interpolation, the one or more processors are configured to apply bilinear interpolation.

[0219] Clause 20B. The apparatus of any of clauses 13B-19B, wherein the one or more processors are further configured to estimate sub-pixel offsets using a parametric error surface.

[0220] Clause 21B. A device according to any of clauses 13B-20B, wherein the one or more processors are further configured to: determine whether the size of the current block meets a predetermined threshold; and determine multiple sub-blocks based on the determination that the size of the current block meets the predetermined threshold.

[0221] Clause 22B. A device according to any one of clauses 13B-21B, wherein the one or more processors are further configured to: determine whether the size of each of the multiple sub-blocks will be greater than a predetermined threshold; and determine the multiple sub-blocks based on the determination that the size of each of the multiple sub-blocks will be greater than the predetermined threshold.

[0222] Clause 23B. An apparatus as described in any of clauses 13B to 22B, wherein the one or more processors are further configured to determine a value of a syntax element signaled in the bitstream, the value of the syntax element indicating that decoder-side motion vector refinement is applied to the current block.

[0223] Clause 24B. The apparatus of any of clauses 13B to 23B, wherein the affine motion model comprises control point motion vectors.

[0224] Clause 25B. The apparatus of any of Clauses 13B to 24B, further comprising a display configured to display the decoded video data.

[0225] Clause 26B. The device of any of clauses 13B-25B, further comprising one or more of a camera, a computer, a mobile device, a broadcast receiver device, or a set-top box.

[0226] Item 27B. A computer-readable storage medium having instructions stored thereon that, when executed, cause one or more processors to: determine a plurality of sub-blocks for a current block of video data; for each of the plurality of sub-blocks: (a) generate an initial motion vector, the initial motion vector comprising at least one initial motion vector for a first prediction direction and at least one initial motion vector for a second prediction direction according to an affine motion model, and (b) determine a sub-block bilateral matching cost for each of a plurality of offsets based on the initial motion vector; for each possible offset among the plurality of offsets, determine a corresponding sum of the sub-block bilateral matching costs associated with the plurality of sub-blocks, thereby generating a plurality of sums of sub-block bilateral matching costs; determine a minimum sum of the sub-block bilateral matching costs from the plurality of sums of the sub-block bilateral matching costs; select an offset from the plurality of offsets associated with the minimum sum of the sub-block bilateral matching costs to determine a selected offset; modify the affine motion model based on the selected offset to generate a modified affine motion model; and decode the current block based on the modified affine motion model.

[0227] Clause 28B. An apparatus for decoding video data, the apparatus comprising: means for determining a plurality of sub-blocks for a current block of the video data; means for generating, for each of the plurality of sub-blocks, an initial motion vector, the initial motion vector comprising at least one initial motion vector for a first prediction direction and at least one initial motion vector for a second prediction direction according to an affine motion model, and means for determining, based on the initial motion vectors and for each of the plurality of sub-blocks, a sub-block bilateral matching cost for each offset in a plurality of offsets; means for generating, for each of the plurality of offsets, a sub-block bilateral matching cost for each offset in a plurality of offsets; means for determining a corresponding sum of sub-block bilateral matching costs associated with the plurality of sub-blocks for each possible offset in the shift, thereby generating a plurality of sums of sub-block bilateral matching costs; means for determining a lowest sum of sub-block bilateral matching costs from the plurality of sums of sub-block bilateral matching costs; means for selecting an offset from the plurality of offsets associated with the lowest sum of sub-block bilateral matching costs to determine a selected offset; means for modifying the affine motion model based on the selected offset to generate a modified affine motion model; and means for decoding a current block based on the modified affine motion model.

[0228] It should be appreciated that, depending on the example, certain actions or events of any of the techniques described herein may be performed in a different order, may be added, combined, or omitted entirely (e.g., not all described actions or events are required to practice the techniques). In addition, in some examples, actions or events may be performed simultaneously rather than sequentially, such as through multithreading, interrupt processing, or multiple processors.

[0229] In one or more instances, the functions described may be implemented in hardware, software, firmware, or any combination thereof. If implemented in software, the functions may be stored as one or more instructions or codes on or transmitted via a computer-readable medium and executed by a hardware-based processing unit. Computer-readable media may include computer-readable storage media corresponding to tangible media such as data storage media, or communication media including any media that facilitates the transmission of a computer program from one place to another, for example, according to a communication protocol. In this manner, computer-readable media may generally correspond to (1) non-transitory tangible computer-readable storage media, or (2) communication media, such as signals or carrier waves. Data storage media may be any available media that can be accessed by one or more computers or one or more processors to retrieve instructions, codes, and / or data structures for implementing the techniques described in the present disclosure. A computer program product may include a computer-readable medium.

[0230] By way of example and not limitation, such computer-readable storage media may include RAM, ROM, EEPROM, CD-ROM or other optical disk storage devices, magnetic disk storage devices or other magnetic storage devices, flash memory, or any other medium that can be used to store the required program code in the form of instructions or data structures and can be accessed by a computer. In addition, any connection is appropriately referred to as a computer-readable medium. For example, if instructions are transmitted from a website, server or other remote source using a coaxial cable, fiber optic cable, twisted pair, digital subscriber line (DSL), or wireless technology (such as infrared, radio, and microwave), then coaxial cable, fiber optic cable, twisted pair, DSL, or wireless technology (such as infrared, radio, and microwave) are included in the definition of the medium. However, it should be understood that computer-readable storage media and data storage media do not include connections, carrier waves, signals, or other temporary media, but actually refer to non-temporary tangible storage media. As used herein, disks and optical disks include compact disks (CDs), laser optical disks, optical optical disks, digital versatile disks (DVDs), floppy disks, and Blu-ray disks, where disks typically reproduce data magnetically, and optical disks reproduce data optically with lasers. Combinations of the above should also be included within the scope of computer-readable media.

[0231] Instructions may be executed by one or more processors, such as one or more DSPs, general-purpose microprocessors, ASICs, FPGAs, or other equivalent integrated or discrete logic circuits. Therefore, the terms "processor" and "processing circuit" as used herein may refer to any of the aforementioned structures or any other structure suitable for implementing the techniques described herein. In addition, in some aspects, the functions described herein may be provided in dedicated hardware and / or software modules configured for encoding and decoding, or incorporated into a combined codec. In addition, these techniques may be fully implemented in one or more circuits or logic elements.

[0232] The techniques of the present disclosure may be implemented in a wide variety of devices or apparatuses, including wireless handsets, integrated circuits (ICs), or IC collections (e.g., chipsets). Various components, modules, or units are described in the present disclosure to emphasize functional aspects of devices configured to perform the disclosed techniques, but do not necessarily need to be implemented by different hardware units. Instead, as described above, the various units may be combined in a codec hardware unit, or provided by a collection of interoperable hardware units including one or more processors as described above in combination with appropriate software and / or firmware.

[0233] Various examples have been described. These and other examples are within the scope of the following claims.

Claims

1. A method for decoding video data, the method comprising: determining a plurality of sub-blocks for a current block of the video data; For each sub-block in the plurality of sub-blocks: (a) generating initial motion vectors, the initial motion vectors including at least one initial motion vector for a first prediction direction and at least one initial motion vector for a second prediction direction according to an affine motion model, and (b) determining a sub-block bilateral matching cost for each of a plurality of offsets based on the initial motion vector; determining, for each respective offset of the plurality of offsets, a respective sum of sub-block bilateral matching costs associated with the plurality of sub-blocks, thereby generating a plurality of sums of sub-block bilateral matching costs; determining a lowest sum of the sub-block bilateral matching costs from the plurality of sums of the sub-block bilateral matching costs; selecting an offset from a plurality of offsets associated with said lowest sum of sub-block bilateral matching costs to determine a selected offset; modifying the affine motion model based on the selected offset to generate a modified affine motion model; as well as The current block is decoded based on the modified affine motion model. 2 . The method of claim 1 , wherein each sum of the sub-block bilateral matching costs represents a corresponding bilateral matching cost for the current block.

3. The method according to claim 1, wherein: The sub-block sizes of the plurality of sub-blocks include at least one of 4×4, 8×8, or 16×16.

4. The method according to claim 1, wherein: Generating an initial motion vector includes deriving a candidate motion vector.

5. The method according to claim 1, wherein modifying the affine motion model based on the selected offset to generate the modified affine motion model includes modifying a first motion vector for the first prediction direction based on the selected offset and modifying a second motion vector for the second prediction direction based on the selected offset.

6. The method of claim 1, further comprising applying interpolation to generate a motion vector predictor for each of the plurality of offsets.

7. The method according to claim 6, wherein: Applying interpolation includes applying bilinear interpolation.

8. The method of claim 1 further comprising estimating sub-pixel offsets using a parametric error surface.

9. The method according to claim 1, further comprising: Determining whether the size of the current block meets a predetermined threshold; as well as Based on a determination that the size of the current block satisfies the predetermined threshold, the plurality of sub-blocks are determined.

10. The method according to claim 1, further comprising: determining whether a size of each of the plurality of sub-blocks will be greater than a predetermined threshold; as well as The plurality of sub-blocks are determined based on a determination that a size of each of the plurality of sub-blocks will be greater than a predetermined threshold.

11. The method of claim 1 , wherein decoding comprises decoding, the method further comprising determining a value of a syntax element signaled in a bitstream, the value of the syntax element indicating application of decoder-side motion vector refinement to the current block.

12. The method of claim 1, wherein the affine motion model comprises control point motion vectors.

13. A device for decoding video data, the device comprising: a memory configured to store the video data; as well as One or more processors implemented in circuitry and communicatively coupled to the memory, the one or more processors configured to: determining a plurality of sub-blocks for a current block of the video data; For each sub-block in the plurality of sub-blocks: (a) generating initial motion vectors, the initial motion vectors including at least one initial motion vector for a first prediction direction and at least one initial motion vector for a second prediction direction according to an affine motion model, and (b) determining a sub-block bilateral matching cost for each of a plurality of offsets based on the initial motion vector; determining, for each respective offset among the plurality of offsets, a respective sum of sub-block bilateral matching costs associated with the plurality of sub-blocks, thereby generating a plurality of sums of sub-block bilateral matching costs; determining a lowest sum of the sub-block bilateral matching costs from the plurality of sums of the sub-block bilateral matching costs; selecting an offset from the plurality of offsets associated with the lowest sum of sub-block bilateral matching costs to determine a selected offset; modifying the affine motion model based on the selected offset to generate a modified affine motion model; as well as The current block is decoded based on the modified affine motion model.

14. The apparatus of claim 13, wherein each sum of the sub-block bilateral matching costs represents a corresponding bilateral matching cost for the current block. 15 . The apparatus of claim 13 , wherein sub-block sizes of the plurality of sub-blocks comprise at least one of 4×4, 8×8, or 16×16.

16. The apparatus of claim 13, wherein as part of generating the initial motion vector, the one or more processors are configured to derive a candidate motion vector.

17. The apparatus of claim 13, wherein each sum of the sub-block bilateral matching costs represents a corresponding bilateral matching cost for the current block.

18. The apparatus of claim 13, wherein the one or more processors are further configured to be applied to generate a motion vector predictor for each of the plurality of offsets.

19. The device of claim 18, wherein as part of the application, the one or more processors are configured to apply bilinear interpolation.

20. The apparatus of claim 13, wherein: The one or more processors are further configured to estimate sub-pixel offsets using the parametric error surface.

21. The device of claim 13, wherein the one or more processors are further configured to: Determining whether the size of the current block meets a predetermined threshold; and Based on a determination that the size of the current block satisfies the predetermined threshold, the plurality of sub-blocks are determined.

22. The device of claim 13, wherein the one or more processors are further configured to: determining whether a size of each of the plurality of sub-blocks will be greater than a predetermined threshold; and The plurality of sub-blocks are determined based on a determination that a size of each of the plurality of sub-blocks will be greater than the predetermined threshold.

23. The apparatus of claim 13, wherein coding comprises decoding, and wherein the one or more processors are further configured to determine a value of a syntax element signaled in a bitstream, the value of the syntax element indicating application of decoder-side motion vector refinement to the current block.

24. The apparatus of claim 13, wherein the affine motion model comprises control point motion vectors.

25. The device of claim 13, further comprising a display configured to display the decoded video data.

26. The device of claim 13, further comprising one or more of a camera, a computer, a mobile device, a broadcast receiver device, or a set-top box.

27. A computer-readable storage medium having stored thereon instructions which, when executed, cause one or more processors to: determining a plurality of sub-blocks for a current video data block; For each sub-block in the plurality of sub-blocks: (a) generating initial motion vectors, the initial motion vectors including at least one initial motion vector for a first prediction direction and at least one initial motion vector for a second prediction direction according to an affine motion model, and (b) determining a sub-block bilateral matching cost for each of a plurality of offsets based on the initial motion vector; determining, for each possible offset among the plurality of offsets, a respective sum of sub-block bilateral matching costs associated with the plurality of sub-blocks, thereby generating a plurality of sums of sub-block bilateral matching costs; determining a lowest sum of the sub-block bilateral matching costs from the plurality of sums of the sub-block bilateral matching costs; selecting an offset from a plurality of offsets associated with said lowest sum of sub-block bilateral matching costs to determine a selected offset; modifying the affine motion model based on the selected offset to generate a modified affine motion model; as well as The current block is decoded based on the modified affine motion model.

28. An apparatus for decoding video data, the apparatus comprising: means for determining a plurality of sub-blocks for a current block of said video data; means for generating, for each of the plurality of sub-blocks, an initial motion vector, the initial motion vector comprising at least one initial motion vector for a first prediction direction and at least one initial motion vector for a second prediction direction according to an affine motion model, and means for determining, based on the initial motion vector and for each of the plurality of sub-blocks, a sub-block bilateral matching cost for each offset in a plurality of offsets; means for determining, for each possible offset among the plurality of offsets, a respective sum of sub-block bilateral matching costs associated with the plurality of sub-blocks thereby generating a plurality of sums of sub-block bilateral matching costs; means for determining a lowest sum of sub-block bilateral matching costs from said plurality of sums of sub-block bilateral matching costs; means for selecting an offset from said plurality of offsets associated with said lowest sum of sub-block bilateral matching costs to determine a selected offset; means for modifying the affine motion model based on the selected offset to generate a modified affine motion model; as well as Means for decoding the current block based on the modified affine motion model.