Wafer position calibration system and method, wafer inspection device

Abstract

The present disclosure provides a wafer position calibration system and method, and a wafer detection device. The wafer position calibration system comprises a position detection unit configured to detect actual position information of a wafer on a stage; a level detection unit configured to perform level detection on the stage; a wafer calibration unit configured to calibrate the position of the wafer; and a control unit configured to determine whether the current position of the wafer is within a position offset threshold according to the actual position information and preset target position information, and when the current position of the wafer is not within the position offset threshold, control the level detection unit to perform level detection on the stage and determine whether the level of the stage is within a level deviation threshold; and when the level of the stage is within the level deviation threshold, control the wafer calibration unit to calibrate the position of the wafer to move the wafer to the target position. The wafer position calibration system and method, and the wafer detection device provided by the present disclosure can automatically calibrate the position of the wafer.

Description

Technical Field

[0001] This invention relates to the field of semiconductor processing technology, and in particular to a wafer position calibration system and method, and a wafer inspection device. Background Technology

[0002] During semiconductor processing, when inspecting the morphology of wafers, abnormal wafer positions on the stage may occur due to wafer size issues, poor teaching parameters, or other reasons. This can prevent the wafer inspection equipment from starting inspection, or cause the robotic arm to be unable to properly handle the wafer after inspection. Furthermore, in cases of abnormal wafer positioning, wafer repositioning and removal require opening the equipment chamber, leading to a certain degree of contamination of the wafer or the equipment chamber. Summary of the Invention

[0003] This disclosure provides a wafer position calibration system and method, and a wafer inspection device, which can automatically calibrate the wafer position to avoid problems caused by abnormal wafer position, and does not require opening the equipment chamber, thus avoiding contamination of the wafer or equipment chamber.

[0004] The technical solutions provided in this disclosure are as follows:

[0005] In a first aspect, embodiments of this disclosure provide a wafer position calibration system, comprising:

[0006] The position detection unit is used to detect the actual position information of the wafer on the stage;

[0007] A levelness detection unit is used to detect the levelness of the platform.

[0008] A wafer calibration unit is used to calibrate the position of the wafer; and

[0009] The control unit is configured to determine whether the current position of the wafer is within a position offset threshold based on the actual position information and the preset target position information. When the current position of the wafer is not within the position offset threshold, the control unit controls the levelness detection unit to perform levelness detection on the stage and determines whether the levelness of the stage is within a level deviation threshold. When the levelness of the stage is within the level deviation threshold, the control unit controls the wafer calibration unit to calibrate the position of the wafer to move the wafer to the target position.

[0010] For example, the wafer calibration unit includes:

[0011] The acquisition module is used to acquire the actual location information of the center of the wafer;

[0012] A wafer moving module is used to move the wafer; the control unit is also connected to the acquisition module and the wafer moving module, and the control unit is also used to obtain the offset information of the actual position of the wafer center relative to the preset wafer center reference position according to the actual position information of the wafer center and the preset wafer center reference position; and based on the offset information, control the wafer moving module to move the wafer to the target position.

[0013] For example, the wafer moving module includes:

[0014] A top column mechanism, comprising a base and a top column connected to the base, the base being disposed below the platform, the top column being able to pass through the platform and move up and down relative to the platform in a direction perpendicular to the platform;

[0015] A lifting mechanism, connected to the base, is configured to lift the top column mechanism in a direction perpendicular to the platform.

[0016] A translation mechanism, which is connected to the base and configured to translate the top column mechanism in a direction that is horizontal to the platform;

[0017] A drive mechanism, connected to the translation mechanism, is used to drive the translation mechanism and the lifting mechanism to move the top column mechanism based on the calibration stroke parameters;

[0018] The control unit is specifically used to calculate the wafer calibration stroke parameters based on the offset information, and to control the wafer moving module to move the wafer to the target position based on the calibration stroke parameters.

[0019] For example, the top end of the top column mechanism is a support end for supporting the wafer. The support end is provided with an electrostatic chuck and an anti-slip component. The electrostatic chuck has a plurality of connecting columns on its electrostatic adsorption surface. The plurality of connecting columns are distributed sequentially at intervals along the circumference of the electrostatic adsorption surface. The anti-slip component is annular and is connected to the top end of the plurality of connecting columns.

[0020] For example, the acquisition module includes: an image acquisition module, disposed on the platform, for acquiring images of the edges around the wafer;

[0021] The control unit is specifically used to generate a wafer outline image based on the images of the wafer's four edges acquired by the image acquisition module, and to analyze the outline image to determine the actual position of the wafer's center.

[0022] For example, the image acquisition unit includes a camera located at the center of the bearing surface of the stage, the camera being configured to rotate at least along the circumferential direction of the wafer to scan and obtain images of the four edges of the wafer.

[0023] For example, the system further includes: a platform leveling adjustment unit for adjusting the levelness of the platform; wherein the control unit is also connected to the platform leveling adjustment unit, and the control unit is used to control the platform leveling adjustment unit to adjust the levelness of the platform when the levelness of the platform exceeds the level deviation threshold, until the levelness of the platform is within the level deviation threshold.

[0024] For example, the position detection unit includes:

[0025] A plurality of first distance sensors are disposed on the bearing surface of the stage, and the plurality of first distance sensors are arranged sequentially at intervals along the circumference of the bearing surface of the stage. The first distance sensors are used to acquire first distance data between the wafer and the first distance sensor in the radial direction of the wafer.

[0026] A plurality of second distance sensors are disposed on the bearing surface of the stage, and the plurality of second distance sensors are arranged sequentially at intervals along the circumference of the bearing surface of the stage. The second distance sensors are used to acquire second distance data between the wafer and the second distance sensor in a direction perpendicular to the bearing surface.

[0027] The control unit is specifically used to obtain the actual position information of the wafer on the stage based on the first distance data and the second distance data.

[0028] Secondly, embodiments of this disclosure provide a wafer position calibration method, including:

[0029] Detect the actual position information of the wafer on the stage;

[0030] Based on the actual location information and the preset target location information, determine whether the wafer is currently within the location offset threshold;

[0031] When the wafer is not currently at the position offset threshold, the levelness of the stage is detected to determine whether the levelness of the stage is within the level deviation threshold.

[0032] When the levelness of the stage is within the horizontal deviation threshold, the wafer position is calibrated to move the wafer to the target position.

[0033] For example, calibrating the wafer position when the levelness of the stage is within the level deviation threshold specifically includes:

[0034] Obtain the actual center location information of the wafer;

[0035] Based on the actual position information of the wafer center and the preset wafer center reference position, the offset information of the actual position of the wafer center relative to the preset wafer center reference position is obtained.

[0036] Based on the offset information, the wafer is moved to the target position.

[0037] For example, obtaining the actual center location information of the wafer specifically includes:

[0038] Acquire images of the four edges of the wafer;

[0039] Based on the images of the wafer's four edges acquired by the image acquisition module, a wafer outline image is generated, and the outline image is analyzed to determine the actual location of the wafer's center.

[0040] Thirdly, this disclosure also provides a wafer inspection device, including a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to implement the steps of the method described above.

[0041] The beneficial effects of the embodiments disclosed herein are as follows:

[0042] In the above scheme, after the wafer is placed on the stage, its actual position on the stage can be detected and compared with preset target position information to determine whether the wafer is currently within a position offset threshold. If the wafer is not within the position offset threshold, the levelness of the stage is first detected to determine whether it is within a horizontal deviation threshold. If the levelness of the stage is within the horizontal deviation threshold, the wafer position is then precisely calibrated to move the wafer to the target position. This achieves automatic wafer position calibration, avoiding problems caused by abnormal wafer position, and eliminates the need to open the equipment chamber, preventing contamination of the wafer or the equipment chamber. Attached Figure Description

[0043] Figure 1 This is a top view of the wafer inspection apparatus provided in the embodiments of this disclosure;

[0044] Figure 2 This is a three-dimensional structural schematic diagram of the wafer inspection device provided in the embodiments of this disclosure;

[0045] Figure 3 This diagram illustrates the structure of the top column mechanism in an embodiment of this disclosure.

[0046] Figure 4This is a flowchart illustrating the wafer position calibration method in an embodiment of this disclosure. Detailed Implementation

[0047] To make the objectives, technical solutions, and advantages of the embodiments of this disclosure clearer, the technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this disclosure. All other embodiments obtained by those skilled in the art based on the described embodiments of this disclosure without creative effort are within the scope of protection of this disclosure.

[0048] Unless otherwise defined, the technical or scientific terms used in this disclosure shall have the ordinary meaning understood by one of ordinary skill in the art to which this disclosure pertains. The terms “first,” “second,” and similar terms used in this disclosure do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Similarly, the terms “an,” “a,” or “the,” and similar terms do not indicate a quantity limitation, but rather indicate the presence of at least one. The terms “including,” “comprising,” or “containing,” and similar terms mean that the element or object preceding the word encompasses the elements or objects listed following the word and their equivalents, without excluding other elements or objects. The terms “connected,” “linked,” or similar terms are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. The terms “upper,” “lower,” “left,” and “right,” etc., are used only to indicate relative positional relationships, and these relative positional relationships may change accordingly when the absolute position of the described objects changes.

[0049] The features such as "parallel," "perpendicular," and "identical" used in the embodiments of this disclosure include features in the strict sense of "parallel," "perpendicular," and "identical," as well as cases where "approximately parallel," "approximately perpendicular," and "approximately identical" include certain tolerances. Taking into account the measurement and the tolerances associated with the measurement of a specific quantity (e.g., limitations of the measurement system), they represent the acceptable deviation range for a specific value as determined by a person skilled in the art. For example, "approximately" can mean within one or more standard deviations, or within 3% or 5% of said value.

[0050] Furthermore, throughout this document, unless otherwise defined, the terms “substantially,” “essentially,” “approximately,” and “about” are used to describe and explain small variations. When used with an event or situation, these terms can cover situations where the event or situation occurs precisely or approximately. For example, when used with a numerical value, these terms can include a range of variation of the numerical value less than or equal to 10%, such as less than or equal to ±5%, less than or equal to ±4%, less than or equal to ±3%, less than or equal to ±2%, less than or equal to ±1%, less than or equal to ±0.5%, less than or equal to ±0.1%, or less than or equal to ±0.05%. The term “substantially coplanar” can refer to two surfaces arranged along the same plane within a micrometer range, for example, within 40 μm, 30 μm, 20 μm, 10 μm, or 1 μm.

[0051] This disclosure provides a wafer position calibration system for calibrating the position of a wafer on a wafer stage. For example, the wafer position calibration system can be applied to a wafer inspection device to calibrate the position of the wafer on the stage within the device. However, it is not limited to this. The wafer position calibration system can also be applied to any other suitable wafer processing equipment.

[0052] like Figure 1 and Figure 2 As shown, the wafer position calibration system provided in this embodiment includes:

[0053] The position detection unit 100 is used to detect the actual position information of the wafer 20 on the stage 10;

[0054] A levelness detection unit 200 is used to detect the levelness of the platform 10.

[0055] Wafer calibration unit 300 is used to calibrate the position of the wafer 20; and

[0056] The control unit is configured to determine whether the current position of the wafer 20 is within a position offset threshold based on the actual position information and the preset target position information. When the current position of the wafer 20 is not within the position offset threshold, the control unit controls the levelness detection unit 200 to perform levelness detection on the stage 10 and determine whether the levelness of the stage 10 is within a level deviation threshold. When the levelness of the stage 10 is within the level deviation threshold, the control unit controls the wafer calibration unit 300 to calibrate the position of the wafer 20 so as to move the wafer 20 to the target position.

[0057] In the above scheme, after placing the wafer 20 on the stage 10, the actual position information of the wafer 20 on the stage 10 can be detected, and the actual position information of the wafer 20 can be compared with the preset target position information to determine whether the wafer 20 is currently within the position offset threshold. If the wafer 20 is not within the position offset threshold, the levelness of the stage 10 is first detected to determine whether the levelness of the stage 10 is within the level deviation threshold. If the levelness of the stage 10 is within the level deviation threshold, the position of the wafer 20 is then precisely calibrated to move the wafer 20 to the target position. In this way, the position of the wafer 20 can be automatically calibrated, avoiding problems caused by abnormal wafer 20 position, and without opening the equipment chamber, avoiding contamination of the wafer 20 or the equipment chamber.

[0058] In some exemplary embodiments, the system further includes a platform leveling adjustment unit 400 for adjusting the levelness of the platform 10; wherein the control unit is also connected to the platform leveling adjustment unit 400, and the control unit is used to control the platform leveling adjustment unit 400 to adjust the levelness of the platform 10 when the levelness of the platform 10 exceeds the level deviation threshold, until the levelness of the platform 10 is within the level deviation threshold.

[0059] Using the above scheme, when wafer 20 is detected to be out of position, the levelness of stage 10 is first checked to see if it is within the horizontal deviation threshold. If the levelness of stage 10 is not within the horizontal deviation threshold, the levelness of stage 10 is adjusted until it reaches the horizontal deviation threshold. Thus, after the levelness of stage 10 is adjusted to the horizontal deviation threshold, the position of wafer 20 is calibrated. This eliminates the possibility of abnormal wafer 20 position due to excessive levelness deviation of stage 10, avoids calibration failure due to levelness issues of stage 10, reduces the probability of failure, and allows for simultaneous adjustment of the levelness of wafer 20 by adjusting the levelness of stage 10. The stage levelness adjustment unit 400 can be implemented using a known stage 10 levelness adjustment structure, and is not limited thereto.

[0060] In some exemplary embodiments, such as Figure 1 As shown, the position detection unit 100 includes a plurality of first distance sensors 101 and a plurality of second distance sensors 102.

[0061] The first distance sensor 101 may be disposed on the bearing surface of the stage 10, and a plurality of the first distance sensors 101 are arranged sequentially at intervals along the circumference of the bearing surface of the stage 10, and the first distance sensors 101 are located on the periphery of the wafer 20, and the distance between the first distance sensor 101 and the center position of the stage 10 is greater than the radius of the wafer 20.

[0062] For example, the stage 10 is provided with grippers 11 for holding and fixing the wafer 20, and the first distance sensor 101 may be disposed adjacent to the grippers 11. The first distance sensor 101 is used to acquire first distance data between the wafer 20 and the first distance sensor 101 in the radial direction of the wafer 20.

[0063] For example, the first distance sensor 101 can be an ultrasonic sensor, which can obtain distance data between the wafer 20 and the edge of the wafer 20 in the radial direction by sending ultrasonic waves to the edge of the wafer 20.

[0064] The second distance sensor 102 may be disposed on the bearing surface of the stage 10, and a plurality of the second distance sensors 102 are arranged sequentially at intervals along the circumference of the bearing surface of the stage 10, and the distance between the second distance sensor 102 and the center position of the stage 10 is less than the radius of the wafer 20. The first distance sensor 101 is used to detect the distance data between the wafer 20 and the first distance sensor 101 in the direction perpendicular to the bearing surface.

[0065] For example, the first distance sensor 101 can be an ultrasonic sensor, which sends ultrasonic waves to the bottom surface of the wafer 20 to obtain distance data between the sensor and the bottom surface of the wafer 20 in a direction perpendicular to the bearing surface.

[0066] The control unit is specifically used to obtain the actual position information of the wafer 20 on the stage 10 based on the first distance data and the second distance data.

[0067] Specifically, the position of the wafer 20 in the direction parallel to the bearing surface can be calculated from the distance data acquired by the plurality of first distance sensors 101; the levelness of the wafer 20 can be calculated from the distance data acquired by the plurality of second distance sensors 102.

[0068] It should be noted that in the above scheme, the position of the wafer 20 on the stage 10 can be allowed to have a certain offset relative to the target position. This offset is the position offset threshold. When the offset of the wafer 20 relative to the target position is within the position offset threshold, the next operation can continue, and the wafer 20 can be clamped and fixed by the grippers for subsequent testing.

[0069] Therefore, the position detection unit 100 can use a plurality of first distance sensors 101 and a plurality of second distance sensors 102 disposed on the stage 10 to perform preliminary detection of the position of the wafer 20. This preliminary detection does not require precise detection of the offset of the wafer 20; it only needs to preliminarily determine that the offset of the wafer 20 relative to the target position is too large and exceeds the allowable position offset threshold. It should be noted that the specific implementation of the position detection unit 100 is not limited to this.

[0070] When the wafer 20 detection unit detects that the wafer 20 is currently outside the allowable position offset range, the levelness detection unit 200 determines whether the levelness of the stage 10 is within the allowable level deviation threshold. When the levelness of the stage 10 is within the allowable level deviation threshold, the wafer calibration unit 300 is used to accurately detect the position of the wafer 20 in order to accurately calculate the offset state of the actual position of the wafer 20 relative to the target position.

[0071] In some exemplary embodiments, such as Figure 1 and Figure 2 As shown, the wafer calibration unit 300 includes:

[0072] The acquisition module 310 is used to acquire the actual center position information of the wafer 20;

[0073] Wafer moving module 320, used to move the wafer 20;

[0074] The control unit is also connected to the acquisition module 310 and the wafer moving module 320. The control unit is also used to compare the actual center position information of the wafer 20 with the preset center reference position of the wafer 20 to obtain the offset information of the actual center position of the wafer 20 relative to the preset center reference position of the wafer 20; and based on the offset information, control the wafer moving module 320 to move the wafer 20 to the target position.

[0075] In the above scheme, the accurate offset of wafer 20 can be accurately calculated by using the actual center position of wafer 20 and the center reference position of wafer 20.

[0076] For example, the acquisition module 310 includes: an image acquisition module disposed on the stage 10, used to acquire images of the four edges of the wafer 20; wherein, the control unit is specifically used to generate a contour image of the wafer 20 based on the images of the four edges of the wafer 20 acquired by the image acquisition module, and to analyze the contour image to determine the actual position of the center of the wafer 20.

[0077] In the above scheme, the image acquisition module can be a camera located at the center of the bearing surface of the stage 10. The camera is configured to rotate at least along the circumferential direction of the wafer 20 to scan and obtain images of the four edges of the wafer 20. The image processing module can stitch together the images of the four edges of the wafer 20 obtained by the image acquisition module to obtain the outline image of the entire wafer 20. In this way, the actual position information of the center of the wafer 20 can be accurately obtained based on the outline image of the wafer 20.

[0078] It should be noted that the camera needs to scan the edge of the wafer 20, therefore, the camera can be configured to rotate at least along the circumferential direction of the wafer 20.

[0079] Furthermore, the camera can also be configured to utilize structures such as gimbals to achieve multi-directional rotation scanning for panoramic shooting. The specific installation method of the camera is not limited here.

[0080] Furthermore, in some exemplary embodiments, such as Figure 3 As shown, the wafer moving module 320 includes:

[0081] The top column mechanism 321 includes a base and a top column connected to the base. The base is located below the platform 10. The top column can pass through the platform 10 and move up and down relative to the platform 10 in a direction perpendicular to the platform 10.

[0082] A lifting mechanism, connected to the base, is configured to lift the top column mechanism 321 in a direction perpendicular to the platform 10;

[0083] A translation mechanism is connected to the base and is configured to translate the top column mechanism 321 in a direction that is horizontal to the platform 10;

[0084] A drive mechanism, connected to the translation mechanism, is used to drive the translation mechanism and the lifting mechanism to move the top column mechanism 321 based on the calibration stroke parameters.

[0085] The control unit is specifically used to calculate the calibration stroke parameters of the wafer 20 based on the offset information, and to control the wafer moving module 320 to move the wafer 20 to the target position based on the calibration stroke parameters.

[0086] In the above scheme, a base is provided below the platform 10, the base is connected to the lifting mechanism, and a top column mechanism 321 that can pass through the platform 10 is provided in the platform 10, so that the top column mechanism 321 can protrude out of or retract into the platform 10, and the base of the top column mechanism 321 is also connected to the translation mechanism, so that the translation of the top column mechanism 321 can be realized.

[0087] When the position of wafer 20 needs to be calibrated, the lifting mechanism is driven to raise the top column mechanism 321 and make it protrude from the stage 10 to lift the wafer 20. After the wafer 20 is lifted, the translation mechanism is controlled to move the wafer 20 to the target position based on the offset information. Then, the lifting mechanism is driven to lower the top column mechanism 321 so that the wafer 20 is supported on the stage 10.

[0088] The specific construction of the lifting mechanism and the translation mechanism is not limited here. For example, the lifting mechanism can be implemented by a cylinder or the translation mechanism can be implemented by a lead screw or the like.

[0089] Furthermore, in some exemplary embodiments, such as Figure 3 As shown, the top of the top column mechanism 321 is a support end for supporting the wafer 20, and the support end is provided with an electrostatic chuck 3211 and an anti-slip component 3212.

[0090] The electrostatic chuck 3211 can adsorb and fix the wafer 20, and a plurality of connecting posts 3213 are provided on the electrostatic adsorption surface of the electrostatic chuck 3211. The plurality of connecting posts 3213 are distributed sequentially at intervals along the circumference of the electrostatic adsorption surface. The anti-slip component 3212 is annular and is connected to the top of the plurality of connecting posts 3213.

[0091] In this way, not only can the electrostatic chuck 3211 be used to adsorb and fix the wafer 20, but the anti-slip component 3212 can also be used to support the wafer 20, and friction can be used to prevent the wafer 20 from slipping or shifting.

[0092] The anti-slip component 3212 may include, but is not limited to, rubber rings.

[0093] In addition, please see Figure 4 As shown in the embodiments of this disclosure, a wafer position calibration method is also provided, which includes the following steps:

[0094] Step S01: Detect the actual position information of the wafer 20 on the stage 10;

[0095] Step S02: Based on the actual position information and the preset target position information, determine whether the wafer 20 is currently within the position offset threshold.

[0096] Step S03: When the wafer 20 is not currently within the position offset threshold, the level of the stage 10 is detected to determine whether the level of the stage 10 is within the level deviation threshold.

[0097] Step S04: When the levelness of the stage 10 is within the level deviation threshold, the position of the wafer 20 is calibrated.

[0098] In the above scheme, after placing the wafer 20 on the stage 10, the actual position information of the wafer 20 on the stage 10 can be detected, and the actual position information of the wafer 20 can be compared with the preset target position information to determine whether the wafer 20 is currently within the position offset threshold. If the wafer 20 is not within the position offset threshold, the levelness of the stage 10 is first detected to determine whether the levelness of the stage 10 is within the level deviation threshold. If the levelness of the stage 10 is within the level deviation threshold, the position of the wafer 20 is then precisely calibrated to move the wafer 20 to the target position. In this way, the position of the wafer 20 can be automatically calibrated, avoiding problems caused by abnormal wafer 20 position, and without opening the equipment chamber, avoiding contamination of the wafer 20 or the equipment chamber.

[0099] For example, the wafer position calibration method provided in this disclosure further includes the following steps:

[0100] Step S05: When the level of the platform 10 is not within the level deviation threshold, the level of the platform 10 is adjusted until the level of the platform 10 is detected to be within the level deviation threshold, thus completing the calibration of the level of the platform 10.

[0101] Using the above scheme, when wafer 20 is detected to be out of position, the levelness of stage 10 is first checked to see if it is within the horizontal deviation threshold. If the levelness of stage 10 is not within the horizontal deviation threshold, the levelness of stage 10 is adjusted until it reaches the horizontal deviation threshold. Thus, after the levelness of stage 10 is adjusted to the horizontal deviation threshold, the position of wafer 20 is calibrated. This eliminates the possibility of abnormal wafer 20 position due to excessive levelness deviation of stage 10, avoids calibration failure due to levelness issues of stage 10, reduces the probability of failure, and allows for simultaneous adjustment of the levelness of wafer 20 by adjusting the levelness of stage 10. The stage levelness adjustment unit 400 can be implemented using a known stage 10 levelness adjustment structure, and is not limited thereto.

[0102] In the above scheme, the position of wafer 20 on the stage 10 can be allowed to have a certain offset relative to the target position; this offset is the position offset threshold. When the offset of wafer 20 relative to the target position is within this position offset threshold, the next operation can proceed, and subsequent detection can be performed by clamping and fixing wafer 20 with grippers. Therefore, the position detection unit 100 can use a plurality of first distance sensors 101 and a plurality of second distance sensors 102 provided on the stage 10 to perform preliminary detection of the position of wafer 20. This preliminary detection does not require precise detection of the offset of wafer 20; it only needs to preliminarily determine that the offset of wafer 20 relative to the target position is too large and exceeds the allowable position offset threshold. It should be noted that the specific implementation of the position detection unit 100 is not limited to this.

[0103] When the wafer 20 detection unit detects that the wafer 20 is currently outside the allowable position offset range, the levelness detection unit 200 determines whether the levelness of the stage 10 is within the allowable level deviation threshold. When the levelness of the stage 10 is within the allowable level deviation threshold, the wafer calibration unit 300 is used to accurately detect the position of the wafer 20 in order to accurately calculate the offset state of the actual position of the wafer 20 relative to the target position.

[0104] Specifically, step S04 above includes:

[0105] Step S041: Obtain the actual center position information of wafer 20;

[0106] Step S042: Based on the actual center position information of wafer 20 and the preset center reference position of wafer 20, obtain the offset information of the actual center position of wafer 20 relative to the preset center reference position of wafer 20.

[0107] Step S043: Based on the offset information, move the wafer 20 to the target position.

[0108] In the above scheme, the accurate offset of wafer 20 can be accurately calculated by using the actual center position of wafer 20 and the center reference position of wafer 20.

[0109] For example, step S041 specifically includes:

[0110] Acquire images of the four edges of wafer 20;

[0111] Based on the images of the four edges of the wafer 20 acquired by the image acquisition module, a contour image of the wafer 20 is generated, and the contour image is analyzed to determine the actual position of the center of the wafer 20.

[0112] In the above scheme, the images of the four edges of the wafer 20 obtained by the image acquisition module can be stitched together to obtain the outline image of the entire wafer 20. In this way, the actual position information of the center of the wafer 20 can be accurately obtained based on the outline image of the wafer 20.

[0113] Furthermore, it should be noted that, in the method of this embodiment, after step S04 above, the following steps may also be included:

[0114] Step S06: After calibrating the position of the wafer 20, the wafer 20 is fixed by the grippers for testing;

[0115] Step S07: After the inspection is completed, repeat steps S01 to S05 above to calibrate the position of wafer 20 in order to avoid operation failure when the robot arm takes out wafer 20.

[0116] Furthermore, this disclosure also provides a wafer inspection device, including a memory and a processor. The memory stores a computer program, and the processor executes the computer program to implement the steps of the method described above. Because the above-described wafer inspection device can implement the methods described above when its processor executes the computer program, it can also automatically complete the wafer position calibration without opening the device chamber, thus avoiding chamber or wafer contamination.

[0117] In one embodiment, this disclosure also provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the steps in the above method embodiments.

[0118] The aforementioned computer-readable storage medium, since the computer program stored in its memory is executed by the processor to implement the steps in the above method embodiments, similarly, can automatically complete the wafer position calibration without opening the device chamber for operation, thus avoiding chamber or wafer contamination.

[0119] Those skilled in the art will understand that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The computer program can be stored in a non-volatile computer-readable storage medium, and when executed, it can include the processes of the embodiments of the methods described above. Any references to memory, storage, databases, or other media used in the embodiments provided in this application can include at least one of non-volatile and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, or optical storage, etc. Volatile memory can include random access memory (RAM) or external cache memory. By way of illustration and not limitation, RAM can be in various forms, such as static random access memory (SRAM) or dynamic random access memory (DRAM), etc.

[0120] The following points need to be explained:

[0121] (1) The accompanying drawings of the embodiments of this disclosure only involve the structures involved in the embodiments of this disclosure. Other structures can be referred to the general design.

[0122] (2) For clarity, the thickness of layers or regions is enlarged or reduced in the drawings used to describe embodiments of the present disclosure, i.e., these drawings are not drawn to actual scale. It will be understood that when an element such as a layer, film, region or substrate is referred to as being “above” or “below” another element, the element may be “directly” located “above” or “below” the other element or there may be intermediate elements.

[0123] (3) Where there is no conflict, the embodiments of this disclosure and the features in the embodiments can be combined with each other to obtain new embodiments.

[0124] The above are merely specific embodiments of this disclosure, but the scope of protection of this disclosure is not limited thereto. The scope of protection of this disclosure shall be determined by the scope of the claims.

Claims

1. A wafer position calibration system, characterized in that, include: The position detection unit is used to detect the actual position information of the wafer on the stage; A levelness detection unit is used to detect the levelness of the platform. A wafer calibration unit is used to calibrate the position of the wafer; and The control unit is configured to determine whether the current position of the wafer is within a position offset threshold based on the actual position information and the preset target position information; and when the current position of the wafer is not within the position offset threshold, control the levelness detection unit to perform levelness detection on the stage and determine whether the levelness of the stage is within a level deviation threshold; and when the levelness of the stage is within the level deviation threshold, control the wafer calibration unit to calibrate the position of the wafer to move the wafer to the target position. The wafer calibration unit includes: The acquisition module is used to acquire the actual location information of the center of the wafer; A wafer moving module is used to move the wafer; the control unit is also connected to the acquisition module and the wafer moving module, and the control unit is also used to obtain the offset information of the actual center position of the wafer relative to the preset wafer center reference position based on the actual center position information of the wafer and the preset wafer center reference position; and based on the offset information, control the wafer moving module to move the wafer to the target position; The wafer moving module includes a top column mechanism, which includes a base and a top column connected to the base. The base is located below the stage, and the top column can pass through the stage and move up and down relative to the stage in a direction perpendicular to the stage. The top end of the top column mechanism is a support end for supporting the wafer. The support end is provided with an electrostatic chuck and an anti-slip component. The electrostatic chuck has a plurality of connecting columns on its electrostatic adsorption surface, which are distributed sequentially at intervals along the circumference of the electrostatic adsorption surface. The anti-slip component is annular and connected to the top of the plurality of connecting columns.

2. The wafer position calibration system according to claim 1, characterized in that, The wafer moving module also includes: A lifting mechanism, connected to the base, is configured to lift the top column mechanism in a direction perpendicular to the platform. A translation mechanism, which is connected to the base and configured to translate the top column mechanism in a direction that is horizontal to the platform; A drive mechanism, connected to the translation mechanism, is used to drive the translation mechanism and the lifting mechanism to move the top column mechanism based on calibration stroke parameters; The control unit is specifically used to calculate the wafer calibration stroke parameters based on the offset information, and to control the wafer moving module to move the wafer to the target position based on the calibration stroke parameters.

3. The wafer position calibration system according to claim 1, characterized in that, The acquisition module includes: an image acquisition module, disposed on the platform, for acquiring images of the edges around the wafer; The control unit is specifically used to generate a wafer outline image based on the images of the wafer's four edges acquired by the image acquisition module, and to analyze the outline image to determine the actual position of the wafer's center.

4. The wafer position calibration system according to claim 3, characterized in that, The image acquisition module includes a camera located at the center of the bearing surface of the stage. The camera is configured to rotate at least along the circumferential direction of the wafer to scan and obtain images of the four edges of the wafer.

5. The wafer position calibration system according to claim 1, characterized in that, The system further includes a platform leveling adjustment unit for adjusting the levelness of the platform; wherein the control unit is also connected to the platform leveling adjustment unit, and the control unit is used to control the platform leveling adjustment unit to adjust the levelness of the platform when the levelness of the platform exceeds the level deviation threshold, until the levelness of the platform is within the level deviation threshold.

6. The wafer position calibration system according to claim 1, characterized in that, The position detection unit includes: A plurality of first distance sensors are disposed on the bearing surface of the stage, and the plurality of first distance sensors are arranged sequentially at intervals along the circumference of the bearing surface of the stage. The first distance sensors are used to acquire first distance data between the wafer and the first distance sensor in the radial direction of the wafer. A plurality of second distance sensors are disposed on the bearing surface of the stage, and the plurality of second distance sensors are arranged sequentially at intervals along the circumference of the bearing surface of the stage. The second distance sensors are used to acquire second distance data between the wafer and the second distance sensor in a direction perpendicular to the bearing surface. The control unit is specifically used to obtain the actual position information of the wafer on the stage based on the first distance data and the second distance data.

7. A wafer position calibration method, characterized in that, The method, applied to the wafer position calibration system as described in any one of claims 1 to 6, comprises: Detect the actual position information of the wafer on the stage; Based on the actual location information and the preset target location information, determine whether the wafer is currently within the location offset threshold; When the wafer is not currently at the position offset threshold, the levelness of the stage is detected to determine whether the levelness of the stage is within the level deviation threshold. When the levelness of the stage is within the horizontal deviation threshold, the wafer position is calibrated to move the wafer to the target position.

8. The wafer position calibration method according to claim 7, characterized in that, The step of calibrating the wafer position when the levelness of the stage is within the level deviation threshold specifically includes: Obtain the actual center location information of the wafer; Based on the actual position information of the wafer center and the preset wafer center reference position, the offset information of the actual position of the wafer center relative to the preset wafer center reference position is obtained. Based on the offset information, the wafer is moved to the target position.

9. The wafer position calibration method according to claim 8, characterized in that, The acquisition of the actual center location information of the wafer specifically includes: Acquire images of the four edges of the wafer; Based on the images of the four edges of the acquired wafer, a contour image of the wafer is generated, and the contour image is analyzed to determine the actual position of the center of the wafer.

10. A wafer inspection device, comprising a memory and a processor, wherein the memory stores a computer program, characterized in that, When the processor executes the computer program, it implements the steps of the method according to any one of claims 7 to 9.

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