Integrated circuit, decoding circuit, and method for operating in integrated circuit

Abstract

The invention provides an integrated circuit which comprises a one-time programmable memory, a plurality of functional circuits and a decoding circuit, and the decoding circuit executes the following operations: reading a bit set of a plurality of bits from the one-time programmable memory; a first design configuration is determined from a plurality of design configurations based on a subset of the set of bits, each of the plurality of design configurations corresponding to a usage scenario of the integrated circuit, and a respective rule is set for specifying that a respective function is to be implemented based on one or more of the plurality of functional circuits. Using methods of the remaining bits in the corresponding bit set; and controlling a group of functional circuits in the plurality of functional circuits to implement a first group of functions indicated by the remaining bits in the bit set according to a rule corresponding to the first design configuration. According to the invention, the number of data bits can be effectively increased without increasing the area of the wafer. The invention also provides a decoding circuit and a method for operating in an integrated circuit.

Description

[0001] Priority declaration

[0002] This patent application is related to and claims priority to an Indian provisional patent application entitled “ELECTRONIC FUSE MULTIPLEXING”, filed on June 25, 2024 with serial number 202441048734 and agent file number AURA-362-INPR. This patent application incorporates the entire contents of the Indian provisional patent application, but only insofar as it does not conflict with the description herein. Technical Field

[0003] The present application relates to the technical field of integrated circuit design, and more particularly to an integrated circuit (IC), a decoding circuit, and a method operating on the IC. Background Art

[0004] The design life cycle of the semiconductor industry usually includes using various computer-aided design (CAD) tools to design the required circuit, generate masks for the designed circuit, and send the masks to the manufacturing plant for production. As we all know, many integrated circuits are manufactured based on the same mask. Usually, the cost of redesigning and further manufacturing any required circuit is very high.

[0005] As a result, the integrated circuits so manufactured may be used in different ways in different scenarios. For example, some parts of the designed circuit may need to be operated in a specific way (e.g., enabled or disabled) for testing, while other parts may need to be operated differently during production. In addition, different customers may have different requirements for their specific uses (e.g., sampling of the manufactured integrated circuits).

[0006] Therefore, each manufactured integrated circuit may need to be configured to meet the requirements of its corresponding usage scenario. This configuration takes effect when the integrated circuit is powered on. Therefore, the integrated circuit is considered to have the corresponding design configuration.

[0007] One-time programmable (OTP) memory is usually used to set the design configuration applicable to each integrated circuit manufactured. Usually, different values ​​of different bits are combined to represent the corresponding design configuration.

[0008] The present application relates to one-time programmable memory that supports integrated circuits manufactured in different design configurations. Summary of the invention

[0009] In view of this, it is necessary to provide an integrated circuit, a decoding circuit, and a method operating on the integrated circuit.

[0010] In a first aspect, an embodiment of the present application provides an integrated circuit, comprising a one-time programmable memory, multiple functional circuits, and a decoding circuit, wherein the one-time programmable memory is used to store multiple bits; the decoding circuit performs the following operations: reading a bit set among the multiple bits from the one-time programmable memory; determining a first design configuration from multiple design configurations based on a subset of the bit set, each of the multiple design configurations corresponding to a usage scenario of the integrated circuit, and setting a corresponding rule, wherein the rule is used to specify a method for using the remaining bits in the corresponding bit set when one or more of the multiple functional circuits are to implement corresponding functions; and according to the rule corresponding to the first design configuration, controlling a group of functional circuits among the multiple functional circuits to implement a first group of functions indicated by the remaining bits in the bit set.

[0011] In a second aspect, an embodiment of the present application provides a decoding circuit, which is arranged in an integrated circuit, and the decoding circuit is used to perform the following operations: read a bit set among multiple bits from a one-time programmable memory of the integrated circuit; determine a first design configuration from multiple design configurations based on a subset of the bit set, each of the multiple design configurations corresponds to a usage scenario of the integrated circuit, and set a corresponding rule, wherein the rule is used to specify a method for using the remaining bits in the corresponding bit set when one or more of the multiple functional circuits based on the integrated circuit are to implement corresponding functions; and according to the rule corresponding to the first design configuration, control a group of functional circuits among the multiple functional circuits to implement a first group of functions indicated by the remaining bits in the bit set.

[0012] In a third aspect, an embodiment of the present application provides a method running on an integrated circuit, the method comprising: reading a bit set among multiple bits from a one-time programmable memory of the integrated circuit; determining a first design configuration from multiple design configurations based on a subset of the bit set, each of the multiple design configurations corresponding to a usage scenario of the integrated circuit, and setting a corresponding rule, the rule being used to specify a method for using the remaining bits in the corresponding bit set when one or more of the multiple functional circuits are to implement corresponding functions; and according to the rule corresponding to the first design configuration, controlling a group of functional circuits among the multiple functional circuits to implement a first group of functions indicated by the remaining bits in the bit set.

[0013] In the above-mentioned integrated circuit, decoding circuit, and method running on the integrated circuit provided by the embodiments of the present application, the one-time programmable memory can be appropriately burned, set, fused, etc. according to the specific usage scenarios of each integrated circuit. Without increasing the chip area, different functions can be achieved by reusing the existing bits in the one-time programmable memory without physically increasing the number of bits in the one-time programmable memory, thereby effectively increasing the number of data bits. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] The embodiments of the present application will be described in conjunction with the following drawings.

[0015] Figure 1A It is a block diagram of an integrated circuit in the prior art.

[0016] Figure 1B It is a block diagram of the operation mode of a controller based on a one-time programmable memory in the prior art.

[0017] Figure 2 A block diagram of an integrated circuit provided in accordance with an embodiment of the present application.

[0018] Figure 3 A flowchart for implementing a one-time programmable memory supporting integrated circuits with different design configurations provided in an embodiment of the present application.

[0019] Figure 4 A table is provided for an embodiment of the present application, which shows an implementation manner of a one-time programmable memory supporting integrated circuits with different design configurations.

[0020] In the drawings, like reference numerals generally indicate like, functionally similar and / or structurally similar elements. In the drawings, the first appearance of an element is indicated by the leftmost digit (or digit combination) of the corresponding reference numeral. DETAILED DESCRIPTION

[0021] 1. Overview

[0022] The present application provides a (manufactured) integrated circuit. The integrated circuit includes a one-time programmable memory, multiple functional circuits, and a decoding circuit. Among them, the one-time programmable memory is used to store multiple bits (multi-bit data). The decoding circuit can read a bit set (i.e., a set of bit data) from the one-time programmable memory, and determine a first design configuration (a specific design configuration) from multiple design configurations based on a subset of the bit set, each of the multiple design configurations corresponds to a usage scenario of the integrated circuit, and a corresponding rule is set, which is used to specify the use method of the remaining bits in the corresponding bit set when one or more functional circuits in the multiple functional circuits are to implement the corresponding functions. Then, the decoding circuit controls a group of functional circuits in the multiple functional circuits according to the rules corresponding to the first design configuration to implement the first group of functions indicated by the remaining bits in the bit set.

[0023] Therefore, in a first design configuration (applicable to one usage scenario), the remaining bits of the bit set are used according to one rule, and then in a second design configuration (applicable to another usage scenario), the same remaining bits are reused according to another rule.

[0024] In the present application, when a subset of a bit set is equal to a first value, a first bit set of the remaining bits in the bit set is used to indicate whether to enable a first functional circuit among multiple functional circuits. If the first bit set indicates that the first functional circuit is to be enabled, the decoding circuit enables the first functional circuit accordingly; otherwise, the decoding circuit does not enable the first functional circuit. In one embodiment, the subset of the bit set is equal to the first value, which is used to indicate that the use scenario of the integrated circuit is a test scenario.

[0025] In some other embodiments of the present application, when a subset of the bit set is equal to a second value, a second bit set (a second group of bit data) of the remaining bits in the bit set is used to indicate an operating frequency of a second functional circuit among the plurality of functional circuits. The decoding circuit accordingly configures the second functional circuit to operate at the operating frequency.

[0026] In one embodiment of the present application, if the second bit set is sent to the first client, the second bit set is set to the first value, and if the second bit set is sent to the second client, the second bit set is set to the second value. This is done to enable the second functional circuit to operate at the first frequency for the first client to meet the needs of the first client, and to operate at the second frequency for the second client to meet the needs of the second client. Therefore, a subset of the bit set is equal to the second value, which is used to indicate that the use scenario of the integrated circuit is a client sampling scenario.

[0027] In some other embodiments of the present application, when the subset is equal to the third value, a third bit set (third group of bit data) of the remaining bits in the bit set is used to represent an identifier of a chip or wafer used when manufacturing the integrated circuit. In one embodiment, the subset is equal to the third value, which is used to indicate that the use scenario of the integrated circuit is a production scenario.

[0028] The present application will be described below in conjunction with a plurality of embodiments. However, it should be clear to those skilled in the art that the present application may be implemented by omitting one or more specific features or by other methods, components, materials, etc. In other embodiments, known structures, materials, or operations are not described in detail one by one to simplify the features of the present application. In addition, although only some combinations are described here for the sake of brevity, the described features / aspects may be implemented in various combinations.

[0029] 2. Existing System Embodiments

[0030] Figure 1A 1 is a block diagram of an integrated circuit in the prior art. The integrated circuit 100 includes functional circuits 110-1 to 110-N (N represents any natural number), a one-time programmable memory 120, and a controller 140. The functional circuit is marked with reference numeral 110. It is understood that the number of functional modules included in the integrated circuit 100 may be greater than 110-1. Figure 1A More or fewer functional modules may be shown.

[0031] In one embodiment, integrated circuit 100 is fabricated as a single unit. Figure 1A The connections between modules (not shown) are built on a substrate of semiconductor material (usually silicon). Typically, multiple integrated circuits are manufactured on the same substrate, which is usually called a wafer, and each integrated circuit is called a chip or die. Figure 1A Each module in .

[0032] Each of the functional circuits 110 represents a group of electronic components (e.g., transistors, diodes, resistors, capacitors, connectors, etc.) that work together to implement a certain function of the integrated circuit 100. Each functional circuit 110 (e.g., a processor or logic block) may implement a complex function or provide a specific operating function, such as an amplifier, a high-pass / low-pass filter, a voltage inverter, a voltage regulator, a voltage-controlled oscillator (VCO), an analog-to-digital converter (ADC), etc.

[0033] The one-time programmable memory 120 represents a memory containing one or more bits (usually 16 or 32 bits), each of which can only be set (programmed) to a desired value (0 or 1) and can only be set once. The one-time programmable memory 120 is usually programmed after the integrated circuit 100 is manufactured. Once the programming or burning is completed, the content (bit value) of the one-time programmable memory 120 cannot be changed, and its content remains after power is off. This is different from both read-only memory (ROM) and programmable read-only memory (PROM), the content of which is set during design or manufacturing, while the content of PROM can be modified multiple times after manufacturing. In one embodiment, the one-time programmable memory 120 is implemented by using an electronic fuse (eFuse) group well known in the art, where each electronic fuse represents a bit.

[0034] The controller 140 is a circuit for reading the contents of the one-time programmable memory 120 and controlling the operation of one or more functional circuits 110. The operation of the controller 140 will be described in detail below.

[0035] Figure 1B This is a block diagram of the operation mode of a controller based on a one-time programmable memory in the prior art, showing how the controller 140 works based on the one-time programmable memory 120. The one-time programmable memory 120 contains 32 bits. These bits are divided into one or more bit sets (0...5, 6...15, etc.). The controller 140 reads each bit set respectively and implements the corresponding function (one or more of F1 to F5) according to the value of each bit set.

[0036] Each of the functions F1 to F5 represents a desired behavior or function to be implemented by using one or more functional circuits 110. The desired behavior or function may include enabling or disabling a functional circuit, configuring a functional circuit to operate at a specific frequency, an identifier indicating the die or wafer used to manufacture the integrated circuit 100, etc. In general, the controller 140 sends one or more signals to the functional circuit 110 to implement the one or more desired functions (F1 to F5) represented by the contents of the one-time programmable memory 120.

[0037] It can be appreciated that the use of the one-time programmable memory described above can allow multiple configurations of the device (integrated circuit 100) to be programmed. The one-time programmable memory 120 allows a chip to support multiple platforms (each with a different design configuration) by programming a specific bit set for each platform, helps to save calibration information specific to each device, can be used to save any type of wafer version / identification, or wafer coordinate information, can be used to set the chip to test or debug mode, and set different configurations for production.

[0038] However, as chip complexity increases, in order to provide higher programming capabilities and options, the number of one-time programmable memory bits needs to be increased. Since each bit of the one-time programmable memory (i.e., eFuse unit) takes up space on the chip, the increase in the number of one-time programmable memory bits comes at the expense of chip area. In addition, as the programming capability requirements increase, the complexity of the controller 140 in implementation also increases to handle the additional wiring required for the enhanced programming capability.

[0039] The present application aims to use the existing bits in the one-time programmable memory 120 for different purposes or functions without increasing the chip area, thereby effectively increasing the number of bits. Specifically, as described in the background technology content, the present application relates to a one-time programmable memory that supports integrated circuits manufactured with different design configurations, which will be described below in conjunction with embodiments.

[0040] 3. Integrated circuit provided by this application

[0041] Figure 2 The block diagram of the integrated circuit provided by the embodiment of the present application. The integrated circuit 200 includes functional circuits 110-1 to 110-N (N represents any natural number), a one-time programmable memory 220, a controller 240, and a decoding circuit 250. It is understood that the number of functional modules included in the integrated circuit 200 can be more than Figure 2 More or fewer modules may be shown.

[0042] In the present application, the one-time programmable memory 220 is similar to the one-time programmable memory 120 except that it stores bits. The controller 240 is similar to the controller 140 and represents a circuit for reading the contents of the one-time programmable memory 220 and controlling the operation of one or more functional circuits 110.

[0043] The decoding circuit 250 provided in the present application facilitates reusing some existing bits in the one-time programmable memory 120 to achieve different purposes or functions, which will be specifically described by example below.

[0044] 4. One-time programmable memory that supports integrated circuits manufactured with different design configurations

[0045] Figure 3 An operation flow chart of a one-time programmable memory supporting the manufacture of integrated circuits with different design configurations provided in an embodiment of the present application. Figure 3 Only about Figure 2 Modules in the present invention, especially a flowchart of an embodiment of the decoding circuit 250. However, according to the contents disclosed in the present application, it is easy for those skilled in the art to see that many functions can also be implemented in other scenarios without departing from the scope and spirit of the present application.

[0046] In addition, it is obvious to those skilled in the art that the order in which some steps are executed may be different from the order described below in order to adapt to a specific scenario, and the present application covers many implementations. Figure 3 In the flowchart shown, when the process is executed, it directly jumps to step 310 after starting step 301.

[0047] In step 310, the decoding circuit 250 reads a bit set from the one-time programmable memory 220. To simplify the description, it is assumed that the bit set corresponds to all bits stored in the one-time programmable memory 220, although only some of the bits stored in the one-time programmable memory 220 can be used according to the functions of the example of the present application.

[0048] In step 330, the decoding circuit 250 determines the corresponding design configuration based on a subset of the bit set (hereinafter referred to as the "switch bit"). The switch bit can be one bit or multiple bits. Generally speaking, the number of bits in the switch bit is less than the number of bits in the bit set. Assuming that in one embodiment, a bit set of the one-time programmable memory contains only 8 bits, then the switch bit can be 1 bit of the 8 bits.

[0049] As described above, the integrated circuit 200 may need to operate under different design configurations. Each design configuration corresponds to a usage scenario of the integrated circuit 200 and sets a corresponding rule for specifying the usage of the corresponding remaining bits or remaining bit sets (in the above embodiment, the remaining bits in the bit set are 8-1=7 bits) when one or more of the multiple functional circuits are to implement corresponding functions.

[0050] In step 350, the decoding circuit 250 controls the functional circuit 110 to implement one or more functions indicated by the remaining bits (hereinafter referred to as "data bits") in the bit set according to the rules corresponding to the determined design configuration. Then, the control flow jumps to step 399, at which point the flow ends.

[0051] Therefore, the present application provides a one-time programmable memory that supports integrated circuits manufactured with different design configurations. Figure 3 The methods provided in each step will be described below with examples.

[0052] 5. Description of Examples

[0053] Figure 4 It is a table showing a one-time programmable memory provided by an embodiment of the present application, which supports integrated circuits manufactured with different design configurations. Specifically, table 400 shows a 32-bit one-time programmable memory, in which the role of the last 8 bits (data bits 24-31) depends on the values ​​represented by switch bits 22 and 23. Such a design may be ideal when multiple functions are required to pass through test / debugging scenarios, multiple client sampling (assuming there are two clients) scenarios, and production scenarios. Since each of these three scenarios requires a value to be set, a total of three values ​​need to be set, so 2 switch bits are selected to implement.

[0054] Column 421 indicates the electronic fuse or bit number in the one-time programmable memory 220. Row 440 corresponds to the values ​​of bits 0 to 21, which implement functions common to all design configurations (where applicable). Rows 451 and 452 indicate the values ​​of 2 switch bits (bits 22 and 23) under different design configurations (in the corresponding columns), while rows 453 to 460 indicate the values ​​of 8 data bits (bits 24 to 31) according to the rules of the corresponding design configuration (setting).

[0055] Each of the columns 422 to 425 sets the corresponding settings of the switch bit and the data bit. Among them, the 422nd column specifies setting 1, in which the value of the switch bit is set to 0 (bit "00"), and some data bits (e.g., bits 24 to 27) represent data corresponding to function 1 (e.g., whether to enable the functional circuit). Other data bits represent data corresponding to different functions 2. It can be understood that setting 1 may correspond to a test scenario, and the decoding circuit 250 enables or disables the functional circuit according to the data of bits 24 to 27.

[0056] Column 423 sets setting 2, where the value of the switch bit is set to 1 (bit "01"), and some data bits (e.g., bits 24 to 31) represent data corresponding to function 3 (e.g., the operating frequency of the functional circuit). It can be understood that setting 2 may correspond to a client sampling scenario, and the data bits represent the operating frequency of the voltage controlled oscillator (VCO, one of the functional circuits 110) when it is running. Accordingly, the decoding circuit 250 can configure the operating frequency of the VCO, for example, the decoding circuit 250 configures the VCO to run at a first frequency (8MHz) for the first client, and the decoding circuit 250 configures the VCO to run at a second frequency (10MHz) for the second client.

[0057] Column 424 specifies setting 3, where the value of the switch bit is set to 2 (bit "10"), and some data bits (e.g., bits 24 to 31) represent data corresponding to function 4. It is understood that setting 2 and setting 3 can also be used in client sampling scenarios. For example, setting 2 can be sent to the first client, so that data bits 24-31 are only valid for function 3; and setting 3 can be sent to the second client, so that data bits 24-31 are only valid for function 4.

[0058] Column 425 sets Setting 4, where the value of the switch bit is set to 3 (i.e., bit position "11"), and some data bits (e.g., bits 24 to 31) represent the identifier of the wafer or die used when manufacturing the integrated circuit. As is well known, the identifier of the wafer or die can be used to identify a specific integrated circuit when troubleshooting any problems in the manufacturing process. It is understandable that Setting 4 may correspond to a production scenario.

[0059] Thus, the decode circuit 250 can read the switch bit during power-up and determine how to process the data bits. In the above embodiment, if the switch bit is set to 3, the decode circuit 250 reads the identifier (ID) bits of the wafer or die and provides these bits when queried. If the value of the switch bit is set to other values, the decode circuit 250 reads the data bits and appropriately configures the functional circuit 110 to implement the desired function in the scenario or design configuration.

[0060] Therefore, multiple integrated circuits can be manufactured based on the same mask, and the one-time programmable memory can be properly burned, set, fused, etc. according to the specific usage scenarios of each integrated circuit. This goal is achieved by reusing bits (data bits) without physically increasing the number of bits in the one-time programmable memory.

[0061] 6. Conclusion

[0062] The "one embodiment", "an embodiment" or similar expressions mentioned in the specification means that a specific feature, structure or function related to the described embodiment is included in at least one embodiment of the present application. Therefore, "in one embodiment", "in an embodiment" and similar expressions appearing throughout the specification may but do not necessarily refer to the same embodiment.

[0063] Although in the illustrations, although the endpoints / nodes are shown as being directly connected (i.e., "connected to") to various other endpoints, it should be understood that there may be other components in the path (as appropriate to the particular circumstances), so that these connections can be considered to be "electrically coupled" to the same connected endpoints.

[0064] It should be understood that the specific types of transistors mentioned above (e.g., NMOS, PMOS, etc.) are only used as examples. However, for those skilled in the relevant art, by reading the public documents provided herein, alternative embodiments using different design configurations and transistors will be obvious. For example, an NMOS transistor can be replaced by a PMOS (P-type MOS) transistor, while the connections of the power supply and ground terminals are swapped accordingly.

[0065] Therefore, in this application, the power supply and ground terminals are referred to as constant reference potentials, the source (emitter) and drain (collector) of the transistor (providing a current path when the transistor is turned on and an open path when the transistor is turned off) are referred to as current terminals, and the gate (base) is referred to as the control terminal.

[0066] Although various embodiments of the present application have been described above, it should be understood that these embodiments are provided only as examples and are not intended to set limitations. Therefore, the breadth and scope of the present application should not be limited to the description of any specific embodiment above, but should be strictly defined in accordance with the claims and their equivalent principles.

[0067] In addition, the purpose of the abstract is to enable patent offices and the public, especially scientists, engineers and practitioners in the field who are not familiar with patent or legal terms or wording, to quickly determine the nature and key points of the application's technical disclosure through a quick glance. The abstract does not limit the scope of protection of the application in any way.

Claims

1. An integrated circuit, characterized in that: The integrated circuit comprises: One-time programmable memory for storing multiple bits; a plurality of functional circuits; and The decoding circuit performs the following operations: Reading a bit set of the plurality of bits from the one-time programmable memory; Determining a first design configuration from a plurality of design configurations based on a subset of the bit set, each of the plurality of design configurations corresponding to a usage scenario of the integrated circuit, and setting a corresponding rule, the rule being used to specify a method of using remaining bits in the corresponding bit set when one or more of the plurality of functional circuits are to implement a corresponding function; According to a rule corresponding to the first design configuration, a group of functional circuits among the plurality of functional circuits is controlled to implement a first group of functions indicated by the remaining bits in the bit set.

2. The integrated circuit according to claim 1, wherein: When the subset is equal to the first value, the first bit set of the remaining bits in the bit set is used to indicate whether to enable a first functional circuit among the multiple functional circuits; if the first bit set indicates that the first functional circuit is to be enabled, the decoding circuit enables the first functional circuit; otherwise, the first functional circuit is not enabled.

3. The integrated circuit according to claim 2, characterized in that The first value of the subset is used to indicate that the usage scenario of the integrated circuit is a test scenario.

4. The integrated circuit according to claim 2, wherein: When the subset is equal to a second value, a second bit set of remaining bits in the bit set is used to indicate an operating frequency of a second functional circuit among the plurality of functional circuits, and the decoding circuit configures the second functional circuit to operate at the operating frequency.

5. The integrated circuit according to claim 4, characterized in that If the second bit set is sent to a first client, the second bit set is set to a first value so that the second functional circuit runs at a first frequency for the first client; if the second bit set is sent to a second client, the second bit set is set to a second value so that the second functional circuit runs at a second frequency for the second client; the second value of the subset is used to indicate that the usage scenario of the integrated circuit is a client sampling scenario.

6. The integrated circuit according to claim 4, characterized in that When the subset is equal to a third value, a third bit set of the remaining bits in the bit set is used to represent an identifier of a chip or wafer used to manufacture the integrated circuit.

7. The integrated circuit according to claim 6, characterized in that The third value of the subset is used to indicate that the usage scenario of the integrated circuit is a production scenario.

8. A decoding circuit, characterized in that: The decoding circuit is arranged in an integrated circuit, and the decoding circuit is used to perform the following operations: reading a set of bits from a one-time programmable memory of the integrated circuit; Determine a first design configuration from a plurality of design configurations based on a subset of the bit set, each of the plurality of design configurations corresponding to a usage scenario of the integrated circuit, and set a corresponding rule, the rule being used to specify a method for using remaining bits in the corresponding bit set when one or more of the plurality of functional circuits based on the integrated circuit are to implement corresponding functions; According to a rule corresponding to the first design configuration, a group of functional circuits among the plurality of functional circuits is controlled to implement a first group of functions indicated by the remaining bits in the bit set.

9. The decoding circuit according to claim 8, characterized in that: When the subset is equal to the first value, the first bit set of the remaining bits in the bit set is used to indicate whether to enable a first functional circuit among the multiple functional circuits; if the first bit set indicates that the first functional circuit is to be enabled, the decoding circuit enables the first functional circuit; otherwise, the first functional circuit is not enabled.

10. The decoding circuit according to claim 9, characterized in that: The first value of the subset is used to indicate that the usage scenario of the integrated circuit is a test scenario.

11. The decoding circuit according to claim 9, characterized in that: When the subset is equal to a second value, a second bit set of remaining bits in the bit set is used to indicate an operating frequency of a second functional circuit among the plurality of functional circuits, and the decoding circuit configures the second functional circuit to operate at the operating power.

12. The decoding circuit according to claim 11, characterized in that: If the second bit set is sent to a first client, the second bit set is set to a first value so that the second functional circuit runs at a first frequency for the first client; if the second bit set is sent to a second client, the second bit set is set to a second value so that the second functional circuit runs at a second frequency for the second client; the second value of the subset is used to indicate that the usage scenario of the integrated circuit is a client sampling scenario.

13. The decoding circuit according to claim 11, characterized in that: When the subset is equal to a third value, a third bit set of the remaining bits in the bit set is used to represent an identifier of a chip or wafer used to manufacture the integrated circuit.

14. The decoding circuit according to claim 13, characterized in that: The third value of the subset is used to indicate that the usage scenario of the integrated circuit is a production scenario.

15. A method operating on an integrated circuit, characterized in that: The method comprises: reading a set of bits from a one-time programmable memory of the integrated circuit; Determining a first design configuration from a plurality of design configurations based on a subset of the bit set, each of the plurality of design configurations corresponding to a usage scenario of the integrated circuit, and setting a corresponding rule, the rule being used to specify a method of using remaining bits in the corresponding bit set when one or more of the plurality of functional circuits are to implement a corresponding function; According to a rule corresponding to the first design configuration, a group of functional circuits among the plurality of functional circuits is controlled to implement a first group of functions indicated by the remaining bits in the bit set.

16. The method according to claim 15, characterized in that When the subset is equal to the first value, the first bit set of the remaining bits in the bit set is used to indicate whether to enable a first functional circuit among the multiple functional circuits; if the first bit set indicates that the first functional circuit is to be enabled, the decoding circuit enables the first functional circuit; otherwise, the first functional circuit is not enabled.

17. The method according to claim 16, characterized in that The first value of the subset is used to indicate that the usage scenario of the integrated circuit is a test scenario.

18. The method according to claim 16, characterized in that When the subset is equal to a second value, a second bit set of remaining bits in the bit set is used to indicate an operating frequency of a second functional circuit among the plurality of functional circuits, and the decoding circuit configures the second functional circuit to operate at the operating frequency.

19. The method according to claim 18, characterized in that If the second bit set is sent to a first client, the second bit set is set to a first value so that the second functional circuit runs at a first frequency for the first client; if the second bit set is sent to a second client, the second bit set is set to a second value so that the second functional circuit runs at a second frequency for the second client; the second value of the subset is used to indicate that the usage scenario of the integrated circuit is a client sampling scenario.

20. The method of claim 18, wherein: When the subset is equal to the third value, the third bit set of the remaining bits in the bit set is used to represent an identifier of the chip or wafer used to manufacture the integrated circuit; the third value of the subset is used to indicate that the usage scenario of the integrated circuit is a production scenario.

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