Display device and its driving method

Abstract

This application provides a display device and its driving method. The display device includes: a plurality of pixel circuits arranged in an array, each pixel circuit being connected to a corresponding voltage line, the voltage line being used to write voltage into the connected pixel circuit; the refresh period of the pixel circuit includes a first time period and a second time period; the plurality of pixel circuits includes a first pixel circuit and a second pixel circuit, the first pixel circuit being connected to a first voltage line, and the second pixel circuit being connected to a second voltage line; when the refresh rates corresponding to the first pixel circuit and the second pixel circuit are different, the voltage of the first voltage line in the second time period is different from the voltage of the second voltage line in the second time period.

Description

Technical Field

[0001] This application relates to the field of display technology, and in particular to a display device and its driving method. Background Technology

[0002] Organic light-emitting diodes (OLEDs) and flat panel displays based on light-emitting diodes (LEDs) are widely used in various consumer electronics products such as mobile phones, televisions, laptops, and desktop computers due to their advantages such as high image quality, energy saving, thin body, and wide range of applications, becoming the mainstream of display devices.

[0003] However, the performance of current OLED display products still needs to be optimized. Summary of the Invention

[0004] In view of this, embodiments of this application provide a new display device and its driving method to at least partially solve the above-mentioned problems.

[0005] According to a first aspect of the present application, a display device is provided, comprising: a plurality of pixel circuits arranged in an array, each pixel circuit being connected to a corresponding voltage line, the voltage line being used to write voltage into the connected pixel circuit; the refresh period of the pixel circuit includes a first time period and a second time period; the plurality of pixel circuits includes a first pixel circuit and a second pixel circuit, the first pixel circuit being connected to a first voltage line and the second pixel circuit being connected to a second voltage line; when the refresh rates corresponding to the first pixel circuit and the second pixel circuit are different, the voltage of the first voltage line in the second time period is different from the voltage of the second voltage line in the second time period.

[0006] In some optional embodiments, the pixel circuit includes a write control module, a drive module, a light-emitting module, and a holding module; the voltage line is connected to the write control module, the write control module is connected to a first terminal of the drive module, the first terminal of the drive module is connected to a first power line, the second terminal of the drive module is connected to a first terminal of the light-emitting module, and the second terminal of the light-emitting module is connected to a second power line; the first terminal of the holding module is connected to the first power line, and the second terminal of the holding module is connected to the control terminal of the drive module.

[0007] Preferably, the write control module is turned on during the first time period and turned off during the second time period.

[0008] In some alternative embodiments, the pixel circuit includes a refresh control module; the holding module is connected to the refresh control module, and the refresh control module is connected to the second end of the driving module;

[0009] Preferably, the refresh control module is turned on during the first time period and turned off during the second time period.

[0010] In some optional embodiments, the pixel circuit includes a first light-emitting control module and a second light-emitting control module; a first end of the driving module is connected to the first power line through the first light-emitting control module, and a second end of the driving module is connected to the light-emitting module through the second light-emitting control module;

[0011] Preferably, the first light-emitting control module is turned off during the first time period and turned on during the second time period; the second light-emitting control module is turned off during the first time period and turned on during the second time period.

[0012] In some optional embodiments, the display device further includes a voltage adjustment module; the voltage adjustment module is used to determine the voltage of the first voltage line in the second time period based on the refresh rate corresponding to the first pixel circuit and the target brightness displayed by the first pixel circuit when the refresh rate corresponding to the first pixel circuit is less than that of the second pixel circuit.

[0013] In some optional embodiments, the voltage adjustment module is used to determine the voltage of the first voltage line in the second time period based on the refresh rate corresponding to the first pixel circuit, the target brightness displayed by the first pixel circuit, and the refresh rate corresponding to the second pixel circuit.

[0014] In some alternative embodiments, when the refresh rate corresponding to the first pixel circuit is less than that of the second pixel circuit, the voltage of the first voltage line in the first time period is different from the voltage of the first voltage line in the second time period.

[0015] Preferably, the voltage of the second voltage line during the first time period is the same as the voltage of the second voltage line during the second time period.

[0016] In some alternative embodiments, when the refresh rate corresponding to the first pixel circuit is less than that of the second pixel circuit, the voltage of the first voltage line in the second time period is greater than the voltage of the second voltage line in the second time period.

[0017] This application also provides a driving method for a display device, the display device comprising: a plurality of pixel circuits arranged in an array, each pixel circuit being connected to a corresponding voltage line, the voltage line being used to write voltage into the connected pixel circuit; the refresh period of the pixel circuit includes a first time period and a second time period; the plurality of pixel circuits includes a first pixel circuit and a second pixel circuit, the first pixel circuit being connected to a first voltage line, and the second pixel circuit being connected to a second voltage line; the driving method comprising: outputting voltage to the first pixel circuit through the first voltage line during the refresh period of the first pixel circuit, and outputting voltage to the first pixel circuit through the second voltage line during the refresh period of the second pixel circuit; wherein, when the refresh rates corresponding to the first pixel circuit and the second pixel circuit are different, the voltage of the first voltage line in the second time period is different from the voltage of the second voltage line in the second time period.

[0018] In some optional embodiments, the driving method further includes: when the refresh rate corresponding to the first pixel circuit is less than that of the second pixel circuit, determining the voltage of the first voltage line in the second time period based on the refresh rate corresponding to the first pixel circuit and the target brightness displayed by the first pixel circuit.

[0019] In some optional embodiments, determining the voltage of the first voltage line in the second time period based on the refresh rate corresponding to the first pixel circuit and the target brightness displayed by the first pixel circuit includes: determining the voltage of the first voltage line in the second time period based on the refresh rate corresponding to the first pixel circuit, the target brightness displayed by the first pixel circuit, and the refresh rate corresponding to the second pixel circuit.

[0020] In some alternative embodiments, when the refresh rate corresponding to the first pixel circuit is less than that of the second pixel circuit, the voltage of the first voltage line in the first time period is different from the voltage of the first voltage line in the second time period; preferably, the voltage of the second voltage line in the first time period is the same as the voltage of the second voltage line in the second time period.

[0021] In this embodiment, by setting the voltage of the first voltage line in the second time period to be different from that of the second voltage line when the refresh rates of the first pixel circuit and the second pixel circuit are different, the voltage of the first voltage line in the second time period can be set separately for the voltage lines connected to the pixel circuits of different refresh rates when there are multiple display areas with different refresh rates on the display device. Furthermore, by pre-adjusting the display area with a lower refresh rate and the display area with a higher refresh rate to display the same brightness, the voltage adjustment voltage of the voltage lines connected to the pixel circuits of the lower refresh rate display area in the corresponding second time period can be obtained. In this embodiment, the voltage of the voltage line connected to the lower refresh rate pixel circuit in the first pixel circuit and the second pixel circuit can be set separately to the pre-obtained adjustment voltage in the corresponding second time period, thereby solving the influence of parasitic capacitance generated by the voltage lines and reducing the brightness difference between display areas when there are multiple display areas with different refresh rates on the display device. Attached Figure Description

[0022] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in the embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings.

[0023] Figure 1 This is an exemplary structural diagram of a display device according to an embodiment of this application;

[0024] Figure 2 This is an exemplary structural diagram of a display panel according to an embodiment of this application;

[0025] Figure 3 This is a schematic diagram of a pixel circuit according to an embodiment of this application;

[0026] Figure 4 This is a schematic diagram of another pixel circuit according to an embodiment of this application;

[0027] Figure 5 This is a schematic diagram illustrating an exemplary structure of another display device according to an embodiment of this application;

[0028] Figure 6 This is a comparison diagram of the refresh cycles of a first pixel circuit and a second pixel circuit according to an embodiment of this application.

[0029] Figure 7 This is a flowchart of a driving method for a display device according to an embodiment of this application.

[0030] Figure label:

[0031] 1. Display device; 10. Display panel;

[0032] 100. Pixel circuit; 110. Write control module; 120. Driver module; 130. Light-emitting module; 140. Holding module; 150. Refresh control module; 161. First light-emitting control module; 162. Second light-emitting control module; 171. First initialization module; 172. Second initialization module; 173. Third initialization module;

[0033] L1, first scan line; L2, second scan line; L3, third scan line; L4, fourth scan line; L5, fifth scan line; Vref1, first reference voltage; Vref2, second reference voltage; Vref3, third reference voltage;

[0034] T1, first transistor; T2, second transistor; T3, third transistor; T4, fourth transistor; T5, fifth transistor; T6, sixth transistor; T7, seventh transistor; T8, eighth transistor; C, holding capacitor;

[0035] ELVDD, first power line; ELVSS, second power line; Vdata, voltage line;

[0036] AA, display area; SA, non-display area. Detailed Implementation

[0037] To enable those skilled in the art to better understand the technical solutions in the embodiments of this application, the technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art should fall within the protection scope of the embodiments of this application.

[0038] The terminology used in the embodiments of this application is for the purpose of describing particular embodiments only and is not intended to be limiting of this application. The singular forms “a,” “the,” and “the” used in the embodiments of this application and the appended claims are also intended to include the plural forms unless the context clearly indicates otherwise. It should also be understood that the term “and / or” as used in the embodiments of this application refers to and includes any or all possible combinations of one or more associated listed items.

[0039] It should be understood that in the description of the embodiments of this application, the terms "length", "width", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings. They are only for the convenience of describing the scheme of the embodiments of this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on the embodiments of this application.

[0040] Furthermore, when an element or layer is referred to as being "on" another element or layer, "connected to," or "bonded to" another element or layer, the element or layer may be directly on the other element or layer, directly connected to, or directly bonded to the other element or layer, or there may be intermediate elements or layers. However, when an element or layer is referred to as being "directly on" another element or layer, "directly connected to," or "directly bonded to" another element or layer, there are no intermediate elements or layers.

[0041] The terms First, Second, etc., are used to describe various elements, components, regions, layers, and / or parts, but these elements, components, regions, layers, and / or parts should not be limited by these terms. These terms are used to distinguish one element, component, region, layer, and / or part from another element, component, region, layer, and / or part.

[0042] Unless otherwise expressly specified and limited, the terms "installation," "connection," "linking," and "fixing," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances.

[0043] The specific implementation of the embodiments of this application will be further described below with reference to the accompanying drawings.

[0044] The circuit details mentioned below are further described in patents CN118251982A, 202311324257.8, 202310731471.9, 202311686416.9, 202310707183.X, 202310479495.X, 202310445544.8, CN117580403A, CN116669477B, and CN116936581B for reference.

[0045] Figure 1This is an exemplary structural diagram of a display device 1 according to an embodiment of this application.

[0046] See Figure 1 This application provides a display device 1. The display device 1 is an electronic device with image (including static images or dynamic images, wherein the dynamic image may be video) display function. For example, the display device 1 may be any one of the following: monitor, television, billboard, digital photo frame, laser printer with display function, telephone, mobile phone, personal digital assistant (PDA), digital camera, portable camcorder, viewfinder, navigator, large-area wall, home appliance, information query device (such as business query device for e-government, bank, hospital, power and other departments), monitor, electronic display screen, virtual reality (VR) display device, augmented reality (AR) display device, and vehicle display, but is not limited thereto.

[0047] In some embodiments, see continue to see Figure 1 The display device 1 may include a display panel 10. Exemplarily, the display panel 10 may be a self-emissive display panel 10, such as an organic light-emitting diode (OLED) display panel 10, a quantum dot light-emitting diode (QLED) display panel 10, or a mini LED (or micro LED) display panel 10. In optional embodiments of this application, the display panel 10 included in the display device 1 may be the display panel 10 described in any of the following embodiments.

[0048] See Figure 2 The display panel 10 has a display area AA and a non-display area SA, wherein the display area AA is the area on the display panel 10 used to display the image, and the non-display area SA is the area on the display panel 10 other than the display area AA. The non-display area SA may be located on at least one side of the display area AA (e.g., one side, or multiple sides), for example, the non-display area SA may be arranged around the display area AA.

[0049] The display area AA contains multiple pixel circuits. These pixel circuits are arranged in an array within the display area AA. Each pixel circuit can display a single color. For example, the pixel circuits within the display area AA may include a red pixel circuit R, a green pixel circuit G, and a blue pixel circuit B, used to display red, green, and blue, respectively. The multiple pixel circuits can be arranged in the display area AA according to a specified rule. For instance, multiple sub-pixels are arranged in multiple rows and columns. Since each pixel circuit includes a pixel driving circuit, the pixel driving circuits are also arranged in multiple rows and columns.

[0050] It should be noted that the aforementioned pixel circuit is the smallest unit within the display panel 10 for displaying images. Figure 3 for Figure 2 A schematic diagram of the pixel circuit within the central display area AA. The pixel circuit can be configured to write a data signal to a voltage line in response to a received scan signal, and drive the light-emitting module in the pixel circuit to emit light through this data signal. The brightness of the light-emitting module can be related to the voltage value of the written data signal. By adjusting the brightness displayed by different pixel circuits, multiple colors can be displayed through color overlay.

[0051] The display device 1 provided in the embodiments of this application will now be described in detail.

[0052] The display device 1 may include a plurality of pixel circuits arranged in an array, each pixel circuit being connected to a corresponding voltage line, the voltage line being used to write voltage into the connected pixel circuit and to provide data voltage to the pixel circuit.

[0053] The refresh cycle of the pixel circuit includes a first time period and a second time period. The first time period and the second time period are two different time periods within the refresh cycle. The first time period can be before the second time period. The first time period can be the time period during which the voltage line writes voltage to the pixel circuit, and the second time period can be the time period during which the pixel circuit emits light.

[0054] like Figure 3 As shown, in some optional embodiments, the pixel circuit 100 may include a write control module 110, a drive module 120, a light-emitting module 130, and a holding module 140; the voltage line Vdata is connected to the write control module 110, the write control module 110 is connected to the first end of the drive module 120, the first end of the drive module 120 is connected to the first power line ELVDD, the second end of the drive module 120 is connected to the first end of the light-emitting module 130, and the second end of the light-emitting module 130 is connected to the second power line ELVSS; the first end of the holding module 140 is connected to the first power line ELVDD, and the second end of the holding module 140 is connected to the control end of the drive module 120.

[0055] like Figure 4As shown, the write control module 110 may include a first transistor T1, the drive module 120 may include a second transistor T2, and the holding module 140 may include a holding capacitor C. The light-emitting module 130, used for emitting light, can be a suitable light-emitting device for OLEDs. Exemplarily, the voltage line Vdata may be connected to a first terminal of the first transistor T1, the second terminal of the first transistor T1 may be connected to a first terminal of the second transistor T2, and the control terminal of the first transistor T1 may be connected to a first scan line L1, so that the first scan signal output by the first scan line L1 controls the first transistor T1 to write the voltage of the connected voltage line Vdata into the pixel circuit 100. The first terminal of the second transistor T2 may also be connected to a first power line ELVDD, the second terminal of the second transistor T2 may be connected to a first terminal of the light-emitting module 130, and the second terminal of the light-emitting module 130 may be connected to a second power line ELVSS. The first terminal of the holding capacitor C may be connected to the first power line ELVDD, and the second terminal of the holding capacitor C may be connected to the control terminal of the second transistor T2.

[0056] As a feasible implementation, the write control module 110 can be turned on in the first time period and turned off in the second time period, thereby controlling the voltage line Vdata to write the voltage into the pixel circuit 100 in the first time period and interrupting the process of writing the voltage line Vdata to the holding module 140 in the second time period.

[0057] In this embodiment, the connection between the voltage line Vdata and the holding module 140 can be controlled by the write control module 110. By turning on the write control module 110 in the first time period, the voltage of the voltage line Vdata can be written to the holding module 140 in the first time period. By turning off the write control module 110 in the first time period, the writing of the voltage of the voltage line Vdata to the holding module 140 can be stopped in the second time period, so as to prevent the voltage of the voltage line Vdata from affecting the driving module 120 to drive the light-emitting module 130.

[0058] The multiple pixel circuits 100 include a first pixel circuit and a second pixel circuit. The first pixel circuit is connected to a first voltage line, and the second pixel circuit is connected to a second voltage line. When the refresh rates corresponding to the first pixel circuit and the second pixel circuit are different, the voltage of the first voltage line in the second time period is different from the voltage of the second voltage line in the second time period. The voltage of the first voltage line in the first time period can be the same as or different from the voltage of the second voltage line in the first time period.

[0059] The first pixel circuit and the second pixel circuit can be pixel circuits of the same color, such as both being red pixel circuits, both being green pixel circuits, or both being blue pixel circuits, etc. That is, when the refresh rates corresponding to the first pixel circuit and the second pixel circuit of the same color are different, the voltage of the first voltage line in the second time period is different from the voltage of the second voltage line in the second time period. The colors of the first pixel circuit and the second pixel circuit can also be the same, and this application does not impose any restrictions on this.

[0060] For example Figure 5 As shown, at the same time, the refresh rates of the three display areas A, B, and C on the display device 1 can be 1Hz, 120Hz, and 1Hz, respectively. The refresh rates of different display areas on the display device 1 provided in this application embodiment can be different. The first pixel circuit and the second pixel circuit can be pixel circuits 100 in areas A and B, respectively.

[0061] It should be understood that the refresh rate corresponding to pixel circuit 100 is the refresh rate of the display area where pixel circuit 100 is located. When the refresh rates corresponding to the first pixel circuit and the second pixel circuit are different, the refresh cycles of the first pixel circuit and the second pixel circuit will differ. As a feasible implementation, if the refresh rate of the first pixel circuit is less than the refresh rate of the second pixel circuit, then the first time period corresponding to the first pixel circuit can overlap / occur simultaneously with the first time period corresponding to the second pixel circuit, and the duration of the second time period corresponding to the first pixel circuit can be greater than the duration of the second time period corresponding to the second pixel circuit. For example, if the refresh rate corresponding to the first pixel circuit is 1Hz, the first time period corresponding to the first pixel circuit is a1, and the second time period is a2; if the refresh rate corresponding to the second pixel circuit is 120Hz, and the first time period corresponding to the second pixel circuit is b1, and the second time period is b2, then... Figure 6 As shown, a1 can be equal to b1, and a2 can be equal to b2 + 119*(b1 + b2).

[0062] The inventors of this application have discovered that parasitic capacitance is generated between the driving module 120 of the pixel circuit 100 and the voltage line Vdata connected to the pixel circuit 100. Parasitic capacitance also exists between the gate of the second transistor T2 of the pixel circuit 100 and the voltage line Vdata connected to the pixel circuit 100. When the refresh rate corresponding to the pixel circuit 100 is low, the duration of the second time period of the pixel circuit 100 is longer compared to when the refresh rate is high. In this case, the aforementioned parasitic capacitance has a significant impact on the gate voltage of the second transistor T2, thereby affecting the brightness of the light-emitting module 130 driven by the second transistor T2. Consequently, even if the display device 1 only sets one target brightness when there are display areas with different refresh rates on the display device 1, the brightness displayed by the display area with the lower refresh rate will differ from that of the display area with the higher refresh rate due to the influence of the aforementioned parasitic capacitance.

[0063] In this embodiment, by setting the voltage of the first voltage line and the second voltage line in the second time period to be different when the refresh rates of the first pixel circuit and the second pixel circuit are different, when there are multiple display areas with different refresh rates on the display device 1, the voltage of the voltage line Vdata connected to the pixel circuit 100 with different refresh rates can be set separately in the corresponding second time period. Furthermore, by pre-adjusting the display area with a lower refresh rate and the display area with a higher refresh rate to display the same brightness, the adjustment voltage of the voltage line Vdata connected to the pixel circuit 100 of the display area with a lower refresh rate can be obtained in the corresponding second time period. In this embodiment, the voltage of the voltage line Vdata connected to the pixel circuit 100 with a lower refresh rate in the first pixel circuit and the second pixel circuit can be set separately to the pre-obtained adjustment voltage in the corresponding second time period, thereby solving the influence of the parasitic capacitance generated by the voltage line Vdata and reducing the brightness difference between the display areas when there are multiple display areas with different refresh rates on the display device 1.

[0064] like Figure 3 As shown, in some optional embodiments, the pixel circuit 100 includes a refresh control module 150; the holding module 140 is connected to the refresh control module 150, and the refresh control module 150 is connected to the second end of the driving module 120.

[0065] like Figure 4As shown, the refresh control module 150 may include a third transistor T3. The second terminal of the aforementioned holding capacitor C can be connected to the first terminal of the third transistor T3, and the second terminal of the aforementioned second transistor T2 can be connected to the second terminal of the third transistor T3. The control terminal of the third transistor T3 can be connected to the second scan line L2, which is used to output a second scan signal to control the on and off states of the third transistor T3. By controlling the on and off states of the third transistor T3, it is possible to control whether a voltage is written to the holding capacitor C, thereby controlling the frequency of voltage writing to the holding capacitor C, and thus controlling the refresh rate of the pixel circuit 100.

[0066] As a feasible implementation, the refresh control module 150 is turned on in the first time period and turned off in the second time period. Correspondingly, the third transistor T3 can be turned on in the first time period and turned off in the second time period. Thus, the voltage of the voltage line Vdata can be written into the holding module 140 in the first time period, and the process of writing the voltage of the voltage line Vdata into the holding module 140 is interrupted in the second time period.

[0067] In this embodiment, the refresh control module 150 can control the frequency of writing voltage to the holding capacitor C, thereby controlling the refresh rate of the pixel circuit 100. The refresh control module 150 can make the refresh rates of the pixel circuits 100 in different display areas on the display device 1 different, so that different display areas on the display device have different refresh rates at the same time, thus realizing the partitioned refresh of the display device.

[0068] like Figure 3 As shown, in some optional embodiments, the pixel circuit 100 includes a first light-emitting control module 161 and a second light-emitting control module 162. A first terminal of the driving module 120 is connected to a first power line ELVDD via the first light-emitting control module 161, and a second terminal of the driving module 120 is connected to the light-emitting module 130 via the second light-emitting control module 162. When the first light-emitting control module 161 is turned on, the first power line ELVDD can be electrically connected to the driving module 120 via the first light-emitting control module 161. When the second light-emitting control module 162 is turned on, the second power line ELVSS can be electrically connected to the driving module 120 via the second light-emitting control module 162. The first light-emitting control module 161 and the second light-emitting control module 162 can be controlled by the same signal.

[0069] like Figure 4As shown, the first light-emitting control module 161 may include a fourth transistor T4, and the second light-emitting control module 162 may include a fifth transistor T5. The first terminal of the second transistor T2 in the driving module 120 can be connected to the first power line ELVDD via the fourth transistor T4, and the second terminal of the second transistor T2 can be connected to the light-emitting module 130 via the fifth transistor T5. The control terminals of the fourth transistor T4 and the fifth transistor T5 can be connected to the third scan line L3, which is used to output a third scan signal controlling the on and off states of the fourth transistor T4 and the fifth transistor T5.

[0070] Preferably, the first light-emitting control module 161 is turned off in the first time period and turned on in the second time period; the second light-emitting control module 162 is turned off in the first time period and turned on in the second time period. This avoids the first power line ELVDD and the second power line ELVSS affecting the voltage line Vdata writing voltage to the pixel circuit 100 in the first time period.

[0071] In this embodiment, the pixel circuit 100 may include a first light-emitting control module 161 and a second light-emitting control module 162. The first end of the driving module 120 is connected to the first power line ELVDD via the first light-emitting control module 161, and the second end of the driving module 120 is connected to the light-emitting module 130 via the second light-emitting control module 162. Therefore, the power supply to the driving module 120 can be controlled by the first light-emitting control module 161 and the second light-emitting control module 162, thus facilitating the control of the driving module 120 to drive the light-emitting module 130.

[0072] As a feasible implementation, the pixel circuit 100 may also include an initialization module, such as... Figure 3 As shown, the initialization module may include a first initialization module 171, a second initialization module 172, and a third initialization module 173. The first initialization module 171 can be connected to the second terminal of the refresh control module 150, the second initialization module can be connected to the second terminal of the drive module 120, and one terminal of the third initialization module 173 can be connected to both the second light-emitting control module 162 and the light-emitting module 130. The second initialization module 172 and the third initialization module 173 can be controlled by the same signal.

[0073] like Figure 4As shown, the first initialization module 171 may include a sixth transistor T6, the second initialization module 172 may include a seventh transistor T7, and the third initialization module 173 may include an eighth transistor T8. Specifically, the first terminal of the sixth transistor T6 may be connected to the second terminal of the refresh control module 150, the second terminal of the sixth transistor T6 may be connected to the first reference voltage Vref1, and the control terminal of the sixth transistor T6 is connected to the fourth scan line L4. The first reference voltage Vref1 is used to initialize the voltage at the second terminal of the holding module 140, and the fourth scan line L4 is used to output a second scan signal to control the turning on and off of the sixth transistor T6. The first terminal of the seventh transistor T7 can be connected to the second terminal of the driving module 120, and the second terminal of the seventh transistor T7 can be connected to the second reference voltage Vref2. The control terminal of the seventh transistor T7 is connected to the fifth scan line L5. The first terminal of the eighth transistor T8 can be connected to the first terminal of the light-emitting module 130, and the second terminal of the eighth transistor T8 can be connected to the third reference voltage Vref3. The control terminal of the eighth transistor T8 is connected to the fifth scan line L5. The second reference voltage Vref2 is used to initialize the voltage at the second terminal of the driving module 120, the third reference voltage Vref3 is used to initialize the voltage at the first terminal of the light-emitting module 130, and the fifth scan line L5 is used to output a second scan signal controlling the on / off state of the seventh transistor T7 and the eighth transistor T8. It should be understood that the initialization of the voltages at the second terminals of the holding module 140 and the driving module 120, etc., can be understood as resetting the voltages at the second terminals of the holding module 140 and the driving module 120, etc., to their corresponding predetermined potentials.

[0074] The first initialization module 171, the second initialization module 172, and the third initialization module 173 can respectively initialize the connected modules to facilitate the refresh of the pixel circuit 100. Optionally, the refresh cycle of the pixel circuit may also include an initialization time period. For example, the initialization time period may be between a first time period and a second time period, and the first initialization module 171, the second initialization module 172, and the third initialization module 173 may initialize the corresponding modules or voltages during the initialization time period.

[0075] In some optional embodiments, the display device 1 further includes a voltage adjustment module; the voltage adjustment module is used to determine the voltage of the first voltage line in a second time period based on the refresh rate of the first pixel circuit and the target brightness of the first pixel circuit when the refresh rate corresponding to the first pixel circuit is less than that of the second pixel circuit.

[0076] It should be noted that the voltage line Vdata can be connected to a corresponding voltage source, allowing it to obtain voltage from that source. Once the voltage of the first voltage line in the second time period is determined, the voltage source connected to the first voltage line can supply the determined voltage to the voltage line Vdata. The target brightness displayed by the first pixel circuit or the second pixel circuit is either the target brightness of the display area where the first pixel circuit or the second pixel circuit is located, or the set brightness of that area.

[0077] As an optional implementation, a mapping information can be preset, which indicates the mapping relationship between the refresh rate of the pixel circuit 100, the target brightness of the pixel circuit 100 for display, and the voltage of the voltage line Vdata connected to the pixel circuit 100 to the pixel circuit 100 in the second time period. The mapping information can be a mapping table or a mapping curve, etc.

[0078] Based on the refresh rate corresponding to the first pixel circuit and the target brightness displayed by the first pixel circuit, the voltage of the first voltage line in the second time period can be mapped using mapping information. For example, according to this mapping information, if the refresh rate corresponding to the pixel circuit 100 is 1Hz and the target brightness displayed by the pixel circuit 100 is greater than 90 nits, the voltage of the voltage line Vdata connected to the pixel circuit 100 in the second time period can be 5.05V; if the refresh rate corresponding to the pixel circuit 100 is 1Hz and the target brightness displayed by the pixel circuit 100 is less than or equal to 90 nits, the voltage of the voltage line Vdata connected to the pixel circuit 100 in the second time period can be 4.7V.

[0079] When setting the mapping information, an experiment can be conducted to create two display areas on display device 1 with the same target brightness but different refresh rates, minimizing the brightness difference between the two display areas. In this case, the voltage Vdata connected to a pixel circuit 100 in the display area with the lower refresh rate is determined as the voltage corresponding to the refresh rate of that pixel circuit 100 and the target brightness displayed by that pixel circuit 100 in the first mapping information during a second time period. This determines a set of mapped pixel circuits 100, their corresponding refresh rates, target brightness, and the voltage Vdata connected to them during the second time period. By repeating this process, the complete mapping information can be determined.

[0080] In this embodiment, the display device 1 further includes a voltage adjustment module. This module determines the voltage of the first voltage line during a second time period based on the refresh rate of the first pixel circuit and the target brightness displayed by the first pixel circuit, when the refresh rate of the first pixel circuit is lower than that of the second pixel circuit. By writing this voltage to the first pixel circuit through the first voltage line during the second time period, the difference in brightness between the first and second pixel circuits is reduced.

[0081] In some optional embodiments, the voltage adjustment module is used to determine the voltage of the first voltage line in the second time period based on the refresh rate corresponding to the first pixel circuit, the target brightness displayed by the first pixel circuit, and the refresh rate corresponding to the second pixel circuit.

[0082] As a feasible implementation, mapping information can be preset to indicate the mapping relationship between the refresh rate corresponding to the first pixel circuit, the target brightness displayed by the first pixel circuit, the refresh rate corresponding to the second pixel circuit, and the voltage of the first voltage line in the second time period. This allows the voltage of the first voltage line in the second time period to be mapped based on the refresh rate corresponding to the first pixel circuit, the target brightness displayed by the first pixel circuit, and the refresh rate corresponding to the second pixel circuit. The method for setting this mapping information can be referred to the above embodiment and will not be repeated here.

[0083] In some embodiments, in addition to the first pixel circuit and the second pixel circuit, the pixel circuit 100 may further include at least one pixel circuit with a refresh rate different from that of the first pixel circuit and the second pixel circuit, such as a third pixel circuit with a refresh rate different from that of the first pixel circuit and the second pixel circuit, and the voltage line connected to the third pixel circuit is a third voltage line. Then the second pixel circuit can be the pixel circuit with the highest refresh rate among all the pixel circuits with different refresh rates.

[0084] The voltage adjustment module can be used to map the voltage of the third voltage line in the second time period based on the refresh rate corresponding to the third pixel circuit, the target brightness of the third pixel circuit for display, and the refresh rate corresponding to the second pixel circuit, through mapping information.

[0085] In this embodiment, the voltage adjustment module can determine the voltage of the first voltage line in the second time period based on the refresh rate corresponding to the first pixel circuit, the target brightness displayed by the first pixel circuit, and the refresh rate corresponding to the second pixel circuit. The reference factors are more comprehensive, and the voltage of the first voltage line in the second time period can be determined more accurately.

[0086] In some optional embodiments, when the refresh rate corresponding to the first pixel circuit is less than that of the second pixel circuit, the voltage of the first voltage line in the first time period is different from the voltage of the first voltage line in the second time period. Optionally, the voltage of the second voltage line in the first time period is the same as the voltage of the second voltage line in the second time period.

[0087] The embodiments of this application can specifically set the voltage of the first voltage line in the second time period for the first pixel circuit with a low refresh rate, so as to reduce the adverse effects of the parasitic capacitance generated by the first voltage line in the second time period.

[0088] In some optional embodiments, when the refresh rate corresponding to the first pixel circuit is less than that of the second pixel circuit, the voltage of the first voltage line in the second time period may be greater than the voltage of the second voltage line in the second time period.

[0089] The inventors of this application have discovered that if the pixel colors (e.g., red, green, or blue) corresponding to the first pixel circuit and the second pixel circuit are the same, and the refresh rate corresponding to the first pixel circuit is lower than that of the second pixel circuit, the brightness displayed by the first pixel circuit will be greater than that displayed by the second pixel circuit. In the embodiments of this application, by setting the voltage of the first voltage line in the second time period to be greater than the voltage of the second voltage line in the second time period, the brightness displayed by the first pixel circuit can be reduced, thereby reducing the difference between the brightness displayed by the first pixel circuit and the brightness displayed by the second pixel circuit.

[0090] This application also provides a driving method for a display device. The display device includes a plurality of pixel circuits 100 arranged in an array, each pixel circuit 100 being connected to a corresponding voltage line Vdata, the voltage line Vdata being used to write voltage into the connected pixel circuit 100.

[0091] The refresh cycle of the pixel circuit 100 includes a first time period and a second time period. The plurality of pixel circuits 100 include a first pixel circuit and a second pixel circuit, the first pixel circuit being connected to a first voltage line and the second pixel circuit being connected to a second voltage line.

[0092] like Figure 7 As shown, the driving method includes: S700, outputting voltage to the first pixel circuit during the refresh cycle of the first pixel circuit via a first voltage line, and outputting voltage to the first pixel circuit during the refresh cycle of the second pixel circuit via a second voltage line. Wherein, when the refresh rates corresponding to the first pixel circuit and the second pixel circuit are different, the voltage of the first voltage line in the second time period is different from the voltage of the second voltage line in the second time period.

[0093] like Figure 7As shown, in some optional embodiments, the driving method further includes: S701, when the refresh rate corresponding to the first pixel circuit is less than that of the second pixel circuit, determining the voltage of the first voltage line in the second time period based on the refresh rate corresponding to the first pixel circuit and the target brightness displayed by the first pixel circuit.

[0094] In some optional embodiments, determining the voltage of the first voltage line in the second time period based on the refresh rate corresponding to the first pixel circuit and the target brightness displayed by the first pixel circuit includes: determining the voltage of the first voltage line in the second time period based on the refresh rate corresponding to the first pixel circuit, the target brightness displayed by the first pixel circuit, and the refresh rate corresponding to the second pixel circuit.

[0095] In some optional embodiments, when the refresh rate corresponding to the first pixel circuit is less than that of the second pixel circuit, the voltage of the first voltage line in the first time period is different from the voltage of the first voltage line in the second time period.

[0096] In some alternative embodiments, the voltage of the second voltage line in the first time period is the same as the voltage of the second voltage line in the second time period.

[0097] It should be understood that the driving method for the display device provided in this application is based on the same inventive concept as the aforementioned display device embodiments and can achieve the same effect. The structure and operation involved in the driving method for the display device can be found in the description in the aforementioned display device embodiments, and will not be repeated here.

[0098] It should be noted that, depending on the implementation needs, the various components / steps described in the embodiments of this application can be broken down into more components / steps, or two or more components / steps or parts of the operation of components / steps can be combined into new components / steps to achieve the purpose of the embodiments of this application.

[0099] The methods described in the embodiments of this application can be implemented in hardware, firmware, or as software or computer code that can be stored in a recording medium (such as a CD-ROM, RAM, floppy disk, hard disk, or magneto-optical disk), or as computer code downloaded over a network that is originally stored in a remote recording medium or a non-transitory machine-readable medium and will be stored in a local recording medium. Thus, the methods described herein can be stored on a recording medium using a general-purpose computer, a dedicated processor, or programmable or dedicated hardware (such as an Application Specific Integrated Circuit (ASIC) or a Field Programmable Gate Array (FPGA)). It is understood that the computer, processor, microprocessor controller, or programmable hardware includes storage components (e.g., Random Access Memory (RAM), Read-Only Memory (ROM), Flash Memory, etc.) capable of storing or receiving software or computer code. When the software or computer code is accessed and executed by the computer, processor, or hardware, the methods described herein are implemented. Furthermore, when a general-purpose computer accesses the code used to implement the methods shown herein, the execution of the code transforms the general-purpose computer into a dedicated computer for executing the methods shown herein.

[0100] Those skilled in the art will recognize that the units and method steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of the embodiments of this application.

[0101] The above embodiments are only used to illustrate the embodiments of this application, and are not intended to limit the embodiments of this application. Those skilled in the art can make various changes and modifications without departing from the spirit and scope of the embodiments of this application. Therefore, all equivalent technical solutions also fall within the scope of the embodiments of this application, and the patent protection scope of the embodiments of this application should be defined by the claims.

Claims

1. A display device, characterized by comprising: The display device comprises: a plurality of pixel circuits arranged in an array, each of the pixel circuits being connected with a corresponding voltage line, the voltage line being used to write voltage into the connected pixel circuit and provide data voltage for the pixel circuit; a refresh period of the pixel circuit comprising a first time period and a second time period; the pixel circuit comprises a write control module, the write control module being turned on in the first time period and turned off in the second time period; the plurality of pixel circuits comprises a first pixel circuit and a second pixel circuit, the first pixel circuit being connected with a first voltage line and the second pixel circuit being connected with a second voltage line; when the refresh rates corresponding to the first pixel circuit and the second pixel circuit are different, the voltage of the first voltage line in the second time period is different from the voltage of the second voltage line in the second time period; the second time period is a time period during which the pixel circuit emits light; the display device further comprises a voltage adjustment module; the voltage adjustment module is used to determine the voltage of the first voltage line in the second time period according to the refresh rate corresponding to the first pixel circuit, the target brightness of the first pixel circuit during display and the refresh rate corresponding to the second pixel circuit when the refresh rate corresponding to the first pixel circuit is less than the refresh rate corresponding to the second pixel circuit.

2. The display device according to claim 1, wherein The pixel circuit comprises a driving module, a light emitting module and a holding module; the voltage line is connected with the write control module, the write control module is connected with a first end of the driving module, the first end of the driving module is connected with a first power line, a second end of the driving module is connected with a first end of the light emitting module, a second end of the light emitting module is connected with a second power line; a first end of the holding module is connected with the first power line, and a second end of the holding module is connected with a control end of the driving module.

3. The display device according to claim 2, wherein The pixel circuit comprises a refresh control module; the holding module is connected with the refresh control module, and the refresh control module is connected with the second end of the driving module.

4. The display device according to claim 3, wherein The refresh control module is turned on in the first time period and turned off in the second time period.

5. The display device according to claim 3, wherein The pixel circuit comprises a first light emitting control module and a second light emitting control module; the first end of the driving module is connected with the first power line through the first light emitting control module, and the second end of the driving module is connected with the light emitting module through the second light emitting control module.

6. The display device according to claim 5, wherein The first light emitting control module is turned off in the first time period and turned on in the second time period; the second light emitting control module is turned off in the first time period and turned on in the second time period.

7. The display device according to any one of claims 1 to 6, wherein When the refresh rate corresponding to the first pixel circuit is less than the refresh rate corresponding to the second pixel circuit, the voltage of the first voltage line in the first time period is different from the voltage of the first voltage line in the second time period.

8. The display device according to claim 7, wherein The voltage of the second voltage line in the first time period is the same as the voltage of the second voltage line in the second time period.

9. The display device according to any one of claims 1 to 6, wherein When the refresh rate corresponding to the first pixel circuit is less than the refresh rate corresponding to the second pixel circuit, the voltage of the first voltage line in the second time period is greater than the voltage of the second voltage line in the second time period.

10. A driving method of a display device, characterized by, The display device comprises: a plurality of pixel circuits arranged in an array, each of the pixel circuits being connected to a corresponding voltage line, the voltage line being used to write a voltage into the connected pixel circuit and provide a data voltage for the pixel circuit; a refresh period of the pixel circuit comprising a first time period and a second time period, the pixel circuit comprising a write control module, the write control module being turned on in the first time period and turned off in the second time period; the plurality of pixel circuits comprising a first pixel circuit and a second pixel circuit, the first pixel circuit being connected to a first voltage line, and the second pixel circuit being connected to a second voltage line; the driving method comprising: outputting a voltage to the first pixel circuit through the first voltage line in a refresh period of the first pixel circuit, and outputting a voltage to the first pixel circuit through the second voltage line in a refresh period of the second pixel circuit; wherein the voltage of the first voltage line in the second time period is different from the voltage of the second voltage line in the second time period when the refresh rate corresponding to the first pixel circuit is different from the refresh rate corresponding to the second pixel circuit, the second time period being a time period in which the pixel circuit emits light; the driving method further comprising: when the refresh rate corresponding to the first pixel circuit is less than the refresh rate corresponding to the second pixel circuit, determining the voltage of the first voltage line in the second time period according to the refresh rate corresponding to the first pixel circuit, a target brightness of the first pixel circuit for display, and the refresh rate corresponding to the second pixel circuit.

11. The driving method according to claim 10, wherein When the refresh rate corresponding to the first pixel circuit is less than the refresh rate corresponding to the second pixel circuit, the voltage of the first voltage line in the first time period is different from the voltage of the first voltage line in the second time period.

12. The driving method according to claim 11, wherein The voltage of the second voltage line in the first time period is the same as the voltage of the second voltage line in the second time period.

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