Method, device, equipment, medium and system for SPI (Serial Peripheral Interface) to adapt to polarity phase of main equipment

Abstract

The invention relates to a method, a device, equipment, a medium and a system for an SPI (Serial Peripheral Interface) to adapt to a polarity phase of master equipment. The method comprises the following steps: receiving a first instruction sent by the master equipment; if the length of the first instruction is consistent with the set length of the first protocol, detecting the level of the SCK pin of the SPI interface of the slave device in rising edge interruption of the CS; setting the polarity and the phase of the SPI interface of the slave device to be any one of four modes; after a second instruction sent by the master device is received, the polarity and the phase of the SPI interface of the master device are judged according to whether the level and the second instruction are consistent with a second protocol setting instruction or not; and if the judgment cannot be carried out, the polarity and the phase of the slave device are set to be one of the four modes, and after a third instruction sent by the master device is received, the polarity and the phase of the SPI interface of the master device are continuously judged according to whether the level and the third instruction are consistent with a third protocol setting instruction or not. And finally adapting to the polarity and phase of the SPI interface of the main equipment according to logic judgment.

Description

Technical Field

[0001] The present application relates to the technical field of Serial Peripheral Interface (SPI), and in particular to a method, apparatus, device, medium and system for SPI adaptive master device polarity phase. Background Art

[0002] SPI is a high-speed, full-duplex, synchronous communication bus, and only occupies four wires on the chip pins, saving the chip pins and saving space on the PCB layout, providing convenience. It is precisely because of this simple and easy-to-use feature that more and more chips integrate this communication protocol. There are two working modes: master mode and slave mode, such as Figure 1 As shown. SPI is a protocol that allows a master device to initiate synchronous communication with a slave device, thereby completing the data exchange. In other words, SPI is a prescribed communication method. The advantage of this communication method is that it occupies fewer ports. Generally, 4 ports are enough for basic communication, not counting the power cord. At the same time, the transmission speed is also very high. Generally speaking, the master device is required to have an SPI controller, and it can also use analog methods to communicate with SPI-based chips. SPI has four different operating modes, such as Figure 2 As shown, normal communication can only be achieved when the polarity (CPOL) and phase (CPHA) of the master device and the slave device are consistent.

[0003] When the polarity (CPOL) and phase (CPHA) of the SPI interface of the current master device are unknown, in order to ensure normal communication, it is necessary to use an external detection device to hang on the GPIO port of the master device SPI for detection and analysis before obtaining relevant information. This method will take up project development time, and the GPIO of some master devices may not be able to mount the detection device, resulting in the inability to obtain the phase polarity of the master device.

[0004] In summary, there is an urgent need for a method for an SPI slave device to adapt to the polarity phase of a master device with high adaptation efficiency and automation. Summary of the invention

[0005] Based on this, it is necessary to provide a method, device, equipment, medium and system for SPI adaptive master device polarity phase with high adaptation efficiency and automation to address the above technical problems.

[0006] A method for an SPI slave device to adapt to the polarity phase of a master device, the method comprising:

[0007] receiving a first instruction sent by a master device;

[0008] If the length of the first instruction is the length set by the first protocol, detecting the level of the SCK pin of the SPI interface of the slave device in the rising edge interrupt of CS;

[0009] After detecting the level, setting the polarity and phase of the slave device SPI interface to any one of four modes;

[0010] After receiving the second instruction sent by the master device, judging the polarity and phase of the SPI interface of the master device according to whether the level and the second instruction are consistent with the second protocol setting instruction;

[0011] If they are consistent but the level is low, the polarity and phase of the slave device are set to another one of the four modes, and after receiving the third instruction sent by the master device, the polarity and phase of the SPI interface of the master device are further determined according to whether the level and the third instruction are consistent with the third protocol setting instruction;

[0012] If the polarity and phase of the SPI interface of the master device are determined, the polarity and phase of the SPI interface of the slave device are set to be consistent with the polarity and phase of the SPI interface of the master device;

[0013] Determine whether the detection is completed. If the detection is completed, set the polarity and phase of the slave device SPI interface to communicate with the master device. Otherwise, continue to repeat the above-mentioned adaptive polarity and phase detection of the master device.

[0014] In one embodiment, the polarity and phase of the SPI interface of the master device are determined based on whether the level and the second instruction are consistent with each other as the second protocol setting instruction:

[0015] determining, based on the level, whether the second instruction is consistent with the second protocol setting instruction;

[0016] If they are consistent but the level is high, the polarity and phase of the SPI interface of the master device are determined;

[0017] If the level is low and inconsistent, the polarity and phase of the master device SPI interface are determined;

[0018] If they are consistent but the level is low, the polarity and phase of the slave device SPI interface are set to another one of the four modes.

[0019] In one embodiment, the polarity and phase of the SPI interface of the master device are further determined according to the level and whether the third instruction is a third protocol setting instruction:

[0020] determining, according to the level, whether the third instruction is consistent with the third protocol setting instruction;

[0021] If the level is low and inconsistent, the polarity and phase of the master device SPI interface are determined;

[0022] If the level is low and consistent, the polarity and phase of the master device SPI interface are determined.

[0023] In one embodiment, the method further comprises:

[0024] It is determined whether the length of the first instruction is consistent with the length set by the first protocol. If the length of the first instruction is inconsistent with the length set by the first protocol, the current adaptive master device polarity phase detection is exited.

[0025] A device for an SPI slave device to adapt to the polarity phase of a master device, the device comprising:

[0026] An instruction receiving module, used for receiving a first instruction sent by a master device;

[0027] A level detection module, used for detecting the level of the SCK pin of the SPI interface of the slave device in the rising edge interrupt of CS if the length of the first instruction is the length set by the first protocol;

[0028] A first setting module, used for setting the polarity and phase of the SPI interface of the slave device to any one of four modes after detecting the level;

[0029] A first judgment module is used to judge the polarity and phase of the SPI interface of the master device according to the level and whether the second instruction is a second protocol setting instruction after receiving the second instruction sent by the master device;

[0030] A second judgment module is used for setting the polarity and phase of the slave device to another one of the four modes if the two modes are consistent but the level is low, and after receiving the third instruction sent by the master device, continuing to judge the polarity and phase of the SPI interface of the master device according to the level and whether the third instruction is a third protocol setting instruction;

[0031] The second setting module is used to set the polarity and phase of the SPI interface of the slave device to be consistent with the polarity and phase of the SPI interface of the master device if the polarity and phase of the SPI interface of the master device are determined;

[0032] The status detection module is used to determine whether it is in the state of completing detection. If it is in the state of completing detection, the polarity and phase of the SPI interface of the slave device are set to communicate with the master device, otherwise the above-mentioned adaptive polarity and phase detection of the master device is continued.

[0033] In one of the embodiments, the first judgment module is specifically used to judge whether the second instruction is consistent with the second protocol setting instruction based on the level: if consistent but the level is high, the polarity and phase of the master device SPI interface are judged; if the level is low and inconsistent, the polarity and phase of the master device SPI interface are judged; if consistent but the level is low, the polarity and phase of the slave device SPI interface are set to another one of the four modes.

[0034] In one of the embodiments, the second judgment module is specifically used to judge whether the third instruction is consistent with the third protocol setting instruction based on the level: if the level is low and inconsistent, the polarity and phase of the SPI interface of the master device are judged; if the level is low and consistent, the polarity and phase of the SPI interface of the master device are judged.

[0035] An SPI slave device comprises a memory and a processor, wherein the memory stores a computer program, and the processor implements the following steps when executing the computer program:

[0036] receiving a first instruction sent by a master device;

[0037] If the length of the first instruction is the length set by the first protocol, detecting the level of the SCK pin of the SPI interface of the slave device in the rising edge interrupt of CS;

[0038] After detecting the level, setting the polarity and phase of the slave device SPI interface to any one of four modes;

[0039] After receiving the second instruction sent by the master device, judging the polarity and phase of the SPI interface of the master device according to the level and whether the second instruction is a second protocol setting instruction;

[0040] If they are consistent but the level is low, the polarity and phase of the slave device are set to another one of the four modes, and after receiving the third instruction sent by the master device, the polarity and phase of the SPI interface of the master device are further determined according to the level and whether the third instruction is a third protocol setting instruction;

[0041] If the polarity and phase of the SPI interface of the master device are determined, the polarity and phase of the SPI interface of the slave device are set to be consistent with the polarity and phase of the SPI interface of the master device;

[0042] Determine whether the detection is completed. If the detection is completed, set the polarity and phase of the slave device SPI interface to communicate with the master device. Otherwise, continue to repeat the above-mentioned adaptive polarity and phase detection of the master device.

[0043] A computer-readable storage medium stores a computer program, which, when executed by a processor, implements the following steps:

[0044] receiving a first instruction sent by a master device;

[0045] If the length of the first instruction is the length set by the first protocol, detecting the level of the SCK pin of the SPI interface of the slave device in the rising edge interrupt of CS;

[0046] After detecting the level, setting the polarity and phase of the slave device SPI interface to any one of four modes;

[0047] After receiving the second instruction sent by the master device, judging the polarity and phase of the SPI interface of the master device according to whether the level and the second instruction are consistent with each other and whether the second instruction is a second protocol setting instruction;

[0048] If they are consistent but the level is low, the polarity and phase of the slave device are set to another one of the four modes, and after receiving the third instruction sent by the master device, the polarity and phase of the SPI interface of the master device are further determined according to whether the level and the third instruction are consistent with the third protocol setting instruction;

[0049] If the polarity and phase of the SPI interface of the master device are determined, the polarity and phase of the SPI interface of the slave device are set to be consistent with the polarity and phase of the SPI interface of the master device;

[0050] Determine whether the detection is completed. If the detection is completed, set the polarity and phase of the slave device SPI interface to communicate with the master device. Otherwise, continue to repeat the above-mentioned adaptive polarity and phase detection of the master device.

[0051] A system for SPI self-adapting master device polarity phase comprises a master device and a slave device communicating via an SPI interface, wherein the slave device comprises the above-mentioned SPI slave device self-adapting master device polarity phase device.

[0052] The above-mentioned method, apparatus, device, medium and system for SPI adaptive master device polarity phase receive a first instruction sent by the master device; if the length of the first instruction is consistent with the length set by the first protocol, the level of the SCK pin of the slave device SPI interface is detected in the rising edge interrupt of CS; after detecting the level, the polarity and phase of the slave device SPI interface are set to any one of four modes; after receiving the second instruction sent by the master device, the polarity and phase of the master device SPI interface are judged according to whether the level and the second instruction are consistent with the second protocol setting instruction; if they are consistent but the level is low, the polarity and phase of the slave device are set to another one of the four modes; after receiving the third instruction sent by the master device, the third instruction is continued to be judged according to whether the level and the third instruction are consistent with the third protocol setting instruction. The polarity and phase of the SPI interface of the master device; if the polarity and phase of the SPI interface of the master device are determined, the polarity and phase of the SPI interface of the slave device are set to be consistent with the polarity and phase of the SPI interface of the master device; determine whether it is in a state of completed detection, if it is in a state of completed detection, communicate with the master device with the polarity and phase of the SPI interface of the slave device after setting, otherwise continue to repeat the above-mentioned adaptive polarity and phase detection of the master device. The present application cooperates with the master device to send different instructions, switches the polarity and phase of the SPI interface of the slave device according to different instructions, and finally adapts to the polarity and phase of the SPI interface of the master device according to logical judgment, which can effectively shorten the debugging cycle, save the step of analyzing the SPI communication mode of the master device, and avoid the problem of communication abnormality caused by the inability to capture the SPI communication mode of the master device. BRIEF DESCRIPTION OF THE DRAWINGS

[0053] Figure 1 The figure is a connection diagram of the SPI master and slave modes in the background technology.

[0054] Figure 2 It is a schematic diagram of the correspondence between four different SPI modes and electrical levels in the background technology.

[0055] Figure 3 The structure diagram of a system in which an SPI slave device adapts to the polarity phase of a master device in one embodiment is shown.

[0056] Figure 4 The figure is a flow chart of a method for an SPI slave device to adapt to the polarity phase of a master device in one embodiment.

[0057] Figure 5 The structure block diagram of an apparatus for an SPI slave device to adapt to the polarity phase of a master device in one embodiment.

[0058] Figure 6 FIG. 4 is a diagram showing the internal structure of an SPI slave device in one embodiment. DETAILED DESCRIPTION

[0059] In order to make the purpose, technical solution and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0060] It should be noted that the SPI serial synchronous clock can be set to different polarities (Clock Polarity, CPOL) and phases (Clock Phase, CPHA). The clock polarity (CPOL) is used to determine whether the potential on the synchronous clock (SCK) signal line is high or low when the bus is idle. When the clock polarity is 0 (CPOL = 0), the SCK signal line is low when idle; when the clock polarity is 1 (CPOL = 1), the SCK signal line is high when idle; the clock phase (CPHA) is used to determine when to sample the signal.

[0061] In one embodiment, Figure 3 As shown, a system for SPI adaptive master device polarity phase is provided, which can be applied to Figure 3 In the application environment shown. The system includes: a master device and a slave device communicating via an SPI interface, and the slave device includes:

[0062] An instruction receiving module, used for receiving a first instruction sent by a master device;

[0063] A level detection module, used for detecting the level of the SCK pin of the SPI interface of the slave device in the rising edge interrupt of CS if the length of the first instruction is the length set by the first protocol;

[0064] The first setting module is used to set the polarity and phase of the slave device SPI interface to any one of four modes after detecting the level. Figure 2 As shown;

[0065] A first judgment module is used to judge the polarity and phase of the SPI interface of the master device according to whether the level and the second instruction are consistent with the second protocol setting instruction after receiving the second instruction sent by the master device;

[0066] A second judgment module is used for setting the polarity and phase of the slave device to another one of the four modes if the two modes are consistent but the level is low, and after receiving the third instruction sent by the master device, continuing to judge the polarity and phase of the SPI interface of the master device according to whether the level and the third instruction are consistent with the third protocol setting instruction;

[0067] The second setting module is used to set the polarity and phase of the SPI interface of the slave device to be consistent with the polarity and phase of the SPI interface of the master device if the polarity and phase of the SPI interface of the master device are determined;

[0068] The status detection module is used to determine whether it is in the state of completing detection. If it is in the state of completing detection, the polarity and phase of the SPI interface of the slave device are set to communicate with the master device, otherwise the above-mentioned adaptive polarity and phase detection of the master device is continued.

[0069] The master device only needs to send the first instruction, the second instruction and the third instruction to the slave device. The slave device switches the polarity and phase of the slave device SPI interface according to different instructions, and finally adapts to the polarity and phase of the master device SPI interface according to logical judgment. This can effectively shorten the debugging cycle, save the step of analyzing the master device SPI communication mode, and avoid communication abnormalities caused by the inability to capture the master device SPI communication mode.

[0070] In one embodiment, Figure 4 As shown, a method for an SPI slave device to adapt to the polarity phase of a master device is provided, and the method is applied to Figure 3 The slave device in the example is used to illustrate, including the following steps:

[0071] Step S401, receiving a first instruction sent by a master device.

[0072] In this embodiment, the first instruction is used to notify the slave device to start adaptive detection, and the length of the first instruction is fixed, which is a preset first length. The slave device receives the first instruction sent by the master device, and the adaptive detection officially starts.

[0073] Step S402: If the length of the first instruction is consistent with the length set by the first protocol, the level of the SCK pin of the slave device SPI interface is detected in the rising edge interrupt of CS.

[0074] In this embodiment, if the length of the first instruction is consistent with the length set by the first protocol, the level of the SCK pin of the slave device SPI interface is detected in the rising edge interrupt of CS; if the length of the first instruction is not the length set by the first protocol, the adaptive master device polarity phase detection is exited.

[0075] Step S403, after detecting the level, setting the polarity and phase of the slave device SPI interface to any one of four modes.

[0076] In this embodiment, the SPI (Serial Peripheral Interface) has four working modes, and these modes determine the timing and method of data transmission by configuring the clock polarity (CPOL) and the clock phase (CPHA). Figure 2 As shown, these four working modes:

[0077] In the first mode, CPOL=0, CPHA=0, the clock idle state is low level (0), and data is sampled and / or output on the falling edge of the clock, with the sampling time being the first edge (odd);

[0078] In the second mode, CPOL=0, CPHA=1, the clock idle state is low (0), data is sampled and / or output on the rising edge of the clock, and the sampling time is the second edge (even);

[0079] The third mode, CPOL = 1, CPHA = 0, the clock idle state is high level (1), data is sampled and / or output on the rising edge of the clock, the sampling time is the first edge (odd);

[0080] The fourth mode CPOL=1, CPHA=1, the clock idle state is high level (1), data is sampled and / or output on the falling edge of the clock, and the sampling time is the second edge (even).

[0081] After detecting the level, the polarity and phase of the slave device SPI interface are preliminarily set to any one of the above four modes.

[0082] Step S404, after receiving the second instruction sent by the master device, judging the polarity and phase of the SPI interface of the master device according to the level and whether the second instruction is consistent with the second protocol setting instruction.

[0083] In this embodiment, after the polarity and phase of the slave device SPI interface are initially set to any one of the above four modes, after the slave device continues to receive the second instruction sent by the master device, the polarity and phase of the master device SPI interface are determined based on the level and whether the second instruction is consistent with the second protocol setting instruction. According to the level, it is determined whether the second instruction is consistent with the second protocol setting instruction. If they are consistent but the level is high, the polarity and phase of the master device SPI interface are determined; if the level is low and inconsistent, the polarity and phase of the master device SPI interface are determined; if they are consistent but the level is low, step S405 is executed.

[0084] Step S405, if they are consistent but the level is low, the polarity and phase of the slave device are set to another one of the four modes. After receiving the third instruction sent by the master device, the polarity and phase of the SPI interface of the master device are further determined based on whether the level and the third instruction are consistent with the third protocol setting instruction.

[0085] In this embodiment, if they are consistent but the level is low, the polarity and phase of the slave device are set to another one of the four modes. After the slave device receives the third instruction sent by the master device, the polarity and phase of the SPI interface of the master device are further determined based on whether the level and the third instruction are consistent with the third protocol setting instruction. According to the level, it is determined whether the third instruction is consistent with the third protocol setting instruction. If the level is low and inconsistent, the polarity and phase of the SPI interface of the master device are determined; if the level is low and consistent, the polarity and phase of the SPI interface of the master device are determined.

[0086] Step S406: If the polarity and phase of the SPI interface of the master device are determined, the polarity and phase of the SPI interface of the slave device are set to be consistent with the polarity and phase of the SPI interface of the master device.

[0087] In this embodiment, if the polarity and phase of the SPI interface of the master device are determined, the slave device sets the polarity and phase of the SPI interface of the slave device to be consistent with the polarity and phase of the SPI interface of the master device.

[0088] Step S407, determining whether the detection is completed. If the detection is completed, setting the polarity and phase of the slave device SPI interface to communicate with the master device. Otherwise, repeating the above-mentioned adaptive polarity and phase detection of the master device.

[0089] In this embodiment, the slave device determines whether it is in a state of completing detection. If it is in a state of completing detection, the polarity and phase of the slave device SPI interface are set to communicate with the master device. Otherwise, the above steps S401 to S406 of adaptively detecting the master device polarity and phase are repeated.

[0090] In the above-mentioned method for the SPI slave device to adapt to the polarity and phase of the master device, a first instruction sent by the master device is received; if the length of the first instruction is consistent with the length set by the first protocol, the level of the SCK pin of the SPI interface of the slave device is detected in the rising edge interrupt of CS; after detecting the level, the polarity and phase of the SPI interface of the slave device are set to any one of four modes; after receiving the second instruction sent by the master device, the polarity and phase of the SPI interface of the master device are judged according to whether the level and the second instruction are consistent with the second protocol setting instruction; if they are consistent but the level is low, the polarity and phase of the slave device are set to another one of the four modes; after receiving the third instruction sent by the master device, the polarity and phase of the slave device are continued to be judged according to whether the level and the third instruction are consistent with the third protocol setting instruction. The polarity and phase of the SPI interface of the master device are determined; if the polarity and phase of the SPI interface of the master device are determined, the polarity and phase of the SPI interface of the slave device are set to be consistent with the polarity and phase of the SPI interface of the master device; it is determined whether the detection is completed. If the detection is completed, the polarity and phase of the SPI interface of the slave device are set to communicate with the master device, otherwise the above-mentioned adaptive polarity and phase detection of the master device is continued to be repeated. This embodiment cooperates with the master device to send different instructions, switches the polarity and phase of the SPI interface of the slave device according to different instructions, and finally adapts to the polarity and phase of the SPI interface of the master device according to logical judgment, which can effectively shorten the debugging cycle, save the step of analyzing the SPI communication mode of the master device, and avoid the problem of communication abnormality caused by the inability to capture the SPI communication mode of the master device.

[0091] It should be understood that although Figure 4 The steps in the flowchart are shown in sequence as indicated by the arrows, but these steps are not necessarily executed in the order indicated by the arrows. Unless otherwise specified in this document, there is no strict order restriction for the execution of these steps, and these steps can be executed in other orders. Moreover, Figure 4 At least part of the steps may include multiple sub-steps or multiple stages. These sub-steps or stages are not necessarily executed at the same time, but can be executed at different times. The execution order of these sub-steps or stages is not necessarily sequential, but can be executed in turn or alternately with other steps or at least part of the sub-steps or stages of other steps.

[0092] In one embodiment, Figure 5 As shown, a device for an SPI slave device to adapt to the polarity phase of a master device is provided, comprising: an instruction receiving module 51, a level detection module 52, a first setting module 53, a first judgment module 54, a second judgment module 55, a second setting module 56 and a state detection module 57, wherein:

[0093] The instruction receiving module 51 is used to receive a first instruction sent by the master device;

[0094] A level detection module 52, configured to detect the level of the SCK pin of the SPI interface of the slave device in a rising edge interrupt of CS if the length of the first instruction is the length set by the first protocol;

[0095] A first setting module 53 is used to set the polarity and phase of the slave device SPI interface to any one of four modes after detecting the level;

[0096] A first judgment module 54 is used to judge the polarity and phase of the SPI interface of the master device according to whether the level and the second instruction are consistent with the second protocol setting instruction after receiving the second instruction sent by the master device;

[0097] A second judgment module 55 is used to set the polarity and phase of the slave device to another one of the four modes if the two modes are consistent but the level is low, and after receiving the third instruction sent by the master device, continue to judge the polarity and phase of the SPI interface of the master device according to whether the level and the third instruction are consistent with the third protocol setting instruction;

[0098] The second setting module 56 is used to set the polarity and phase of the SPI interface of the slave device to be consistent with the polarity and phase of the SPI interface of the master device if the polarity and phase of the SPI interface of the master device are determined;

[0099] The status detection module 57 is used to determine whether it is in the state of completing detection. If it is in the state of completing detection, the polarity and phase of the SPI interface of the slave device are set to communicate with the master device. Otherwise, the above-mentioned adaptive polarity and phase detection of the master device is continued.

[0100] Furthermore, the first judgment module 54 judges whether the second instruction is consistent with the second protocol setting instruction specifically according to the level: if they are consistent but the level is high, the polarity and phase of the SPI interface of the master device are judged; if the level is low and inconsistent, the polarity and phase of the SPI interface of the master device are judged; if they are consistent but the level is low, the polarity and phase of the SPI interface of the slave device are set to another one of the four modes.

[0101] Furthermore, the second judgment module 55 is specifically used to judge whether the third instruction is consistent with the third protocol setting instruction according to the level: if the level is low and inconsistent, the polarity and phase of the SPI interface of the master device are judged; if the level is low and consistent, the polarity and phase of the SPI interface of the master device are judged.

[0102] The specific definition of the device for the SPI slave device to adapt to the polarity phase of the master device can be found in the definition of the method for the SPI slave device to adapt to the polarity phase of the master device in the above text, which will not be repeated here. Each module in the above-mentioned device for the SPI slave device to adapt to the polarity phase of the master device can be implemented in whole or in part by software, hardware and a combination thereof. The above-mentioned modules can be embedded in or independent of the processor in the SPI slave device in the form of hardware, or can be stored in the memory in the SPI slave device in the form of software, so that the processor can call and execute the operations corresponding to the above modules.

[0103] In one embodiment, a SPI slave device is provided, whose internal structure diagram can be as follows: Figure 6 As shown. The SPI slave device includes a processor and a memory connected via a system bus. The processor of the SPI slave device is used to provide computing and control capabilities. The memory of the SPI slave device includes a non-volatile storage medium. The non-volatile storage medium stores a computer program. The internal memory provides an environment for the operation of the computer program in the non-volatile storage medium. When the computer program is executed by the processor, a method for implementing a SPI slave device to adapt to the polarity phase of a master device.

[0104] Those skilled in the art will understand that Figure 6 The structure shown in the figure is only a block diagram of a partial structure related to the scheme of the present application, and does not constitute a limitation on the SPI slave device to which the scheme of the present application is applied. The specific SPI slave device may include more or fewer components than those shown in the figure, or combine certain components, or have a different arrangement of components.

[0105] In one embodiment, an SPI slave device is provided, including a memory and a processor, wherein the memory stores a computer program, and the processor implements the following steps when executing the computer program:

[0106] receiving a first instruction sent by a master device;

[0107] If the length of the first instruction is consistent with the length set by the first protocol, then detecting the level of the SCK pin of the SPI interface of the slave device in the rising edge interrupt of CS;

[0108] After detecting the level, setting the polarity and phase of the slave device SPI interface to any one of four modes;

[0109] After receiving the second instruction sent by the master device, judging the polarity and phase of the SPI interface of the master device according to the level and whether the second instruction is consistent with the second protocol setting instruction;

[0110] If they are consistent but the level is low, the polarity and phase of the slave device are set to another one of the four modes, and after receiving the third instruction sent by the master device, the polarity and phase of the SPI interface of the master device are further determined according to whether the level and the third instruction are consistent with the third protocol setting instruction;

[0111] If the polarity and phase of the SPI interface of the master device are determined, the polarity and phase of the SPI interface of the slave device are set to be consistent with the polarity and phase of the SPI interface of the master device;

[0112] Determine whether the detection is completed. If the detection is completed, set the polarity and phase of the slave device SPI interface to communicate with the master device. Otherwise, continue to repeat the above-mentioned adaptive polarity and phase detection of the master device.

[0113] In one embodiment, a computer readable storage medium is provided, on which a computer program is stored, and when the computer program is executed by a processor, the following steps are implemented:

[0114] receiving a first instruction sent by a master device;

[0115] If the length of the first instruction is consistent with the length set by the first protocol, then detecting the level of the SCK pin of the SPI interface of the slave device in the rising edge interrupt of CS;

[0116] After detecting the level, setting the polarity and phase of the slave device SPI interface to any one of four modes;

[0117] After receiving the second instruction sent by the master device, judging the polarity and phase of the SPI interface of the master device according to the level and whether the second instruction is consistent with the second protocol setting instruction;

[0118] If they are consistent but the level is low, the polarity and phase of the slave device are set to another one of the four modes, and after receiving the third instruction sent by the master device, the polarity and phase of the SPI interface of the master device are further determined according to whether the level and the third instruction are consistent with the third protocol setting instruction;

[0119] If the polarity and phase of the SPI interface of the master device are determined, the polarity and phase of the SPI interface of the slave device are set to be consistent with the polarity and phase of the SPI interface of the master device;

[0120] Determine whether the detection is completed. If the detection is completed, set the polarity and phase of the slave device SPI interface to communicate with the master device. Otherwise, continue to repeat the above-mentioned adaptive polarity and phase detection of the master device.

[0121] Those skilled in the art can understand that all or part of the processes in the above-mentioned embodiment methods can be completed by instructing the relevant hardware through a computer program, and the computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to memory, storage, database or other media used in the embodiments provided in this application can include non-volatile and / or volatile memory. Non-volatile memory can include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM) or flash memory. Volatile memory can include random access memory (RAM) or external cache memory. As an illustration and not limitation, RAM is available in many forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link (Synchlink) DRAM (SLDRAM), memory bus (Rambus) direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM).

[0122] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0123] The above-mentioned embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the invention patent. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent of the present application shall be subject to the attached claims.

Claims

1. A method for an SPI slave device to adapt to the polarity phase of a master device, characterized in that: The method comprises: receiving a first instruction sent by a master device; If the length of the first instruction is consistent with the length set by the first protocol, then detecting the level of the SCK pin of the SPI interface of the slave device in the rising edge interrupt of CS; After detecting the level, setting the polarity and phase of the slave device SPI interface to any one of four modes; After receiving the second instruction sent by the master device, judging the polarity and phase of the SPI interface of the master device according to the level and whether the second instruction is consistent with the second protocol setting instruction; If they are consistent but the level is low, the polarity and phase of the slave device are set to another one of the four modes, and after receiving the third instruction sent by the master device, the polarity and phase of the SPI interface of the master device are further determined according to whether the level and the third instruction are consistent with the third protocol setting instruction; If the polarity and phase of the SPI interface of the master device are determined, the polarity and phase of the SPI interface of the slave device are set to be consistent with the polarity and phase of the SPI interface of the master device; Determine whether the detection is completed. If the detection is completed, set the polarity and phase of the slave device SPI interface to communicate with the master device. Otherwise, continue to repeat the above-mentioned adaptive polarity and phase detection of the master device.

2. The method according to claim 1, characterized in that: The level and the second instruction are consistent with the second protocol setting instruction to determine the polarity and phase of the master device SPI interface: determining, based on the level, whether the second instruction is consistent with a second protocol setting instruction; If they are consistent but the level is high, the polarity and phase of the SPI interface of the master device are determined; If the level is low and inconsistent, the polarity and phase of the master device SPI interface are determined; If they are consistent but the level is low, the polarity and phase of the slave device SPI interface are set to another one of the four modes.

3. The method according to claim 1, characterized in that The step of further determining the polarity and phase of the SPI interface of the master device according to whether the level and the third instruction are consistent with the third protocol setting instruction is as follows: determining, according to the level, whether the third instruction is consistent with the third protocol setting instruction; If the level is low and inconsistent, the polarity and phase of the master device SPI interface are determined; If the level is low and consistent, the polarity and phase of the master device SPI interface are determined.

4. The method according to claim 1, characterized in that: The method further comprises: It is determined whether the length of the first instruction is consistent with the length set by the first protocol. If the length of the first instruction is inconsistent with the length set by the first protocol, the current adaptive master device polarity phase detection is exited.

5. A device for SPI slave device to adapt to the polarity phase of master device, characterized in that: The device comprises: An instruction receiving module, used for receiving a first instruction sent by a master device; A level detection module, used for detecting the level of the SCK pin of the SPI interface of the slave device in the rising edge interrupt of CS if the length of the first instruction is the length set by the first protocol; A first setting module, used for setting the polarity and phase of the SPI interface of the slave device to any one of four modes after detecting the level; A first judgment module is used to judge the polarity and phase of the SPI interface of the master device according to whether the level and the second instruction are consistent with the second protocol setting instruction after receiving the second instruction sent by the master device; A second judgment module is used for setting the polarity and phase of the slave device to another one of the four modes if the two modes are consistent but the level is low, and after receiving the third instruction sent by the master device, continuing to judge the polarity and phase of the SPI interface of the master device according to whether the level and the third instruction are consistent with the third protocol setting instruction; The second setting module is used to set the polarity and phase of the SPI interface of the slave device to be consistent with the polarity and phase of the SPI interface of the master device if the polarity and phase of the SPI interface of the master device are determined; The status detection module is used to determine whether it is in the state of completing detection. If it is in the state of completing detection, the polarity and phase of the SPI interface of the slave device are set to communicate with the master device, otherwise the above-mentioned adaptive polarity and phase detection of the master device is continued.

6. The device according to claim 5, characterized in that The first judgment module is specifically used to judge whether the second instruction is consistent with the second protocol setting instruction according to the level: if they are consistent but the level is high, then judge the polarity and phase of the SPI interface of the master device; If the level is low and inconsistent, the polarity and phase of the master device SPI interface are determined; if they are consistent but the level is low, the polarity and phase of the slave device SPI interface are set to another one of the four modes.

7. The device according to claim 5, characterized in that The second judgment module is specifically used to judge whether the third instruction is consistent with the third protocol setting instruction according to the level: if the level is low and inconsistent, then judge the polarity and phase of the SPI interface of the master device; If the level is low and consistent, the polarity and phase of the master device SPI interface are determined.

8. An SPI slave device, comprising a memory and a processor, wherein the memory stores a computer program, characterized in that: When the processor executes the computer program, the steps of the method according to any one of claims 1 to 4 are implemented.

9. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 4 are implemented.

10. A system for SPI adaptive master device polarity phase, comprising a master device and a slave device communicating via an SPI interface, characterized in that: The slave device comprises the apparatus for SPI slave device to adapt to the polarity phase of the master device as claimed in claims 5 to 7.

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