Output impedance modeling method, device, electronic device and storage medium of three-phase three-leg inverter

Abstract

The present invention discloses a method, device, equipment and storage medium for modeling the output impedance of a three-phase three-bridge-arm inverter. The method includes: analyzing the zero-sequence output impedance of the three-phase three-bridge-arm inverter according to the current limiting strategy of the grid-connected inverter, and constructing a zero-sequence output impedance model of the grid-connected inverter of the three-phase three-bridge-arm inverter; calculating the positive-sequence output impedance of the three-phase three-bridge-arm inverter according to the positive-sequence phasor of the steady-state output voltage and the positive-sequence phasor of the steady-state output current after a phase-to-phase symmetrical fault occurs, and constructing a positive-sequence output impedance model of the grid-connected inverter of the three-phase three-bridge-arm inverter; calculating the negative-sequence output impedance of the three-phase three-bridge-arm inverter according to the negative-sequence phasor of the steady-state output voltage and the negative-sequence phasor of the steady-state output current after an asymmetric phase-to-phase fault occurs, and constructing a negative-sequence output impedance model of the grid-connected inverter of the three-phase three-bridge-arm inverter, thereby obtaining an output impedance model of the three-phase three-bridge-arm inverter. The present invention can construct an output impedance model of a three-phase three-bridge-arm inverter.

Description

Technical Field

[0001] The present invention relates to the field of inverters, and in particular to an output impedance modeling method, device, electronic device and storage medium for a three-phase three-leg inverter. Background Art

[0002] Distributed generators (DGs), primarily powered by photovoltaic and wind power, are a key component of microgrids. These prime movers cannot directly deliver power at the rated amplitude and frequency, so they require inverters as an interface between the prime movers and the microgrid. Inverter-interfaced distributed generators (IIDGs) are commonly used in microgrids and include both grid-connected and grid-following inverters. The control objective of grid-connected inverters is to maintain a stable voltage amplitude and frequency to inject the active and reactive power required by the loads within the microgrid. In this sense, grid-connected inverters function similarly to synchronous generators, as they establish the voltage at the nominal amplitude and frequency required by the microgrid, hence the term "grid-connected." Equivalent models of power equipment in the sequence domain are the foundation of power flow analysis and short-circuit analysis. Power flow analysis requires only the positive-sequence model, while short-circuit analysis requires all zero-sequence, positive-sequence, and negative-sequence models. However, a practical model currently lacks the characteristics of grid-connected inverters. Summary of the Invention

[0003] The present invention provides a method, device, electronic device and storage medium for modeling the output impedance of a three-phase three-leg inverter, so as to solve the technical problem that there is currently no practical model to describe the characteristics of a grid-connected inverter.

[0004] In order to solve the above technical problems, an embodiment of the present invention provides an output impedance modeling method for a three-phase three-leg inverter, comprising:

[0005] Determine a current limiting strategy for the grid-connected inverter; wherein the current limiting strategy includes: an instantaneous saturation current limiting strategy or a latching current limiting strategy;

[0006] Obtaining the zero-sequence output impedance of the three-phase three-leg inverter according to the current limiting strategy analysis, and then constructing a grid-connected inverter zero-sequence output impedance model of the three-phase three-leg inverter according to the zero-sequence output impedance;

[0007] According to the current limiting strategy, a phase-to-phase symmetrical fault is set at the output end of the grid-connected inverter, a steady-state output voltage positive-sequence phasor and a steady-state output current positive-sequence phasor are calculated after the occurrence of the phase-to-phase symmetrical fault, and a positive-sequence output impedance of the three-phase three-leg inverter is calculated based on the steady-state output voltage positive-sequence phasor and the steady-state output current positive-sequence phasor, and then a grid-connected inverter positive-sequence output impedance model of the three-phase three-leg inverter is constructed based on the positive-sequence output impedance;

[0008] According to the current limiting strategy, an inter-phase asymmetric fault is set at the output end of the grid-connected inverter, a steady-state output voltage negative-sequence phasor and a steady-state output current negative-sequence phasor are calculated after the inter-phase asymmetric fault occurs, and a negative-sequence output impedance of the three-phase three-leg inverter is calculated based on the steady-state output voltage negative-sequence phasor and the steady-state output current negative-sequence phasor, and then a grid-connected inverter negative-sequence output impedance model of the three-phase three-leg inverter is constructed based on the negative-sequence output impedance;

[0009] According to the zero-sequence output impedance model of the grid-connected inverter, the positive-sequence output impedance model of the grid-connected inverter, and the negative-sequence output impedance model of the grid-connected inverter, an output impedance model of the three-phase three-leg inverter is obtained.

[0010] As a preferred solution, the zero-sequence output impedance of the three-phase three-leg inverter is infinite.

[0011] As a preferred solution, according to the current limiting strategy, a phase-to-phase symmetrical fault is set at the output end of the grid-connected inverter, and the steady-state output voltage positive-sequence phasor and the steady-state output current positive-sequence phasor after the occurrence of the phase-to-phase symmetrical fault are calculated. The positive-sequence output impedance of the three-phase three-leg inverter is calculated based on the steady-state output voltage positive-sequence phasor and the steady-state output current positive-sequence phasor, and then a grid-connected inverter positive-sequence output impedance model of the three-phase three-leg inverter is constructed based on the positive-sequence output impedance, including:

[0012] According to the current limiting strategy, a phase-to-phase symmetrical fault is set at the output end of the grid-connected inverter to reduce the output voltage of the inverter to a preset first voltage range;

[0013] Calculating a steady-state output voltage positive sequence phasor and a steady-state output current positive sequence phasor after the inter-phase symmetrical fault occurs, and calculating a positive-sequence output impedance of the three-phase three-leg inverter based on the steady-state output voltage positive sequence phasor and the steady-state output current positive sequence phasor;

[0014] increasing a fault resistance for a symmetrical interphase fault set at an output terminal of the grid-connected inverter until the output voltage of the inverter decreases to a preset second voltage range, and generating a first relationship graph between the amplitude of the positive-sequence output impedance and the voltage drop percentage after the occurrence of the symmetrical interphase fault, and a second relationship graph between the phase angle of the positive-sequence output impedance and the voltage drop percentage, during the process of increasing the fault resistance for the symmetrical interphase fault; wherein the second voltage range is smaller than the first voltage range;

[0015] A positive-sequence output impedance model of a grid-connected inverter of a three-phase three-leg inverter is constructed according to the first relationship diagram and the second relationship diagram.

[0016] As a preferred solution, according to the current limiting strategy, a phase asymmetric fault is set at the output end of the grid-connected inverter, and the steady-state output voltage negative sequence phasor and the steady-state output current negative sequence phasor after the occurrence of the phase asymmetric fault are calculated. The negative sequence output impedance of the three-phase three-leg inverter is calculated based on the steady-state output voltage negative sequence phasor and the steady-state output current negative sequence phasor, and then a grid-connected inverter negative sequence output impedance model of the three-phase three-leg inverter is constructed based on the negative sequence output impedance, including:

[0017] According to the current limiting strategy, an inter-phase asymmetric fault is set at the output end of the grid-connected inverter so that the amplitude of the output voltage imbalance of the inverter reaches a preset first amplitude range;

[0018] Calculating a steady-state output voltage negative-sequence phasor and a steady-state output current negative-sequence phasor after the inter-phase asymmetric fault occurs, and calculating a negative-sequence output impedance of the three-phase three-leg inverter based on the steady-state output voltage negative-sequence phasor and the steady-state output current negative-sequence phasor;

[0019] reducing a fault resistance for an inter-phase asymmetric fault set at an output terminal of the grid-connected inverter until the magnitude of the output voltage imbalance of the inverter reaches a preset second amplitude range, and generating, during the process of reducing the fault resistance for the inter-phase asymmetric fault, a third relationship graph between the magnitude of the negative-sequence output impedance and the voltage imbalance after the inter-phase asymmetric fault occurs, and a fourth relationship graph between the phase angle of the negative-sequence output impedance and the voltage imbalance; wherein the second amplitude range is greater than the first amplitude range;

[0020] A negative-sequence output impedance model of a grid-connected inverter of a three-phase three-leg inverter is constructed according to the third relationship diagram and the fourth relationship diagram.

[0021] Based on the above embodiment, another embodiment of the present invention provides an output impedance modeling device for a three-phase three-leg inverter, comprising: a current limiting strategy determination module, a grid-connected inverter zero-sequence output impedance model construction module, a grid-connected inverter positive-sequence output impedance model construction module, a grid-connected inverter negative-sequence output impedance model construction module, and an output impedance model construction module;

[0022] The current limiting strategy determination module is used to determine the current limiting strategy of the grid-connected inverter; wherein the current limiting strategy includes: an instantaneous saturation current limiting strategy or a latching current limiting strategy;

[0023] The grid-connected inverter zero-sequence output impedance model construction module is used to obtain the zero-sequence output impedance of the three-phase three-leg inverter according to the current limiting strategy analysis, and then construct the grid-connected inverter zero-sequence output impedance model of the three-phase three-leg inverter according to the zero-sequence output impedance;

[0024] The grid-connected inverter positive-sequence output impedance model construction module is used to set a phase-to-phase symmetrical fault at the output end of the grid-connected inverter according to the current limiting strategy, calculate the steady-state output voltage positive-sequence phasor and the steady-state output current positive-sequence phasor after the occurrence of the phase-to-phase symmetrical fault, and calculate the positive-sequence output impedance of the three-phase three-leg inverter based on the steady-state output voltage positive-sequence phasor and the steady-state output current positive-sequence phasor, and then construct the grid-connected inverter positive-sequence output impedance model of the three-phase three-leg inverter based on the positive-sequence output impedance;

[0025] The grid-connected inverter negative-sequence output impedance model construction module is used to set an inter-phase asymmetric fault at the output end of the grid-connected inverter according to the current limiting strategy, calculate the steady-state output voltage negative-sequence phasor and the steady-state output current negative-sequence phasor after the inter-phase asymmetric fault occurs, and calculate the negative-sequence output impedance of the three-phase three-leg inverter based on the steady-state output voltage negative-sequence phasor and the steady-state output current negative-sequence phasor, and then construct the grid-connected inverter negative-sequence output impedance model of the three-phase three-leg inverter based on the negative-sequence output impedance;

[0026] The output impedance model construction module is used to obtain the output impedance model of the three-phase three-leg inverter according to the zero-sequence output impedance model of the grid-connected inverter, the positive-sequence output impedance model of the grid-connected inverter, and the negative-sequence output impedance model of the grid-connected inverter.

[0027] As a preferred solution, the zero-sequence output impedance of the three-phase three-leg inverter is infinite.

[0028] As a preferred solution, according to the current limiting strategy, a phase-to-phase symmetrical fault is set at the output end of the grid-connected inverter, and the steady-state output voltage positive-sequence phasor and the steady-state output current positive-sequence phasor after the occurrence of the phase-to-phase symmetrical fault are calculated. The positive-sequence output impedance of the three-phase three-leg inverter is calculated based on the steady-state output voltage positive-sequence phasor and the steady-state output current positive-sequence phasor, and then a grid-connected inverter positive-sequence output impedance model of the three-phase three-leg inverter is constructed based on the positive-sequence output impedance, including:

[0029] According to the current limiting strategy, a phase-to-phase symmetrical fault is set at the output end of the grid-connected inverter to reduce the output voltage of the inverter to a preset first voltage range;

[0030] Calculating a steady-state output voltage positive sequence phasor and a steady-state output current positive sequence phasor after the inter-phase symmetrical fault occurs, and calculating a positive-sequence output impedance of the three-phase three-leg inverter based on the steady-state output voltage positive sequence phasor and the steady-state output current positive sequence phasor;

[0031] increasing a fault resistance for a symmetrical interphase fault set at an output terminal of the grid-connected inverter until the output voltage of the inverter decreases to a preset second voltage range, and generating a first relationship graph between the amplitude of the positive-sequence output impedance and the voltage drop percentage after the occurrence of the symmetrical interphase fault, and a second relationship graph between the phase angle of the positive-sequence output impedance and the voltage drop percentage, during the process of increasing the fault resistance for the symmetrical interphase fault; wherein the second voltage range is smaller than the first voltage range;

[0032] A positive-sequence output impedance model of a grid-connected inverter of a three-phase three-leg inverter is constructed according to the first relationship diagram and the second relationship diagram.

[0033] As a preferred solution, according to the current limiting strategy, a phase asymmetric fault is set at the output end of the grid-connected inverter, and the steady-state output voltage negative sequence phasor and the steady-state output current negative sequence phasor after the occurrence of the phase asymmetric fault are calculated. The negative sequence output impedance of the three-phase three-leg inverter is calculated based on the steady-state output voltage negative sequence phasor and the steady-state output current negative sequence phasor, and then a grid-connected inverter negative sequence output impedance model of the three-phase three-leg inverter is constructed based on the negative sequence output impedance, including:

[0034] According to the current limiting strategy, an inter-phase asymmetric fault is set at the output end of the grid-connected inverter so that the amplitude of the output voltage imbalance of the inverter reaches a preset first amplitude range;

[0035] Calculating a steady-state output voltage negative-sequence phasor and a steady-state output current negative-sequence phasor after the inter-phase asymmetric fault occurs, and calculating a negative-sequence output impedance of the three-phase three-leg inverter based on the steady-state output voltage negative-sequence phasor and the steady-state output current negative-sequence phasor;

[0036] reducing a fault resistance for an inter-phase asymmetric fault set at an output terminal of the grid-connected inverter until the magnitude of the output voltage imbalance of the inverter reaches a preset second amplitude range, and generating, during the process of reducing the fault resistance for the inter-phase asymmetric fault, a third relationship graph between the magnitude of the negative-sequence output impedance and the voltage imbalance after the inter-phase asymmetric fault occurs, and a fourth relationship graph between the phase angle of the negative-sequence output impedance and the voltage imbalance; wherein the second amplitude range is greater than the first amplitude range;

[0037] A negative-sequence output impedance model of a grid-connected inverter of a three-phase three-leg inverter is constructed according to the third relationship diagram and the fourth relationship diagram.

[0038] Based on the above embodiments, another embodiment of the present invention provides an electronic device, which includes a processor, a memory, and a computer program stored in the memory and configured to be executed by the processor. When the processor executes the computer program, it implements the output impedance modeling method of the three-phase three-leg inverter described in the above embodiment of the invention.

[0039] Based on the above embodiments, another embodiment of the present invention provides a storage medium, which includes a stored computer program, wherein when the computer program is running, the device where the storage medium is located is controlled to execute the output impedance modeling method of the three-phase three-leg inverter described in the above invention embodiment.

[0040] Compared with the prior art, the embodiments of the present invention have the following beneficial effects:

[0041] The present invention provides an output impedance modeling method for a three-phase three-leg inverter to determine a current limiting strategy for a grid-connected inverter; wherein the current limiting strategy includes: an instantaneous saturation current limiting strategy or a latching current limiting strategy; the zero-sequence output impedance of the three-phase three-leg inverter is obtained by analysis according to the current limiting strategy, and then a zero-sequence output impedance model of the grid-connected inverter of the three-phase three-leg inverter is constructed according to the zero-sequence output impedance; according to the current limiting strategy, a phase-to-phase symmetrical fault is set at the output end of the grid-connected inverter, and a steady-state output voltage positive-sequence phasor and a steady-state output current positive-sequence phasor after the phase-to-phase symmetrical fault occurs are calculated, and the positive-sequence output impedance of the three-phase three-leg inverter is calculated according to the steady-state output voltage positive-sequence phasor and the steady-state output current positive-sequence phasor, and then the zero-sequence output impedance model of the grid-connected inverter of the three-phase three-leg inverter is constructed according to the zero-sequence output impedance. The positive-sequence output impedance constructs a positive-sequence output impedance model of a grid-connected inverter of a three-phase three-leg inverter; according to the current limiting strategy, an inter-phase asymmetric fault is set at the output end of the grid-connected inverter, and the steady-state output voltage negative-sequence phasor and the steady-state output current negative-sequence phasor after the inter-phase asymmetric fault occur are calculated, and the negative-sequence output impedance of the three-phase three-leg inverter is calculated based on the steady-state output voltage negative-sequence phasor and the steady-state output current negative-sequence phasor, and then the grid-connected inverter negative-sequence output impedance model of the three-phase three-leg inverter is constructed based on the negative-sequence output impedance; the output impedance model of the three-phase three-leg inverter is obtained based on the grid-connected inverter zero-sequence output impedance model, the grid-connected inverter positive-sequence output impedance model and the grid-connected inverter negative-sequence output impedance model.

[0042] The present invention can construct a zero-sequence output impedance model of a grid-connected inverter, a positive-sequence output impedance model of a grid-connected inverter, and a negative-sequence output impedance model of a grid-connected inverter, and then construct an output impedance model of a three-phase three-leg inverter. This model can be used to analyze the impedance characteristics of the inverter under different frequency components (positive sequence, negative sequence, and zero sequence), and then be applied to multiple power grids and fault scenarios to improve the system's stability, fault identification, and grid-connected control capabilities. BRIEF DESCRIPTION OF THE DRAWINGS

[0043] Figure 1 1 is a flow chart of an output impedance modeling method for a three-phase three-leg inverter provided by one embodiment of the present invention;

[0044] Figure 2 This is the topological structure diagram of the L-type filter port of the inverter;

[0045] Figure 3 This is the topological structure diagram of the LC filter port of the inverter;

[0046] Figure 4 This is a schematic diagram of the current limiting structure under inverter PI control;

[0047] Figure 5 1 is a schematic structural diagram of an output impedance modeling device for a three-phase three-leg inverter provided by one embodiment of the present invention. DETAILED DESCRIPTION

[0048] To make the objectives, technical solutions, and advantages of this application more clear, the technical solutions in this application will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of this application. Obviously, the described embodiments are only part of the embodiments of this application, not all of them. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making any creative efforts are within the scope of protection of this application.

[0049] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those skilled in the art to which this application belongs; the terms used herein are only for the purpose of describing specific embodiments and are not intended to limit this application; the terms "including" and "having" and any variations thereof in the specification and claims of this application and the above-mentioned figure descriptions are intended to cover non-exclusive inclusions.

[0050] In the description of the embodiments of this application, the technical terms "first" and "second" are used only to distinguish different objects and should not be understood to indicate or imply relative importance or implicitly specify the quantity, specific order, or primary and secondary relationship of the indicated technical features. In the description of the embodiments of this application, the meaning of "plurality" is more than two, unless otherwise clearly and specifically defined.

[0051] References herein to "embodiments" mean that a particular feature, structure, or characteristic described in connection with the embodiments may be included in at least one embodiment of the present application. The appearance of this phrase in various places in the specification does not necessarily refer to the same embodiment, nor does it constitute an independent or alternative embodiment that is mutually exclusive of other embodiments. It is understood, both explicitly and implicitly, by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0052] In the description of the embodiments of this application, the term "and / or" is simply a description of the association relationship between associated objects, indicating that three relationships can exist. For example, A and / or B can represent the following three situations: A exists alone, A and B exist simultaneously, and B exists alone. In addition, the character " / " in this document generally indicates that the associated objects are in an "or" relationship.

[0053] In the description of the embodiments of the present application, the term "multiple" refers to more than two (including two). Similarly, "multiple groups" refers to more than two groups (including two groups), and "multiple pieces" refers to more than two pieces (including two pieces).

[0054] In the description of the embodiments of the present application, unless otherwise expressly specified or limited, technical terms such as "installed," "connected," "connected," and "fixed" should be understood in a broad sense. For example, they can refer to fixed connections, detachable connections, or integration; mechanical connections or electrical connections; direct connections or indirect connections through an intermediate medium; internal connections between two components or interactions between two components. Those skilled in the art can understand the specific meanings of the above terms in the embodiments of the present application based on specific circumstances.

[0055] Example 1

[0056] Please refer to Figure 1 , is a flow chart of an output impedance modeling method for a three-phase three-leg inverter provided by an embodiment of the present invention, comprising the following specific steps:

[0057] S1. Determine a current limiting strategy for the grid-connected inverter; wherein the current limiting strategy includes: an instantaneous saturation current limiting strategy or a latching current limiting strategy;

[0058] Specifically, the present invention provides a sequence-domain output impedance modeling method for a three-phase, three-leg inverter, including the derivation of the positive-sequence output impedance, the negative-sequence output impedance, and the relationship between their amplitudes and phase angles. Before modeling and analyzing the inverter, its control strategy must be determined. This invention focuses on analyzing the three-phase power conversion strategy in the dq domain under a PI controller design. This control strategy achieves satisfactory dynamic and steady-state performance, making it suitable for sequence-domain modeling methods under steady-state analysis. This modeling method can also be applied to less popular control strategies such as virtual oscillation control and droop-based control.

[0059] Current limiting is a necessary condition for achieving inverter fault switching to keep the inverter connected to the microgrid. Inverter modeling is mainly achieved by analyzing the electrical signal at the inverter output to achieve the equivalent of output impedance. When building the equivalent model, the specific method is as follows:

[0060] S1. Analysis of inverter current limiting strategy;

[0061] S2. Analytical modeling of equivalent zero-sequence model of grid-connected inverter;

[0062] S3. Analytical modeling of equivalent positive sequence model of grid-connected inverter;

[0063] S4. Analytical modeling of equivalent negative sequence model of grid-connected inverter;

[0064] S5. Analytical modeling of equivalent impedance model of grid-connected inverter;

[0065] After constructing a sequence-domain impedance equivalent model for a three-phase, three-leg grid-type inverter, the present invention can be used to analyze the inverter's impedance characteristics under different frequency components (positive, negative, and zero sequence), and then applied to multiple power grids and fault scenarios to improve the system's stability, fault identification, and grid-connected control capabilities. In a distribution network containing multiple distributed power sources, three-phase unbalanced faults (such as single-phase ground faults or phase-to-phase short circuit faults) often cause significant changes in the positive, negative, and zero-sequence components of voltage and current. The sequence-domain impedance model of the three-phase, three-leg inverter can play a key role in this scenario.

[0066] Specifically, the current limiting strategy of the grid-connected inverter in S1 is described in detail: the current limiting method is mainly based on instantaneous saturation current limiting or latching current limiting. The latter is used here because it can keep the inverter output signal undistorted. According to the temporary reference current under the dq conversion given by the PI controller, the inverter The current amplitude is:

[0067]

[0068] in is the d-axis current reference value, is the q-axis current reference value. In the equilibrium state, the current controller is Adjust the three-phase current ia, ib, ic. When , the temporary reference current will not cause overcurrent damage to the inverter, and the final reference current is:

[0069]

[0070] In addition, if The temporary reference current should be modified by the limiter:

[0071]

[0072] I th is the current amplitude in the dq coordinate system given by the PI controller. Theoretically, when the current limiter is not triggered, the output impedance is negligible, and the voltage controller regulates the output voltage at a reference value, independent of the inverter current. When the current limiter is active, the inverter's response to faults varies. When the output current reaches the upper limit, the output voltage drops, which can be explained by the presence of impedance at the inverter output. Therefore, equivalent modeling of the output impedance can be used to analyze the inverter's operation under fault conditions.

[0073] S2. Analyze and obtain the zero-sequence output impedance of the three-phase three-leg inverter according to the current limiting strategy, and then construct a zero-sequence output impedance model of the grid-connected inverter of the three-phase three-leg inverter according to the zero-sequence output impedance;

[0074] Preferably, the zero-sequence output impedance of the three-phase three-leg inverter is infinite.

[0075] Specifically, the zero-sequence model of the grid-connected inverter in S2 is analyzed. The object of this invention is mainly a three-phase three-bridge inverter. Specifically, from the perspective of the system, the three-phase three-bridge inverter has a key feature. They cannot generate any zero-sequence current, which in turn means that the magnitude of the zero-sequence output impedance is infinite. Please refer to Figure 2 and Figure 3 , which are the topological structures of the inverter's L-type filter port and the inverter's LC-type filter port, respectively. This indicates that because the inverter's zero-sequence output impedance is always infinite, the inverter's zero-sequence model is unaffected by the inverter's control strategy during a fault. It should be noted that this statement only applies to three-phase, three-leg inverters.

[0076] S3. According to the current limiting strategy, a phase-to-phase symmetrical fault is set at the output end of the grid-connected inverter, and a steady-state output voltage positive-sequence phasor and a steady-state output current positive-sequence phasor are calculated after the occurrence of the phase-to-phase symmetrical fault. The positive-sequence output impedance of the three-phase three-leg inverter is calculated based on the steady-state output voltage positive-sequence phasor and the steady-state output current positive-sequence phasor, and a grid-connected inverter positive-sequence output impedance model of the three-phase three-leg inverter is constructed based on the positive-sequence output impedance.

[0077] Preferably, according to the current limiting strategy, a phase-to-phase symmetrical fault is set at the output end of the grid-connected inverter, the steady-state output voltage positive sequence phasor and the steady-state output current positive sequence phasor are calculated after the occurrence of the phase-to-phase symmetrical fault, and the positive-sequence output impedance of the three-phase three-leg inverter is calculated based on the steady-state output voltage positive sequence phasor and the steady-state output current positive sequence phasor, and then a grid-connected inverter positive sequence output impedance model of the three-phase three-leg inverter is constructed based on the positive-sequence output impedance, including: according to the current limiting strategy, a phase-to-phase symmetrical fault is set at the output end of the grid-connected inverter to reduce the output voltage of the inverter to a preset first voltage range; the steady-state output voltage positive sequence phasor and the steady-state output current positive sequence phasor are calculated after the occurrence of the phase-to-phase symmetrical fault, and the positive-sequence output impedance of the three-phase three-leg inverter is calculated based on the positive-sequence output impedance. The positive-sequence output impedance of the three-phase three-leg inverter is calculated using the steady-state output voltage positive-sequence phasor and the steady-state output current positive-sequence phasor; the fault resistance of the inter-phase symmetrical fault set at the output end of the grid-connected inverter is increased until the output voltage of the inverter decreases to a preset second voltage range, and in the process of increasing the fault resistance of the inter-phase symmetrical fault, a first relationship diagram between the amplitude of the positive-sequence output impedance and the voltage drop percentage after the inter-phase symmetrical fault occurs, and a second relationship diagram between the phase angle of the positive-sequence output impedance and the voltage drop percentage are generated; wherein the second voltage range is smaller than the first voltage range; and a grid-connected inverter positive-sequence output impedance model of the three-phase three-leg inverter is constructed based on the first relationship diagram and the second relationship diagram.

[0078] Specifically, the positive sequence model of the grid-connected inverter in S3 is analyzed and modeled, and the inverter configured with two filters is analyzed, such as Figure 2-Figure 3As shown, there is no significant difference between the two configurations using L filters and LC filters in the positive sequence circuit. In the case of LC filters, only the impedance of the parallel capacitor is present. Therefore, the positive sequence impedance model of the grid-connected inverter in the L filter configuration is used for specific explanation: when the inverter current is below the threshold of all phases or the current limiter is not activated, the grid-connected inverter maintains its output voltage at the nominal value regardless of the magnitude of the three-phase current. In this case, the grid-connected inverter behaves as an ideal voltage source in the positive sequence circuit. Conversely, if at least one phase of the inverter current is limited to the threshold, the inverter cannot maintain its output voltage, and a voltage sag occurs. This behavior can be modeled by the impedance appearing at the output of inverter a. When the current of each phase of the inverter is below the threshold, the PI voltage controller adjusts the dq components of the output voltage as follows:

[0079] v Od =V ref

[0080] v Oq =0;

[0081] Vod is the grid-side dq-converted d-axis voltage, and Voq is the grid-side dq-converted q-axis voltage. On the other hand, when the limiter limits the reference current, the dq components of the output voltage no longer follow their reference values. In other words, the d-axis and q-axis regulators are bypassed. In this case, it can be written as:

[0082] v Od =x·V ref

[0083] v Oq =y·V ref ;

[0084] x, y are scale factors, and their boundaries are defined as:

[0085]

[0086] Assuming voltage drop balance, only positive-sequence voltage and positive-sequence current exist, and only the equivalent output impedance of the positive sequence is analyzed. Therefore, the phasor of the positive-sequence output voltage V1o can be expressed by dq components as follows:

[0087] V1 O =(x+jy)·V ref ;

[0088] The inverter current is limited to I th , the positive sequence output current I10 is:

[0089]

[0090] θ lim The positive sequence current of the inverter is limited to Ith Combining the above analysis, we can get the positive sequence output impedance Z1o:

[0091]

[0092] Define a base impedance as Z Base :

[0093]

[0094] Then the unit of Z1o is interpreted as:

[0095]

[0096] Its per-unit value is defined as:

[0097]

[0098] because We can get:

[0099]

[0100]

[0101] x can be defined as a proportional coefficient according to actual conditions. Here we set the minimum value of x to 0. Under the above-defined basic impedance conditions, the maximum value of |Z1o| is less than Each unit.

[0102] The next step is to determine whether the real part or the imaginary part of the positive sequence equivalent impedance is dominant. The present invention considers that the real part of Z1o is dominant, and the following details: inv-d ,i inv-q Substituting the dq components into the Z1o expression yields:

[0103]

[0104] Can be generalized as:

[0105]

[0106] Now we mainly analyze the influence of current limiter on reference current, please refer to Figure 4 , is the schematic diagram of the inverter PI control current limiting structure, the limiter in I th (a constant value independent of the components of inv). Under this constraint, we can derive:

[0107]

[0108] When a voltage drop occurs at the inverter output, (1-x)↑ or (-y)↑ means that the sum of the real terms is greater and the subtraction of the imaginary terms is smaller, indicating that the real part of z10 is greater than the imaginary part. The sign of the equivalent impedance is then confirmed. Assuming a symmetrical fault occurs at both ends of the inverter, the current limiter takes some time, from a few milliseconds to one power cycle, to limit the inverter current, depending on the current limiting speed. Appendix Figure 4 The figure shows a grid-connected inverter suffering from a symmetrical fault. When the load is a pure resistor, the system equivalent model can be used to derive the current flowing through the inverter I onf for:

[0109]

[0110] R load is the line load impedance, R F is the equivalent impedance of the short-circuit point. On the other hand, when the inverter current is limited to I th When the inverter output resistance changes during the steady state after the fault, its current I stf for:

[0111]

[0112] R1o is the positive sequence equivalent impedance. By comparing the above inverter current formula, we can see that R1o must be positive and {Z1o}>0 must hold. Therefore, the phase angle range of Z1o can be determined as:

[0113]

[0114] The specific method is as follows: set a symmetrical fault at the inverter output end (filter capacitor connection point); obtain the fault resistance so that the output voltage drops to 10%-20% Vnom (rated voltage); calculate the phasors of the steady-state output voltage and output current after the fault (one or two cycles from the fault time), expressed as V1o and I1o respectively; calculate Z1o,

[0115]

[0116] Where E is the voltage phasor output before the fault; divide the calculated Z1o by V nom / I th Get the unit output impedance; increase the fault resistance appropriately to reduce the voltage drop; repeat this process from the beginning until the output voltage drops to [80%, 90%]V nom range; plot the relationship between the amplitude and phase angle of Z10 and the voltage drop percentage.

[0117] S4. According to the current limiting strategy, an inter-phase asymmetric fault is set at the output end of the grid-connected inverter, and a steady-state output voltage negative-sequence phasor and a steady-state output current negative-sequence phasor are calculated after the inter-phase asymmetric fault occurs. The negative-sequence output impedance of the three-phase three-leg inverter is calculated based on the steady-state output voltage negative-sequence phasor and the steady-state output current negative-sequence phasor, and a grid-connected inverter negative-sequence output impedance model of the three-phase three-leg inverter is constructed based on the negative-sequence output impedance.

[0118] Preferably, according to the current limiting strategy, an inter-phase asymmetric fault is set at the output end of the grid-connected inverter, the steady-state output voltage negative sequence phasor and the steady-state output current negative sequence phasor are calculated after the inter-phase asymmetric fault occurs, and the negative-sequence output impedance of the three-phase three-bridge-leg inverter is calculated based on the steady-state output voltage negative sequence phasor and the steady-state output current negative sequence phasor, and then the grid-connected inverter negative-sequence output impedance model of the three-phase three-bridge-leg inverter is constructed based on the negative-sequence output impedance, including: according to the current limiting strategy, an inter-phase asymmetric fault is set at the output end of the grid-connected inverter so that the amplitude of the output voltage imbalance of the inverter reaches a preset first amplitude range; the steady-state output voltage negative sequence phasor and the steady-state output current negative sequence phasor are calculated after the inter-phase asymmetric fault occurs, and the negative-sequence output impedance model of the three-phase three-bridge-leg inverter is constructed based on the negative-sequence output impedance. The steady-state output voltage negative-sequence phasor and the steady-state output current negative-sequence phasor are used to calculate the negative-sequence output impedance of the three-phase three-leg inverter; the fault resistance of the phase-to-phase asymmetric fault set at the output end of the grid-connected inverter is reduced until the amplitude of the output voltage imbalance of the inverter reaches a preset second amplitude range, and in the process of reducing the fault resistance of the phase-to-phase asymmetric fault, a third relationship diagram between the amplitude of the negative-sequence output impedance and the voltage imbalance after the inter-phase asymmetric fault occurs, and a fourth relationship diagram between the phase angle of the negative-sequence output impedance and the voltage imbalance are generated; wherein the second amplitude range is greater than the first amplitude range; and a grid-connected inverter negative-sequence output impedance model of the three-phase three-leg inverter is constructed based on the third relationship diagram and the fourth relationship diagram.

[0119] Specifically, the equivalent negative sequence model of the grid-connected inverter in S4 above is analyzed and modeled. The following is a detailed description: Under the condition of modeling the positive sequence impedance model of the inverter, the basic control strategy is confirmed. Even if the three-phase current is unbalanced, the three-phase voltage can be kept balanced without limiting the reference current, that is, When an asymmetric fault occurs in the grid-connected inverter, the three-phase voltages at both ends will lose balance when the fault occurs.

[0120] However, if the limiter does not work, the PI voltage controller will quickly adjust the voltage dq component to the reference value and restore the three-phase voltage to balance. After a transient period after the fault, the three-phase voltage reaches balance, while the balance between the three-phase currents is severely disturbed. In this case, a negative sequence current (I2o≠0) is generated in the output current, but the output voltage does not contain any negative sequence voltage (V2o=0), which means that the inverter behaves as a short circuit in the negative sequence circuit. Therefore, when the inverter current is not limited, the equivalent model of the inverter in the negative sequence circuit is equivalent to a short circuit line, and the impedance is equivalent to 0.

[0121] When an asymmetric fault occurs, the inverter current is limited to the threshold value of one or more phases, resulting in unbalanced three-phase voltages and currents at the output. This occurs because the limiter prevents the PI voltage controller from returning the dq components of the voltage to the reference value. In this case, in addition to the DC term, the dq components also include a sinusoidal component with a frequency twice the fundamental frequency.

[0122] The negative sequence output impedance depends greatly on the control strategy, especially the treatment of the double frequency terms that appear in the voltage dq components under asymmetrical fault conditions. In fact, in contrast to the positive sequence current, the negative sequence current can be controlled in a different way. Taking the basic control strategy under asymmetrical conditions as an example, although the sinusoidal terms in the voltage dq components cannot be removed due to the limiter, they are suppressed by the PI controller because it acts as a low-pass filter in the closed-loop control. Therefore, compared with Vod and Voq, the negative sequence current can be controlled in a different way. and When , the amplitude of the dual-frequency term is smaller, ultimately resulting in a larger negative-sequence impedance in the inverter. On the other hand, the negative-sequence voltage causes a negative-sequence current to flow through the filter capacitor Cf, thereby controlling the negative-sequence output impedance. Therefore, the impedance of Cf is non-negligible in the negative-sequence circuit and contributes to the shaping of Z2o.

[0123] Similar to the positive-sequence impedance, the negative-sequence impedance is found by following these steps: Set an asymmetric phase-to-phase fault at the inverter output; Obtain the fault resistance such that the magnitude of the output voltage imbalance (|V2o / V1o|) is between 10% and 20%; Calculate the negative-sequence phasors of the steady-state output voltage and output current after the fault, expressed as V2o and I2o, respectively;

[0124] Calculate Z²o:

[0125]

[0126] Divide the calculated Z2o by V nom / I th Get the unit impedance, reduce the fault resistance appropriately, and increase the voltage unbalance; repeat this process from the beginning until a voltage unbalance of 80%-90% is obtained; plot the relationship between the amplitude and phase angle of Z2o and the voltage unbalance.

[0127] The positive-sequence impedance tends to be resistive, while the negative-sequence impedance exhibits different phase angles depending on the degree of imbalance. The zero-sequence impedance behaves as an open circuit. In particular, as the voltage imbalance increases, the negative-sequence output impedance tends to be capacitive. This highlights the critical role of the filter capacitor in the negative-sequence circuit, as this characteristic is attributed solely to this component: larger filter capacitance increases the capacitive impedance and smaller impedance magnitude. Due to the negative-sequence current injected by the inverter, there is no linear relationship between the magnitude of the output impedance and the filter capacitor value.

[0128] S5. Obtain an output impedance model of a three-phase three-leg inverter according to the zero-sequence output impedance model of the grid-connected inverter, the positive-sequence output impedance model of the grid-connected inverter, and the negative-sequence output impedance model of the grid-connected inverter.

[0129] Specifically, the output impedance model of the three-phase three-leg inverter in the above S5 is analyzed and constructed. The output impedance model of the three-phase three-leg inverter is constructed through the zero-sequence output impedance model of the grid-connected inverter, the positive-sequence output impedance model of the grid-connected inverter, and the negative-sequence output impedance model of the grid-connected inverter. This model can be used to analyze the impedance characteristics of the inverter under different frequency components (positive sequence, negative sequence, and zero sequence), and then applied to multiple power grids and fault scenarios to improve the system stability, fault identification, and grid-connected control capabilities.

[0130] Example 2

[0131] Please refer to Figure 5 , is a schematic structural diagram of an output impedance modeling device for a three-phase three-leg inverter provided by an embodiment of the present invention, the device comprising: a current limiting strategy determination module, a grid-connected inverter zero-sequence output impedance model construction module, a grid-connected inverter positive-sequence output impedance model construction module, a grid-connected inverter negative-sequence output impedance model construction module, and an output impedance model construction module;

[0132] The current limiting strategy determination module is used to determine the current limiting strategy of the grid-connected inverter; wherein the current limiting strategy includes: an instantaneous saturation current limiting strategy or a latching current limiting strategy;

[0133] The grid-connected inverter zero-sequence output impedance model construction module is used to obtain the zero-sequence output impedance of the three-phase three-leg inverter according to the current limiting strategy analysis, and then construct the grid-connected inverter zero-sequence output impedance model of the three-phase three-leg inverter according to the zero-sequence output impedance;

[0134] The grid-connected inverter positive-sequence output impedance model construction module is used to set a phase-to-phase symmetrical fault at the output end of the grid-connected inverter according to the current limiting strategy, calculate the steady-state output voltage positive-sequence phasor and the steady-state output current positive-sequence phasor after the occurrence of the phase-to-phase symmetrical fault, and calculate the positive-sequence output impedance of the three-phase three-leg inverter based on the steady-state output voltage positive-sequence phasor and the steady-state output current positive-sequence phasor, and then construct the grid-connected inverter positive-sequence output impedance model of the three-phase three-leg inverter based on the positive-sequence output impedance;

[0135] The grid-connected inverter negative-sequence output impedance model construction module is used to set an inter-phase asymmetric fault at the output end of the grid-connected inverter according to the current limiting strategy, calculate the steady-state output voltage negative-sequence phasor and the steady-state output current negative-sequence phasor after the inter-phase asymmetric fault occurs, and calculate the negative-sequence output impedance of the three-phase three-leg inverter based on the steady-state output voltage negative-sequence phasor and the steady-state output current negative-sequence phasor, and then construct the grid-connected inverter negative-sequence output impedance model of the three-phase three-leg inverter based on the negative-sequence output impedance;

[0136] The output impedance model construction module is used to obtain the output impedance model of the three-phase three-leg inverter according to the zero-sequence output impedance model of the grid-connected inverter, the positive-sequence output impedance model of the grid-connected inverter, and the negative-sequence output impedance model of the grid-connected inverter.

[0137] Preferably, the zero-sequence output impedance of the three-phase three-leg inverter is infinite.

[0138] Preferably, according to the current limiting strategy, a phase-to-phase symmetrical fault is set at the output end of the grid-connected inverter, the steady-state output voltage positive sequence phasor and the steady-state output current positive sequence phasor are calculated after the occurrence of the phase-to-phase symmetrical fault, and the positive-sequence output impedance of the three-phase three-leg inverter is calculated based on the steady-state output voltage positive sequence phasor and the steady-state output current positive sequence phasor, and then a grid-connected inverter positive sequence output impedance model of the three-phase three-leg inverter is constructed based on the positive-sequence output impedance, including: according to the current limiting strategy, a phase-to-phase symmetrical fault is set at the output end of the grid-connected inverter to reduce the output voltage of the inverter to a preset first voltage range; the steady-state output voltage positive sequence phasor and the steady-state output current positive sequence phasor are calculated after the occurrence of the phase-to-phase symmetrical fault, and the positive-sequence output impedance of the three-phase three-leg inverter is calculated based on the positive-sequence output impedance. The positive-sequence output impedance of the three-phase three-leg inverter is calculated using the steady-state output voltage positive-sequence phasor and the steady-state output current positive-sequence phasor; the fault resistance of the inter-phase symmetrical fault set at the output end of the grid-connected inverter is increased until the output voltage of the inverter decreases to a preset second voltage range, and in the process of increasing the fault resistance of the inter-phase symmetrical fault, a first relationship diagram between the amplitude of the positive-sequence output impedance and the voltage drop percentage after the inter-phase symmetrical fault occurs, and a second relationship diagram between the phase angle of the positive-sequence output impedance and the voltage drop percentage are generated; wherein the second voltage range is smaller than the first voltage range; and a grid-connected inverter positive-sequence output impedance model of the three-phase three-leg inverter is constructed based on the first relationship diagram and the second relationship diagram.

[0139] Preferably, according to the current limiting strategy, an inter-phase asymmetric fault is set at the output end of the grid-connected inverter, the steady-state output voltage negative sequence phasor and the steady-state output current negative sequence phasor are calculated after the inter-phase asymmetric fault occurs, and the negative-sequence output impedance of the three-phase three-bridge-leg inverter is calculated based on the steady-state output voltage negative sequence phasor and the steady-state output current negative sequence phasor, and then the grid-connected inverter negative-sequence output impedance model of the three-phase three-bridge-leg inverter is constructed based on the negative-sequence output impedance, including: according to the current limiting strategy, an inter-phase asymmetric fault is set at the output end of the grid-connected inverter so that the amplitude of the output voltage imbalance of the inverter reaches a preset first amplitude range; the steady-state output voltage negative sequence phasor and the steady-state output current negative sequence phasor are calculated after the inter-phase asymmetric fault occurs, and the negative-sequence output impedance model of the three-phase three-bridge-leg inverter is constructed based on the negative-sequence output impedance. The steady-state output voltage negative-sequence phasor and the steady-state output current negative-sequence phasor are used to calculate the negative-sequence output impedance of the three-phase three-leg inverter; the fault resistance of the phase-to-phase asymmetric fault set at the output end of the grid-connected inverter is reduced until the amplitude of the output voltage imbalance of the inverter reaches a preset second amplitude range, and in the process of reducing the fault resistance of the phase-to-phase asymmetric fault, a third relationship diagram between the amplitude of the negative-sequence output impedance and the voltage imbalance after the inter-phase asymmetric fault occurs, and a fourth relationship diagram between the phase angle of the negative-sequence output impedance and the voltage imbalance are generated; wherein the second amplitude range is greater than the first amplitude range; and a grid-connected inverter negative-sequence output impedance model of the three-phase three-leg inverter is constructed based on the third relationship diagram and the fourth relationship diagram.

[0140] It should be noted that the device embodiments described above are merely illustrative, wherein the units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, they may be located in one place, or they may be distributed across multiple network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the present embodiment. In addition, in the drawings of the device embodiments provided by the present invention, the connection relationship between the modules indicates that there is a communication connection between them, which may be specifically implemented as one or more communication buses or signal lines. A person of ordinary skill in the art can understand and implement the present invention without inventive effort.

[0141] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working process of the device described above can refer to the corresponding process in the aforementioned method embodiment, and will not be repeated here.

[0142] Example 3

[0143] Accordingly, an embodiment of the present invention provides an electronic device, comprising a processor, a memory, and a computer program stored in the memory and configured to be executed by the processor. When the processor executes the computer program, it implements the output impedance modeling method of the three-phase three-leg inverter described in the above-mentioned embodiment of the invention.

[0144] The electronic device may be a computing device such as a desktop computer, a notebook computer, a PDA, a cloud server, etc. The device may include, but is not limited to, a processor and a memory.

[0145] The processor may be a central processing unit (CPU), other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field-programmable gate arrays (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. A general-purpose processor may be a microprocessor or any conventional processor, etc. The processor is the control center of the device and connects various parts of the entire device using various interfaces and lines.

[0146] Example 4

[0147] Accordingly, an embodiment of the present invention provides a storage medium, which includes a stored computer program, wherein when the computer program is running, the device where the storage medium is located is controlled to execute the output impedance modeling method of the three-phase three-leg inverter described in the above-mentioned embodiment of the invention.

[0148] The memory can be used to store the computer program, and the processor realizes various functions of the device by running or executing the computer program stored in the memory and calling the data stored in the memory. The memory can mainly include a program storage area and a data storage area, wherein the program storage area can store an operating system, at least one application required for a function, etc.; the data storage area can store data created according to the use of the mobile phone, etc. In addition, the memory can include a high-speed random access memory and can also include a non-volatile memory, such as a hard disk, a memory, a plug-in hard disk, a smart memory card (Smart Media Card, SMC), a secure digital (Secure Digital, SD) card, a flash card (FlashCard), at least one disk storage device, a flash memory device, or other volatile solid-state storage devices.

[0149] The storage medium is a computer-readable storage medium, and the computer program is stored in the computer-readable storage medium. When the computer program is executed by the processor, it can implement the steps of the above-mentioned various method embodiments. The computer program includes computer program code, and the computer program code can be in source code form, object code form, executable file or some intermediate form. The computer-readable medium may include: any entity or device that can carry the computer program code, recording medium, USB flash drive, mobile hard disk, magnetic disk, optical disk, computer memory, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), electric carrier signal, telecommunication signal and software distribution medium. It should be noted that the content contained in the computer-readable medium can be appropriately increased or decreased according to the requirements of legislation and patent practice in the jurisdiction. For example, in some jurisdictions, according to legislation and patent practice, computer-readable media do not include electric carrier signals and telecommunication signals.

[0150] The above is a preferred embodiment of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principles of the present invention. These improvements and modifications are also considered to be within the scope of protection of the present invention.

Claims

1. A method for modeling the output impedance of a three-phase three-leg inverter, characterized in that: include: Determine a current limiting strategy for the grid-connected inverter; wherein the current limiting strategy includes: an instantaneous saturation current limiting strategy or a latching current limiting strategy; Obtaining the zero-sequence output impedance of the three-phase three-leg inverter according to the current limiting strategy analysis, and then constructing a grid-connected inverter zero-sequence output impedance model of the three-phase three-leg inverter according to the zero-sequence output impedance; According to the current limiting strategy, a phase-to-phase symmetrical fault is set at the output end of the grid-connected inverter to reduce the output voltage of the inverter to a preset first voltage range; Calculating a steady-state output voltage positive sequence phasor and a steady-state output current positive sequence phasor after the inter-phase symmetrical fault occurs, and calculating a positive-sequence output impedance of the three-phase three-leg inverter based on the steady-state output voltage positive sequence phasor and the steady-state output current positive sequence phasor; increasing a fault resistance for a symmetrical interphase fault set at an output terminal of the grid-connected inverter until the output voltage of the inverter decreases to a preset second voltage range, and generating a first relationship graph between the amplitude of the positive-sequence output impedance and the voltage drop percentage after the occurrence of the symmetrical interphase fault, and a second relationship graph between the phase angle of the positive-sequence output impedance and the voltage drop percentage, during the process of increasing the fault resistance for the symmetrical interphase fault; wherein the second voltage range is smaller than the first voltage range; Constructing a positive-sequence output impedance model of a grid-connected inverter of a three-phase three-leg inverter according to the first relationship diagram and the second relationship diagram; According to the current limiting strategy, an inter-phase asymmetric fault is set at the output end of the grid-connected inverter so that the amplitude of the output voltage imbalance of the inverter reaches a preset first amplitude range; Calculating a steady-state output voltage negative-sequence phasor and a steady-state output current negative-sequence phasor after the inter-phase asymmetric fault occurs, and calculating a negative-sequence output impedance of the three-phase three-leg inverter based on the steady-state output voltage negative-sequence phasor and the steady-state output current negative-sequence phasor; reducing a fault resistance for an inter-phase asymmetric fault set at an output terminal of the grid-connected inverter until the magnitude of the output voltage imbalance of the inverter reaches a preset second amplitude range, and generating, during the process of reducing the fault resistance for the inter-phase asymmetric fault, a third relationship graph between the magnitude of the negative-sequence output impedance and the voltage imbalance after the inter-phase asymmetric fault occurs, and a fourth relationship graph between the phase angle of the negative-sequence output impedance and the voltage imbalance; wherein the second amplitude range is greater than the first amplitude range; Constructing a negative-sequence output impedance model of a grid-connected inverter of a three-phase three-leg inverter according to the third relationship diagram and the fourth relationship diagram; According to the zero-sequence output impedance model of the grid-connected inverter, the positive-sequence output impedance model of the grid-connected inverter, and the negative-sequence output impedance model of the grid-connected inverter, an output impedance model of the three-phase three-leg inverter is obtained.

2. The output impedance modeling method of the three-phase three-leg inverter according to claim 1, characterized in that: The zero-sequence output impedance of the three-phase three-leg inverter is infinite.

3. An output impedance modeling device for a three-phase three-leg inverter, characterized in that: include: A current limiting strategy determination module, a grid-connected inverter zero-sequence output impedance model construction module, a grid-connected inverter positive-sequence output impedance model construction module, a grid-connected inverter negative-sequence output impedance model construction module, and an output impedance model construction module; The current limiting strategy determination module is used to determine the current limiting strategy of the grid-connected inverter; wherein the current limiting strategy includes: an instantaneous saturation current limiting strategy or a latching current limiting strategy; The grid-connected inverter zero-sequence output impedance model construction module is used to obtain the zero-sequence output impedance of the three-phase three-leg inverter according to the current limiting strategy analysis, and then construct the grid-connected inverter zero-sequence output impedance model of the three-phase three-leg inverter according to the zero-sequence output impedance; The grid-connected inverter positive-sequence output impedance model construction module is configured to, according to the current limiting strategy, set a phase-to-phase symmetrical fault at the output end of the grid-connected inverter to reduce the output voltage of the inverter to a preset first voltage range; calculate the steady-state output voltage positive-sequence phasor and the steady-state output current positive-sequence phasor after the phase-to-phase symmetrical fault occurs, and calculate the positive-sequence output impedance of the three-phase three-leg inverter based on the steady-state output voltage positive-sequence phasor and the steady-state output current positive-sequence phasor; increase the fault resistance of the phase-to-phase symmetrical fault set at the output end of the grid-connected inverter until the output voltage of the inverter decreases to a preset second voltage range, and generate a first relationship diagram between the amplitude of the positive-sequence output impedance and the voltage drop percentage, and a second relationship diagram between the phase angle of the positive-sequence output impedance and the voltage drop percentage after the phase-to-phase symmetrical fault occurs, while the fault resistance of the phase-to-phase symmetrical fault increases; wherein the second voltage range is smaller than the first voltage range; and construct a grid-connected inverter positive-sequence output impedance model of the three-phase three-leg inverter based on the first relationship diagram and the second relationship diagram; The grid-connected inverter negative-sequence output impedance model construction module is used to set an inter-phase asymmetric fault at the output end of the grid-connected inverter according to the current limiting strategy, so that the amplitude of the output voltage imbalance of the inverter reaches a preset first amplitude range; calculate the steady-state output voltage negative-sequence phasor and the steady-state output current negative-sequence phasor after the inter-phase asymmetric fault occurs, and calculate the negative-sequence output impedance of the three-phase three-bridge leg inverter based on the steady-state output voltage negative-sequence phasor and the steady-state output current negative-sequence phasor; reduce the fault of the inter-phase asymmetric fault set at the output end of the grid-connected inverter resistance, until the amplitude of the output voltage imbalance of the inverter reaches a preset second amplitude range, and in the process of reducing the fault resistance of the inter-phase asymmetric fault, generating a third relationship diagram between the amplitude of the negative-sequence output impedance and the voltage imbalance after the inter-phase asymmetric fault occurs, and a fourth relationship diagram between the phase angle of the negative-sequence output impedance and the voltage imbalance; wherein the second amplitude range is greater than the first amplitude range; constructing a negative-sequence output impedance model of the grid-connected inverter of the three-phase three-leg inverter based on the third relationship diagram and the fourth relationship diagram; The output impedance model construction module is used to obtain the output impedance model of the three-phase three-leg inverter according to the zero-sequence output impedance model of the grid-connected inverter, the positive-sequence output impedance model of the grid-connected inverter, and the negative-sequence output impedance model of the grid-connected inverter.

4. The output impedance modeling device of the three-phase three-bridge-leg inverter according to claim 3, characterized in that: The zero-sequence output impedance of the three-phase three-leg inverter is infinite.

5. An electronic device, characterized in that: The invention comprises a processor, a memory, and a computer program stored in the memory and configured to be executed by the processor, wherein when the processor executes the computer program, the output impedance modeling method of the three-phase three-leg inverter according to any one of claims 1 to 2 is implemented.

6. A storage medium, characterized in that The storage medium includes a stored computer program, wherein when the computer program is running, the device where the storage medium is located is controlled to execute the output impedance modeling method of the three-phase three-leg inverter according to any one of claims 1 to 2.

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