A chip active row feed network for dual-polarization weather radar

By adopting a chip-based active feed network for dual-polarization weather radar and utilizing a combination design of an active integrated motherboard and a press plate, the problems of heavy weight and high cost in existing technologies have been solved, achieving the effects of lightweight design and easy mass production.

CN119695482BActive Publication Date: 2026-03-17NANJING RES INST OF ELECTRONICS TECH
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2024-12-23
Publication Date
2026-03-17

AI Technical Summary

Technical Problem

Existing dual-polarization weather radar feed networks suffer from problems such as heavy weight, high cost, and difficulty in large-scale production. In particular, slotted waveguide traveling wave array networks are large in size and heavy in weight, while air plate wire and power divider module cascaded networks have high losses and are complex to debug.

Method used

The chip-based active feeder network of the dual-polarization weather radar achieves signal processing and signal transmission functions through the combination of two active integrated motherboards and pressure plates. It utilizes multi-functional chips, multi-channel differential transceiver chips, and DC-DC conversion module chips, combined with heat dissipation frame and stripline design, to achieve lightweight and low loss.

Benefits of technology

It achieves lightweight, low cost and easy mass production, reduces interconnected devices and manual labor, and improves production efficiency.

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Abstract

This invention discloses a chip-based active feeder network for a dual-polarization weather radar, comprising two active integrated motherboards connected by a crimping plate. The active feeder network simultaneously performs signal processing and signal transmission functions. Each active integrated motherboard has a multi-functional chip, a multi-channel differential transceiver chip, a DC-DC converter module chip, an RF dual-polarization transceiver interface, a monitoring interface, a beam control interface, and a secondary power supply interface mounted on its front side. Each active integrated motherboard has an active channel interface mounted on its back side. The chips and interfaces mounted on the two active integrated motherboards are symmetrical about the crimping plate. This chip-based active feeder network for the dual-polarization weather radar reduces the use of numerous functional module interconnection connectors and interconnection cable assemblies through multi-layer printed circuit board signal layer interconnection and crimping plate interconnection, thereby lowering interconnection costs.
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Description

Technical Field

[0001] This invention belongs to the field of antenna and microwave technology, and particularly relates to a chip-based active feed network for a dual-polarization weather radar. Background Technology

[0002] Conventional weather radars emit electromagnetic waves horizontally, so the characteristics of precipitation particles detected by radar are primarily related to their horizontal properties. However, in many cases, the horizontal properties of precipitation particles differ from their vertical properties. To more accurately detect the structure of precipitation particles, an additional polarization channel is added to conventional weather radar, allowing for the simultaneous detection of precipitation particle characteristics in both directions. Thus, compared to conventional weather radar, dual-polarization weather radar can obtain more variables regarding the characteristics of precipitation particles.

[0003] The dual-polarization feed network of dual-polarization weather radar is mainly implemented in ways such as slotted waveguides, air-plate lines, and cascaded power dividers. Each feed network has its own characteristics, but also its own disadvantages. For example, the slotted waveguide traveling wave array network has a scanning blind zone due to waveguide dispersion; the slotted waveguide standing wave array network is large in size and heavy in weight, and it is difficult to achieve ultra-low sidelobes; the air-plate lines and cascaded power dividers have high losses and complex debugging work, which is not conducive to large-scale production. Summary of the Invention

[0004] To address the aforementioned issues, this invention proposes a chip-based active feed network for a dual-polarization weather radar, comprising two active integrated motherboards connected by a press plate. The active feed network simultaneously possesses signal processing and signal transmission functions.

[0005] Each active integrated motherboard section has a multi-functional chip, a multi-channel differential transceiver chip, a DC-DC converter module chip, an RF dual-polarization transceiver interface, a monitoring interface, a beam control interface, and a secondary power supply interface mounted on its front side. Each active integrated motherboard section has an active channel interface mounted on its back side. The chips and interfaces mounted on the two active integrated motherboard sections are symmetrical about the pressure plate. The layout is partitioned, with different functional circuits distributed in different local areas. The active channel interface is interconnected with the array antenna unit to enable power feeding of the dual-polarization antenna unit.

[0006] Specifically, each active integrated motherboard is also equipped with a resistance welding groove on the back; the isolation resistors and absorption resistors required for the radio frequency circuit are welded in the resistance welding groove, and after welding, metal sheets are assembled on the surface.

[0007] Specifically, the RF dual-polarization transceiver interface includes a first RF dual-polarization transceiver interface, a second RF dual-polarization transceiver interface, a third RF dual-polarization transceiver interface, and a fourth RF dual-polarization transceiver interface, each corresponding to two rows of dual-polarization transceiver networks; the monitoring interface includes a first internal monitoring interface, a second internal monitoring interface, a third internal monitoring interface, and a fourth internal monitoring interface, which respectively monitor the amplitude and phase characteristics of the two rows of dual-polarization transceiver networks; the active channel interface feeds power to two adjacent rows of dual-polarization antenna elements on the radar array; the beam control interface includes a first beam control interface and a second beam control interface, which respectively control the multi-functional chips and multi-channel differential transceiver chips on the two sections of the first and second active integrated motherboards; the secondary power supply interface includes a first secondary power supply interface and a second secondary power supply interface, which respectively transmit the bus level of the DC-DC conversion module chips on the two sections of the first and second active integrated motherboards; after the press plate is pressed with the first and second active integrated motherboards, the RF signals are interconnected in the inner layer.

[0008] Specifically, the active integrated motherboard and the pressure plate are mounted on the heat dissipation frame, which is provided with heat dissipation bosses. The position and shape of the chips and interfaces on the active integrated motherboard are adapted to the recesses between the heat dissipation bosses. Heat conduction and heat dissipation are achieved by the active integrated motherboard and the heat dissipation frame being attached together.

[0009] Specifically, the multi-functional chip combines phase shifting, attenuation, amplification, switching, wave control, and receiver power modulation functions, and adopts a square flat leadless package technology;

[0010] The multi-channel differential transceiver chip controls the conversion of differential signals to single-ended signals, and the control chip-based T / R component in the multi-functional chip enables beam control.

[0011] The DC-DC converter module chip provides +28V input and +3.3V and -5V voltage source outputs to power the modules on the two active integrated motherboards. It is packaged in a plastic ball array and has built-in input filters and noise cancellation circuits to achieve low-noise coupling.

[0012] Specifically, the active integrated motherboard uses an integrated backplane as its carrier. The integrated backplane internally completes the transmission of radio frequency transceiver signals, radio frequency internal monitoring signals, antenna transceiver signals, beam control signals, and secondary power supply signals. In terms of three-dimensional structure, from top to bottom, there are low-frequency signal layers and radio frequency signal layers.

[0013] The low-frequency signal layer realizes the formation and distribution of secondary power supply signals and wave control signals of the active integrated motherboard. The low-frequency signal layer transmits low-frequency signals with a frequency not exceeding 1MHz.

[0014] The radio frequency (RF) signal layer is used for RF signal transmission on the active synthesis motherboard, including transceiver networks, internal monitoring networks, and RF routing. The RF signal layer traces are in stripline form, and 1mm or 2mm striplines are selected.

[0015] Specifically, the RF functions of the active integrated motherboard include: RF dual-polarization transceiver function and internal monitoring function; the RF dual-polarization transceiver function and internal monitoring function are implemented through two layers of striplines, using Wilkinson power dividers cascaded and fed in parallel; the internal monitoring function is implemented using a coupler with a narrow-side coupling design; the isolation resistors and absorption resistors required for the RF circuit are soldered using a cavity-cutting method on the printed circuit board.

[0016] Specifically, the pressure plate is a double-layer printed circuit board, one side of which has the same pattern as the RF circuit layer pattern on the active integrated motherboard, and the other side is fully covered with copper.

[0017] Specifically, the printed circuit board has an "H"-shaped heat dissipation area, which is connected to the heat-generating device and the printed circuit board through a heat dissipation frame to achieve heat dissipation.

[0018] Specifically, the pressure plate and the active integrated motherboard are installed and fixed to the heat dissipation frame with screws.

[0019] Compared with the prior art, the present invention has the following advantages:

[0020] 1. Lightweight: The chip-based active feed network of the dual polarization weather radar of the present invention is composed of a highly integrated active composite motherboard and a pressure plate, thus significantly reducing the weight compared with waveguide system or power divider cascade system.

[0021] 2. Low cost: The chip-based active feed network of the dual-polarization weather radar of the present invention adopts multi-layer board lamination technology and lamination board interconnection design, and realizes signal interconnection and transmission by using vertical transition and printed line lamination, which greatly reduces interconnection equipment and lowers interconnection cost;

[0022] 3. Facilitates mass production: The chip-based active feed network of the dual-polarization weather radar of this invention can be efficiently assembled and tested using an automated assembly and testing system, which greatly reduces manual labor and improves the overall production efficiency. Attached Figure Description

[0023] Figure 1 This is a diagram illustrating the composition of a chip-based active feed network according to an embodiment of the present invention.

[0024] Figure 2 This is the signal flow layer of the active synthesis motherboard in an embodiment of the present invention.

[0025] Figure 3 This is a view of the radio frequency signal layer of the active integrated motherboard according to an embodiment of the present invention.

[0026] Figure 4 This is a schematic diagram of the front layout of the active integrated motherboard according to an embodiment of the present invention.

[0027] Figure 5 This is a schematic diagram of the back layout of the active integrated motherboard according to an embodiment of the present invention.

[0028] Figure 6 This is a schematic diagram of the pressure plate according to an embodiment of the present invention.

[0029] Figure 7 This is a schematic diagram illustrating the interconnection between the active integrated motherboard and the pressure plate in the present invention.

[0030] The diagram is marked as follows:

[0031] First active integrated motherboard A1-1, second active integrated motherboard A1-2, crimp board A2, Wilkinson power divider D1, heat sink frame G1, integrated backplane M1, multi-function chip M2, multi-channel differential transceiver chip M3, DC-DC converter module chip M4, first RF dual-polarized transceiver interface P1-1, second RF dual-polarized transceiver interface P2-1, third RF dual-polarized transceiver interface P1-2, fourth RF dual-polarized transceiver interface P2-2, first internal monitoring interface P3-1, second internal monitoring interface P4-1, third internal monitoring interface P3-2, fourth internal monitoring interface P4-2, first~second Active channel interfaces H1-1 to H32-1 (32), H1-2 to H32-2 (33rd to 64th), V1-1 to V32-1 (65th to 96th), V1-2 to V32-2 (97th to 128th), P5-1 (1st wave control interface), P5-2 (2nd wave control interface), P6-1 (1st secondary power supply interface), P6-2 (2nd secondary power supply interface), Q1 ("H" shaped heat dissipation area), Q2 (resistance welding groove), S1 (low-frequency signal layer), S2 (RF signal layer), X1 (RF transceiver signal), X2 (RF internal monitoring signal), X3 (antenna transceiver signal). Detailed Implementation

[0032] To facilitate understanding of this application, a more complete description will be provided below with reference to the accompanying drawings, which illustrate embodiments of the present application. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that the disclosure of this application will be thorough and complete.

[0033] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.

[0034] It is understood that the terms “first,” “second,” etc., used in this application may be used herein to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish one element from another.

[0035] Spatial relation terms such as “below,” “under,” “below,” “under,” “above,” “above,” etc., are used herein to describe the relationship between one element or feature shown in the figure and other elements or features. It should be understood that, in addition to the orientation shown in the figure, spatial relation terms also include different orientations of the device in use and operation. For example, if the device in the figure is flipped, the element or feature described as “below,” “under,” or “below” will be oriented “above” the other element or feature. Therefore, the exemplary terms “below” and “under” can include both above and below orientations. Furthermore, the device may also include other orientations (e.g., rotated 90 degrees or other orientations), and the spatial descriptive terms used herein will be interpreted accordingly.

[0036] It should be noted that when one element is considered to be "connected" to another element, it can be directly connected to the other element or connected to the other element through an intermediary element. Furthermore, in the following embodiments, "connection" should be understood as "electrical connection," "communication connection," etc., if there is transmission of electrical signals or data between the connected objects.

[0037] When used herein, the singular forms of “a,” “an,” and “the” may also include the plural forms unless the context clearly indicates otherwise. It should also be understood that terms such as “comprising / including” or “having” specify the presence of the stated features, wholes, steps, operations, components, parts, or combinations thereof, but do not preclude the possibility of the presence or addition of one or more other features, wholes, steps, operations, components, parts, or combinations thereof. Meanwhile, the term “and / or” as used in this specification includes any and all combinations of the associated listed items.

[0038] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0039] refer to Figure 1 The present invention discloses a chip-based active feed network for a dual-polarization weather radar, comprising a first active integrated motherboard A1-1, a second active integrated motherboard A1-2, and a pressing plate A2, which simultaneously possesses signal processing and signal transmission functions.

[0040] The first active integrated motherboard A1-1 and the second active integrated motherboard A1-2 employ multilayer board lamination technology and vertical transition technology between signal layers to process and transmit power signals, beam control signals, RF dual-polarization transceiver signals, and internal monitoring signals. In actual design, different numbers of printed circuit boards are selected for lamination according to different functional requirements. The stack-up design is a low-frequency signal layer S1 and an RF signal layer S2, such as... Figure 2 As shown.

[0041] like Figure 2As shown, both the first active integrated motherboard A1-1 and the second active integrated motherboard A1-2 use an integrated backplane M1 as a carrier. The surface is equipped with devices such as a multi-functional chip M2, a multi-channel differential transceiver chip M3, and a DC-DC converter module chip M4. External interfaces include a first RF dual-polarization transceiver interface P1-1, a second RF dual-polarization transceiver interface P2-1, a third RF dual-polarization transceiver interface P1-2, a fourth RF dual-polarization transceiver interface P2-2, a first internal monitoring interface P3-1, and a second internal monitoring interface P4. -1, Third internal monitoring interface P3-2, Fourth internal monitoring interface P4-2, First to Third II active channel interfaces H1-1~H32-1, Third III to Sixth IV active channel interfaces H1-2~H32-2, Sixth VIII to Ninth VI active channel interfaces V1-1~V32-1, Ninth VII to First VIII active channel interfaces V1-2~V32-2, First wave control interface P5-1, Second wave control interface P5-2, First secondary power supply interface P6-1, Second secondary power supply interface P6-2. The first RF dual-polarized transceiver interface P1-1, the second RF dual-polarized transceiver interface P2-1, the third RF dual-polarized transceiver interface P1-2, and the fourth RF dual-polarized transceiver interface P2-2 correspond to two rows of dual-polarized transceiver networks, respectively. The first internal monitoring interface P3-1, the second internal monitoring interface P4-1, the third internal monitoring interface P3-2, and the fourth internal monitoring interface P4-2 monitor the amplitude and phase characteristics of the two rows of dual-polarized transceiver networks, respectively. 128 active channel interfaces (first to third active channel interfaces H1-1 to H32-1, third to sixth active channel interfaces H1-2 to H32-2, sixth to ninth active channel interfaces V1-1 to V32-1, and ninth to first twentieth active channel interfaces V1-2 to V32-2) are respectively used for... The two adjacent rows of dual-polarized antenna elements on the array are fed by the first wave control interface P5-1 and the second wave control interface P5-2, which respectively control the multi-function chip M2 and the multi-channel differential transceiver chip M3 on the two sections of the first active integrated motherboard A1-1 and the second active integrated motherboard A1-2. The first secondary power supply interface P6-1 and the second secondary power supply interface P6-2 respectively transmit the bus level of the DC-DC conversion module chip M4 on the two sections of the first active integrated motherboard A1-1 and the second active integrated motherboard A1-2. The crimping plate A2 is used to interconnect multiple sections of the first active integrated motherboard A1-1 and the second active integrated motherboard A1-2 to form the active channel scale required for active row feed. This facilitates engineering implementation and greatly reduces the use of interconnecting connectors and cable assemblies. After the crimping plate A2 is pressed with the first active integrated motherboard A1-1 and the second active integrated motherboard A1-2, the radio frequency signals are interconnected in the inner layer.

[0042] The first active integrated motherboard A1-1, the second active integrated motherboard A1-2, and the pressure plate A2 are mounted on the heat dissipation frame G1. Heat conduction and heat dissipation are achieved by the first active integrated motherboard A1-1 and the second active integrated motherboard A1-2 being attached to the heat dissipation frame. The heat dissipation frame G1 is designed with corresponding heat dissipation protrusions according to the positions of the heat-generating devices on the first active integrated motherboard A1-1 and the second active integrated motherboard A1-2: multi-function chip M2, multi-channel differential transceiver chip M3, and DC-DC conversion module chip M4. This allows for effective heat dissipation of the heat-generating devices and the printed circuit board, ensuring the normal operation of the chip-based active line feed network.

[0043] refer to Figure 2 The signal flow layers of the first active integrated motherboard A1-1 and the second active integrated motherboard A1-2 in this embodiment of the invention are shown. In terms of electrical performance, the multi-functional chip M2 combines phase shifting, attenuation, amplification, switching, beam control, and receiver power modulation functions. The chip size is 9mm*9mm*1mm. Within this size, a square flat leadless package (QFN) is used to improve the reliability of chip soldering. The multi-channel differential transceiver chip M3 controls the conversion of differential signals to single-ended signals, while the control chip-based T / R component in the multi-functional chip M2 implements beam control. The DC-DC converter module chip M4 provides +28V input and +3.3V and -5V voltage source outputs to power the modules on the two active integrated motherboards. The chip size is 15mm*15mm*4.92mm, and it uses a plastic-encapsulated ball array package (PBGA). It incorporates an input filter and noise cancellation circuit to achieve low-noise coupling, effectively reducing electromagnetic interference. The integrated backplane M1 of this invention internally transmits RF transceiver signals X1, RF internal monitoring signals X2, antenna transceiver signals X3, beam control signals S1, and secondary power supply signals S2. In its three-dimensional structure, from top to bottom, it consists of a low-frequency signal layer S1 and an RF signal layer S2. The low-frequency signal layer S1 mainly realizes the formation and distribution of secondary power supply signals and beam control signals for the active integrated motherboard. The low-frequency signal layer transmits low-frequency signals, with a frequency not exceeding 1MHz. The active integrated motherboard of this invention uses an FR4 printed circuit board for this layer. The RF signal layer S2 is used for RF signal transmission of the active integrated motherboard. Depending on the functional requirements of the active integrated motherboard, it generally includes transceiver networks, internal monitoring networks, and RF windings. In actual design, the number of RF layers can be appropriately increased or decreased according to requirements. The RF layer traces are in stripline form; considering the precision of printed circuit board processing, 1mm or 2mm striplines are generally selected.

[0044] refer to Figure 3This is a view of the RF signal layers of the first active integrated motherboard A1-1 and the second active integrated motherboard A1-2 according to an embodiment of the present invention. The RF functions of the active integrated motherboard of the present invention include: dual-polarization RF transceiver function and internal monitoring function. Based on the actual design, two striplines are designed to implement the above RF functions. A Wilkinson power divider D1 is cascaded and fed in parallel to implement the dual-polarization RF transceiver function; a coupler with narrow-side coupling is designed to implement the internal monitoring function. The isolation resistors and absorption resistors required for the RF circuit are soldered using a cavity-mounted printed circuit board, which provides high stability and low cost.

[0045] refer to Figure 4 This is a schematic diagram of the front layout of the first active integrated motherboard A1-1 and the second active integrated motherboard A1-2 according to an embodiment of the present invention. The front side includes a multi-functional chip M2, a multi-channel differential transceiver chip M3, a DC-DC converter module chip M4, a first RF dual-polarization transceiver interface P1-1, a second RF dual-polarization transceiver interface P2-1, a third RF dual-polarization transceiver interface P1-2, a fourth RF dual-polarization transceiver interface P2-2, a first internal monitoring interface P3-1, a second internal monitoring interface P4-1, a third internal monitoring interface P3-2, a fourth internal monitoring interface P4-2, a first beam control interface P5-1, a second beam control interface P5-2, a first secondary power supply interface P6-1, and a second secondary power supply interface P6-2. The layout employs a zoned design, with different functional circuits distributed in different local areas. This regional isolation reduces mutual interference and improves electromagnetic compatibility. The printed circuit board features an "H"-shaped heat dissipation area Q1, which is connected to the heat-generating components and the printed circuit board via a heat dissipation frame G1 for heat dissipation.

[0046] refer to Figure 5 This is a schematic diagram of the back layout of the first active integrated motherboard A1-1 and the second active integrated motherboard A1-2 according to an embodiment of the present invention. The back side includes the first to third active channel interfaces H1-1 to H32-1, the third to sixth active channel interfaces H1-2 to H32-2, the sixth to ninth active channel interfaces V1-1 to V32-1, the ninth to first twenty-eighth active channel interfaces V1-2 to V32-2, resistance welding grooves Q2, and some resistor and capacitor components; wherein every four active channel interfaces are grouped together. The active channel interfaces are interconnected with the array antenna elements to realize the feeding of the dual-polarized antenna elements; the isolation resistors and absorption resistors required for the RF circuit are welded in the resistance welding grooves Q2. After welding, metal sheets are mounted on the surface to improve isolation.

[0047] refer to Figure 6 This is a schematic diagram of the pressure plate A2 according to an embodiment of the present invention. The pressure plate A2 is a double-layer printed circuit board. One side of its pattern is the same as the RF circuit layer pattern of the first active integrated motherboard A1-1 and the second active integrated motherboard A1-2, and the other side is fully covered with copper.

[0048] refer to Figure 7This is a schematic diagram illustrating the interconnection between the first active integrated motherboard A1-1, the second active integrated motherboard A1-2, and the crimping plate A2 according to an embodiment of the present invention. After the crimping plate A2 is crimped to the first active integrated motherboard A1-1 and the second active integrated motherboard A1-2, the RF dual-polarization transceiver circuits of the active integrated motherboard A1-1 and A1-2 are interconnected. The crimping plate A2 and the active integrated motherboard are mounted and fixed to the heat sink frame G1 using screws.

[0049] The chip-based active feed network of the present invention for a dual-polarization weather radar is mainly designed to meet the dual-polarization beamforming requirements of X-band dual-polarization weather radar. It adopts multi-layer board pressing technology and achieves good polarization consistency, excellent sidelobe performance, and low feed loss through an active integrated motherboard and press-connected interconnection design architecture. It also features small size, light weight, and high manufacturability.

[0050] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A chip active row-feed network for a dual-polarized weather radar, characterized by, The two active comprehensive motherboards are connected by a crimping plate (A2), and the active row feed network has both signal processing and signal transmission functions. The front surface of each active comprehensive motherboard is respectively equipped with a multifunctional chip, a multi-channel differential transceiver chip, a direct current conversion module chip, a radio frequency dual-polarized transceiving interface, a monitoring interface, a wave control interface and a secondary power supply interface, and the back surface of each active comprehensive motherboard is respectively equipped with an active channel interface; the multifunctional chip has phase-shifting, attenuation, amplifier, switch, wave control and received power modulation functions, and adopts a square flat leadless package technology; the chips and interfaces equipped on the two active comprehensive motherboards are symmetrical about the crimping plate (A2); the layout is designed by partitioning, that is, different functional circuits are distributed in different local areas; the active channel interface is interconnected with the array antenna unit to realize dual-polarized antenna unit feeding; The radio frequency dual-polarized transceiving interface includes a first radio frequency dual-polarized transceiving interface (P1-1), a second radio frequency dual-polarized transceiving interface (P2-1), a third radio frequency dual-polarized transceiving interface (P1-2) and a fourth radio frequency dual-polarized transceiving interface (P2-2) corresponding to two rows of dual-polarized transceiving networks respectively; the monitoring interface includes a first internal monitoring interface (P3-1), a second internal monitoring interface (P4-1), a third internal monitoring interface (P3-2) and a fourth internal monitoring interface (P4-2) for monitoring the amplitude and phase characteristics of the two rows of dual-polarized transceiving networks respectively; the active channel interface feeds the adjacent two rows of dual-polarized antenna units of the radar array respectively; the wave control interface includes a first wave control interface (P5-1) and a second wave control interface (P5-2) for controlling the multifunctional chip (M2) and the multi-channel differential transceiver chip (M3) on the two first active comprehensive motherboards (A1-1) and the second active comprehensive motherboard (A1-2) respectively; the secondary power supply interface includes a first secondary power supply interface (P6-1) and a second secondary power supply interface (P6-2) for transmitting the bus level of the direct current conversion module chip (M4) on the two first active comprehensive motherboards (A1-1) and the second active comprehensive motherboard (A1-2); and the crimping plate (A2) is crimped with the first active comprehensive motherboard (A1-1) and the second active comprehensive motherboard (A1-2) to realize interconnection of radio frequency signals in the inner layer.

2. The chip-based active row-fed network for dual-polarized weather radars according to claim 1, characterized in that, The back surface of each active comprehensive motherboard is also equipped with a resistance welding groove (Q2); the isolation resistance and absorption resistance required by the radio frequency circuit are welded in the resistance welding groove (Q2), and a metal sheet is assembled on the surface after welding.

3. The chip-based active row-fed network for dual-polarized weather radars of claim 1, wherein, The active comprehensive motherboard and the crimping plate (A2) are installed on a heat dissipation framework (G1), the heat dissipation framework (G1) is provided with a heat dissipation boss, the positions and shapes of the chips and interfaces on the active comprehensive motherboard are adapted to the recesses between the heat dissipation boss, and heat conduction and heat dissipation are realized by the combination of the active comprehensive motherboard and the heat dissipation framework.

4. The chip-based active row-fed network for dual-polarized weather radars of claim 1, wherein, The multi-channel differential transceiver chip realizes conversion of differential signal to single-ended signal, and the control chip in the multifunctional chip realizes beam control. The DC conversion module chip realizes +28V input, +3.3V and -5V voltage source output, provides power for each module on the two active integrated motherboards, adopts plastic package ball array packaging, and realizes low noise coupling by built-in input filter and noise cancellation circuit.

5. The chip-based active row-fed network for dual-polarized weather radars of claim 1, wherein, The active integrated motherboard takes the integrated backplane (M1) as a carrier, and the integrated backplane (M1) internally completes transmission of radio frequency transceiving signals (X1), radio frequency internal monitoring signals (X2), antenna transceiving signals (X3), wave control signals and secondary power supply signals; from top to bottom on the three-dimensional structure are a low-frequency signal layer (S1) and a radio frequency signal layer (S2); The low-frequency signal layer (S1) realizes formation and distribution of secondary power supply signals and wave control signals of the active integrated motherboard, and transmits low-frequency signals with a frequency not exceeding 1 MHz; The radio frequency signal layer (S2) is used for radio frequency signal transmission of the active integrated motherboard, includes a transceiving network, an internal monitoring network and radio frequency winding, and the wiring of the radio frequency signal layer is in the form of a strip line, and 1 mm or 2 mm strip lines are selected to realize the wiring.

6. The chip-based active row-fed network for dual-polarized weather radars of claim 1, wherein, The radio frequency functions of the active integrated motherboard include radio frequency dual-polarization transceiving functions and internal monitoring functions; the radio frequency dual-polarization transceiving functions and the internal monitoring functions are realized by two layers of strip lines in the form of Wilkinson power divider (D1) cascade and feed; a coupler with narrow side coupling design is adopted to realize the internal monitoring functions; wherein the isolation resistance and the absorption resistance required by the radio frequency circuit are in the form of printed board cavity welding.

7. The chip-based active row-fed network for dual-polarized weather radars of claim 1, wherein, The crimping plate (A2) is a double-layer printed board, one side of which has the same pattern as the radio frequency circuit layer pattern on the active integrated motherboard, and the other side is fully covered with copper.

8. The chip-based active row-fed network for dual-polarized weather radars according to claim 3 or 7, characterized in that, The active integrated motherboard is provided with an "H" shaped heat dissipation area (Q1) which is in contact with the heat generating devices through a heat dissipation framework (G1) to realize heat dissipation.

9. The chip-based active row-fed network for dual-polarized weather radars of claim 3, wherein, The crimping plate (A2) and the active integrated motherboard are installed and fixed through screws on the heat dissipation framework (G1).

Citation Information

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