Pixel circuit, driving method of pixel circuit, display panel and display device

By setting a gate reset module and a light-emitting device anode reset module in the pixel circuit of the OLED display panel, the voltage difference in different reset voltage stages is used to achieve multiple resets of the driving module, which solves the display unevenness and afterimage problems caused by threshold voltage drift and improves the display effect.

CN119724104BActive Publication Date: 2025-10-17YUNGU GUAN TECH CO LTD +1
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Patent Information

Application Number
CN202510104193.3
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2025-01-22
Publication Date
2025-10-17
Estimated Expiration
2045-01-22

AI Technical Summary

Technical Problem

During use, the threshold voltage of the OLED display panel drifts due to different voltage bias conditions of the driving transistor, resulting in grayscale brightness differences and ghosting problems between adjacent images.

Method used

A gate reset module is set in the pixel circuit and connected to the control end of the driving module. By transmitting reset voltages of different voltage values ​​in different reset stages, multiple resets of the control end of the driving module are achieved. The first reset voltage is set to be lower than the second reset voltage, and a voltage value greater than or equal to the second reset voltage is transmitted to the anode of the light-emitting device.

Benefits of technology

It effectively solves the problem of threshold voltage drift, improves display effects, reduces ghosting, and improves the display consistency and first-frame brightness of the display panel.

✦ Generated by Eureka AI based on patent content.

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Abstract

The application discloses a pixel circuit, a driving method of the pixel circuit, a display panel and a display device, and belongs to the technical field of display. The pixel circuit comprises a driving module and a gate reset module. The gate reset module is connected with a control end of the driving module. In a first reset stage, the gate reset module transmits a first reset voltage to the control end of the driving module. In a second reset stage, the gate reset module transmits a second reset voltage to the control end of the driving module. In the same frame, the first reset stage is before the second reset stage, and the first reset voltage is less than the second reset voltage. The embodiment of the application can solve the threshold voltage drift problem caused by different voltage bias conditions of the control end of the driving module in the use process of the display panel, and improve the display effect.
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Description

TECHNICAL FIELD

[0001] The present application belongs to the technical field of display, and particularly relates to a pixel circuit, a driving method of the pixel circuit, a display panel and a display device. BACKGROUND

[0002] Organic light emitting diodes (OLED) and flat display devices based on light emitting diode (LED) technology have been widely applied to mobile phones, televisions, notebook computers, desktop computers and other consumer electronic products due to their high image quality, power saving, thin body and wide application range, and have become the mainstream of display devices. However, the display performance of the current OLED display products needs to be improved. SUMMARY

[0003] Embodiments of the present application provide a pixel circuit, a driving method of the pixel circuit, a display panel and a display device, which can solve the threshold voltage drift problem caused by different voltage bias conditions of the driving transistor in the use process of the display panel, and improve the display effect.

[0004] In a first aspect, embodiments of the present application provide a pixel circuit, comprising:

[0005] a driving module;

[0006] a gate reset module, the control end of the driving module being connected with the gate reset module;

[0007] In the first reset stage, the gate reset module transmits a first reset voltage to the control end of the driving module, and in the second reset stage, the gate reset module transmits a second reset voltage to the control end of the driving module.

[0008] In the same frame, the first reset stage is before the second reset stage, and the first reset voltage is less than the second reset voltage.

[0009] According to any one of the preceding embodiments of the first aspect of the present application, the first reset stage and the second reset stage do not overlap.

[0010] According to any one of the preceding embodiments of the first aspect of the present application, the first end of the gate reset module is connected with the control end of the driving module, the second end of the gate reset module is connected with an initialization signal line, and the control end of the gate reset module is connected with a first scan signal line. In the first reset stage, the initialization signal line is used to transmit the first reset voltage, and in the second reset stage, the initialization signal line is used to transmit the second reset voltage.

[0011] According to any one of the foregoing embodiments of the first aspect of the present application, the gate reset module comprises a first transistor, a first electrode of the first transistor being connected to the control end of the driving module, a second electrode of the first transistor being connected to the initialization signal line, and a gate of the first transistor being connected to the first scan signal line.

[0012] According to any one of the foregoing embodiments of the first aspect of the present application, the first transistor is a double-gate transistor.

[0013] According to any one of the foregoing embodiments of the first aspect of the present application, the pixel circuit further comprises a first reset module, a control end of the first reset module being connected to the second scan signal line, a first end of the first reset module being connected to the anode of the light-emitting device, and a second end of the first reset module being connected to the first reset signal line; the first reset signal line transmits a third reset voltage to the anode of the light-emitting device.

[0014] According to any one of the foregoing embodiments of the first aspect of the present application, the third reset voltage is greater than or equal to the second reset voltage.

[0015] According to any one of the foregoing embodiments of the first aspect of the present application, the first scan signal line and the second scan signal line transmit the same signal; or, the first scan signal line and the second scan signal line transmit different signals.

[0016] According to any one of the foregoing embodiments of the first aspect of the present application, the first scan signal line and the second scan signal line transmit the same signal, and the initialization signal line and the first reset signal line transmit different signals.

[0017] According to any one of the foregoing embodiments of the first aspect of the present application, the first scan signal line and the second scan signal line transmit different signals, and the initialization signal line and the first reset signal line transmit different signals.

[0018] According to any one of the foregoing embodiments of the first aspect of the present application, the first reset module comprises a second transistor, a gate of the second transistor being connected to the second scan signal line, a first electrode of the second transistor being connected to the anode of the light-emitting device, and a second electrode of the second transistor being connected to the first reset signal line.

[0019] According to any one of the foregoing embodiments of the first aspect of the present application, the gate reset module comprises a first sub-gate reset module and a second sub-gate reset module;

[0020] a first end of the first sub-gate reset module being connected to the control end of the driving module, a second end of the first sub-gate reset module being connected to a first sub-initialization signal line, and a control end of the first sub-gate reset module being connected to a first sub-scan signal line;

[0021] a first end of the second sub-gate reset module being connected to the control end of the driving module, a second end of the second sub-gate reset module being connected to a second sub-initialization signal line, and a control end of the second sub-gate reset module being connected to a second sub-scan signal line.

[0022] In the first reset stage, the first sub-initialization signal line is used to transmit the first reset voltage, and in the second reset stage, the second sub-initialization signal line is used to transmit the second reset voltage.

[0023] According to any one of the foregoing embodiments of the first aspect of the present application, the first sub-gate reset module comprises a third transistor, and the second sub-gate reset module comprises a fourth transistor.

[0024] The first electrode of the third transistor is connected to the control end of the driving module, the second electrode of the third transistor is connected to the first sub-initialization signal line, and the gate of the third transistor is connected to the first sub-scanning signal line. The first sub-initialization signal line is used to transmit the first reset voltage.

[0025] The first electrode of the fourth transistor is connected to the control end of the driving module, the second electrode of the fourth transistor is connected to the second sub-initialization signal line, and the gate of the fourth transistor is connected to the second sub-scanning signal line. The second sub-initialization signal line is used to transmit the second reset voltage.

[0026] In the first reset stage, the first sub-scanning signal is at an active level, and in the second reset stage, the second sub-scanning signal is at an active level.

[0027] According to any one of the foregoing embodiments of the first aspect of the present application, the pulse width of the active level of the first sub-scanning signal is adjustable.

[0028] According to any one of the foregoing embodiments of the first aspect of the present application, the pulse width of the active level of the first sub-scanning signal is greater than the pulse width of the active level of the second sub-scanning signal.

[0029] According to any one of the foregoing embodiments of the first aspect of the present application, the pulse width of the active level of the first sub-scanning signal does not overlap with the pulse width of the active level of the second sub-scanning signal.

[0030] According to any one of the foregoing embodiments of the first aspect of the present application, the third transistor is a double-gate transistor.

[0031] According to any one of the foregoing embodiments of the first aspect of the present application, the pixel circuit further comprises a second reset module, the control end of the second reset module is connected to a third scanning signal line, the first end of the second reset module is connected to the anode of the light-emitting device, the second end of the second reset module is connected to a second reset signal line, and the second reset signal line transmits a fourth reset voltage to the anode of the light-emitting device.

[0032] According to any one of the foregoing embodiments of the first aspect of the present application, the fourth reset voltage is greater than or equal to the second reset voltage.

[0033] According to any one of the foregoing embodiments of the first aspect of the present application, the second reset signal line and the second sub-initialization signal line transmit the same signal, or the second reset signal line and the second sub-initialization signal line transmit different signals.

[0034] According to any one of the foregoing embodiments of the first aspect of the present application, the second reset signal line and the second sub-initialization signal line transmit the same signal, and the third scan signal line and the second sub-scan signal line transmit the same signal.

[0035] According to any one of the foregoing embodiments of the first aspect of the present application, the second reset signal line and the second sub-initialization signal line transmit different signals, and the third scan signal line and the second sub-scan signal line transmit the same signal.

[0036] According to any one of the foregoing embodiments of the first aspect of the present application, the second reset module includes a fifth transistor, a gate of the fifth transistor is connected to the third scan signal line, a first electrode of the fifth transistor is connected to the anode of the light-emitting device, and a second electrode of the fifth transistor is connected to the second reset signal line.

[0037] According to any one of the foregoing embodiments of the first aspect of the present application, the pixel circuit further includes:

[0038] a data writing module, the data writing module being connected between the data line and the first end of the driving module;

[0039] a threshold compensation module, the threshold compensation module being connected between the second end of the driving module and the control end;

[0040] a storage module, the storage module being connected between the first power supply end and the control end of the driving module;

[0041] a first light-emitting control module and / or a second light-emitting control module, the first light-emitting control module and / or the second light-emitting control module being connected in series with the driving module between the first power supply end and the anode of the light-emitting device.

[0042] In a second aspect, embodiments of the present application provide a driving method of a pixel circuit, the method being applied to any one of the pixel circuits shown in the first aspect, and the driving method includes:

[0043] transmitting a first reset voltage to the control end of the driving module through the gate reset module to reset the control end of the driving module;

[0044] transmitting a second reset voltage to the control end of the driving module through the gate reset module to complete the reset of the control end of the driving module;

[0045] In the same frame, the first reset voltage is smaller than the second reset voltage.

[0046] In a third aspect, the embodiments of the present application provide a display panel, comprising the pixel circuit according to any one of the first aspect.

[0047] In a fourth aspect, the embodiments of the present application provide a display device, comprising the display panel according to any one of the third aspect.

[0048] The pixel circuit, the driving method of the pixel circuit, the display panel and the display device provided by the embodiments of the present application can realize multiple resets of the control end of the driving module by connecting the control end of the driving module with the gate reset module in the pixel circuit, transmitting the first reset voltage from the gate reset module to the control end of the driving module in the first reset stage, and transmitting the second reset voltage from the gate reset module to the control end of the driving module in the second reset stage. Meanwhile, the first reset voltage is set to be less than the second reset voltage, which can solve the threshold voltage drift problem caused by different voltage bias conditions of the driving module in the use process of the display panel, and improve the display effect. BRIEF DESCRIPTION OF DRAWINGS

[0049] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings needed to be used in the embodiments of the present application will be briefly introduced. For those skilled in the art, other drawings can also be obtained without creative labor on the basis of these drawings.

[0050] Figure 1 A schematic diagram of a pixel circuit provided by some embodiments of the present application.

[0051] Figure 2 Another schematic diagram of a pixel circuit provided by some embodiments of the present application.

[0052] Figure 3 Another schematic diagram of a pixel circuit provided by some embodiments of the present application.

[0053] Figure 4 A timing diagram of an output signal of a pixel circuit provided by the embodiments of the present application.

[0054] Figure 5 Another timing diagram of an output signal of a pixel circuit provided by the embodiments of the present application.

[0055] Figure 6 Another schematic diagram of a pixel circuit provided by some embodiments of the present application.

[0056] Figure 7 Another timing diagram of an output signal of a pixel circuit provided by the embodiments of the present application.

[0057] Figure 8 Another timing diagram of an output signal of a pixel circuit provided by the embodiments of the present application.

[0058] Figure 9 A flowchart of a driving method of a pixel circuit is provided for some embodiments of the present application.

[0059] Figure 10 A schematic diagram of a display panel structure is provided for some embodiments of the present application.

[0060] Figure 11 A schematic diagram of a display device structure is provided for some embodiments of the present application. DETAILED DESCRIPTION

[0061] The features and exemplary embodiments of the various aspects of the present application will be described in detail below with reference to the drawings. To make the purpose, technical solutions and advantages of the present application more clear, the present application will be further described in detail below with reference to the drawings and specific embodiments. It should be understood that the specific embodiments described herein are only intended to explain the present application, but not to limit the present application. The present application can be implemented without some of the specific details by those skilled in the art. The following description of the embodiments is only to provide a better understanding of the present application by showing examples of the present application.

[0062] It should be noted that, in this document, relational terms such as first and second, and the like, are used solely to distinguish one entity or action from another entity or action, without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises", "comprising", or any other variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but can include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without more limitations, an element defined by the statement "comprising" does not exclude the existence of additional identical elements in the process, method, article, or apparatus that includes the element.

[0063] Before the technical solutions provided by the embodiments of the present application are described, in order to facilitate the understanding of the embodiments of the present application, the present application first specifically describes the problems existing in the related art:

[0064] At present, AMOLED display screens are widely used in different display devices due to their excellent performance such as thinner and lighter, high definition, high brightness, good contrast, bending resistance, etc. Figure 1 As shown in the formula (I), Figure 1A schematic diagram of a 7T1C pixel circuit is disclosed, but the AMOLED display panel is prone to threshold voltage drift in the process of use due to different voltage bias conditions of the driving transistor T1 for displaying different gray scale images, which may cause the display gray scale brightness of adjacent two light emitting areas in the next picture to be different, that is, the display picture has residual image.

[0065] Based on this, the embodiments of the present application provide a pixel circuit, a driving method of the pixel circuit, a display panel and a display device, which can solve the above problems. In the following, the pixel circuit provided by the embodiments of the present application is described in detail.

[0066] As shown in the figure, Figure 1 the pixel circuit 100 provided in the embodiments of the present application includes:

[0067] a driving module 101; a gate reset module 102 connected with the control end of the driving module; in the first reset stage, the gate reset module can transmit a first reset voltage to the control end of the driving module, and in the second reset stage, the gate reset module can transmit a second reset voltage to the control end of the driving module; wherein in the same frame, the first reset stage is before the second reset stage, and the first reset voltage is less than the second reset voltage.

[0068] As shown in the figure, Figure 1 , Figure 1 a schematic diagram of an exemplary pixel circuit, Figure 1 the gate reset module in the figure can transmit a first reset voltage to the control end of the driving module in the first reset stage, and transmit a second reset voltage to the control end of the driving module in the second reset stage, and the first reset voltage is less than the second reset voltage, for example, when the second reset voltage is -5V, the first reset voltage can be any voltage less than -5V.

[0069] In some examples, the above-mentioned gate reset module includes a first transistor T1, and the driving module includes a transistor T2.

[0070] The embodiments of the present application can realize multiple reset of the control end of the driving module by setting the gate reset module in the pixel circuit to be connected with the control end of the driving module, transmitting a first reset voltage to the control end of the driving module in the first reset stage, and transmitting a second reset voltage to the control end of the driving module in the second reset stage. By setting the write time of the data signal to be delayed by two reset stages, and setting the first reset voltage to be less than the second reset voltage, the threshold voltage drift problem of the display panel in the process of use due to different voltage bias conditions of the driving module can be solved, the residual image is improved, and the display effect is improved.

[0071] In some embodiments, the first reset stage and the second reset stage are non-overlapping.

[0072] The first reset stage and the second reset stage are different stages for resetting the control terminal of the driving module. The first reset stage and the second reset stage are non-overlapping. The embodiments of the present application can achieve multiple resets of the driving module by setting the first reset stage and the second reset stage to be non-overlapping, thereby avoiding image sticking and improving display effect.

[0073] In some embodiments, as shown in Figure 2 Figure 2 is a schematic diagram of another exemplary pixel circuit. As shown in Figure 2 the first end of the gate reset module can be connected to the control terminal of the driving module, the second end of the gate reset module can be connected to the initialization signal line Vref1, and the control terminal of the gate reset module can be connected to the first scan signal line S1. In the first reset stage, the initialization signal line Vref1 is used to transmit the first reset voltage, and in the second reset stage, the initialization signal line Vref1 is used to transmit the second reset voltage.

[0074] As shown in Figure 2 the gate reset module includes a first transistor T1. The first electrode of the first transistor is connected to the control terminal of the driving module. The second electrode of the first transistor is connected to the initialization signal line Vref1. The gate of the first transistor is connected to the first scan signal line S1. The initialization signal line can transmit a first reset voltage value in the first reset stage and a second reset voltage value in the second reset stage.

[0075] In some examples, the driving module can include a transistor T2. The gate of the transistor T2 is connected to the first electrode of the first transistor. The first electrode of the transistor T2 can be connected to the light-emitting control module. The second electrode of the transistor T2 can be connected to the light-emitting device 10. The first transistor T1 can be a single-gate transistor or a double-gate transistor.

[0076] The embodiments of the present application set the gate reset module to include a first transistor. The first electrode of the first transistor is connected to the control terminal of the driving module. The gate of the first transistor is connected to the first scan signal line. The second electrode of the first transistor is connected to the initialization signal line. The first transistor can control the scanning signal transmitted by the corresponding first scan signal line to be turned on. The initialization voltage signal transmitted by the control terminal of the driving module can transmit different reset voltage values. The gate of the driving transistor can be reset multiple times. The threshold voltage drift problem caused by different voltage bias conditions of the driving transistor during use of the display panel can be solved. Image sticking can be improved, and display effect can be improved.

[0077] In some embodiments, as shown in Figure 3 the first end of the gate reset module can be connected to the control terminal of the driving module, the second end of the gate reset module can be connected to the initialization signal line Vref1, and the control terminal of the gate reset module can be connected to the first scan signal line S1. In the first reset stage, the initialization signal line Vref1 is used to transmit the first reset voltage, and in the second reset stage, the initialization signal line Vref1 is used to transmit the second reset voltage.​Figure 3 A schematic diagram of another pixel circuit provided in an embodiment of the application is shown as follows: Figure 3 , the pixel circuit may include:

[0078] A data writing module 103 is connected between the data line and the first end of the driving module;

[0079] The threshold compensation module 104 is connected between the second terminal of the driving module and the control terminal; Figure 3 , the control end of the threshold compensation module is connected to the scan signal line S2.

[0080] The first light emitting control module 105 and / or the second light emitting control module 106 are connected in series with the driving module between the first power supply terminal and the anode of the light emitting device.

[0081] The storage module 107 is connected between the first power supply terminal and the control terminal of the driving module.

[0082] It can be imagined that the above-mentioned gate reset module 102 can transmit the reset voltage transmitted by the initialization signal line Vref1 in different reset stages to the control end of the driving module 101, thereby realizing multiple resets of the control end of the driving module. Through the above-mentioned pixel circuit, the normal light emission of the light-emitting device 10 can be achieved, and at the same time, the problem of threshold voltage drift of the driving transistor due to different factors during the use of the display panel can be solved, thereby improving afterimages and enhancing display effects.

[0083] In some embodiments, as Figure 3 As shown, Figure 3 A schematic diagram of another pixel circuit provided in an embodiment of the present application is shown as follows: Figure 3 The gate reset module 102 includes a first transistor T1, the driving module 101 includes a transistor T2, the data writing module 103 includes a transistor T3, the threshold compensation module 104 includes a transistor T4, the first light emitting control module includes a transistor T5, the second light emitting control module includes a transistor T6, and the storage module includes a storage capacitor Cst.

[0084] like Figure 3 As shown, the pixel circuit further includes a first reset module 401, the control end of the first reset module 401 is connected to the second scan signal line S3, the first end of the first reset module is connected to the anode of the light emitting device 10, and the second end of the first reset module is connected to the first reset signal line Vref2; the first reset signal line transmits a third reset voltage to the anode of the light emitting device. Here, as Figure 3As shown, the control terminal of the first reset module is connected to the second scan signal line S3. The first reset module 401 can be turned on in response to the scan signal output by the second scan signal line S3, and transmit the third reset voltage output by the first reset signal line Vref2 to the anode of the light emitting device 10. Here, the third reset voltage is greater than or equal to the second reset voltage.

[0085] In some examples, the first reset module 401 can include a second transistor T7, the gate of the second transistor T7 is connected to the second scan signal line, the first electrode of the second transistor T7 is connected to the anode of the light emitting device, and the second electrode of the second transistor T7 is connected to the first reset signal line.

[0086] The embodiment of the present application can improve the problem of low first frame brightness in the display panel by setting the first reset module in the pixel circuit and transmitting the third reset voltage greater than or equal to the second reset voltage to the anode of the light emitting device through the first reset module, thereby improving the display effect.

[0087] In some embodiments, the first scan signal line S1 and the second scan signal line S3 transmit the same signal; or, the first scan signal line S1 and the second scan signal line S3 transmit different signals.

[0088] In some examples, the first scan signal line S1 and the second scan signal line S3 transmit the same signal, for example, Figure 4 S1 transmits SCAN1 and S3 transmits SCAN3, SCAN1 and SCAN3 can be the same, and the initialization signal line Vref1 and the first reset signal line Vref2 transmit different signals. Here, as shown, Figure 4 Figure 4 is a timing diagram of an example output signal of a pixel circuit. As shown, Figure 4 at time t in the first reset stage, when the scan signal is at a low level, the control terminal of the gate reset module is turned on in response to the low-level first scan signal SCAN1 output by the first scan signal line S1, and the first reset voltage output by the initialization signal line Vref1 can be transmitted to the control terminal of the driving module; then at time t+i in the second reset stage, the control terminal of the gate reset module is turned on in response to the low-level first scan signal SCAN1 output by the first scan signal line S1, and the second reset voltage output by the initialization signal line Vref1 can be transmitted to the control terminal of the driving module. It can be envisaged that the above-mentioned driving module can be a transistor.

[0089] ​It is conceived that, in the second reset stage, the second transistor T7 can be turned on in response to the scan signal SCAN3 transmitted by the second scan signal line S3, and the third reset voltage output by the first reset signal line Vref2 is transmitted to the anode of the light emitting device 10 to complete the reset of the anode of the light emitting device 10. After that, at the time t+j, the data transmission module 103 and the threshold compensation module 104 are turned on in response to SCAN2 transmitted by S2 to realize the writing of the data signal.

[0090] The first reset stage and the second reset stage do not overlap in the embodiment of the present application, so that the control end of the driving module can be reset in different reset stages, the threshold voltage drift problem of the driving transistor in the use process of the display panel is solved, the residual image is improved, and the display effect is improved.

[0091] In some embodiments, the first scan signal line S1 and the second scan signal line S3 transmit different signals, for example, as shown in Figure 5 , S2 transmits SCAN2, S3 transmits SCAN3, the above-mentioned SCAN2 can be the same as SCAN3, the initialization signal line Vref1 and the first reset signal line Vref2 transmit different signals; and the pulse width of the effective level of the first scan signal SCAN1 output by the first scan signal line S1 is adjustable.

[0092] As shown in Figure 5 , Figure 5 is another timing diagram of the output signal of the pixel circuit provided by the embodiment of the present application. As shown in Figure 5 , in the embodiment of the present application, the cutoff level of the light emitting control signal EM is high, and the conduction level is low. At the time t, when SCAN1 output by the initialization signal line Vref1 outputs a low level, the control end of the gate reset module 102 is turned on in response to the low level, the reset voltage can be transmitted to the control end of the driving module 101, in the case that the control end of the gate reset module 102 is turned on in response to SCAN1, the first voltage value is transmitted to the driving module; and the second voltage value is transmitted to the driving module at the time t+i. As shown in Figure 5 , at the time t+j, the first reset module can transmit the third reset voltage value to the anode of the light emitting device 10 in response to SCAN2 output by the second scan signal line S3 to complete the reset of the anode of the light emitting device 10.

[0093] The pulse width of the effective level of the first scan signal output by the first scan signal line is adjustable in the embodiment of the present application, so that the control end of the driving module is reset multiple times, the threshold voltage drift problem caused by the different voltage bias conditions of the driving module in the use process of the display panel is solved, the display effect is improved, and the voltage value for resetting the anode of the light emitting device is equal to the second voltage value, so that the problem of low first frame brightness can be optimized.

[0094] In some embodiments, as Figure 6 shown, Figure 6 a schematic diagram of yet another pixel circuit provided by embodiments of the present application, as Figure 6 shown, the gate reset module includes a first sub-reset module 601 and a second sub-reset module 602, a first end of the first sub-gate reset module 601 is connected to the control end of the driving module, a second end of the first sub-gate reset module 601 is connected to a first sub-initialization signal line Vref3, a control end of the first sub-gate reset module 602 is connected to a first sub-scan signal line S4; a first end of the second sub-gate reset module 602 is connected to the control end of the driving module 101, a second end of the second sub-gate reset module 602 is connected to a second sub-initialization signal line Vref1', and a control end of the second sub-gate reset module is connected to a second sub-scan signal line S1'.

[0095] In the first reset stage, the first sub-initialization signal line Vref3 is used to transmit a first reset voltage, and in the second reset stage, the second sub-initialization signal line Vref1' is used to transmit a second reset voltage.

[0096] As Figure 6 shown, the first sub-gate reset module 601 includes a third transistor T8, and the second sub-gate reset module includes a fourth transistor T1'; a first pole of the third transistor T8 is connected to the control end of the driving module, a second pole of the third transistor T8 is connected to the first sub-initialization signal line Vref3, a gate of the third transistor T8 is connected to the first sub-scan signal line S4, the first sub-initialization signal line Vref3 is used to transmit a first reset voltage; a first pole of the fourth transistor T1' is connected to the control end of the driving module 101, a second pole of the fourth transistor T1' is connected to the second sub-initialization signal line Vref1', and a gate of the fourth transistor T1' is connected to the second sub-scan signal line S1', the second sub-initialization signal line Vref1' is used to transmit a second reset voltage.

[0097] In the first reset stage, the first sub-scan signal SCAN4 is at an effective level, and in the second reset stage, the second sub-scan signal SCAN5 is at an effective level; the above-mentioned first sub-scan signal SCAN4 is a signal transmitted by the first sub-scan signal line S4, and the above-mentioned second sub-scan signal SCAN5 is a signal transmitted by the second sub-scan signal line S1'.

[0098] In some examples, the pulse width of the effective level of the first sub-scan signal SCAN4 is adjustable.

[0099] In some examples, the pulse width of the effective level of the first sub-scan signal SCAN4 is greater than the pulse width of the effective level of the second sub-scan signal SCAN5.

[0100] In some examples, the pulse width of the active level of the first sub-scanning signal SCAN4 does not overlap with the pulse width of the active level of the second sub-scanning signal SCAN5 .

[0101] like Figure 6 As shown, the second reset module 402 includes a fifth transistor T7 ′, a gate of the fifth transistor T7 ′ connected to the third scan signal line S5 , a first electrode of the fifth transistor T7 ′ connected to the anode of the light emitting device 10 , and a second electrode of the fifth transistor T7 ′ connected to the second reset signal line Vref4 .

[0102] In some examples, the third transistor T8 may be a single-gate transistor or a double-gate transistor.

[0103] In this embodiment, a gate reset module is configured to include a first sub-gate reset module and a second sub-gate reset module. In a first reset phase, the first sub-gate reset module transmits a first reset voltage to the control terminal of the driver module, and in a second reset phase, the second sub-gate reset module transmits a second reset voltage to the control terminal of the driver module. This allows for multiple resets of the control terminal of the driver module, reduces smearing, and improves display quality. Furthermore, a third voltage level is set to reset the anode of the light-emitting device, which is greater than or equal to the second voltage value, to improve the problem of low brightness in the first frame.

[0104] In some embodiments, as Figure 7 As shown, the pixel circuit further includes a second reset module 402, a control end of the second reset module 402 is connected to the third scan signal line S5, a first end of the second reset module 402 is connected to the anode of the light-emitting device 10, and a second end of the second reset module 402 is connected to the second reset signal line Vref4; the second reset signal line Vref4 transmits a fourth reset voltage to the anode of the light-emitting device 10;

[0105] The fourth reset voltage is greater than or equal to the second reset voltage. By setting the fourth reset voltage to be greater than or equal to the second reset voltage, the problem of dark brightness in the first frame of the display panel can be overcome, thereby improving the display effect.

[0106] In the embodiment of the present application, the pixel circuit includes a second reset module, and the fourth reset voltage is transmitted to the anode of the light-emitting device through the second reset module, thereby overcoming the problem of dark brightness in the first frame of the display panel and improving the display effect.

[0107] In some embodiments, the second reset signal line Vref4 and the second sub-initialization signal line transmit the same signal, or the second reset signal line Vref4 and the second sub-initialization signal line transmit different signals.

[0108] like Figure 7 As shown, Figure 7For another exemplary timing diagram of the pixel circuit, the second reset signal line Vref4 can transmit the same signal as the second sub-initialization signal line Vref1', and the third scan signal line S5 can transmit the same signal as the second sub-scan signal line S1'. As shown in Figure 8 , S1' transmits SCAN5, S5 transmits SCAN6, SCAN5 and SCAN6 can be the same, at time t, the control end of the first sub-gate reset module 601 is turned on in response to the first sub-scan signal SCAN4 output by the first sub-scan signal line S4, and the first reset voltage transmitted by the first sub-initialization signal line Vref3 is transmitted to the control end of the driving module 101; at time t+i, the control end of the second sub-gate reset module 602 is turned on in response to the second sub-scan signal SCAN5 output by the second sub-scan signal line S1', and the second reset voltage transmitted by the second sub-initialization signal line Vref1' is transmitted to the control end of the driving module 101, to complete the reset of the control end of the driving module, at the same time, the second reset module 402 can be turned on in response to the above-mentioned SCAN5, and the above-mentioned second reset voltage is transmitted to the anode of the light emitting device, to complete the reset of the anode of the light emitting device 10. After that, at time t+j, the data writing module 103 and the threshold compensation module 104 are turned on in response to the scan signal SCAN2 output by S2, to realize the writing of the data signal.

[0109] The embodiment of the present application can realize multiple resets of the control end of the driving module and the reset of the anode of the light emitting device by setting the second reset signal line to transmit the same signal as the second sub-initialization signal line, and the third scan signal line to transmit the same signal as the second sub-scan signal line, which can optimize the trailing caused by threshold drift and improve the display effect.

[0110] In some embodiments, the second reset signal line Vref4 transmits different signals from the second sub-initialization signal line Vref1', and the third scan signal line S5 can transmit the same signal as the second sub-scan signal line S1'. As shown in Figure 8 , Figure 8 For another timing diagram of the pixel circuit provided by the embodiment of the present application, as shown in Figure 9, S1' transmits SCAN5, S5 transmits SCAN6, SCAN5 and SCAN6 can be the same, at time t, the control end of the first sub-gate reset module 601 is turned on in response to the first sub-scan signal SCAN4 output by the first sub-scan signal line S4, and transmits the first reset voltage transmitted by the first initialization signal line Vref3 to the control end of the driving module 101; at time t+i, the control end of the second sub-gate reset module 602 is turned on in response to the second sub-scan signal SCAN5 output by the second sub-scan signal line S1', and transmits the second reset voltage transmitted by the second initialization signal line Vref1' to the control end of the driving module 101, to complete the reset of the control end of the driving module, and at the same time, the second reset module 402 can be turned on in response to the above-mentioned SCAN6, and transmits the fourth reset voltage to the anode of the light emitting device, to complete the reset of the anode of the light emitting device 10. After that, at time t+j, the data writing module 103 and the threshold compensation module 104 are turned on in response to the scan signal output by S2, to realize the writing of the data signal.

[0111] The pulse width of the effective level of the first scan signal output by the first scan signal line is adjustable in the embodiments of the present application, multiple resets of the control end of the driving module are realized, the threshold voltage drift problem caused by different voltage bias conditions of the driving module in the use process of the display panel is solved, the display effect is improved, and the fourth voltage value for resetting the anode of the light emitting device is greater than or equal to the second voltage value, so that the problem of low first frame brightness can be optimized.

[0112] In some embodiments, as shown in Figure 9 , Figure 10 A driving method of a pixel circuit provided by the embodiments of the present application is applied to the pixel circuit described above, and the driving method can include the following steps:

[0113] S910: transmitting a first reset voltage to the control end of the driving module through the gate reset module to reset the control end of the driving module.

[0114] The driving module can include a transistor, the control end of the driving module can include the gate of the transistor, and the first reset voltage can be transmitted to the gate of the transistor through the gate reset module to reset the control end of the driving module.

[0115] S920: transmitting a second reset voltage to the control end of the driving module through the gate reset module to complete the reset of the control end of the driving module; wherein in the same frame, the first reset voltage is less than the second reset voltage.

[0116] Then, the second reset voltage can be transmitted to the control end of the driving module by the gate reset module to complete the reset of the control end of the driving module, and the first reset voltage is less than the second reset voltage. For example, when the second reset voltage is-5V, the first reset voltage can be any voltage less than the second voltage.

[0117] The embodiment of the present application transmits the first reset voltage to the control end of the driving module by the gate reset module, and then transmits the second reset voltage to the control end of the driving module by the gate reset module, so as to realize the secondary reset of the control end of the module. Through the multiple resets of the control end of the driving module, the threshold voltage drift problem can be solved, so that the luminance of the adjacent light emitting modules in the display panel is the same when displaying the to-be-displayed picture, and the display effect is improved.

[0118] Figure 10 A structural diagram of a display panel provided by the embodiment of the present application is shown in FIG. 1. As shown in FIG. 1, the present application also provides a display panel 1000, which can include the pixel circuit 100 provided by the embodiment of the present application. Figure 11

[0119] The display panel 1000 provided by the embodiment of the present application has the beneficial effects of the pixel circuit 100 provided by the embodiment of the present application. For details, reference can be made to the specific description of the pixel circuit 100 in the above embodiments, which will not be repeated here.

[0120] Based on the display panel 1000 provided by the above embodiments, correspondingly, the present application also provides a display device including the display panel provided by the present application. Please refer to Figure 11 , Figure 11 A structural diagram of a display device provided by the embodiment of the present application is shown in FIG. 2. Figure 11 The display device 2000 provided by the present application includes the display panel 1000 provided by any of the above embodiments of the present application. ​ The display device 2000 is described by taking a mobile phone as an example. It can be understood that the display device provided by the embodiment of the present application can be a wearable product, a computer, a television, a vehicle-mounted display device, or other display devices with display functions, which are not specifically limited by the present application. The display device provided by the embodiment of the present application has the beneficial effects of the display panel 1000 or the pixel circuit 100 provided by the embodiment of the present application. For details, reference can be made to the specific description of the display panel 1000 or the pixel circuit 100 in the above embodiments, which will not be repeated here.

[0121] It should be understood that the specific structure of the pixel circuit and the structure of the display panel provided by the drawings of the embodiments of the present application are only some examples and are not used to limit the present application. In addition, the above embodiments provided by the present application can be combined with each other without contradiction.​

[0122] It should be understood by those of ordinary skill in the art that the above discussion of any embodiment is merely exemplary and is not intended to be limiting of the scope of the application (including the claims) to these examples; the above embodiments or technical features among different embodiments can also be combined, steps can be implemented in any order, and there are many other variations of the aspects of the embodiments of the application as described above, which are not provided in detail for the sake of brevity. It should be understood that the above description is merely exemplary and is not intended to limit the scope of the application (including the claims) to these examples.

[0123] The functional blocks shown in the structural block diagrams described above can be implemented as hardware, software, firmware, or a combination thereof. When implemented in hardware, it can be, for example, an electronic circuit, an application specific integrated circuit (ASIC), appropriate firmware, a plug-in, a functional card, and the like. When implemented in software, the elements of the application are program or code segments used to perform the required tasks. The program or code segments can be stored in a machine-readable medium or transmitted through a data signal carried in a carrier wave over a transmission medium or communication link. The "machine-readable medium" can include any medium capable of storing or transmitting information. Examples of the machine-readable medium include an electronic circuit, a semiconductor memory device, a ROM, a flash memory, an erasable ROM (EROM), a floppy disk, a CD-ROM, an optical disk, a hard disk, an optical fiber medium, a radio frequency (RF) link, and the like. The code segments can be downloaded via a computer network such as the Internet, an intranet, and the like.

[0124] It should also be noted that the exemplary embodiments mentioned in the present application describe some methods or devices based on a series of steps or devices. However, the present application is not limited to the order of the above steps, that is, the steps can be performed in the order mentioned in the embodiments, or in an order different from the embodiments, or several steps can be performed simultaneously.

[0125] The computer program instructions can also be loaded onto a computer, other programmable data processing apparatus, or other processing device to cause a series of operational steps to be performed on the computer, other programmable apparatus or other processing device to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide processes for implementing the functions / acts specified in the flowchart and / or block diagram block or blocks.

[0126] The above description is only specific implementation of the present application. For the convenience and brevity of description, the specific working process of the above-described device, module and unit can refer to the corresponding process in the foregoing method embodiments, which will not be described herein. It should be understood that the protection scope of the present application is not limited in this way. Any person skilled in the art can easily think of various equivalent modifications or replacements within the technical range disclosed in the present application, and these modifications or replacements should be covered within the protection scope of the present application.

Claims

1. A pixel circuit, characterized in that: include: Driver module; a gate reset module, wherein a first end of the gate reset module is connected to the control end of the driving module, a second end of the gate reset module is connected to the initialization signal line, and a control end of the gate reset module is connected to the first scanning signal line; In the first reset phase, the initialization signal line is used to transmit the first reset voltage, and in the second reset phase, the initialization signal line is used to transmit the second reset voltage; In a first reset phase, the gate reset module transmits a first reset voltage to the control terminal of the driving module, and in a second reset phase, the gate reset module transmits a second reset voltage to the control terminal of the driving module; Wherein, in the same frame, the first reset stage is before the second reset stage, and the first reset voltage is less than the second reset voltage; a first reset module, wherein a control end of the first reset module is connected to the second scan signal line, a first end of the first reset module is connected to the anode of the light-emitting device, and a second end of the first reset module is connected to the first reset signal line; the first reset signal line transmits a third reset voltage to the anode of the light-emitting device; The third reset voltage is greater than or equal to the second reset voltage; The first scanning signal line and the second scanning signal line transmit the same signal, and the initialization signal line and the first reset signal line transmit different signals.

2. The pixel circuit according to claim 1, wherein: The first reset phase and the second reset phase do not overlap.

3. The pixel circuit according to claim 1, wherein: The gate reset module includes a first transistor, a first electrode of the first transistor is connected to the control end of the driving module, a second electrode of the first transistor is connected to the initialization signal line, and a gate of the first transistor is connected to the first scanning signal line.

4. The pixel circuit according to claim 3, wherein: The first transistor is a dual-gate transistor.

5. The pixel circuit according to claim 1, wherein: The first reset module includes a second transistor, a gate of the second transistor is connected to the second scan signal line, a first electrode of the second transistor is connected to the anode of the light emitting device, and a second electrode of the second transistor is connected to the first reset signal line.

6. The pixel circuit according to claim 1, wherein: The gate reset module includes a first sub-gate reset module and a second sub-gate reset module; A first end of the first sub-gate reset module is connected to the control end of the driving module, a second end of the first sub-gate reset module is connected to the first sub-initialization signal line, and a control end of the first sub-gate reset module is connected to the first sub-scanning signal line; A first end of the second sub-gate reset module is connected to the control end of the driving module, a second end of the second sub-gate reset module is connected to the second sub-initialization signal line, and a control end of the second sub-gate reset module is connected to the second sub-scanning signal line; In the first reset phase, the first sub-initialization signal line is used to transmit the first reset voltage, and in the second reset phase, the second sub-initialization signal line is used to transmit the second reset voltage.

7. The pixel circuit according to claim 6, wherein: The first sub-gate reset module includes a third transistor, and the second sub-gate reset module includes a fourth transistor; A first electrode of the third transistor is connected to the control terminal of the driving module, a second electrode of the third transistor is connected to the first sub-initialization signal line, and a gate of the third transistor is connected to the first sub-scanning signal line, and the first sub-initialization signal line is used to transmit the first reset voltage; A first electrode of the fourth transistor is connected to the control terminal of the driving module, a second electrode of the fourth transistor is connected to the second sub-initialization signal line, and a gate of the fourth transistor is connected to the second sub-scanning signal line, and the second sub-initialization signal line is used to transmit the second reset voltage; In the first reset phase, the first sub-scanning signal is at an active level, and in the second reset phase, the second sub-scanning signal is at an active level.

8. The pixel circuit according to claim 7, wherein: The pulse width of the effective level of the first sub-scanning signal is adjustable.

9. The pixel circuit according to claim 8, wherein: A pulse width of an active level of the first sub-scanning signal is greater than a pulse width of an active level of the second sub-scanning signal.

10. The pixel circuit according to claim 9, wherein: A pulse width of an active level of the first sub-scanning signal and a pulse width of an active level of the second sub-scanning signal do not overlap.

11. The pixel circuit according to claim 7, wherein: The third transistor is a dual-gate transistor.

12. The pixel circuit according to claim 6, wherein: The pixel circuit also includes a second reset module, a control end of the second reset module is connected to the third scan signal line, a first end of the second reset module is connected to the anode of the light-emitting device, and a second end of the second reset module is connected to the second reset signal line; the second reset signal line transmits a fourth reset voltage to the anode of the light-emitting device.

13. The pixel circuit according to claim 12, wherein: The fourth reset voltage is greater than or equal to the second reset voltage.

14. The pixel circuit according to claim 13, wherein: The second reset signal line and the second sub-initialization signal line transmit the same signal, or the second reset signal line and the second sub-initialization signal line transmit different signals.

15. The pixel circuit according to claim 14, wherein: The second reset signal line transmits the same signal as the second sub-initializing signal line, and the third scan signal line transmits the same signal as the second sub-scanning signal line.

16. The pixel circuit according to claim 14, wherein: The second reset signal line and the second sub-initializing signal line transmit different signals, and the third scan signal line and the second sub-scan signal line transmit the same signal.

17. The pixel circuit according to claim 16, wherein: The second reset module includes a fifth transistor, a gate of the fifth transistor is connected to the third scan signal line, a first electrode of the fifth transistor is connected to the anode of the light emitting device, and a second electrode of the fifth transistor is connected to the second reset signal line.

18. The pixel circuit according to claim 1, wherein: The pixel circuit further includes: a data writing module connected between the data line and the first end of the driving module; a threshold compensation module, the threshold compensation module being connected between the second terminal of the driving module and the control terminal; a storage module connected between the first power supply terminal and the control terminal of the driving module; The first light emitting control module and / or the second light emitting control module are connected in series with the driving module between the first power supply terminal and the anode of the light emitting device.

19. A method for driving a pixel circuit, characterized in that: Applied to the pixel circuit according to any one of claims 1 to 18, the driving method includes: transmitting a first reset voltage to the control terminal of the driving module through a gate reset module to reset the control terminal of the driving module; Transmitting a second reset voltage to the control terminal of the driving module through the gate reset module to complete the resetting of the control terminal of the driving module; In the same frame, the first reset voltage is lower than the second reset voltage.

20. A display panel, characterized in that: include: The pixel circuit according to any one of claims 1 to 18.

21. A display device, characterized in that: include: The display panel as claimed in claim 20.

Citation Information

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