Data transmission method and related device

By adjusting the structure and symbol distribution of subframes in the superframe at the transmitting end, the problem that the prior art cannot adapt to scenarios above 800Gbps is solved, efficient data transmission is achieved and redundancy is reduced.

CN119728003APending Publication Date: 2025-03-28HUAWEI TECH CO LTD
View PDF 0 Cites 3 Cited by

Patent Information

Application Number
CN202311288520.2
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2023-09-28
Publication Date
2025-03-28

AI Technical Summary

Technical Problem

The transmission symbol sequence of the prior art cannot be suitable for scenarios above 800Gbps, and the transmission redundancy is relatively large.

Method used

At the transmitting end, a superframe including multiple subframes is obtained, and the subframe contains training symbols and pilot symbols. By adjusting the subframe structure and symbol distribution, redundancy is reduced and adapted to high-speed transmission scenarios.

Benefits of technology

It realizes effective data transmission in scenarios above 800Gbps, reduces redundancy and improves transmission efficiency.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN119728003A_ABST
    Figure CN119728003A_ABST
Patent Text Reader

Abstract

The embodiment of the invention provides a data transmission method and a related device. Specifically, a transmitting end acquires a superframe comprising a plurality of subframes, the subframes comprising training symbols and pilot symbols. Wherein in one polarization direction, the number of the training symbols in the sub-frame is NTS, the number of the pilot symbols in the sub-frame is NPS, both the NTS and the NPS are integers greater than 1, the sum of the NTS and the NPS is an odd number, and the sum of the NTS and the NPS is greater than or equal to 5. One symbol in the subframe is both a training symbol and a pilot symbol, each training symbol and each pilot symbol are one of four complex numbers of-A-Aj,-A + Aj, A-Aj and A + Aj, and A is a real number. Every continuous NPG symbols in the subframe comprise one pilot symbol located at a fixed position, and NPG is 96 or 128. And further, the transmitting end transmits the superframe. It can be seen that the interval of inserting the pilot symbols in the sub-frame is larger, and redundancy is reduced. In addition, one symbol in the sub-frame is both a training symbol and a pilot symbol, so that the structure of the sub-frame is simplified.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] The embodiments of the present application relate to the field of optical communications, and in particular, to a data transmission method and related devices. Background Art

[0002] Driven by 5G, cloud computing, big data, and artificial intelligence, high-speed optical transmission networks are developing in the direction of large capacity, packetization, and intelligence. Coherent optical communication systems use the amplitude, phase, polarization, and frequency of light waves to carry information. In order to combat optical signal distortion caused by dispersion, polarization-related damage, noise, nonlinear effects, and other factors during transmission and maintain long-distance transmission, coherent optical communication systems usually add some designed fixed symbol sequences to the transmission symbol sequence to facilitate the receiver to recover the transmitted symbols.

[0003] The existing transmission symbol sequence is mainly used in 400Gbps or 800Gbps scenarios, and cannot adapt to future scenarios above 800Gbps (including 1.2Tbps, 1.6Tbps, etc.), and the transmission redundancy is large. Summary of the invention

[0004] The embodiments of the present application provide a data transmission method and related devices, which solve the problem that the transmission symbol sequence in the prior art cannot be applied to scenarios above 800 Gbps.

[0005] In a first aspect, an embodiment of the present application provides a data transmission method, which is applied to a transmitting end. Specifically, the transmitting end obtains a superframe including multiple subframes, and the subframe includes training symbols and pilot symbols. In one polarization direction, the number of training symbols in the subframe is N. TS , the number of pilot symbols in a subframe is N PS , N TS and N PS are all integers greater than 1, N TS +N PS is an odd number, N TS +N PS Greater than or equal to 5. There is a symbol in the subframe that is both a training symbol and a pilot symbol. Each training symbol and each pilot symbol is one of the four complex numbers -A-Aj, -A+Aj, A-Aj, and A+Aj. A is a real number. PG symbols include a pilot symbol located at a fixed position, N PGis 96 or 128. Then, the transmitting end sends a superframe. It should be noted that the method can also be applied to a specific module in the transmitting end, for example, a signal processor of the transmitting end. It should be understood that the module obtaining a superframe can be understood as a superframe generated by the module itself, or it can be understood as the module receiving a superframe sent from its preceding module. It should also be understood that the module sending a superframe can be understood as the module sending a superframe to the receiving end through a channel, or it can be understood as the module sending a superframe to its succeeding module.

[0006] In this embodiment, every 96 or 128 consecutive symbols in a subframe include a pilot symbol. It can be seen that the interval for inserting pilot symbols in a subframe is larger, reducing redundancy. In addition, one symbol in a subframe is both a training symbol and a pilot symbol, simplifying the structure of the subframe.

[0007] In some possible implementations, in a subframe, a training symbol sequence including multiple training symbols in the first polarization direction is different from a training symbol sequence including multiple training symbols in the second polarization direction, and a pilot symbol sequence including multiple pilot symbols in the first polarization direction is different from a pilot symbol sequence including multiple pilot symbols in the second polarization direction, so as to avoid the problem that the receiving end cannot distinguish between the two polarization directions in actual transmission. The first polarization direction and the second polarization direction are orthogonal to each other.

[0008] In some possible implementations, in one subframe, a total of N including all training symbols and all pilot symbols in one polarization direction. TS +N PS The sum of the real parts of the N symbols is 0, including all training symbols and all pilot symbols in one polarization direction. TS +N PS The sum of the imaginary parts of the -1 symbols is 0, so that DC balance can be achieved, which is beneficial for the receiving end to restore the signal quality.

[0009] In some possible implementations, in one subframe, a total of N including all training symbols and all pilot symbols in one polarization direction. TS +N PS The difference between the numbers of -A-Aj, -A+Aj, A-Aj and A+Aj in the -1 symbol is less than or equal to 2, which effectively ensures that the number of symbols in each polarization direction is close to balance.

[0010] In some possible embodiments, in a subframe, the number of training symbols and pilot symbols that are -A-Aj in two polarization directions, the number of training symbols and pilot symbols that are -A+Aj in two polarization directions, the number of training symbols and pilot symbols that are A-Aj in two polarization directions, and the number of training symbols and pilot symbols that are A+Aj in two polarization directions are the same, effectively ensuring the balance of the number of symbols in the two polarization directions.

[0011] In some possible implementations, in a subframe, N TS The continuous training symbols are arranged from the beginning of the subframe, making the structure of the subframe more neat.

[0012] In some possible implementations, N TS The symbol located at the starting position in the continuous training symbols is both a training symbol and a pilot symbol, so that the arrangement of the pilot symbols is more conducive to standardization.

[0013] In some possible implementations, the subframe arranged in the first position in the superframe is a first-class subframe, and the first-class subframe also includes a frame synchronization symbol, a reserved symbol, and a pre-framing symbol, which enriches the functional implementation of the first-class subframe. Each frame synchronization symbol is -A FAW -A FAW j, -A FAW +A FAW j. A FAW -A FAW j and A FAW +A FAW j is one of the four plural forms, A FAW In the first type of subframe, the training symbol is located before the frame synchronization symbol, the frame synchronization symbol is located before the reserved symbol, and the reserved symbol is located before the pre-framing symbol.

[0014] In some possible implementations, A=A FAW .

[0015] In some possible implementations, the superframe includes at least one second-type subframe, the second-type subframe further includes a pre-framing symbol, and in the second-type subframe, the training symbol is located before the pre-framing symbol.

[0016] In some possible implementations, the number of pre-framing symbols in a superframe is N. CW , the total number of symbols in the superframe is N F , N PG 、N CW and N F The corresponding relationship between them is one of the following items:

[0017] N PG =128, NCW =172032,N F =173440 or 173568 or 173696 or 173824 or 173952 or 174080;

[0018] N PG =128, N CW =344064,N F =346880 or 347136 or 347392 or 347520 or 347648 or 347776 or 347904 or 348160;

[0019] N PG =128, N CW =516096,N F =520192 or 520320 or 520448 or 520576 or 520704 or 520832 or 520960 or 521088 or 521472 or 521600 or 521856 or 522240;

[0020] N PG =128, N CW =688128,N F =693760 or 693888 or 694144 or 694272 or 694400 or 694656 or 694784 or 694912 or 695040 or 695296 or 695552 or 695808 or 696192 or 696320;

[0021] N PG =128, N CW =150528,N F =152064 or 152192 or 152320;

[0022] N PG =128, N CW =129024,N F =130048 or 130176 or 130560;

[0023] N PG =128, N CW =107520,N F =108416 or 108544 or 108672 or 108800;

[0024] N PG =128, N CW =175616,N F =177152 or 177280 or 177408 or 177536 or 177664;

[0025] N PG =128, N CW =351232,N F =354304 or 354432 or 354560 or 354688 or 354816 or 354944 or 355072 or 355200 or 355328;

[0026] N PG =128, N CW =526848,N F =531200 or 531456 or 531712 or 531840 or 532224 or 532480 or 532608 or 532864 or 532992 or 533120;

[0027] N PG =128, N CW =702464,N F =708096 or 708224 or 708480 or 708608 or 708736 or 708864 or 708992 or 709120 or 709376 or 709504 or 709632 or 709888 or 710016 or 710144 or 710272 or 710400 or 710528 or 710656;

[0028] N PG =96, N CW =172032,N F =173952 or 174048 or 174240 or 174336 or 174432 or 174528;

[0029] N PG =96, N CW =344064,N F =347904 or 348000 or 348096 or 348192 or 348384 or 348480 or 348672 or 348768 or 348864 or 349056;

[0030] N PG =96, N CW =516096,N F =521664 or 521856 or 522144 or 522240 or 522720 or 522816 or 523008 or 523200 or 523296 or 523392 or 523488 or 523584 or 523776;

[0031] N PG =96, NCW =688128,N F =695520 or 695808 or 695904 or 696000 or 696192 or 696384 or 696672 or 696768 or 696864 or 696960 or 697056 or 697248 or 697344 or 697536 or 697632 or 697728 or 698112 or 698400;

[0032] N PG =96, N CW =150528,N F =152160 or 152256 or 152352 or 152448 or 152544 or 152640 or 152736;

[0033] N PG =96, N CW =129024,N F =130464 or 130560 or 130752 or 130848 or 130944;

[0034] N PG =96, N CW =107520,N F =108672 or 108768 or 108864 or 108960 or 109056;

[0035] N PG =96, N CW =175616,N F =177504 or 177600 or 177888 or 177984 or 178080 or 178176;

[0036] N PG =96, N CW =351232,N F =355008 or 355104 or 355200 or 355488 or 355680 or 355776 or 355872 or 355968 or 356160 or 356352 or 356448;

[0037] N PG =96, N CW =526848,N F=532416 or 532512 or 532608 or 532704 or 532800 or 532896 or 532992 or 533280 or 533376 or 533568 or 533664 or 533760 or 533856 or 533952 or 534144 or 534240 or 534336 or 534432 or 534528;

[0038] N PG =96, N CW =702464,N F =709920 or 710016 or 710112 or 710208 or 710304 or 710400 or 710688 or 710784 or 710976 or 711168 or 711264 or 711360 or 711552 or 711648 or 711744 or 711936 or 712320 or 712416 or 712704 or 712800 or 712896.

[0039] In some possible implementations, in one polarization direction, the modulation format of the symbols in the superframe is Quadrature Phase Shift Keying (QPSK), A=-1 or 1. Alternatively, in one polarization direction, the modulation format of the symbols in the superframe is 16QAM, A=-1, 1, -3, 3, or Alternatively, in one polarization direction, the modulation format of the symbols in the superframe is 64QAM, A = -1, 1, -3, 3, -5, 5, -7, or 7.

[0040] In a second aspect, an embodiment of the present application provides a data transmission method, which is applied to a receiving end. Specifically, the receiving end receives a superframe including multiple subframes, and the subframe includes training symbols and pilot symbols. In one polarization direction, the number of training symbols in the subframe is N. TS , the number of pilot symbols in a subframe is N PS , N TS and N PS are all integers greater than 1, N TS +N PS is an odd number, N TS +N PS Greater than or equal to 5. There is a symbol in the subframe that is both a training symbol and a pilot symbol. Each training symbol and each pilot symbol is one of four complex numbers: -A-Aj, -A+Aj, A-Aj, and A+Aj. A is a real number. Every 96 or 128 consecutive symbols in the subframe include a pilot symbol at a fixed position. Then, the receiving end decodes the superframe.

[0041] In some possible implementations, in a subframe, a training symbol sequence including multiple training symbols in the first polarization direction is different from a training symbol sequence including multiple training symbols in the second polarization direction, and a pilot symbol sequence including multiple pilot symbols in the first polarization direction is different from a pilot symbol sequence including multiple pilot symbols in the second polarization direction, so as to avoid the problem that the receiving end cannot distinguish between the two polarization directions in actual transmission. The first polarization direction and the second polarization direction are orthogonal to each other.

[0042] In some possible implementations, in one subframe, a total of N including all training symbols and all pilot symbols in one polarization direction. TS +N PS The sum of the real parts of the N symbols is 0, including all training symbols and all pilot symbols in one polarization direction. TS +N PS The sum of the imaginary parts of the -1 symbols is 0, so that DC balance can be achieved, which is beneficial for the receiving end to restore the signal quality.

[0043] In some possible implementations, in one subframe, a total of N including all training symbols and all pilot symbols in one polarization direction. TS +N PS The difference between the numbers of -A-Aj, -A+Aj, A-Aj and A+Aj in the -1 symbol is less than or equal to 2, which effectively ensures that the number of symbols in each polarization direction is close to balance.

[0044] In some possible embodiments, in a subframe, the number of training symbols and pilot symbols that are -A-Aj in two polarization directions, the number of training symbols and pilot symbols that are -A+Aj in two polarization directions, the number of training symbols and pilot symbols that are A-Aj in two polarization directions, and the number of training symbols and pilot symbols that are A+Aj in two polarization directions are the same, effectively ensuring the balance of the number of symbols in the two polarization directions.

[0045] In some possible implementations, in a subframe, N TS The continuous training symbols are arranged from the beginning of the subframe, making the structure of the subframe more neat.

[0046] In some possible implementations, N TS The symbol located at the starting position in the continuous training symbols is both a training symbol and a pilot symbol, so that the arrangement of the pilot symbols is more conducive to standardization.

[0047] In some possible implementations, the subframe arranged in the first position in the superframe is a first-class subframe, and the first-class subframe also includes a frame synchronization symbol, a reserved symbol, and a pre-framing symbol, which enriches the functional implementation of the first-class subframe. Each frame synchronization symbol is -A FAW -A FAW j, -A FAW +A FAW j. A FAW -A FAW j and A FAW +A FAW j is one of the four plural forms, A FAW In the first type of subframe, the training symbol is located before the frame synchronization symbol, the frame synchronization symbol is located before the reserved symbol, and the reserved symbol is located before the pre-framing symbol.

[0048] In some possible implementations, A=A FAW .

[0049] In some possible implementations, the superframe includes at least one second-type subframe, the second-type subframe further includes a pre-framing symbol, and in the second-type subframe, the training symbol is located before the pre-framing symbol.

[0050] In some possible implementations, the number of pre-framing symbols in a superframe is N. CW , the total number of symbols in the superframe is N F , N PG 、N CW and N F The corresponding relationship between them is one of the following items:

[0051] N PG =128, N CW =172032,N F =173440 or 173568 or 173696 or 173824 or 173952 or 174080;

[0052] N PG =128, N CW =344064,N F =346880 or 347136 or 347392 or 347520 or 347648 or 347776 or 347904 or 348160;

[0053] N PG =128, N CW =516096,N F=520192 or 520320 or 520448 or 520576 or 520704 or 520832 or 520960 or 521088 or 521472 or 521600 or 521856 or 522240;

[0054] N PG =128, N CW =688128,N F =693760 or 693888 or 694144 or 694272 or 694400 or 694656 or 694784 or 694912 or 695040 or 695296 or 695552 or 695808 or 696192 or 696320;

[0055] N PG =128, N CW =150528,N F =152064 or 152192 or 152320;

[0056] N PG =128, N CW =129024,N F =130048 or 130176 or 130560;

[0057] N PG =128, N CW =107520,N F =108416 or 108544 or 108672 or 108800;

[0058] N PG =128, N CW =175616,N F =177152 or 177280 or 177408 or 177536 or 177664;

[0059] N PG =128, N CW =351232,N F =354304 or 354432 or 354560 or 354688 or 354816 or 354944 or 355072 or 355200 or 355328;

[0060] N PG =128, N CW =526848,N F =531200 or 531456 or 531712 or 531840 or 532224 or 532480 or 532608 or 532864 or 532992 or 533120;

[0061] N PG =128, N CW =702464,N F =708096 or 708224 or 708480 or 708608 or 708736 or 708864 or 708992 or 709120 or 709376 or 709504 or 709632 or 709888 or 710016 or 710144 or 710272 or 710400 or 710528 or 710656;

[0062] N PG =96, N CW =172032,N F =173952 or 174048 or 174240 or 174336 or 174432 or 174528;

[0063] N PG =96, N CW =344064,N F =347904 or 348000 or 348096 or 348192 or 348384 or 348480 or 348672 or 348768 or 348864 or 349056;

[0064] N PG =96, N CW =516096,N F =521664 or 521856 or 522144 or 522240 or 522720 or 522816 or 523008 or 523200 or 523296 or 523392 or 523488 or 523584 or 523776;

[0065] N PG =96, N CW =688128,N F =695520 or 695808 or 695904 or 696000 or 696192 or 696384 or 696672 or 696768 or 696864 or 696960 or 697056 or 697248 or 697344 or 697536 or 697632 or 697728 or 698112 or 698400;

[0066] N PG =96, N CW =150528,N F =152160 or 152256 or 152352 or 152448 or 152544 or 152640 or 152736;

[0067] N PG =96, N CW =129024,N F =130464 or 130560 or 130752 or 130848 or 130944;

[0068] N PG =96, N CW =107520,N F =108672 or 108768 or 108864 or 108960 or 109056;

[0069] N PG =96, N CW =175616,N F =177504 or 177600 or 177888 or 177984 or 178080 or 178176;

[0070] N PG =96, N CW =351232,N F =355008 or 355104 or 355200 or 355488 or 355680 or 355776 or 355872 or 355968 or 356160 or 356352 or 356448;

[0071] N PG =96, N CW =526848,N F =532416 or 532512 or 532608 or 532704 or 532800 or 532896 or 532992 or 533280 or 533376 or 533568 or 533664 or 533760 or 533856 or 533952 or 534144 or 534240 or 534336 or 534432 or 534528;

[0072] N PG =96, N CW =702464,N F =709920 or 710016 or 710112 or 710208 or 710304 or 710400 or 710688 or 710784 or 710976 or 711168 or 711264 or 711360 or 711552 or 711648 or 711744 or 711936 or 712320 or 712416 or 712704 or 712800 or 712896.

[0073] In some possible implementations, in one polarization direction, the modulation format of the symbols in the superframe is QPSK, A=-1 or 1. Alternatively, in one polarization direction, the modulation format of the symbols in the superframe is 16QAM, A=-1, 1, -3, 3, or Alternatively, in one polarization direction, the modulation format of the symbols in the superframe is 64QAM, A = -1, 1, -3, 3, -5, 5, -7, or 7.

[0074] In a third aspect, an embodiment of the present application provides a chip, which includes a processor and a memory, the memory and the processor are interconnected via lines, instructions are stored in the memory, and the processor is used to execute the method described in any implementation method of the first aspect and the second aspect.

[0075] In a fourth aspect, an embodiment of the present application provides a data transmission device applied to a transmitting end, the data transmission device comprising: a processing unit and a transmitting unit. The processing unit is used to: obtain a superframe including multiple subframes, the subframe including training symbols and pilot symbols. In one polarization direction, the number of training symbols in the subframe is N TS , the number of pilot symbols in a subframe is N PS , N TS and N PS are all integers greater than 1, N TS +N PS is an odd number, N TS +N PS Greater than or equal to 5. There is a symbol in the subframe that is both a training symbol and a pilot symbol. Each training symbol and each pilot symbol is one of four complex numbers: -A-Aj, -A+Aj, A-Aj, and A+Aj. A is a real number. Every 96 or 128 consecutive symbols in the subframe include a pilot symbol at a fixed position. The sending unit is used to send a superframe.

[0076] In some possible implementations, in a subframe, a training symbol sequence including multiple training symbols in the first polarization direction is different from a training symbol sequence including multiple training symbols in the second polarization direction, and a pilot symbol sequence including multiple pilot symbols in the first polarization direction is different from a pilot symbol sequence including multiple pilot symbols in the second polarization direction, so as to avoid the problem that the receiving end cannot distinguish between the two polarization directions in actual transmission. The first polarization direction and the second polarization direction are orthogonal to each other.

[0077] In some possible implementations, in one subframe, a total of N including all training symbols and all pilot symbols in one polarization direction. TS +N PSThe sum of the real parts of the N symbols is 0, including all training symbols and all pilot symbols in one polarization direction. TS +N PS The sum of the imaginary parts of the -1 symbols is 0, so that DC balance can be achieved, which is beneficial for the receiving end to restore the signal quality.

[0078] In some possible implementations, in one subframe, a total of N including all training symbols and all pilot symbols in one polarization direction. TS +N PS The difference between the numbers of -A-Aj, -A+Aj, A-Aj and A+Aj in the -1 symbol is less than or equal to 2, which effectively ensures that the number of symbols in each polarization direction is close to balance.

[0079] In some possible embodiments, in a subframe, the number of training symbols and pilot symbols that are -A-Aj in two polarization directions, the number of training symbols and pilot symbols that are -A+Aj in two polarization directions, the number of training symbols and pilot symbols that are A-Aj in two polarization directions, and the number of training symbols and pilot symbols that are A+Aj in two polarization directions are the same, effectively ensuring the balance of the number of symbols in the two polarization directions.

[0080] In some possible implementations, in a subframe, N TS The continuous training symbols are arranged from the beginning of the subframe, making the structure of the subframe more neat.

[0081] In some possible implementations, N TS The symbol located at the starting position in the continuous training symbols is both a training symbol and a pilot symbol, so that the arrangement of the pilot symbols is more conducive to standardization.

[0082] In some possible implementations, the subframe arranged in the first position in the superframe is a first-class subframe, and the first-class subframe also includes a frame synchronization symbol, a reserved symbol, and a pre-framing symbol, which enriches the functional implementation of the first-class subframe. Each frame synchronization symbol is -A FAW -A FAW j, -A FAW +A FAW j. A FAW -A FAW j and A FAW +A FAW j is one of the four plural forms, A FAW In the first type of subframe, the training symbol is located before the frame synchronization symbol, the frame synchronization symbol is located before the reserved symbol, and the reserved symbol is located before the pre-framing symbol.

[0083] In some possible implementations, A=A FAW .

[0084] In some possible implementations, the superframe includes at least one second-type subframe, the second-type subframe further includes a pre-framing symbol, and in the second-type subframe, the training symbol is located before the pre-framing symbol.

[0085] In some possible implementations, the number of pre-framing symbols in a superframe is N. CW , the total number of symbols in the superframe is N F , N PG 、N CW and N F The corresponding relationship between them is one of the following items:

[0086] N PG =128, N CW =172032,N F =173440 or 173568 or 173696 or 173824 or 173952 or 174080;

[0087] N PG =128, N CW =344064,N F =346880 or 347136 or 347392 or 347520 or 347648 or 347776 or 347904 or 348160;

[0088] N PG =128, N CW =516096,N F =520192 or 520320 or 520448 or 520576 or 520704 or 520832 or 520960 or 521088 or 521472 or 521600 or 521856 or 522240;

[0089] N PG =128, N CW =688128,N F =693760 or 693888 or 694144 or 694272 or 694400 or 694656 or 694784 or 694912 or 695040 or 695296 or 695552 or 695808 or 696192 or 696320;

[0090] N PG =128, N CW =150528,N F =152064 or 152192 or 152320;

[0091] N PG =128, N CW =129024,N F =130048 or 130176 or 130560;

[0092] N PG =128, N CW =107520,N F =108416 or 108544 or 108672 or 108800;

[0093] N PG =128, N CW =175616,N F =177152 or 177280 or 177408 or 177536 or 177664;

[0094] N PG =128, N CW =351232,N F =354304 or 354432 or 354560 or 354688 or 354816 or 354944 or 355072 or 355200 or 355328;

[0095] N PG =128, N CW =526848,N F =531200 or 531456 or 531712 or 531840 or 532224 or 532480 or 532608 or 532864 or 532992 or 533120;

[0096] N PG =128, N CW =702464,N F =708096 or 708224 or 708480 or 708608 or 708736 or 708864 or 708992 or 709120 or 709376 or 709504 or 709632 or 709888 or 710016 or 710144 or 710272 or 710400 or 710528 or 710656;

[0097] N PG =96, N CW =172032,N F =173952 or 174048 or 174240 or 174336 or 174432 or 174528;

[0098] N PG =96, N CW=344064,N F =347904 or 348000 or 348096 or 348192 or 348384 or 348480 or 348672 or 348768 or 348864 or 349056;

[0099] N PG =96, N CW =516096,N F =521664 or 521856 or 522144 or 522240 or 522720 or 522816 or 523008 or 523200 or 523296 or 523392 or 523488 or 523584 or 523776;

[0100] N PG =96, N CW =688128,N F =695520 or 695808 or 695904 or 696000 or 696192 or 696384 or 696672 or 696768 or 696864 or 696960 or 697056 or 697248 or 697344 or 697536 or 697632 or 697728 or 698112 or 698400;

[0101] N PG =96, N CW =150528,N F =152160 or 152256 or 152352 or 152448 or 152544 or 152640 or 152736;

[0102] N PG =96, N CW =129024,N F =130464 or 130560 or 130752 or 130848 or 130944;

[0103] N PG =96, N CW =107520,N F =108672 or 108768 or 108864 or 108960 or 109056;

[0104] N PG =96, N CW =175616,N F =177504 or 177600 or 177888 or 177984 or 178080 or 178176;

[0105] N PG=96, N CW =351232,N F =355008 or 355104 or 355200 or 355488 or 355680 or 355776 or 355872 or 355968 or 356160 or 356352 or 356448;

[0106] N PG =96, N CW =526848,N F =532416 or 532512 or 532608 or 532704 or 532800 or 532896 or 532992 or 533280 or 533376 or 533568 or 533664 or 533760 or 533856 or 533952 or 534144 or 534240 or 534336 or 534432 or 534528;

[0107] N PG =96, N CW =702464,N F =709920 or 710016 or 710112 or 710208 or 710304 or 710400 or 710688 or 710784 or 710976 or 711168 or 711264 or 711360 or 711552 or 711648 or 711744 or 711936 or 712320 or 712416 or 712704 or 712800 or 712896.

[0108] In some possible implementations, in one polarization direction, the modulation format of the symbols in the superframe is QPSK, A=-1 or 1. Alternatively, in one polarization direction, the modulation format of the symbols in the superframe is 16QAM, A=-1, 1, -3, 3, or Alternatively, in one polarization direction, the modulation format of the symbols in the superframe is 64QAM, A = -1, 1, -3, 3, -5, 5, -7, or 7.

[0109] In a fifth aspect, an embodiment of the present application provides a data transmission device applied to a receiving end, the data transmission device comprising: a receiving unit and a processing unit. The receiving unit is used to: receive a superframe including multiple subframes, the subframe including training symbols and pilot symbols. In one polarization direction, the number of training symbols in the subframe is N TS , the number of pilot symbols in a subframe is N PS , N TS and N PS are all integers greater than 1, N TS +N PSis an odd number, N TS +N PS Greater than or equal to 5. There is a symbol in the subframe that is both a training symbol and a pilot symbol, each training symbol and each pilot symbol is one of four complex numbers -A-Aj, -A+Aj, A-Aj and A+Aj, where A is a real number. Every 96 or 128 consecutive symbols in the subframe include a pilot symbol at a fixed position. The processing unit is used to: decode the superframe.

[0110] In some possible implementations, in a subframe, a training symbol sequence including multiple training symbols in the first polarization direction is different from a training symbol sequence including multiple training symbols in the second polarization direction, and a pilot symbol sequence including multiple pilot symbols in the first polarization direction is different from a pilot symbol sequence including multiple pilot symbols in the second polarization direction, so as to avoid the problem that the receiving end cannot distinguish between the two polarization directions in actual transmission. The first polarization direction and the second polarization direction are orthogonal to each other.

[0111] In some possible implementations, in one subframe, a total of N including all training symbols and all pilot symbols in one polarization direction. TS +N PS The sum of the real parts of the N symbols is 0, including all training symbols and all pilot symbols in one polarization direction. TS +N PS The sum of the imaginary parts of the -1 symbols is 0, so that DC balance can be achieved, which is beneficial for the receiving end to restore the signal quality.

[0112] In some possible implementations, in one subframe, a total of N including all training symbols and all pilot symbols in one polarization direction. TS +N PS The difference between the numbers of -A-Aj, -A+Aj, A-Aj and A+Aj in the -1 symbol is less than or equal to 2, which effectively ensures that the number of symbols in each polarization direction is close to balance.

[0113] In some possible embodiments, in a subframe, the number of training symbols and pilot symbols that are -A-Aj in two polarization directions, the number of training symbols and pilot symbols that are -A+Aj in two polarization directions, the number of training symbols and pilot symbols that are A-Aj in two polarization directions, and the number of training symbols and pilot symbols that are A+Aj in two polarization directions are the same, effectively ensuring the balance of the number of symbols in the two polarization directions.

[0114] In some possible implementations, in a subframe, N TSThe continuous training symbols are arranged from the beginning of the subframe, making the structure of the subframe more neat.

[0115] In some possible implementations, N TS The symbol located at the starting position in the continuous training symbols is both a training symbol and a pilot symbol, so that the arrangement of the pilot symbols is more conducive to standardization.

[0116] In some possible implementations, the subframe arranged in the first position in the superframe is a first-class subframe, and the first-class subframe also includes a frame synchronization symbol, a reserved symbol, and a pre-framing symbol, which enriches the functional implementation of the first-class subframe. Each frame synchronization symbol is -A FAW -A FAW j, -A FAW +A FAW j. A FAW -A FAW j and A FAW +A FAW j is one of the four plural forms, A FAW In the first type of subframe, the training symbol is located before the frame synchronization symbol, the frame synchronization symbol is located before the reserved symbol, and the reserved symbol is located before the pre-framing symbol.

[0117] In some possible implementations, A=A FAW .

[0118] In some possible implementations, the superframe includes at least one second-type subframe, the second-type subframe further includes a pre-framing symbol, and in the second-type subframe, the training symbol is located before the pre-framing symbol.

[0119] In some possible implementations, the number of pre-framing symbols in a superframe is N. CW , the total number of symbols in the superframe is N F , N PG 、N CW and N F The corresponding relationship between them is one of the following items:

[0120] N PG =128, N CW =172032,N F =173440 or 173568 or 173696 or 173824 or 173952 or 174080;

[0121] N PG =128, N CW =344064,N F =346880 or 347136 or 347392 or 347520 or 347648 or 347776 or 347904 or 348160;

[0122] N PG =128, N CW =516096,N F =520192 or 520320 or 520448 or 520576 or 520704 or 520832 or 520960 or 521088 or 521472 or 521600 or 521856 or 522240;

[0123] N PG =128, N CW =688128,N F =693760 or 693888 or 694144 or 694272 or 694400 or 694656 or 694784 or 694912 or 695040 or 695296 or 695552 or 695808 or 696192 or 696320;

[0124] N PG =128, N CW =150528,N F =152064 or 152192 or 152320;

[0125] N PG =128, N CW =129024,N F =130048 or 130176 or 130560;

[0126] N PG =128, N CW =107520,N F =108416 or 108544 or 108672 or 108800;

[0127] N PG =128, N CW =175616,N F =177152 or 177280 or 177408 or 177536 or 177664;

[0128] N PG =128, N CW =351232,N F =354304 or 354432 or 354560 or 354688 or 354816 or 354944 or 355072 or 355200 or 355328;

[0129] N PG =128, N CW =526848,N F=531200 or 531456 or 531712 or 531840 or 532224 or 532480 or 532608 or 532864 or 532992 or 533120;

[0130] N PG =128, N CW =702464,N F =708096 or 708224 or 708480 or 708608 or 708736 or 708864 or 708992 or 709120 or 709376 or 709504 or 709632 or 709888 or 710016 or 710144 or 710272 or 710400 or 710528 or 710656;

[0131] N PG =96, N CW =172032,N F =173952 or 174048 or 174240 or 174336 or 174432 or 174528;

[0132] N PG =96, N CW =344064,N F =347904 or 348000 or 348096 or 348192 or 348384 or 348480 or 348672 or 348768 or 348864 or 349056;

[0133] N PG =96, N CW =516096,N F =521664 or 521856 or 522144 or 522240 or 522720 or 522816 or 523008 or 523200 or 523296 or 523392 or 523488 or 523584 or 523776;

[0134] N PG =96, N CW =688128,N F =695520 or 695808 or 695904 or 696000 or 696192 or 696384 or 696672 or 696768 or 696864 or 696960 or 697056 or 697248 or 697344 or 697536 or 697632 or 697728 or 698112 or 698400;

[0135] N PG =96, N CW =150528,NF =152160 or 152256 or 152352 or 152448 or 152544 or 152640 or 152736;

[0136] N PG =96, N CW =129024,N F =130464 or 130560 or 130752 or 130848 or 130944;

[0137] N PG =96, N CW =107520,N F =108672 or 108768 or 108864 or 108960 or 109056;

[0138] N PG =96, N CW =175616,N F =177504 or 177600 or 177888 or 177984 or 178080 or 178176;

[0139] N PG =96, N CW =351232,N F =355008 or 355104 or 355200 or 355488 or 355680 or 355776 or 355872 or 355968 or 356160 or 356352 or 356448;

[0140] N PG =96, N CW =526848,N F =532416 or 532512 or 532608 or 532704 or 532800 or 532896 or 532992 or 533280 or 533376 or 533568 or 533664 or 533760 or 533856 or 533952 or 534144 or 534240 or 534336 or 534432 or 534528;

[0141] N PG =96, N CW =702464,N F=709920 or 710016 or 710112 or 710208 or 710304 or 710400 or 710688 or 710784 or 710976 or 711168 or 711264 or 711360 or 711552 or 711648 or 711744 or 711936 or 712320 or 712416 or 712704 or 712800 or 712896.

[0142] In some possible implementations, in one polarization direction, the modulation format of the symbols in the superframe is QPSK, A=-1 or 1. Alternatively, in one polarization direction, the modulation format of the symbols in the superframe is 16QAM, A=-1, 1, -3, 3, or Alternatively, in one polarization direction, the modulation format of the symbols in the superframe is 64QAM, A = -1, 1, -3, 3, -5, 5, -7, or 7.

[0143] In a sixth aspect, an embodiment of the present application provides a data transmission system, which includes a data transmission device applied to a sending end as described in any implementation of the fourth aspect and a data transmission device applied to a receiving end as described in any implementation of the fifth aspect. BRIEF DESCRIPTION OF THE DRAWINGS

[0144] Figure 1 A schematic diagram of a communication system used in an embodiment of the present application;

[0145] Figure 2 A schematic diagram of a framing process in an embodiment of the present application;

[0146] Figure 3 A schematic diagram of a data transmission method in an embodiment of the present application;

[0147] Figure 4 This is a schematic diagram of the structure of a superframe in an embodiment of the present application;

[0148] Figure 5 A schematic diagram of a structure of a subframe in an embodiment of the present application;

[0149] Figure 6 Another structural diagram of a subframe in an embodiment of the present application;

[0150] Figure 7 A schematic diagram of a constellation diagram in two polarization directions in an embodiment of the present application;

[0151] Figure 8 is another schematic diagram of a constellation diagram in two polarization directions in an embodiment of the present application;

[0152] Fig. 9A schematic diagram of simulating symbol data flow in an embodiment of the present application;

[0153] Fig.10 This is a schematic diagram of a first implementation of a superframe and a subframe in an embodiment of the present application;

[0154] Fig.11 This is a schematic diagram of a second implementation of a superframe and a subframe in an embodiment of the present application;

[0155] Fig.12 This is a schematic diagram of a third implementation of a superframe and a subframe in an embodiment of the present application;

[0156] Fig.13 This is a schematic diagram of a fourth implementation of a superframe and a subframe in an embodiment of the present application;

[0157] Fig.14 This is a schematic diagram of a fifth implementation of a superframe and a subframe in an embodiment of the present application;

[0158] Fig.15 Schematic diagram of a sixth implementation of a superframe and a subframe in an embodiment of the present application;

[0159] Fig.16 Schematic diagram of a seventh implementation of a superframe and a subframe in an embodiment of the present application;

[0160] Fig.17 This is a schematic diagram of an eighth implementation of a superframe and a subframe in an embodiment of the present application;

[0161] Fig.18 Schematic diagram of a ninth implementation of a superframe and a subframe in an embodiment of the present application;

[0162] Fig.19 Schematic diagram of the tenth implementation of a superframe and a subframe in the embodiment of the present application;

[0163] Fig. 20 This is a schematic diagram of an eleventh implementation manner of a superframe and a subframe in an embodiment of the present application;

[0164] Fig.21 This is a schematic diagram of a twelfth implementation manner of a superframe and a subframe in an embodiment of the present application;

[0165] Fig. 22 This is a schematic diagram of the thirteenth implementation manner of a superframe and a subframe in the embodiments of the present application;

[0166] Fig.23 This is a schematic diagram of the fourteenth implementation manner of a superframe and a subframe in the embodiments of the present application;

[0167] Fig.24 This is a schematic diagram of a fifteenth implementation manner of a superframe and a subframe in an embodiment of the present application;

[0168] Fig.25 This is a schematic diagram of a sixteenth implementation manner of a superframe and a subframe in an embodiment of the present application;

[0169] Fig.26 This is a schematic diagram of the structure of a data transmission device applied to a sending end in an embodiment of the present application;

[0170] Fig. 27 This is a schematic diagram of the structure of a data transmission device applied to a receiving end in an embodiment of the present application;

[0171] Fig.28 Another structural schematic diagram of the data transmission device in an embodiment of the present application. DETAILED DESCRIPTION

[0172] The embodiment of the present application provides a data transmission method and related apparatus, wherein each of 96 or 128 consecutive symbols in a subframe includes a pilot symbol, and it can be seen that the interval for inserting pilot symbols in a subframe is larger, reducing redundancy. In addition, a symbol in a subframe is both a training symbol and a pilot symbol, simplifying the structure of the subframe.

[0173] Figure 1 Schematic diagram of the communication system used in the embodiment of the present application. Figure 1 As shown, at the transmitting end, the information source provides a data stream to be sent; the encoder receives the data stream and encodes it, and the codeword information obtained by encoding the check bits and information bits is sent to the transmitting end signal processor for framing, and is transmitted through the channel to the receiving end; after the receiving end receives the distorted signal caused by noise or other damage in the channel, it is sent to the receiving end signal processor for dispersion compensation, synchronization, phase recovery and other operations, and then decoded by the decoder to restore the original data and send it to the destination. Among them, the data transmission method provided in the embodiment of the present application is applied to Figure 1 The transmitting signal processor shown is a very important part of the communication system.

[0174] Figure 2 FIG. 1 is a schematic diagram of the framing process in an embodiment of the present application. In one framing method, Figure 2As shown in (a), the received data sequence is symbol mapped, including but not limited to quadrature phase shift keying (QPSK) and quadrature amplitude modulation (QAM), and then polarization symbol division (Polarization distribution) is performed to obtain dual-polarization (DP) symbols, such as DP-QPSK, DP-8QAM, DP-16QAM, DP-32QAM and DP-64QAM. A certain number of dual-polarization symbols are framed, and these dual-polarization symbols before framing are called pre-framing symbols, which can also be called payload symbols. The framing process is as follows: insert the frame alignment word sequence (FAW Sequence), training symbol sequence (Training Sequence), reserved symbols (Reserved Fields) and pilot symbol sequence (Pilot Sequence) in the X and Y polarization directions respectively to obtain the dual-polarization symbol sequence to be sent, which is called a super-frame, or multi-frame. Here, the frame alignment symbol sequence is also called a super-frame alignment word sequence. It should be noted that the frame alignment symbol sequence can also be used for link training, and the frame alignment symbol can be considered as a training symbol sequence.

[0175] In an embodiment of the present application, a dual polarization symbol can be represented by two symbols, one of which is located in the X polarization direction and the other is located in the Y polarization direction, and each symbol can be represented by a complex number. For example, the symbol obtained by 16QAM modulation can be represented by any one of the following 16 complex numbers, ±1±1j, ±1±3j, ±3±1j and ±3±3j, where j here is a complex unit, and can also be represented by other letters such as i. It should be understood that in some cases, the real part and the imaginary part are normalized, but the essence does not change. Further, a sequence with N dual polarization symbols can be completely represented by two complex sequences of length N, one of which represents the symbol on the X polarization and the other represents the symbol on the Y polarization. Each complex sequence of length N is represented by a real sequence of length N and an imaginary sequence of length N, and N is an integer greater than 1.

[0176] Typically, the received data sequence is the information and check sequence obtained through the forward error correction code (FEC). Figure 2 The framing operation shown in (a) in FIG. 1 is performed on symbols. In another framing method, Figure 2 As shown in (b) of FIG. 1 , for the received data sequence, the bits corresponding to the frame synchronization symbol sequence, the training symbol sequence, the reserved symbol sequence and the pilot symbol sequence are first inserted according to the adopted symbol mapping rule, and then the bits corresponding to the frame synchronization symbol sequence, the training symbol sequence, the reserved symbol sequence and the pilot symbol sequence are ... Figure 2 (a) in FIG. 1 and FIG. 2 operate the same superframe. Similarly, in another framing method, such as Figure 2 As shown in (c) of FIG. 1 , for the received data sequence, the bits corresponding to the frame synchronization symbol sequence, the training symbol sequence, the reserved symbol sequence and the pilot symbol sequence are first inserted according to the adopted symbol mapping rule, and then polarization division and symbol mapping are performed to obtain the same Figure 2 (a) in FIG. 1 and FIG. 2 operate the same superframe. It should be understood that except Figure 2 In addition to the framing method introduced in, there may be other similar framing methods, which will not be described in detail in this application.

[0177] Figure 3 Schematic diagram of a data transmission method in an embodiment of the present application. Figure 3 As shown, the data transmission method includes the following steps.

[0178] 101. A transmitting end obtains a superframe including multiple subframes.

[0179] Figure 4 FIG. 1 is a schematic diagram of a superframe structure in an embodiment of the present application. Figure 4 As shown, the superframe includes N SF subframes, each subframe includes N S symbols, then the superframe consists of N F Symbols, N F =N SF ×N S , N S and N SF are all integers greater than 1. The subframes in a superframe are divided into two categories, which are referred to as first-category subframes and second-category subframes. The following introduces these two categories of subframes respectively.

[0180] Figure 5 Schematic diagram of a subframe structure in an embodiment of the present application. Figure 5(a) in FIG. 1 shows the structure of the first type of subframe, which includes training symbols, pilot symbols, frame synchronization symbols, reserved symbols, and payload symbols. Usually, the first type of subframe is the subframe arranged in the first position in the superframe, but it is not excluded that it is located in other positions in the superframe. For example, the first type of subframe can also be the subframe arranged in the last position in the superframe. The other subframes in the superframe except the first type of subframe are the second type of subframes, such as Figure 5 As shown in (b), the second type of subframe is different from the first type of subframe. The second type of subframe includes training symbols, pilot symbols and payload symbols, but does not include frame synchronization symbols and reserved symbols.

[0181] For the first type of subframe and the second type of subframe, each subframe includes training symbols and pilot symbols. The training symbols are used for link training and / or subframe synchronization, and the pilot symbols are used for carrier phase recovery. In one polarization direction, the number of training symbols in a subframe is recorded as N TS , the number of pilot symbols in a subframe is recorded as N PS , N TS and N PS are all integers greater than 1. It should be noted that there is a symbol in a subframe that is both a training symbol and a pilot symbol, that is, Figure 5 The symbol indicated by the dashed box. TS The training symbols include the symbol indicated by the dashed box, N PS The pilot symbols also include the symbol indicated by the dotted box. TS +N PS is greater than or equal to 5, and N TS +N PS is an odd number. Usually, N TS Continuous training symbols are arranged from the beginning of the subframe, N TS The symbol at the starting position of the continuous training symbols is both a training symbol and a pilot symbol. That is, the first symbol of the subframe is the first symbol of the training symbol sequence and the first symbol of the pilot symbol sequence. In other words, the first symbol of the training symbol sequence is also the first symbol of the pilot symbol sequence, and the first symbol of the training symbol sequence has the same value as the first symbol of the pilot symbol sequence. Of course, Figure 5 The symbol indicated by the dashed box may also be N TS Any symbol among the training symbols is not limited in this application.

[0182] Figure 6 Another structural diagram of a subframe in an embodiment of the present application is shown in FIG. PG symbols include a pilot symbol located at a fixed position, where N PG is 96 or 128. Figure 5 N shown in PG is 128, Figure 6 N shown in PG is 96. It should be understood that since each consecutive N PG The position of the pilot symbol in each symbol is fixed, so the interval between two consecutive pilot symbols in a subframe is equal. Usually, the pilot symbol is located every N consecutive PG The starting position of the symbols, of course, the pilot symbol is located at each consecutive N PG Any position in the symbol, no limitation is made here.

[0183] It should be noted that the frame synchronization symbol is used for synchronization between superframes. The frame synchronization symbol can be used together with the training symbol for synchronization between superframes, or can be used together with the pilot symbol to achieve synchronization. It should be understood that the frame synchronization symbol is arranged continuously and can be next to the training symbol, such as Figure 5 and Figure 6 As shown. In addition, there may be one or more symbol intervals between the frame synchronization symbol and the training symbol. After multiple frame synchronization symbols, there are usually multiple reserved symbols, which can be reserved for other future uses. The reserved symbols should be randomized and may not be symbols on the constellation diagram of the modulation format used. Of course, in some applications, the reserved symbols may also be symbols on the constellation diagram of the modulation format used. A part of the reserved symbols may also be fixed for other purposes, such as optical signal to noise ratio (OSNR) measurement, end-to-end (E2E) delay measurement, etc. The reserved symbols may also be located in one of multiple second-class subframes, which is not limited in this application. The remaining symbols are pre-framing symbols (i.e., payload symbols) containing information and verification, wherein there is no overlap between the pilot symbol and the reserved symbol, and there is no overlap between the pilot symbol and the pre-framing symbol. In other words, there is no symbol that is both a pilot symbol and a pre-framing symbol, and there is no symbol that is both a pilot symbol and a reserved symbol.

[0184] Figure 7 A schematic diagram of a constellation diagram in two polarization directions in an embodiment of the present application. Figure 8Another schematic diagram of the constellation diagram in two polarization directions in the embodiment of the present application. It should be noted that each training symbol and each pilot symbol is one of the four complex numbers -A-Aj, -A+Aj, A-Aj and A+Aj, and A is a real number. In the embodiment of the present application, the value of A is determined by the modulation format used when generating the symbol. In some practical application scenarios, -A-Aj, -A+Aj, A-Aj and A+Aj are symbols on the constellation diagram of the modulation format used. For example, using QPSK, there are 4 symbols, and A=1 or -1. Each training symbol can be represented by one of -1-1j, -1+1j, 1-1j and 1+1j. In a subframe, the training symbols represented by the four complex numbers will exist, as will the pilot symbols. For another example, using 16QAM, there are 16 symbols, and A=1, -1, 3 or -3. Normally, the training symbols and pilot symbols are the 4 outermost symbols on the constellation diagram, such as Figure 7 As shown by the hollow symbols in (a), when A=3 or -3, each training symbol can be represented by one of -3-3j, -3+3j, 3-3j and 3+3j. In a subframe, these four complex numbers representing training symbols will also exist, and the same is true for pilot symbols. Similarly, using 64QAM, there are 64 symbols, then A=1, -1, 3, -3, 5, -5, 7 or -7. Usually, among the complex numbers representing training symbols and pilot symbols, A=5, -5, 7 or -7. Assuming A=7 or -7, as Figure 8 As shown in the hollow symbols in (a), each training symbol can be represented by one of -7-7j, -7+7j, 7-7j and 7+7j. In a subframe, these four complex number-represented training symbols will exist, as will the pilot symbols. In addition, a higher-order modulation format may be used, which will not be described in detail in this application. In the actual transmission process, the probability of symbol error can be reduced, which facilitates channel estimation.

[0185] It should be noted that each frame synchronization symbol is -A FAW -A FAW j, -A FAW +A FAW j. A FAW -A FAW j and A FAW +A FAW j is one of the four plural forms, A FAW is a real number, where A FAW It may or may not be equal to A. Typically, A FAW Equal to A, at this time, the operation of inserting training symbols, pilot symbols, and frame synchronization symbols during the framing operation is relatively simple.

[0186] It should be noted that it is also possible to compress the symbols on the constellation diagram, and accordingly, the value of A will also be compressed accordingly. Taking 16QAM as an example, the power of the 16 symbols on the 16QAM constellation diagram is normalized, and the value becomes The value of A is Taking 64QAM as an example, the power of 64 symbols on the 64QAM constellation diagram is normalized. At this time, the value becomes The value of A is In addition, other normalization methods may also be used, which are not limited in this application.

[0187] It should be understood that when the pilot symbol and the training symbol -A-Aj, -A+Aj, A-Aj, A+Aj use the outermost 4 symbols of the constellation diagram, the sensitivity of the training and pilot symbols is high, but the peak to average power ratio is large. When the pilot symbol and the training symbol take the values ​​of -A-Aj, -A+Aj, A-Aj, A+Aj and use the innermost 4 symbols of the constellation diagram, the noise of the training and pilot is small, but its sensitivity is low.

[0188] It should be noted that in some practical application scenarios, the pilot symbols and training symbols -A-Aj, -A+Aj, A-Aj, A+Aj may not be symbols on the constellation diagram of the modulation format used, but may be 4 symbols in the middle area between the outermost 4 symbols and the innermost 4 symbols of the constellation diagram. In this case, the noise and sensitivity of the training and pilot symbols are average, but the peak-to-average power ratio is relatively low. Taking 16QAM as an example, the values ​​of the 16 symbols on the 16QAM constellation diagram are one of {±1±1j, ±1±3j, ±3±1j, ±3±3j}, and the value of the real number A satisfies 1≤A≤3. More specifically, if Figure 7 As shown in (b) in the figure, the outermost 4 symbols of the constellation diagram are 3+3j, 3-3j, -3+3j, -3-3j, and the innermost 4 symbols of the constellation diagram are 1+1j, 1-1j, -1+1j, -1-1j. The values ​​of the pilot symbol and the training symbol -A-Aj, -A+Aj, A-Aj, A+Aj can be any 4 symbols in the middle area between the outermost 4 symbols and the innermost 4 symbols of the 16QAM constellation diagram. The specific value of the real number A can be selected according to the actual application scenario so that the peak-to-average power ratio, noise and sensitivity of the training and pilot are well compromised. For example, the real number The values ​​of pilot symbols and training symbols are In addition, when the 16 symbols on the 16QAM constellation are power normalized, the value is One of the values ​​of real number A satisfies For example, real numbers The values ​​of pilot symbols and training symbols are Taking 64QAM as an example, the values ​​of the 64 symbols on the 64QAM constellation are one of {±1±1j,±1±3j,±1±5j,±1±7j,±3±1j,±5±1j,±7±1j,±3±3j,±3±5j,±3±7j,±5±3j,±7±3j,±5±5j,±5±7j,±7±5j,±7±7j}, and the value of the real number A satisfies 1≤A≤7. More specifically, as Figure 8 As shown in (b) in the figure, the outermost 4 symbols of the constellation diagram are 7+7j, 7-7j, -7+7j, -7-7j, and the innermost 4 symbols of the constellation diagram are 1+1j, 1-1j, -1+1j, -1-1j. The values ​​of the pilot symbol and the training symbol -A-Aj, -A+Aj, A-Aj, A+Aj can be any 4 symbols in the middle area between the outermost 4 symbols and the innermost 4 symbols of the 64QAM constellation diagram. The specific value of the real number A can be selected according to the actual application scenario so that the peak-to-average power ratio, noise and sensitivity of the training and pilot are well compromised. For example, the real number The values ​​of pilot symbols and training symbols are In addition, when the 64 symbols on the 64QAM constellation are power normalized, the value is One of the values ​​of real number A satisfies For example, real numbers The values ​​of pilot symbols and training symbols are One of them.

[0189] It should be noted that, in a subframe, a training symbol sequence including multiple training symbols in the X polarization direction is different from a training symbol sequence including multiple training symbols in the Y polarization direction, and a pilot symbol sequence including multiple pilot symbols in the X polarization direction is different from a pilot symbol sequence including multiple pilot symbols in the Y polarization direction. Among them, the X polarization direction and the Y polarization direction are orthogonal to each other. For example, the sequence composed of the training symbols in the X polarization direction is -A-Aj, -A-Aj, A+Aj, A-Aj, and the sequence composed of the training symbols in the Y polarization direction is -A-Aj, -A-Aj, A+Aj, A+Aj. There is a difference in the training symbol sequences in the two polarization directions, so as to avoid the problem that the receiving end cannot distinguish the two polarization directions in actual transmission.

[0190] It should be noted that in one subframe, a total of N including all training symbols and all pilot symbols in one polarization direction TS +N PS The sum of the real parts of the N symbols is 0, including all training symbols and all pilot symbols in one polarization direction. TS +N PS The sum of the imaginary parts of the -1 symbols is 0, so that DC balance can be achieved, which is beneficial for the receiving end to restore the signal quality. It should be understood that since the training symbol sequence and the pilot symbol sequence share one symbol in the subframe, the repeated common symbol needs to be subtracted when the training symbol sequence and the pilot symbol sequence are combined to calculate the number of symbols, that is, the training symbol sequence and the pilot symbol sequence have a total of N. TS +N PS -1 symbol.

[0191] In one possible scenario, in one subframe, N training symbol sequences and pilot symbol sequences in one polarization direction are TS +N PS The difference between the number of symbols with values ​​of -A-Aj, -A+Aj, A-Aj and A+Aj in the -1 symbol is less than or equal to 2, which effectively ensures that the number of symbols in each polarization direction is close to balance. For example, in one polarization direction, the number of -A-Aj is -The number of A+Aj is The number of A-Aj is The number of A+Aj is For example, in one polarization direction, the number of -A-Aj is -The number of A+Aj is The number of A-Aj is The number of A+Aj is For another example, in one polarization direction, the number of -A-Aj is -The number of A+Aj is The number of A-Aj is The number of A+Aj is For example, in one polarization direction, the number of -A-Aj is -The number of A+Aj is The number of A-Aj is The number of A+Aj is in, Indicates that the positive real number a is rounded down.

[0192] In one possible scenario, in one subframe, there are N training symbols and pilot symbols in two polarization directions. TS +N PS-1 symbol is -A-Aj, and the total number of training symbols and pilot symbols in two polarization directions is N TS +N PS -1 symbol is -A+Aj, and the total number of training symbols and pilot symbols in two polarization directions is N TS +N PS -1 symbol is the number of A-Aj and the total number of training symbols and pilot symbols in two polarization directions is N TS +N PS The number of A+Aj in the -1 symbol is the same, which effectively ensures the balance of the number of symbols in the two polarization directions.

[0193] As an example, N TS +N PS -1 The number of training symbols and pilot symbols in the two polarization directions is -A-Aj respectively. and N TS +N PS The sum of the number of -1 training symbols and pilot symbols in the two polarization directions is -A-Aj is (N TS +N PS -1) / 2; N TS +N PS -1 training symbol and the number of pilot symbols in the two polarization directions is -A+Aj respectively. and N TS +N PS -1 training symbol and the sum of the number of pilot symbols in the two polarization directions is -A+Aj is (N TS +N PS -1) / 2; N TS +N PS -1 The number of training symbols and pilot symbols in the two polarization directions is A-Aj respectively and N TS +N PS -1 The sum of the number of training symbols and pilot symbols A-Aj in two polarization directions is (N TS +N PS -1) / 2; N TS +N PS -1 The number of training symbols and pilot symbols in the two polarization directions is A+Aj respectively. and N TS +N PS -1 The sum of the number of training symbols and pilot symbols in two polarization directions is A+Aj (N TS +N PS -1) / 2.

[0194] As another example, N TS +N PS -1 The number of training symbols and pilot symbols in the two polarization directions is -A-Aj respectively. and N TS +N PS The sum of the number of -1 training symbols and pilot symbols in the two polarization directions is -A-Aj is (N TS +N PS -1) / 2; N TS +N PS -1 training symbol and the number of pilot symbols in the two polarization directions is -A+Aj respectively. and N TS +N PS -1 training symbol and the sum of the number of pilot symbols in the two polarization directions is -A+Aj is (N TS +N PS -1) / 2; N TS +N PS -1 The number of training symbols and pilot symbols in the two polarization directions is A-Aj respectively and N TS +N PS -1 The sum of the number of training symbols and pilot symbols A-Aj in two polarization directions is (N TS +N PS -1) / 2; N TS +N PS -1 The number of training symbols and pilot symbols in the two polarization directions is A+Aj respectively. and N TS +N PS -1 The sum of the number of training symbols and pilot symbols in two polarization directions is A+Aj (N TS +N PS -1) / 2.

[0195] It should be noted that, in the embodiment of the present application, the number N of pre-framing symbols in the superframe is CW The values ​​of include but are not limited to 172032, 344064, 516096, 688128, 150528, 129024, 107520, 175616, 351232, 526848, 702464, 172032, 344064, 516096, 688128, 150528, 129024, 107520, 175616, 351232, 526848, and 702464.

[0196] 102. The transmitting end sends a superframe to the receiving end.

[0197] The superframe sent by the transmitter will reach the receiver through the channel transmission.

[0198] Fig. 9 Schematic diagram of simulating symbol data flow in the embodiment of the present application. Fig. 9 As shown in some possible scenarios, after the digital to analog conversion (DAC), the superframe symbol data stream can be regarded as four analog symbol data streams, which are marked as X and I , X Q , Y I and Y Q Among them, X I Simulate symbolic data flow and X Q The analog symbol data streams correspond to the real part sequence data stream and the imaginary part sequence data stream in the X polarization direction respectively. I Simulate symbolic data flow and Y Q The analog symbol data streams correspond to the real part sequence data stream and the imaginary part sequence data stream in the Y polarization direction, respectively. It should be understood that the X polarization direction and the Y polarization direction (also referred to as the H polarization direction and the V polarization direction) are two mutually orthogonal polarization directions, and there are two mutually orthogonal phase channels in each polarization direction, namely I (In-phase) and Q (Quadrature), and I and Q correspond to the real part sequence data stream and the imaginary part sequence data stream, respectively.

[0199] 103. The receiving end decodes the superframe.

[0200] It should be understood that the specific operations after the receiving end receives the superframe are not described in detail in this application. Figure 1 Related introduction of .

[0201] The following introduces some specific examples of the number of symbols in different parts of the superframe provided in the embodiments of the present application.

[0202] (1) Number of symbols before framing N CW = 172032, for example, an open code (Open FEC, OFEC) encoding method with a coding redundancy of about 15.3% is used, and other encoding methods can also be used; each consecutive N PG = The first symbol among the 128 symbols is the pilot symbol. At this time, the number of subframes is N SF , the number of pilot symbols in each subframe N PS , the number of symbols in each subframe N S , the number of symbols in the superframe N F, superframe redundancy OH, the number of training symbols in the superframe N TS,TOT The number of frame synchronization symbols N FAW and the number of reserved symbols N RES The sum of the parameters is as shown in Table 1. Among them, N TS +N PS is an odd number, N FAW is an even number, the corresponding N RES >0,OH=(N F -N CW ) / N CW , N F =N S ×N SF ,N TS,TOT =N TS ×N SF .

[0203] Except for OH, the other parameters are the number of symbols, which can be understood as the number of dual-polarization symbols or the number of symbols in one polarization direction; moreover, the number of different symbols in the two polarization directions is the same, for example, there are 10 training symbols in one polarization direction and 10 training symbols in the other polarization direction. Overall, there are 10 dual-polarization training symbols. Subsequent tables can be understood in this way, and this application will not repeat them.

[0204] The frame redundancy of the superframe architecture in the case listed in Table 1 is low, OH < 1.20%. Table 1 only limits N TS,TOT +N FAW +N RES , without limiting the number of training symbols N in each subframe TS ; In addition, Table 1 shows the number of symbols N in each subframe S and the number of symbols in the superframe N F There is no limitation either.

[0205] Table 1

[0206]

[0207]

[0208] Consider the number of training symbols N TS No more than 11, combined with Table 1, we can get Table 2. Then the frame redundancy OH of the superframe architecture listed in Table 2 is less than 1.20%; the number of training symbols N in each subframe TS The value range of is 2 to 11 symbols; Table 2 shows the number of symbols N in each subframe. S and the number of symbols in the superframe N F There is no limitation.

[0209] Table 2

[0210]

[0211]

[0212]

[0213] In some specific applications, the bus width in the specific DSP implementation of the transceiver is 192 or 128. In order to facilitate hardware implementation, the number of symbols N in the superframe is F It should be an integer multiple of 192 and 128. It should be understood that when N PG =128, that is, when the first symbol of every 128 symbols in each subframe is the pilot symbol, the number of symbols in the superframe is N F and the number of symbols in each subframe N S must be an integer multiple of 128. Therefore, when the first symbol of every 128 symbols in each subframe is used as a pilot symbol, only the number of symbols N in the superframe needs to be considered. F It can be an integer multiple of 192. The subsequent tables indicating that the first symbol of every 128 symbols in each subframe is a pilot symbol can be understood in this way, and this application will not repeat them. Consider the number of symbols N in the superframe F It should be an integer multiple of 192. Combining Table 2, we can get Table 3. The frame redundancy OH of the cases listed in Table 3 is less than 1.20%, and the number of symbols N in the superframe is F is an integer multiple of 192 and 128. In addition, the number of training symbols in each subframe is N TS The value range of is 2 to 11 symbols; Table 3 shows the number of symbols N in each subframe. S No limitation.

[0214] Table 3

[0215]

[0216]

[0217] In some specific applications, the bit width in the specific DSP implementation of the transceiver is 192 or 128. In order to facilitate hardware implementation, it is better to use not only the number of symbols N of the superframe F It should be an integer multiple of 192 and 128, and the number of symbols in each subframe is N. S It should also be an integer multiple of 192 and 128. It should be understood that if N S is an integer multiple of 192 and 128, then N F It must be an integer multiple of 192 and 128, but not necessarily the opposite. Consider the number of symbols N in each subframeS is an integer multiple of 192. Combining Table 3, we can get Table 4. The frame redundancy OH of the cases listed in Table 4 is less than 1.20%, and the number of symbols N in the superframe is F and the number of symbols in each subframe N S are integer multiples of 192 and 128. In addition, the training symbol N in each subframe TS The value range of the number is from 2 to 11 symbols.

[0218] Table 4

[0219] Serial number <![CDATA[N SF ]]> <![CDATA[N PS ]]> <![CDATA[N S ]]> <![CDATA[N F ]]> OH <![CDATA[N TS ]]> <![CDATA[N FAW +N RES ]]> 1 4 339 43392 173568 0.89% 2 176 2 4 339 43392 173568 0.89% 4 168 3 4 339 43392 173568 0.89% 6 160 4 4 339 43392 173568 0.89% 8 152 5 4 339 43392 173568 0.89% 10 144

[0220] (2) Number of symbols before framing N CW =344064, for example, an open code (Open FEC, OFEC) encoding method with a coding redundancy of about 15.3% is adopted, and other encoding methods can also be adopted; each consecutive N PG = The first symbol among the 128 symbols is the pilot symbol. At this time, the number of subframes is N SF , the number of pilot symbols in each subframe N PS , the number of symbols in each subframe N S , the number of symbols in the superframe N F , superframe redundancy OH, the number of training symbols in the superframe N TS,TOT The number of frame synchronization symbols N FAW and the number of reserved symbols N RES The sum of the parameters is as shown in Table 5. Among them, N TS +N PS is an odd number, N FAW is an even number, the corresponding N RES >0,OH=(N F -N CW ) / N CW , N F =N S ×N SF ,N TS,TOT =N TS ×N SF .

[0221] The frame redundancy of the superframe architecture in the case listed in Table 5 is low, OH<1.20%. Table 5 only limits N TS,TOT +N FAW +N RES , without limiting the number of training symbols N in each subframe TS In addition, Table 5 shows the number of symbols N in each subframe. S and the number of symbols in the superframe N F There is no limitation either.

[0222] Table 5

[0223]

[0224]

[0225] Consider the number of training symbols N TS No more than 11, combined with Table 5, we can get Table 6. Then the frame redundancy OH of the superframe architecture listed in Table 6 is less than 1.20%; the number of training symbols N in each subframe TS The value range of is 2 to 11 symbols; Table 6 shows the number of symbols N in each subframe S and the number of symbols in the superframe N F There is no limitation.

[0226] Table 6

[0227]

[0228]

[0229]

[0230]

[0231]

[0232] In some specific applications, the bit width in the specific DSP implementation of the transceiver is 192 or 128. In order to facilitate hardware implementation, the number of symbols N in the superframe is F It should be an integer multiple of 192 and 128. Consider the number of symbols N in the superframe F It should be an integer multiple of 192. Combining Table 6, we can get Table 7. The frame redundancy OH of the cases listed in Table 7 is less than 1.20%, and the number of symbols N in the superframe is F is an integer multiple of 192 and 128. In addition, the number of training symbols in each subframe is N TS The value range of is 2 to 11 symbols; Table 7 shows the number of symbols N in each subframe. S No limitation.

[0233] Table 7

[0234]

[0235]

[0236] In some specific applications, the bit width in the specific DSP implementation of the transceiver is 192 or 128. In order to facilitate hardware implementation, it is better to use not only the number of symbols N of the superframe F It should be an integer multiple of 192 and 128, and the number of symbols in each subframe is N.S It should also be an integer multiple of 192 and 128. It should be understood that if N S is an integer multiple of 192 and 128, then N F It must be an integer multiple of 192 and 128, but not necessarily the opposite. Consider the number of symbols N in each subframe S is an integer multiple of 192, combined with Table 7, we can get Table 8. The frame redundancy OH of the cases listed in Table 8 is less than 1.20%, and the number of symbols N in the superframe is F and the number of symbols in each subframe N S are integer multiples of 192 and 128. In addition, the training symbol N in each subframe TS The value range of the number is from 2 to 11 symbols.

[0237] Table 8

[0238]

[0239]

[0240] (3) Number of symbols before framing N CW =516096, for example, an open code (Open FEC, OFEC) encoding method with a coding redundancy of about 15.3% is used, and other encoding methods can also be used; each consecutive N PG = The first symbol among the 128 symbols is the pilot symbol. At this time, the number of subframes is N SF , the number of pilot symbols in each subframe N PS , the number of symbols in each subframe N S , the number of symbols in the superframe N F , superframe redundancy OH, the number of training symbols in the superframe N TS,TOT The number of frame synchronization symbols N FAW and the number of reserved symbols N RES The sum of the parameters is as shown in Table 9. Among them, N TS +N PS is an odd number, N FAW is an even number, the corresponding N RES >0,OH=(N F -N CW ) / N CW , N F =N S ×N SF ,N TS,TOT =N TS ×N SF .

[0241] The frame redundancy of the superframe architecture in the case listed in Table 9 is low, OH<1.20%. Table 9 only limits N TS,TOT +NFAW +N RES , without limiting the number of training symbols N in each subframe TS ; In addition, Table 9 shows the number of symbols N in each subframe S and the number of symbols in the superframe N F There is no limitation either.

[0242] Table 9

[0243]

[0244]

[0245] Consider the number of training symbols N TS No more than 11, combined with Table 9, we can get Table 10. Then the frame redundancy OH of the superframe architecture listed in Table 10 is less than 1.20%; the number of training symbols N in each subframe TS The value range is 2 to 11 symbols; Table 10 shows the number of symbols N in each subframe. S and the number of symbols in the superframe N F There is no limitation.

[0246] Table 10

[0247]

[0248]

[0249]

[0250]

[0251]

[0252]

[0253]

[0254] In some specific applications, the bit width in the specific DSP implementation of the transceiver is 192 or 128. In order to facilitate hardware implementation, the number of symbols N in the superframe is F It should be an integer multiple of 192 and 128. Consider the number of symbols N in the superframe F It should be an integer multiple of 192. Combining Table 10, we can get Table 11. The frame redundancy OH of the cases listed in Table 11 is less than 1.20%, and the number of symbols N in the superframe is F is an integer multiple of 192 and 128. In addition, the number of training symbols in each subframe is N TS The value range of is 2 to 11 symbols; Table 11 shows the number of symbols N in each subframe. SNo limitation.

[0255] Table 11

[0256]

[0257]

[0258]

[0259]

[0260]

[0261]

[0262] In some specific applications, the bit width in the specific DSP implementation of the transceiver is 192 or 128. In order to facilitate hardware implementation, it is better to use not only the number of symbols N of the superframe F It should be an integer multiple of 192 and 128, and the number of symbols in each subframe is N. S It should also be an integer multiple of 192 and 128. It should be understood that if N S is an integer multiple of 192 and 128, then N F It must be an integer multiple of 192 and 128, but not necessarily the opposite. Consider the number of symbols N in each subframe S is an integer multiple of 192, combined with Table 11, we can get Table 12. Then the frame redundancy OH of the cases listed in Table 12 is less than 1.20%, and the number of symbols N in the superframe is F and the number of symbols in each subframe N S are integer multiples of 192 and 128. In addition, the training symbol N in each subframe TS The value range of the number is from 2 to 11 symbols.

[0263] Table 12

[0264]

[0265]

[0266]

[0267] (4) Number of symbols before framing N CW =688128, for example, an open code (Open FEC, OFEC) encoding method with a coding redundancy of about 15.3% is used, and other encoding methods can also be used; each consecutive N PG = The first symbol among the 128 symbols is the pilot symbol. At this time, the number of subframes is N SF , the number of pilot symbols in each subframe NPS , the number of symbols in each subframe N S , the number of symbols in the superframe N F , superframe redundancy OH, the number of training symbols in the superframe N TS,TOT The number of frame synchronization symbols N FAW and the number of reserved symbols N RES The sum of the parameters is as shown in Table 13. Among them, N TS +N PS is an odd number, N FAW is an even number, the corresponding N RES >0,OH=(N F -N CW ) / N CW , N F =N S ×N SF ,N TS,TOT =N TS ×N SF .

[0268] The frame redundancy of the superframe architecture in the case listed in Table 13 is low, OH<1.20%. Table 13 only limits N TS,TOT +N FAW +N RES , without limiting the number of training symbols N in each subframe TS ; In addition, Table 13 shows the number of symbols N in each subframe S and the number of symbols in the superframe N F There is no limitation either.

[0269] Table 13

[0270]

[0271]

[0272]

[0273] Consider the number of training symbols N TS No more than 11, combined with Table 13, we can get Table 14. Then the frame redundancy OH of the superframe architecture listed in Table 14 is less than 1.20%; the number of training symbols N in each subframe TS The value range of is 2 to 11 symbols; Table 14 shows the number of symbols N in each subframe. S and the number of symbols in the superframe N F There is no limitation.

[0274] Table 14

[0275]

[0276]

[0277]

[0278]

[0279]

[0280]

[0281]

[0282]

[0283]

[0284] In some specific applications, the bit width in the specific DSP implementation of the transceiver is 192 or 128. In order to facilitate hardware implementation, the number of symbols N in the superframe is F It should be an integer multiple of 192 and 128. Consider the number of symbols N in the superframe F It should be an integer multiple of 192. Combining Table 14, we can get Table 15. The frame redundancy OH of the cases listed in Table 15 is less than 1.20%, and the number of symbols N in the superframe is F is an integer multiple of 192 and 128. In addition, the number of training symbols in each subframe is N TS The value range is 2 to 11 symbols; Table 15 shows the number of symbols N in each subframe. S No limitation.

[0285] Table 15

[0286]

[0287]

[0288]

[0289] In some specific applications, the bit width in the specific DSP implementation of the transceiver is 192 or 128. In order to facilitate hardware implementation, it is better to use not only the number of symbols N of the superframe F It should be an integer multiple of 192 and 128, and the number of symbols in each subframe is N. S It should also be an integer multiple of 192 and 128. It should be understood that if N S is an integer multiple of 192 and 128, then N F It must be an integer multiple of 192 and 128, but not necessarily the opposite. Consider the number of symbols N in each subframe Sis an integer multiple of 192, combined with Table 15, Table 16 can be obtained. The frame redundancy OH of the case listed in Table 16 is less than 1.20%, and the number of symbols N in the superframe is F and the number of symbols in each subframe N S are integer multiples of 192 and 128. In addition, the training symbol N in each subframe TS The value range of the number is from 2 to 11 symbols.

[0290] Table 16

[0291]

[0292]

[0293] (5) Number of symbols before framing N CW = 150528, for example, an open code (Open FEC, OFEC) encoding method with a coding redundancy of about 17.9% is used, and other encoding methods can also be used; each consecutive N PG = The first symbol among the 128 symbols is the pilot symbol. At this time, the number of subframes is N SF , the number of pilot symbols in each subframe N PS , the number of symbols in each subframe N S , the number of symbols in the superframe N F , superframe redundancy OH, the number of training symbols in the superframe N TS,TOT The number of frame synchronization symbols N FAW and the number of reserved symbols N RES The sum of the parameters is as shown in Table 17. Among them, N TS +N PS is an odd number, N FAW is an even number, the corresponding N RES >0,OH=(N F -N CW ) / N CW , N F =N S ×N SF ,N TS,TOT =N TS ×N SF .

[0294] The frame redundancy of the superframe architecture in the case listed in Table 17 is low, OH<1.20%. Table 17 only limits N TS,TOT +N FAW +N RES , without limiting the number of training symbols N in each subframe TS ; In addition, Table 17 shows the number of symbols N in each subframe S and the number of symbols in the superframe N FThere is no limitation either.

[0295] Table 17

[0296]

[0297]

[0298] Consider the number of training symbols N TS No more than 11, combined with Table 17, we can get Table 18. Then the frame redundancy OH of the superframe architecture listed in Table 18 is less than 1.20%; the number of training symbols N in each subframe TS The value range is 2 to 11 symbols; Table 18 shows the number of symbols N in each subframe. S and the number of symbols in the superframe N F There is no limitation.

[0299] Table 18

[0300]

[0301]

[0302]

[0303]

[0304] In some specific applications, the bit width in the specific DSP implementation of the transceiver is 192 or 128. In order to facilitate hardware implementation, the number of symbols N in the superframe is F It should be an integer multiple of 192 and 128. Consider the number of symbols N in the superframe F It should be an integer multiple of 192. Combining Table 18, we can get Table 19. The frame redundancy OH of the cases listed in Table 19 is less than 1.20%, and the number of symbols N in the superframe is F is an integer multiple of 192 and 128. In addition, the number of training symbols in each subframe is N TS The value range is 2 to 11 symbols; Table 19 shows the number of symbols N in each subframe. S No limitation.

[0305] Table 19

[0306]

[0307]

[0308] In some specific applications, the bit width in the specific DSP implementation of the transceiver is 192 or 128. In order to facilitate hardware implementation, it is better to use not only the number of symbols N of the superframe FIt should be an integer multiple of 192 and 128, and the number of symbols in each subframe is N. S It should also be an integer multiple of 192 and 128. It should be understood that if N S is an integer multiple of 192 and 128, then N F It must be an integer multiple of 192 and 128, but not necessarily the opposite. Consider the number of symbols N in each subframe S is an integer multiple of 192, combined with Table 19, Table 20 can be obtained. The frame redundancy OH of the case listed in Table 20 is less than 1.20%, and the number of symbols N in the superframe is F and the number of symbols in each subframe N S are integer multiples of 192 and 128. In addition, the training symbol N in each subframe TS The value range of the number is from 2 to 11 symbols.

[0309] Table 20

[0310]

[0311]

[0312]

[0313] (6) Number of symbols before framing N CW = 129024, for example, an open code (Open FEC, OFEC) encoding method with a coding redundancy of about 21.5% is used, and other encoding methods can also be used; each consecutive N PG = The first symbol among the 128 symbols is the pilot symbol. At this time, the number of subframes is N SF , the number of pilot symbols in each subframe N PS , the number of symbols in each subframe N S , the number of symbols in the superframe N F , superframe redundancy OH, the number of training symbols in the superframe N TS,TOT The number of frame synchronization symbols N FAW and the number of reserved symbols N RES The sum of the parameters is as shown in Table 21. Among them, N TS +N PS is an odd number, N FAW is an even number, the corresponding N RES >0,OH=(N F -N CW ) / N CW , N F =N S ×N SF ,N TS,TOT =N TS ×N SF .

[0314] The frame redundancy of the superframe architecture in the case listed in Table 21 is lower than OH<1.20%. Table 21 only limits N TS,TOT +N FAW +N RES , without limiting the number of training symbols N in each subframe TS ; In addition, Table 21 shows the number of symbols N in each subframe S and the number of symbols in the superframe N F There is no limitation either.

[0315] Table 21

[0316] Serial number <![CDATA[N SF ]]> <![CDATA[N PS ]]> <![CDATA[N S ]]> <![CDATA[N F ]]> OH <![CDATA[N TS,TOT +N FAW +N RES ]]> 1 102 10 1280 130560 1.19% 516 2 85 12 1536 130560 1.19% 516 3 68 15 1920 130560 1.19% 516 4 60 17 2176 130560 1.19% 516 5 51 20 2560 130560 1.19% 516 6 34 30 3840 130560 1.19% 516 7 30 34 4352 130560 1.19% 516 8 20 51 6528 130560 1.19% 516 9 17 60 7680 130560 1.19% 516 10 15 68 8704 130560 1.19% 516 11 12 85 10880 130560 1.19% 516 12 10 102 13056 130560 1.19% 516 13 9 113 14464 130176 0.89% 135 14 8 127 16256 130048 0.79% 8 15 6 170 21760 130560 1.19% 516 16 5 204 26112 130560 1.19% 516 17 4 254 32512 130048 0.79% 8 18 4 255 32640 130560 1.19% 516 19 3 339 43392 130176 0.89% 135 20 3 340 43520 130560 1.19% 516

[0317] Consider the number of training symbols N TS No more than 11, combined with Table 21, we can get Table 22. Then the frame redundancy OH of the superframe architecture listed in Table 22 is less than 1.20%; the number of training symbols N in each subframe TS The value range is 2 to 11 symbols; Table 22 shows the number of symbols N in each subframe. S and the number of symbols in the superframe N F In some specific applications, the bit width of the specific DSP implementation of the transceiver is 192 or 128. In order to facilitate hardware implementation, the number of symbols N in the superframe is F It should be an integer multiple of 192 and 128. It should be noted that the number of symbols N of the superframe in all cases listed in Table 22 is F It is an integer multiple of 192 and 128.

[0318] Table 22

[0319]

[0320]

[0321] In some specific applications, the bit width in the specific DSP implementation of the transceiver is 192 or 128. In order to facilitate hardware implementation, it is better to use not only the number of symbols N of the superframe F It should be an integer multiple of 192 and 128, and the number of symbols in each subframe is N. S It should also be an integer multiple of 192 and 128. It should be understood that if N S is an integer multiple of 192 and 128, then N F It must be an integer multiple of 192 and 128, but not necessarily the opposite. Consider the number of symbols N in each subframe S is an integer multiple of 192. Combining Table 22, we can get Table 23. The frame redundancy OH of the cases listed in Table 23 is less than 1.20%, and the number of symbols N in the superframe isF and the number of symbols in each subframe N S are integer multiples of 192 and 128. In addition, the training symbol N in each subframe TS The value range of the number is from 2 to 11 symbols.

[0322] Table 23

[0323]

[0324]

[0325] (7) Number of symbols before framing N CW = 107520, for example, an open code (Open FEC, OFEC) encoding method with a coding redundancy of about 27.0% is used, and other encoding methods can also be used; each consecutive N PG = The first symbol among the 128 symbols is the pilot symbol. At this time, the number of subframes is N SF , the number of pilot symbols in each subframe N PS , the number of symbols in each subframe N S , the number of symbols in the superframe N F , superframe redundancy OH, the number of training symbols in the superframe N TS,TOT The number of frame synchronization symbols N FAW and the number of reserved symbols N RES The sum of the parameters is as shown in Table 24. Among them, N TS +N PS is an odd number, N FAW is an even number, the corresponding N RES >0,OH=(N F -N CW ) / N CW , N F =N S ×N SF ,N TS,TOT =N TS ×N SF .

[0326] The frame redundancy of the superframe architecture in the case listed in Table 24 is lower than OH<1.20%. Table 24 only limits N TS,TOT +N FAW +N RES , without limiting the number of training symbols N in each subframe TS ; In addition, Table 24 shows the number of symbols N in each subframe S and the number of symbols in the superframe N F There is no limitation either.

[0327] Table 24

[0328] Serial number <![CDATA[N SF ]]> <![CDATA[N PS ]]> <![CDATA[N S ]]> <![CDATA[N F ]]> OH <![CDATA[N TS,TOT +N FAW +N RES ]]> 1 85 10 1280 108800 1.19% 430 2 77 11 1408 108416 0.83% 49 3 53 16 2048 108544 0.95% 176 4 50 17 2176 108800 1.19% 430 5 34 25 3200 108800 1.19% 430 6 25 34 4352 108800 1.19% 430 7 17 50 6400 108800 1.19% 430 8 16 53 6784 108544 0.95% 176 9 11 77 9856 108416 0.83% 49 10 10 85 10880 108800 1.19% 430 11 8 106 13568 108544 0.95% 176 12 7 121 15488 108416 0.83% 49 13 5 170 21760 108800 1.19% 430 14 4 212 27136 108544 0.95% 176 15 3 283 36224 108672 1.07% 303

[0329] Consider the number of training symbols N TS No more than 11, combined with Table 24, we can get Table 25. Then the frame redundancy OH of the superframe architecture listed in Table 25 is less than 1.20%; the number of training symbols N in each subframe TS The value range is 2 to 11 symbols; Table 25 shows the number of symbols N in each subframe. S and the number of symbols in the superframe N F There is no limitation.

[0330] Table 25

[0331]

[0332]

[0333]

[0334] In some specific applications, the bit width in the specific DSP implementation of the transceiver is 192 or 128. In order to facilitate hardware implementation, the number of symbols N in the superframe is F It should be an integer multiple of 192 and 128. Consider the number of symbols N in the superframe F It should be an integer multiple of 192. Combined with Table 25, Table 26 can be obtained. The frame redundancy OH of the case listed in Table 26 is less than 1.20%, and the number of symbols N in the superframe is F is an integer multiple of 192 and 128. In addition, the number of training symbols in each subframe is N TS The value range of is 2 to 11 symbols; Table 26 shows the number of symbols N in each subframe. S It should be noted that in this case (7) there is no superframe with the number of symbols N F is an integer multiple of 192 and 128, and the number of symbols in each subframe is N S This is also the case for integer multiples of 192 and 128.

[0335] Table 26

[0336] Serial number <![CDATA[N SF ]]> <![CDATA[N PS ]]> <![CDATA[N S ]]> <![CDATA[N F ]]> OH <![CDATA[N TS ]]> <![CDATA[N FAW +N RES ]]> 1 3 283 36224 108672 1.07% 2 300 2 3 283 36224 108672 1.07% 4 294 3 3 283 36224 108672 1.07% 6 288 4 3 283 36224 108672 1.07% 8 282 5 3 283 36224 108672 1.07% 10 276

[0337] (8) Number of symbols before framing N CW =175616, for example, using a CFEC encoding method with a coding redundancy of about 15.3%, or other encoding methods; each consecutive N PG = The first symbol among the 128 symbols is the pilot symbol. At this time, the number of subframes is N SF , the number of pilot symbols in each subframe N PS, the number of symbols in each subframe N S , the number of symbols in the superframe N F , superframe redundancy OH, the number of training symbols in the superframe N TS,TOT The number of frame synchronization symbols N FAW and the number of reserved symbols N RES The sum of the parameters is as shown in Table 27. Among them, N TS +N PS is an odd number, N FAW is an even number, the corresponding N RES >0,OH=(N F -N CW ) / N CW , N F =N S ×N SF ,N TS,TOT =N TS ×N SF .

[0338] The frame redundancy of the superframe architecture in the case listed in Table 27 is lower than OH<1.20%. Table 27 only limits N TS,TOT +N FAW +N RES , without limiting the number of training symbols N in each subframe TS ; In addition, Table 27 shows the number of symbols N in each subframe S and the number of symbols in the superframe N F There is no limitation either.

[0339] Table 27

[0340]

[0341]

[0342] Consider the number of training symbols N TS No more than 11, combined with Table 27, we can get Table 28. Then the frame redundancy OH of the superframe architecture listed in Table 28 is less than 1.20%; the number of training symbols N in each subframe TS The value range is 2 to 11 symbols; Table 28 shows the number of symbols N in each subframe. S and the number of symbols in the superframe N F There is no limitation.

[0343] Table 28

[0344]

[0345]

[0346]

[0347] In some specific applications, the bit width in the specific DSP implementation of the transceiver is 192 or 128. In order to facilitate hardware implementation, the number of symbols N in the superframe is F It should be an integer multiple of 192 and 128. Consider the number of symbols N in the superframe F It should be an integer multiple of 192. Combined with Table 28, Table 29 can be obtained. The frame redundancy OH of the case listed in Table 29 is less than 1.20%, and the number of symbols N in the superframe is F is an integer multiple of 192 and 128. In addition, the number of training symbols in each subframe is N TS The value range is 2 to 11 symbols; Table 29 shows the number of symbols N in each subframe. S No limitation.

[0348] Table 29

[0349]

[0350]

[0351] In some specific applications, the bit width in the specific DSP implementation of the transceiver is 192 or 128. In order to facilitate hardware implementation, it is better to use not only the number of symbols N of the superframe F It should be an integer multiple of 192 and 128, and the number of symbols in each subframe is N. S It should also be an integer multiple of 192 and 128. It should be understood that if N S is an integer multiple of 192 and 128, then N F It must be an integer multiple of 192 and 128, but not necessarily the opposite. Consider the number of symbols N in each subframe S is an integer multiple of 192, combined with Table 29, Table 30 can be obtained. The frame redundancy OH of the case listed in Table 30 is less than 1.20%, and the number of symbols N in the superframe is F and the number of symbols in each subframe N S are integer multiples of 192 and 128. In addition, the training symbol N in each subframe TS The value range of the number is from 2 to 11 symbols.

[0352] Table 30

[0353]

[0354]

[0355] (9) Number of symbols before framing N CW =351232, for example, using a CFEC encoding method with a coding redundancy of about 15.3%, or other encoding methods; each consecutive NPG = The first symbol among the 128 symbols is the pilot symbol. At this time, the number of subframes is N SF , the number of pilot symbols in each subframe N PS , the number of symbols in each subframe N S , the number of symbols in the superframe N F , superframe redundancy OH, the number of training symbols in the superframe N TS,TOT The number of frame synchronization symbols N FAW and the number of reserved symbols N RES The sum of the parameters is as shown in Table 31. Among them, N TS +N PS is an odd number, N FAW is an even number, the corresponding N RES >0,OH=(N F -N CW ) / N CW , N F =N S ×N SF ,N TS,TOT =N TS ×N SF .

[0356] The frame redundancy of the superframe architecture in the case listed in Table 31 is lower than OH<1.20%. Table 31 only limits N TS,TOT +N FAW +N RES , without limiting the number of training symbols N in each subframe TS ; In addition, Table 31 shows the number of symbols N in each subframe S and the number of symbols in the superframe N F There is no limitation either.

[0357] Table 31

[0358]

[0359]

[0360] Consider the number of training symbols N TS No more than 11, combined with Table 31, we can get Table 32. Then the frame redundancy OH of the superframe architecture listed in Table 32 is less than 1.20%; the number of training symbols N in each subframe TS The value range is 2 to 11 symbols; Table 32 shows the number of symbols N in each subframe. S and the number of symbols in the superframe N F There is no limitation.

[0361] Table 32

[0362]

[0363]

[0364]

[0365]

[0366]

[0367] In some specific applications, the bit width in the specific DSP implementation of the transceiver is 192 or 128. In order to facilitate hardware implementation, the number of symbols N in the superframe is F It should be an integer multiple of 192 and 128. Consider the number of symbols N in the superframe F It should be an integer multiple of 192. Combining Table 32, we can get Table 33. Then the frame redundancy OH of the case listed in Table 33 is less than 1.20%, and the number of symbols N in the superframe is F is an integer multiple of 192 and 128. In addition, the number of training symbols in each subframe is N TS The value range is 2 to 11 symbols; Table 33 shows the number of symbols N in each subframe. S No limitation.

[0368] Table 33

[0369]

[0370]

[0371]

[0372]

[0373] In some specific applications, the bit width in the specific DSP implementation of the transceiver is 192 or 128. In order to facilitate hardware implementation, it is better to use not only the number of symbols N of the superframe F It should be an integer multiple of 192 and 128, and the number of symbols in each subframe is N. S It should also be an integer multiple of 192 and 128. It should be understood that if N S is an integer multiple of 192 and 128, then N F It must be an integer multiple of 192 and 128, but not necessarily the opposite. Consider the number of symbols N in each subframe S is an integer multiple of 192, combined with Table 33, we can get Table 34. Then the frame redundancy OH of the case listed in Table 34 is less than 1.20%, and the number of symbols N in the superframe is F and the number of symbols in each subframe N S are integer multiples of 192 and 128. In addition, the training symbol N in each subframeTS The value range of the number is from 2 to 11 symbols.

[0374] Table 34

[0375]

[0376]

[0377]

[0378] (10) Number of symbols before framing N CW =526848, for example, a CFEC encoding method with a coding redundancy of about 15.3% is used, or other encoding methods may be used; each consecutive N PG = The first symbol among the 128 symbols is the pilot symbol. At this time, the number of subframes is N SF , the number of pilot symbols in each subframe N PS , the number of symbols in each subframe N S , the number of symbols in the superframe N F , superframe redundancy OH, the number of training symbols in the superframe N TS,TOT The number of frame synchronization symbols N FAW and the number of reserved symbols N RES The sum of the parameters is as shown in Table 35. Among them, N TS +N PS is an odd number, N FAW is an even number, the corresponding N RES >0,OH=(N F -N CW ) / N CW , N F =N S ×N SF ,N TS,TOT =N TS ×N SF .

[0379] The frame redundancy of the superframe architecture in the case listed in Table 35 is lower than OH<1.20%. Table 35 only limits N TS,TOT +N FAW +N RES , without limiting the number of training symbols N in each subframe TS ; In addition, Table 35 shows the number of symbols N in each subframe S and the number of symbols in the superframe N F There is no limitation either.

[0380] Table 35

[0381]

[0382]

[0383]

[0384] Consider the number of training symbols N TS No more than 11, combined with Table 35, we can get Table 36. Then the frame redundancy OH of the superframe architecture listed in Table 36 is less than 1.20%; the number of training symbols N in each subframe TS The value range is 2 to 11 symbols; Table 36 shows the number of symbols N in each subframe. S and the number of symbols in the superframe N F There is no limitation.

[0385] Table 36

[0386]

[0387]

[0388]

[0389]

[0390]

[0391]

[0392]

[0393] In some specific applications, the bit width in the specific DSP implementation of the transceiver is 192 or 128. In order to facilitate hardware implementation, the number of symbols N in the superframe is F It should be an integer multiple of 192 and 128. Consider the number of symbols N in the superframe F It should be an integer multiple of 192. Combined with Table 36, Table 37 can be obtained. The frame redundancy OH of the case listed in Table 37 is less than 1.20%, and the number of symbols N in the superframe is F is an integer multiple of 192 and 128. In addition, the number of training symbols in each subframe is N TS The value range is 2 to 11 symbols; Table 37 shows the number of symbols N in each subframe. S No limitation.

[0394] Table 37

[0395]

[0396]

[0397]

[0398]

[0399] In some specific applications, the bit width in the specific DSP implementation of the transceiver is 192 or 128. In order to facilitate hardware implementation, it is better to use not only the number of symbols N of the superframe F It should be an integer multiple of 192 and 128, and the number of symbols in each subframe is N. S It should also be an integer multiple of 192 and 128. It should be understood that if N S is an integer multiple of 192 and 128, then N F It must be an integer multiple of 192 and 128, but not necessarily the opposite. Consider the number of symbols N in each subframe S is an integer multiple of 192, combined with Table 37, we can get Table 38. Then the frame redundancy OH of the case listed in Table 38 is less than 1.20%, and the number of symbols N in the superframe is F and the number of symbols in each subframe N S are integer multiples of 192 and 128. In addition, the training symbol N in each subframe TS The value range of the number is from 2 to 11 symbols.

[0400] Table 38

[0401]

[0402]

[0403]

[0404] (11) Number of symbols before framing N CW =702464, for example, a CFEC encoding method with a coding redundancy of about 15.3% is used, or other encoding methods may be used; each consecutive N PG = The first symbol among the 128 symbols is the pilot symbol. At this time, the number of subframes is N SF , the number of pilot symbols in each subframe N PS , the number of symbols in each subframe N S , the number of symbols in the superframe N F , superframe redundancy OH, the number of training symbols in the superframe N TS,TOT The number of frame synchronization symbols N FAW and the number of reserved symbols N RES The sum of the parameters is as shown in Table 39. Among them, N TS +N PS is an odd number, N FAW is an even number, the corresponding N RES >0,OH=(N F -N CW) / N CW , N F =N S ×N SF ,N TS,TOT =N TS ×N SF .

[0405] The frame redundancy of the superframe structure in the case listed in Table 39 is lower than OH<1.20%. Table 39 only limits N TS,TOT +N FAW +N RES , without limiting the number of training symbols N in each subframe TS ; In addition, Table 39 shows the number of symbols N in each subframe S and the number of symbols in the superframe N F There is no limitation either.

[0406] Table 39

[0407]

[0408]

[0409]

[0410] Consider the number of training symbols N TS No more than 11, combined with Table 39, Table 40 can be obtained. Then the frame redundancy OH of the superframe architecture listed in Table 40 is less than 1.20%; the number of training symbols N in each subframe TS The value range of is 2 to 11 symbols; Table 40 shows the number of symbols N in each subframe. S and the number of symbols in the superframe N F There is no limitation.

[0411] Table 40

[0412]

[0413]

[0414]

[0415]

[0416]

[0417]

[0418]

[0419]

[0420]

[0421]

[0422] In some specific applications, the bit width in the specific DSP implementation of the transceiver is 192 or 128. In order to facilitate hardware implementation, the number of symbols N in the superframe is F It should be an integer multiple of 192 and 128. Consider the number of symbols N in the superframe F It should be an integer multiple of 192. Combining Table 40, we can get Table 41. The frame redundancy OH of the case listed in Table 41 is less than 1.20%, and the number of symbols N in the superframe is F is an integer multiple of 192 and 128. In addition, the number of training symbols in each subframe is N TS The value range is 2 to 11 symbols; Table 41 shows the number of symbols N in each subframe. S No limitation.

[0423] Table 41

[0424]

[0425]

[0426]

[0427]

[0428]

[0429]

[0430]

[0431] In some specific applications, the bit width in the specific DSP implementation of the transceiver is 192 or 128. In order to facilitate hardware implementation, it is better to use not only the number of symbols N of the superframe F It should be an integer multiple of 192 and 128, and the number of symbols in each subframe is N. S It should also be an integer multiple of 192 and 128. It should be understood that if N S is an integer multiple of 192 and 128, then N F It must be an integer multiple of 192 and 128, but not necessarily the opposite. Consider the number of symbols N in each subframe S is an integer multiple of 192, combined with Table 41, Table 42 can be obtained. Then the frame redundancy OH of the case listed in Table 42 is less than 1.20%, and the number of symbols N in the superframe F and the number of symbols in each subframe N Sare integer multiples of 192 and 128. In addition, the training symbol N in each subframe TS The value range of the number is from 2 to 11 symbols.

[0432] Table 42

[0433]

[0434]

[0435]

[0436]

[0437]

[0438] (12) Number of symbols before framing N CW = 172032, for example, an open code (Open FEC, OFEC) encoding method with a coding redundancy of about 15.3% is used, and other encoding methods can also be used; each consecutive N PG = The first symbol among the 96 symbols is the pilot symbol. At this time, the number of subframes is N SF , the number of pilot symbols in each subframe N PS , the number of symbols in each subframe N S , the number of symbols in the superframe N F , superframe redundancy OH, the number of training symbols in the superframe N TS,TOT The number of frame synchronization symbols N FAW and the number of reserved symbols N RES The sum of the parameters is one of the items in Table 43. Among them, N TS +N PS is an odd number, N FAW is an even number, the corresponding N RES >0,OH=(N F -N CW ) / N CW , N F =N S ×N SF ,N TS,TOT =N TS ×N SF .

[0439] The frame redundancy of the superframe architecture in the case listed in Table 43 is lower than OH<1.50%. Table 43 only limits N TS,TOT +N FAW +N RES , without limiting the number of training symbols N in each subframe TS ; In addition, Table 43 shows the number of symbols N in each subframe Sand the number of symbols in the superframe N F There is no limitation either.

[0440] Table 43

[0441]

[0442] Consider the number of training symbols N TS No more than 11, combined with Table 43, we can get Table 44. Then the frame redundancy OH of the superframe architecture listed in Table 44 is less than 1.50%; the number of training symbols N in each subframe TS The value range of is 2 to 11 symbols; Table 44 shows the number of symbols N in each subframe. S and the number of symbols in the superframe N F There is no limitation.

[0443] Table 44

[0444]

[0445]

[0446] In some specific applications, the bit width in the specific DSP implementation of the transceiver is 192 or 128. In order to facilitate hardware implementation, the number of symbols N in the superframe is F It should be an integer multiple of 192 and 128. Consider the number of symbols N in the superframe F It should be an integer multiple of 192 and 128. Combining Table 44, we can get Table 45. The frame redundancy OH of the case listed in Table 45 is less than 1.50%, and the number of symbols N in the superframe is F is an integer multiple of 192 and 128. In addition, the number of training symbols in each subframe is N TS The value range is 2 to 11 symbols; Table 45 shows the number of symbols N in each subframe. S It should be noted that in this case (12) there is no superframe symbol number N F is an integer multiple of 192 and 128, and the number of symbols in each subframe is N S This is also the case for integer multiples of 192 and 128.

[0447] Table 45

[0448]

[0449] (13) Number of symbols before framing N CW =344064, for example, an open code (Open FEC, OFEC) encoding method with a coding redundancy of about 15.3% is adopted, and other encoding methods can also be adopted; each consecutive N PG= The first symbol among the 96 symbols is the pilot symbol. At this time, the number of subframes is N SF , the number of pilot symbols in each subframe N PS , the number of symbols in each subframe N S , the number of symbols in the superframe N F , superframe redundancy OH, the number of training symbols in the superframe N TS,TOT The number of frame synchronization symbols N FAW and the number of reserved symbols N RES The sum of the parameters is as shown in Table 45. Among them, N TS +N PS is an odd number, N FAW is an even number, the corresponding N RES >0,OH=(N F -N CW ) / N CW , N F =N S ×N SF ,N TS,TOT =N TS ×N SF .

[0450] The frame redundancy of the superframe structure in the case listed in Table 46 is lower than OH<1.50%. Table 46 only limits N TS,TOT +N FAW +N RES , without limiting the number of training symbols N in each subframe TS ; In addition, Table 46 shows the number of symbols N in each subframe S and the number of symbols in the superframe N F There is no limitation either.

[0451] Table 46

[0452]

[0453]

[0454] Consider the number of training symbols N TS No more than 11, combined with Table 46, Table 47 can be obtained. Then the frame redundancy OH of the superframe architecture of the case listed in Table 47 is less than 1.50%; the number of training symbols N in each subframe TS The value range is 2 to 11 symbols; Table 47 shows the number of symbols N in each subframe. S and the number of symbols in the superframe N F There is no limitation.

[0455] Table 47

[0456]

[0457]

[0458]

[0459]

[0460]

[0461] In some specific applications, the bit width in the specific DSP implementation of the transceiver is 192 or 128. In order to facilitate hardware implementation, the number of symbols N in the superframe is F It should be an integer multiple of 192 and 128. Consider the number of symbols N in the superframe F It should be an integer multiple of 192 and 128. Combining Table 47, we can get Table 48. The frame redundancy OH of the case listed in Table 48 is less than 1.50%, and the number of symbols N in the superframe is F is an integer multiple of 192 and 128. In addition, the number of training symbols in each subframe is N TS The value range is 2 to 11 symbols; Table 48 shows the number of symbols N in each subframe. S No limitation.

[0462] Table 48

[0463] Serial number <![CDATA[N SF ]]> <![CDATA[N PS ]]> <![CDATA[N S ]]> <![CDATA[N F ]]> OH <![CDATA[N TS ]]> <![CDATA[N FAW +N RES ]]> 1 36 101 9696 349056 1.45% 2 1320 2 24 151 14496 347904 1.12% 2 192 3 16 227 21792 348672 1.34% 2 960 4 12 303 29088 349056 1.45% 2 1344 5 303 12 1152 349056 1.45% 3 750 6 227 16 1536 348672 1.34% 3 522 7 202 18 1728 349056 1.45% 3 952 8 101 36 3456 349056 1.45% 3 1154 9 18 202 19392 349056 1.45% 3 1320 10 12 302 28992 347904 1.12% 3 192 11 36 101 9696 349056 1.45% 4 1248 12 24 151 14496 347904 1.12% 4 144 13 16 227 21792 348672 1.34% 4 928 14 12 303 29088 349056 1.45% 4 1320 15 303 12 1152 349056 1.45% 5 144 16 227 16 1536 348672 1.34% 5 68 17 202 18 1728 349056 1.45% 5 548 18 101 36 3456 349056 1.45% 5 952 19 18 202 19392 349056 1.45% 5 1284 20 12 302 28992 347904 1.12% 5 168 21 36 101 9696 349056 1.45% 6 1176 22 24 151 14496 347904 1.12% 6 96 23 16 227 21792 348672 1.34% 6 896 24 12 303 29088 349056 1.45% 6 1296 25 202 18 1728 349056 1.45% 7 144 26 101 36 3456 349056 1.45% 7 750 27 18 202 19392 349056 1.45% 7 1248 28 12 302 28992 347904 1.12% 7 144 29 36 101 9696 349056 1.45% 8 1104 30 24 151 14496 347904 1.12% 8 48 31 16 227 21792 348672 1.34% 8 864 32 12 303 29088 349056 1.45% 8 1272 33 101 36 3456 349056 1.45% 9 548 34 18 202 19392 349056 1.45% 9 1212 35 12 302 28992 347904 1.12% 9 120 36 36 101 9696 349056 1.45% 10 1032 37 16 227 21792 348672 1.34% 10 832 38 12 303 29088 349056 1.45% 10 1248 39 101 36 3456 349056 1.45% 11 346 40 18 202 19392 349056 1.45% 11 1176 41 12 302 28992 347904 1.12% 11 96

[0464] In some specific applications, the bit width in the specific DSP implementation of the transceiver is 192 or 128. In order to facilitate hardware implementation, it is better to use not only the number of symbols N of the superframe F It should be an integer multiple of 192 and 128, and the number of symbols in each subframe is N. S It should also be an integer multiple of 192 and 128. It should be understood that if N S is an integer multiple of 192 and 128, then N F It must be an integer multiple of 192 and 128, but not necessarily the opposite. Consider the number of symbols N in each subframe S is an integer multiple of 192 and 128, combined with Table 48, Table 49 can be obtained. Then the frame redundancy OH of the case listed in Table 49 is less than 1.50%, and the number of symbols N in the superframe F and the number of symbols in each subframe N S are integer multiples of 192 and 128. In addition, the training symbol N in each subframe TS The value range of the number is from 2 to 11 symbols.

[0465] Table 49

[0466] Serial number <![CDATA[N SF ]]> <![CDATA[N PS ]]> <![CDATA[N S ]]> <![CDATA[N F ]]> OH <![CDATA[N TS ]]> <![CDATA[N FAW +N RES ]]> 1 303 12 1152 349056 1.45% 3 750 2 227 16 1536 348672 1.34% 3 522 3 101 36 3456 349056 1.45% 3 1154 4 303 12 1152 349056 1.45% 5 144 5 227 16 1536 348672 1.34% 5 68 6 101 36 3456 349056 1.45% 5 952 7 101 36 3456 349056 1.45% 7 750 8 101 36 3456 349056 1.45% 9 548 9 101 36 3456 349056 1.45% 11 346

[0467] (14) Number of symbols before framing N CW =516096, for example, an open code (Open FEC, OFEC) encoding method with a coding redundancy of about 15.3% is used, and other encoding methods can also be used; each consecutive N PG = The first symbol among the 96 symbols is the pilot symbol. At this time, the number of subframes is N SF , the number of pilot symbols in each subframe N PS , the number of symbols in each subframe N S , the number of symbols in the superframe N F , superframe redundancy OH, the number of training symbols in the superframe N TS,TOT The number of frame synchronization symbols N FAW and the number of reserved symbols N RES The sum of the parameters is as shown in Table 50. Among them, N TS +N PS is an odd number, N FAW is an even number, the corresponding N RES >0,OH=(N F -N CW ) / N CW , N F =N S ×N SF ,N TS,TOT =N TS ×N SF .

[0468] The frame redundancy of the superframe structure in the case listed in Table 50 is lower than OH<1.50%. Table 50 only limits N TS,TOT +N FAW +N RES , without limiting the number of training symbols N in each subframe TS In addition, Table 50 shows the number of symbols N in each subframe. S and the number of symbols in the superframe N F There is no limitation either.

[0469] Table 50

[0470]

[0471]

[0472]

[0473] Consider the number of training symbols N TS No more than 11, combined with Table 50, Table 51 can be obtained. Then the frame redundancy OH of the superframe architecture of the case listed in Table 51 is less than 1.50%; the number of training symbols N in each subframe TSThe value range of is 2 to 11 symbols; Table 51 shows the number of symbols N in each subframe. S and the number of symbols in the superframe N F There is no limitation.

[0474] Table 51

[0475]

[0476]

[0477]

[0478]

[0479]

[0480]

[0481]

[0482]

[0483] In some specific applications, the bit width in the specific DSP implementation of the transceiver is 192 or 128. In order to facilitate hardware implementation, the number of symbols N in the superframe is F It should be an integer multiple of 192 and 128. Consider the number of symbols N in the superframe F It should be an integer multiple of 192 and 128. Combining Table 51, we can get Table 52. The frame redundancy OH of the case listed in Table 52 is less than 1.50%, and the number of symbols N in the superframe is F is an integer multiple of 192 and 128. In addition, the number of training symbols in each subframe is N TS The value range is 2 to 11 symbols; Table 52 shows the number of symbols N in each subframe. S No limitation.

[0484] Table 52

[0485]

[0486]

[0487]

[0488]

[0489]

[0490] In some specific applications, the bit width in the specific DSP implementation of the transceiver is 192 or 128. In order to facilitate hardware implementation, it is better to use not only the number of symbols N of the superframe F It should be an integer multiple of 192 and 128, and the number of symbols in each subframe is N. S It should also be an integer multiple of 192 and 128. It should be understood that if N S is an integer multiple of 192 and 128, then N F It must be an integer multiple of 192 and 128, but not necessarily the opposite. Consider the number of symbols N in each subframe S is an integer multiple of 192 and 128, combined with Table 52, we can get Table 53. Then the frame redundancy OH of the case listed in Table 53 is less than 1.50%, and the number of symbols N in the superframe is F and the number of symbols in each subframe N S are integer multiples of 192 and 128. In addition, the training symbol N in each subframe TS The value range of the number is from 2 to 11 symbols.

[0491] Table 53

[0492]

[0493]

[0494]

[0495] (15) Number of symbols before framing N CW =688128, for example, an open code (Open FEC, OFEC) encoding method with a coding redundancy of about 15.3% is used, and other encoding methods can also be used; each consecutive N PG = The first symbol among the 96 symbols is the pilot symbol. At this time, the number of subframes is N SF , the number of pilot symbols in each subframe N PS , the number of symbols in each subframe N S , the number of symbols in the superframe N F , superframe redundancy OH, the number of training symbols in the superframe N TS,TOT The number of frame synchronization symbols N FAW and the number of reserved symbols N RES The sum of the parameters is as shown in Table 54. Among them, N TS +N PS is an odd number, N FAW is an even number, the corresponding N RES >0,OH=(N F -N CW ) / N CW , N F =NS ×N SF ,N TS,TOT =N TS ×N SF .

[0496] The frame redundancy of the superframe architecture in the case listed in Table 54 is lower than OH<1.50%. Table 54 only limits N TS,TOT +N FAW +N RES , without limiting the number of training symbols N in each subframe TS ; In addition, Table 54 shows the number of symbols N in each subframe S and the number of symbols in the superframe N F There is no limitation either.

[0497] Table 54

[0498]

[0499]

[0500]

[0501] Consider the number of training symbols N TS No more than 11, combined with Table 54, we can get Table 55. Then the frame redundancy OH of the superframe architecture listed in Table 55 is less than 1.50%; the number of training symbols N in each subframe TS The value range of is 2 to 11 symbols; Table 55 shows the number of symbols N in each subframe. S and the number of symbols in the superframe N F There is no limitation.

[0502] Table 55

[0503]

[0504]

[0505]

[0506]

[0507]

[0508]

[0509]

[0510]

[0511]

[0512] In some specific applications, the bit width in the specific DSP implementation of the transceiver is 192 or 128. In order to facilitate hardware implementation, the number of symbols N in the superframe is F It should be an integer multiple of 192 and 128. Consider the number of symbols N in the superframe F It should be an integer multiple of 192 and 128. Combining Table 55, we can get Table 56. The frame redundancy OH of the case listed in Table 56 is less than 1.50%, and the number of symbols N in the superframe is F is an integer multiple of 192 and 128. In addition, the number of training symbols in each subframe is N TS The value range of is 2 to 11 symbols; Table 56 shows the number of symbols N in each subframe. S No limitation.

[0513] Table 56

[0514]

[0515]

[0516]

[0517]

[0518]

[0519]

[0520] In some specific applications, the bit width in the specific DSP implementation of the transceiver is 192 or 128. In order to facilitate hardware implementation, it is better to use not only the number of symbols N of the superframe F It should be an integer multiple of 192 and 128, and the number of symbols in each subframe is N. S It should also be an integer multiple of 192 and 128. It should be understood that if N S is an integer multiple of 192 and 128, then N F It must be an integer multiple of 192 and 128, but not necessarily the opposite. Consider the number of symbols N in each subframe S is an integer multiple of 192 and 128, combined with Table 56, Table 57 can be obtained. Then the frame redundancy OH of the case listed in Table 57 is less than 1.50%, and the number of symbols N of the superframe F and the number of symbols in each subframe N S are integer multiples of 192 and 128. In addition, the training symbol N in each subframe TS The value range of the number is from 2 to 11 symbols.

[0521] Table 57

[0522]

[0523]

[0524] (16) Number of symbols before framing N CW = 150528, for example, an open code (Open FEC, OFEC) encoding method with a coding redundancy of about 17.9% is used, and other encoding methods can also be used; each consecutive N PG = The first symbol among the 96 symbols is the pilot symbol. At this time, the number of subframes is N SF , the number of pilot symbols in each subframe N PS , the number of symbols in each subframe N S , the number of symbols in the superframe N F , superframe redundancy OH, the number of training symbols in the superframe N TS,TOT The number of frame synchronization symbols N FAW and the number of reserved symbols N RES The sum of the parameters is one of the items in Table 58. Among them, N TS +N PS is an odd number, N FAW is an even number, the corresponding N RES >0,OH=(N F -N CW ) / N CW , N F =N S ×N SF ,N TS,TOT =N TS ×N SF .

[0525] The frame redundancy of the superframe structure in the case listed in Table 58 is lower than OH<1.50%. Table 58 only limits N TS,TOT +N FAW +N RES , without limiting the number of training symbols N in each subframe TS ; In addition, Table 58 shows the number of symbols N in each subframe S and the number of symbols in the superframe N F There is no limitation either.

[0526] Table 58

[0527] Serial number <![CDATA[N SF ]]> <![CDATA[N PS ]]> <![CDATA[N S ]]> <![CDATA[N F ]]> OH <![CDATA[N TS,TOT +N FAW +N RES ]]> 1 159 10 960 152640 1.40% 522 2 122 13 1248 152256 1.15% 142 3 106 15 1440 152640 1.40% 522 4 69 23 2208 152352 1.21% 237 5 61 26 2496 152256 1.15% 142 6 53 30 2880 152640 1.40% 522 7 43 37 3552 152736 1.47% 617 8 37 43 4128 152736 1.47% 617 9 30 53 5088 152640 1.40% 522 10 26 61 5856 152256 1.15% 142 11 23 69 6624 152352 1.21% 237 12 15 106 10176 152640 1.40% 522 13 13 122 11712 152256 1.15% 142 14 10 159 15264 152640 1.40% 522 15 7 227 21792 152544 1.34% 427 16 6 265 25440 152640 1.40% 522 17 5 317 30432 152160 1.08% 47 18 5 318 30528 152640 1.40% 522 19 4 397 38112 152448 1.28% 332

[0528] Consider the number of training symbols N TS No more than 11, combined with Table 58, Table 59 can be obtained. Then the frame redundancy OH of the superframe architecture of the case listed in Table 59 is less than 1.50%; the number of training symbols N in each subframe TSThe value range is 2 to 11 symbols; Table 59 shows the number of symbols N in each subframe. S and the number of symbols in the superframe N F There is no limitation.

[0529] Table 59

[0530]

[0531]

[0532]

[0533] In some specific applications, the bit width in the specific DSP implementation of the transceiver is 192 or 128. In order to facilitate hardware implementation, the number of symbols N in the superframe is F It should be an integer multiple of 192 and 128. Consider the number of symbols N in the superframe F It should be an integer multiple of 192 and 128. Combining Table 59, we can get Table 60. The frame redundancy OH of the case listed in Table 60 is less than 1.50%, and the number of symbols N in the superframe is F is an integer multiple of 192 and 128. In addition, the number of training symbols in each subframe is N TS The value range of is 2 to 11 symbols; Table 60 shows the number of symbols N in each subframe. S It should be noted that in this case (16) there is no superframe symbol number N F is an integer multiple of 192 and 128, and the number of symbols in each subframe is N S This is also the case for integer multiples of 192 and 128.

[0534] Table 60

[0535] Serial number <![CDATA[N SF ]]> <![CDATA[N PS ]]> <![CDATA[N S ]]> <![CDATA[N F ]]> OH <![CDATA[N TS ]]> <![CDATA[N FAW +N RES ]]> 1 4 397 38112 152448 1.28% 2 328 2 4 397 38112 152448 1.28% 4 320 3 4 397 38112 152448 1.28% 6 312 4 4 397 38112 152448 1.28% 8 304 5 4 397 38112 152448 1.28% 10 296

[0536] (17) Number of symbols before framing N CW = 129024, for example, an open code (Open FEC, OFEC) encoding method with a coding redundancy of about 21.5% is used, and other encoding methods can also be used; each consecutive N PG = The first symbol among the 96 symbols is the pilot symbol. At this time, the number of subframes is N SF , the number of pilot symbols in each subframe N PS , the number of symbols in each subframe N S , the number of symbols in the superframe N F , superframe redundancy OH, the number of training symbols in the superframe N TS,TOT The number of frame synchronization symbols N FAW and the number of reserved symbols N RESThe sum of the parameters is as shown in Table 61. Among them, N TS +N PS is an odd number, N FAW is an even number, the corresponding N RES >0,OH=(N F -N CW ) / N CW , N F =N S ×N SF ,N TS,TOT =N TS ×N SF .

[0537] The frame redundancy of the superframe structure in the case listed in Table 61 is lower than OH<1.50%. Table 61 only limits N TS,TOT +N FAW +N RES , without limiting the number of training symbols N in each subframe TS ; In addition, Table 61 shows the number of symbols N in each subframe S and the number of symbols in the superframe N F There is no limitation either.

[0538] Table 61

[0539]

[0540]

[0541] Consider the number of training symbols N TS No more than 11, combined with Table 61, Table 62 can be obtained. Then the frame redundancy OH of the superframe architecture in the case shown in Table 62 is less than 1.50%; the number of training symbols N in each subframe TS The value range of is 2 to 11 symbols; Table 62 shows the number of symbols N in each subframe. S and the number of symbols in the superframe N F There is no limitation.

[0542] Table 62

[0543]

[0544]

[0545]

[0546] In some specific applications, the bit width in the specific DSP implementation of the transceiver is 192 or 128. In order to facilitate hardware implementation, the number of symbols N in the superframe is F It should be an integer multiple of 192 and 128. Consider the number of symbols N in the superframe FIt should be an integer multiple of 192 and 128. Combining Table 62, we can get Table 63. Then the frame redundancy OH of the case listed in Table 63 is less than 1.50%, and the number of symbols N in the superframe is F is an integer multiple of 192 and 128. In addition, the number of training symbols in each subframe is N TS The value range of is 2 to 11 symbols; Table 63 shows the number of symbols N in each subframe. S No limitation.

[0547] Table 63

[0548]

[0549]

[0550]

[0551] In some specific applications, the bit width in the specific DSP implementation of the transceiver is 192 or 128. In order to facilitate hardware implementation, it is better to use not only the number of symbols N of the superframe F It should be an integer multiple of 192 and 128, and the number of symbols in each subframe is N. S It should also be an integer multiple of 192 and 128. It should be understood that if N S is an integer multiple of 192 and 128, then N F It must be an integer multiple of 192 and 128, but not necessarily the opposite. Consider the number of symbols N in each subframe S is an integer multiple of 192 and 128, combined with Table 63, Table 64 can be obtained. Then the frame redundancy OH of the case listed in Table 64 is less than 1.50%, and the number of symbols N in the superframe F and the number of symbols in each subframe N S are integer multiples of 192 and 128. In addition, the training symbol N in each subframe TS The value range of the number is from 2 to 11 symbols.

[0552] Table 64

[0553]

[0554]

[0555] (18) Number of symbols before framing N CW = 107520, for example, an open code (Open FEC, OFEC) encoding method with a coding redundancy of about 26.9% is used, and other encoding methods can also be used; each consecutive N PG = The first symbol among the 96 symbols is the pilot symbol. At this time, the number of subframes is N SF, the number of pilot symbols in each subframe N PS , the number of symbols in each subframe N S , the number of symbols in the superframe N F , superframe redundancy OH, the number of training symbols in the superframe N TS,TOT The number of frame synchronization symbols N FAW and the number of reserved symbols N RES The sum of the parameters is as shown in Table 65. Among them, N TS +N PS is an odd number, N FAW is an even number, the corresponding N RES >0,OH=(N F -N CW ) / N CW , N F =N S ×N SF ,N TS,TOT =N TS ×N SF .

[0556] The frame redundancy of the superframe structure in the case listed in Table 65 is lower than OH<1.50%. Table 65 only limits N TS,TOT +N FAW +N RES , without limiting the number of training symbols N in each subframe TS ; In addition, Table 65 shows the number of symbols N in each subframe S and the number of symbols in the superframe N F There is no limitation either.

[0557] Table 65

[0558] Serial number <![CDATA[N SF ]]> <![CDATA[N PS ]]> <![CDATA[N S ]]> <![CDATA[N F ]]> OH <![CDATA[N TS,TOT +N FAW +N RES ]]> 1 103 11 1056 108768 1.16% 115 2 81 14 1344 108864 1.25% 210 3 71 16 1536 109056 1.43% 400 4 63 18 1728 108864 1.25% 210 5 54 21 2016 108864 1.25% 210 6 42 27 2592 108864 1.25% 210 7 27 42 4032 108864 1.25% 210 8 21 54 5184 108864 1.25% 210 9 18 63 6048 108864 1.25% 210 10 16 71 6816 109056 1.43% 400 11 14 81 7776 108864 1.25% 210 12 11 103 9888 108768 1.16% 115 13 9 126 12096 108864 1.25% 210 14 8 142 13632 109056 1.43% 400 15 7 162 15552 108864 1.25% 210 16 6 189 18144 108864 1.25% 210 17 5 227 21792 108960 1.34% 305 18 4 283 27168 108672 1.07% 20 19 4 284 27264 109056 1.43% 400 20 3 378 36288 108864 1.25% 210

[0559] Consider the number of training symbols N TS No more than 11, combined with Table 65, Table 66 can be obtained. Then the frame redundancy OH of the superframe architecture of the case listed in Table 66 is less than 1.50%; the number of training symbols N in each subframe TS The value range of is 2 to 11 symbols; Table 66 shows the number of symbols N in each subframe. S and the number of symbols in the superframe N F There is no limitation.

[0560] Table 66

[0561]

[0562]

[0563]

[0564] In some specific applications, the bit width in the specific DSP implementation of the transceiver is 192 or 128. In order to facilitate hardware implementation, the number of symbols N in the superframe is F It should be an integer multiple of 192 and 128. Consider the number of symbols N in the superframe F It should be an integer multiple of 192 and 128. Combining Table 66, we can get Table 67. The frame redundancy OH of the case listed in Table 67 is less than 1.50%, and the number of symbols N in the superframe is F is an integer multiple of 192 and 128. In addition, the number of training symbols in each subframe is N TS The value range of is 2 to 11 symbols; Table 67 shows the number of symbols N in each subframe. S No limitation.

[0565] Table 67

[0566]

[0567]

[0568] In some specific applications, the bit width in the specific DSP implementation of the transceiver is 192 or 128. In order to facilitate hardware implementation, it is better to use not only the number of symbols N of the superframe F It should be an integer multiple of 192 and 128, and the number of symbols in each subframe is N. S It should also be an integer multiple of 192 and 128. It should be understood that if N S is an integer multiple of 192 and 128, then N F It must be an integer multiple of 192 and 128, but not necessarily the opposite. Consider the number of symbols N in each subframe S is an integer multiple of 192 and 128, combined with Table 67, Table 68 can be obtained. Then the frame redundancy OH of the case listed in Table 68 is less than 1.50%, and the number of symbols N of the superframe F and the number of symbols in each subframe N S are integer multiples of 192 and 128. In addition, the training symbol N in each subframe TS The value range of the number is from 2 to 11 symbols.

[0569] Table 68

[0570] Serial number <![CDATA[N SF ]]> <![CDATA[N PS ]]> <![CDATA[N S ]]> <![CDATA[N F ]]> OH <![CDATA[N TS ]]> <![CDATA[N FAW +N RES ]]> 1 71 16 1536 109056 1.43% 3 258 2 4 284 27264 109056 1.43% 3 392 3 71 16 1536 109056 1.43% 5 116 4 4 284 27264 109056 1.43% 5 384 5 4 284 27264 109056 1.43% 7 376 6 4 284 27264 109056 1.43% 9 368 7 4 284 27264 109056 1.43% 11 360

[0571] (19) Number of symbols before framing N CW =175616, for example, using a CFEC encoding method with a coding redundancy of about 15.3%, or other encoding methods; each consecutive N PG = The first symbol among the 96 symbols is the pilot symbol. At this time, the number of subframes is NSF , the number of pilot symbols in each subframe N PS , the number of symbols in each subframe N S , the number of symbols in the superframe N F , superframe redundancy OH, the number of training symbols in the superframe N TS,TOT The number of frame synchronization symbols N FAW and the number of reserved symbols N RES The sum of the parameters is one of the items in Table 68. Among them, N TS +N PS is an odd number, N FAW is an even number, the corresponding N RES >0,OH=(N F -N CW ) / N CW , F =N S ×N SF ,N TS,TOT =N TS ×N SF .

[0572] The frame redundancy of the superframe structure in the case listed in Table 69 is lower than OH<1.50%. Table 69 only limits N TS,TOT +N FAW +N RES , without limiting the number of training symbols N in each subframe TS ; In addition, Table 69 shows the number of symbols N in each subframe S and the number of symbols in the superframe N F There is no limitation either.

[0573] Table 69

[0574]

[0575]

[0576] Consider the number of training symbols N TS No more than 11, combined with Table 69, Table 70 can be obtained. Then the frame redundancy OH of the superframe architecture of the case listed in Table 70 is less than 1.50%; the number of training symbols N in each subframe TS The value range of is 2 to 11 symbols; Table 70 shows the number of symbols N in each subframe. S and the number of symbols in the superframe N F There is no limitation.

[0577] Table 70

[0578]

[0579]

[0580]

[0581] In some specific applications, the bit width in the specific DSP implementation of the transceiver is 192 or 128. In order to facilitate hardware implementation, the number of symbols N in the superframe is F It should be an integer multiple of 192 and 128. Consider the number of symbols N in the superframe F It should be an integer multiple of 192 and 128. Combining Table 70, we can get Table 71. The frame redundancy OH of the case listed in Table 71 is less than 1.50%, and the number of symbols N in the superframe is F is an integer multiple of 192 and 128. In addition, the number of training symbols in each subframe is N TS The value range is 2 to 11 symbols; Table 71 shows the number of symbols N in each subframe. S No limitation.

[0582] Table 71

[0583]

[0584]

[0585] In some specific applications, the bit width in the specific DSP implementation of the transceiver is 192 or 128. In order to facilitate hardware implementation, it is better to use not only the number of symbols N of the superframe F It should be an integer multiple of 192 and 128, and the number of symbols in each subframe is N. S It should also be an integer multiple of 192 and 128. It should be understood that if N S is an integer multiple of 192 and 128, then N F It must be an integer multiple of 192 and 128, but not necessarily the opposite. Consider the number of symbols N in each subframe S is an integer multiple of 192 and 128, combined with Table 71, Table 72 can be obtained. Then the frame redundancy OH of the case listed in Table 72 is less than 1.50%, and the number of symbols N of the superframe F and the number of symbols in each subframe N S are integer multiples of 192 and 128. In addition, the training symbol N in each subframe TS The value range of the number is from 2 to 11 symbols.

[0586] Table 72

[0587] Serial number <![CDATA[N SF ]]> <![CDATA[N PS ]]> <![CDATA[N S ]]> <![CDATA[N F ]]> OH <![CDATA[N TS ]]> <![CDATA[N FAW +N RES ]]> 1 116 16 1536 178176 1.46% 3 472 2 58 32 3072 178176 1.46% 3 588 3 29 64 6144 178176 1.46% 3 646 4 16 116 11136 178176 1.46% 3 672 5 8 232 22272 178176 1.46% 3 688 6 116 16 1536 178176 1.46% 5 240 7 58 32 3072 178176 1.46% 5 472 8 29 64 6144 178176 1.46% 5 588 9 16 116 11136 178176 1.46% 5 640 10 8 232 22272 178176 1.46% 5 672 11 58 32 3072 178176 1.46% 7 356 12 29 64 6144 178176 1.46% 7 530 13 16 116 11136 178176 1.46% 7 608 14 8 232 22272 178176 1.46% 7 656 15 58 32 3072 178176 1.46% 9 240 16 29 64 6144 178176 1.46% 9 472 17 16 116 11136 178176 1.46% 9 576 18 8 232 22272 178176 1.46% 9 640 19 58 32 3072 178176 1.46% 11 124 20 29 64 6144 178176 1.46% 11 414 21 16 116 11136 178176 1.46% 11 544 22 8 232 22272 178176 1.46% 11 624

[0588] (20) Number of symbols before framing N CW=351232, for example, using a CFEC encoding method with a coding redundancy of about 15.3%, or other encoding methods; each consecutive N PG = The first symbol among the 96 symbols is the pilot symbol. At this time, the number of subframes is N SF , the number of pilot symbols in each subframe N PS , the number of symbols in each subframe N S , the number of symbols in the superframe N F , superframe redundancy OH, the number of training symbols in the superframe N TS,TOT The number of frame synchronization symbols N FAW and the number of reserved symbols N RES The sum of the parameters is one of the items in Table 73. Among them, N TS +N PS is an odd number, N FAW is an even number, the corresponding N RES >0,OH=(N F -N CW ) / N CW , N F =N S ×N SF ,N TS,TOT =N TS ×N SF .

[0589] The frame redundancy of the superframe structure in the case listed in Table 73 is lower than OH<1.50%. Table 73 only limits N TS,TOT +N FAW +N RES , without limiting the number of training symbols N in each subframe TS ; In addition, Table 73 shows the number of symbols N in each subframe S and the number of symbols in the superframe N F There is no limitation either.

[0590] Table 73

[0591]

[0592]

[0593] Consider the number of training symbols N TS No more than 11, combined with Table 73, Table 74 can be obtained. Then the frame redundancy OH of the superframe architecture of the case listed in Table 74 is less than 1.50%; the number of training symbols N in each subframe TS The value range is 2 to 11 symbols; Table 74 shows the number of symbols N in each subframe. S and the number of symbols in the superframe N F There is no limitation.

[0594] Table 74

[0595]

[0596]

[0597]

[0598]

[0599]

[0600]

[0601] In some specific applications, the bit width in the specific DSP implementation of the transceiver is 192 or 128. In order to facilitate hardware implementation, the number of symbols N in the superframe is F It should be an integer multiple of 192 and 128. Consider the number of symbols N in the superframe F It should be an integer multiple of 192 and 128. Combining Table 74, we can get Table 75. The frame redundancy OH of the case listed in Table 75 is less than 1.50%, and the number of symbols N in the superframe is F is an integer multiple of 192 and 128. In addition, the number of training symbols in each subframe is N TS The value range is 2 to 11 symbols; Table 75 shows the number of symbols N in each subframe. S No limitation.

[0602] Table 75

[0603]

[0604]

[0605]

[0606] In some specific applications, the bit width in the specific DSP implementation of the transceiver is 192 or 128. In order to facilitate hardware implementation, it is better to use not only the number of symbols N of the superframe F It should be an integer multiple of 192 and 128, and the number of symbols in each subframe is N. S It should also be an integer multiple of 192 and 128. It should be understood that if N S is an integer multiple of 192 and 128, then N F It must be an integer multiple of 192 and 128, but not necessarily the opposite. Consider the number of symbols N in each subframe S is an integer multiple of 192 and 128, combined with Table 75, Table 76 can be obtained. Then the frame redundancy OH of the case listed in Table 76 is less than 1.50%, and the number of symbols N in the superframeF and the number of symbols in each subframe N S are integer multiples of 192 and 128. In addition, the training symbol N in each subframe TS The value range of the number is from 2 to 11 symbols.

[0607] Table 76

[0608]

[0609]

[0610] (21) Number of symbols before framing N CW =526848, for example, a CFEC encoding method with a coding redundancy of about 15.3% is used, or other encoding methods may be used; each consecutive N PG = The first symbol among the 96 symbols is the pilot symbol. At this time, the number of subframes is N SF , the number of pilot symbols in each subframe N PS , the number of symbols in each subframe N S , the number of symbols in the superframe N F , superframe redundancy OH, the number of training symbols in the superframe N TS,TOT The number of frame synchronization symbols N FAW and the number of reserved symbols N RES The sum of the parameters is as shown in Table 77. Among them, N TS +N PS is an odd number, N FAW is an even number, the corresponding N RES >0,OH=(N F -N CW ) / N CW , N F =N S ×N SF ,N TS,TOT =N TS ×N SF .

[0611] The frame redundancy of the superframe architecture in the case listed in Table 77 is lower than OH<1.50%. Table 77 only limits N TS,TOT +N FAW +N RES , without limiting the number of training symbols N in each subframe TS ; In addition, Table 77 shows the number of symbols N in each subframe S and the number of symbols in the superframe N F There is no limitation either.

[0612] Table 77

[0613]

[0614]

[0615]

[0616] Consider the number of training symbols N TS No more than 11, combined with Table 77, Table 78 can be obtained. Then the frame redundancy OH of the superframe architecture of the case listed in Table 78 is less than 1.50%; the number of training symbols N in each subframe TS The value range is 2 to 11 symbols; Table 78 shows the number of symbols N in each subframe. S and the number of symbols in the superframe N F There is no limitation.

[0617] Table 78

[0618]

[0619]

[0620]

[0621]

[0622]

[0623]

[0624]

[0625]

[0626] In some specific applications, the bit width in the specific DSP implementation of the transceiver is 192 or 128. In order to facilitate hardware implementation, the number of symbols N in the superframe is F It should be an integer multiple of 192 and 128. Consider the number of symbols N in the superframe F It should be an integer multiple of 192 and 128. Combining Table 78, we can get Table 79. The frame redundancy OH of the case listed in Table 79 is less than 1.50%, and the number of symbols N in the superframe is F is an integer multiple of 192 and 128. In addition, the number of training symbols in each subframe is N TS The value range is 2 to 11 symbols; Table 79 shows the number of symbols N in each subframe. S No limitation.

[0627] Table 79

[0628]

[0629]

[0630]

[0631]

[0632] In some specific applications, the bit width in the specific DSP implementation of the transceiver is 192 or 128. In order to facilitate hardware implementation, it is better to use not only the number of symbols N of the superframe F It should be an integer multiple of 192 and 128, and the number of symbols in each subframe is N. S It should also be an integer multiple of 192 and 128. It should be understood that if N S is an integer multiple of 192 and 128, then N F It must be an integer multiple of 192 and 128, but not necessarily the opposite. Consider the number of symbols N in each subframe S is an integer multiple of 192 and 128, combined with Table 79, Table 80 can be obtained. The frame redundancy OH of the case listed in Table 80 is less than 1.50%, and the number of symbols N in the superframe F and the number of symbols in each subframe N S are integer multiples of 192 and 128. In addition, the training symbol N in each subframe TS The value range of the number is from 2 to 11 symbols.

[0633] Table 80

[0634]

[0635]

[0636] (22) Number of symbols before framing N CW =702464, for example, a CFEC encoding method with a coding redundancy of about 15.3% is used, or other encoding methods may be used; each consecutive N PG = The first symbol among the 96 symbols is the pilot symbol. At this time, the number of subframes is N SF , the number of pilot symbols in each subframe N PS , the number of symbols in each subframe N S , the number of symbols in the superframe N F , superframe redundancy OH, the number of training symbols in the superframe N TS,TOT The number of frame synchronization symbols N FAW and the number of reserved symbols N RES The sum of the parameters is one of the items in Table 81. Among them, N TS +N PS is an odd number, N FAW is an even number, the corresponding NRES >0,OH=(N F -N CW ) / N CW , N F =N S ×N SF ,N TS,TOT =N TS ×N SF .

[0637] The frame redundancy of the superframe structure in the case listed in Table 81 is lower than OH<1.50%. Table 81 only limits N TS,TOT +N FAW +N RES , without limiting the number of training symbols N in each subframe TS ; In addition, Table 81 shows the number of symbols N in each subframe S and the number of symbols in the superframe N F There is no limitation either.

[0638] Table 81

[0639]

[0640]

[0641]

[0642] Consider the number of training symbols N TS No more than 11, combined with Table 81, Table 82 can be obtained. Then the frame redundancy OH of the superframe architecture listed in Table 82 is less than 1.50%; the number of training symbols N in each subframe TS The value range of is 2 to 11 symbols; Table 82 shows the number of symbols N in each subframe. S and the number of symbols in the superframe N F There is no limitation.

[0643] Table 82

[0644]

[0645]

[0646]

[0647]

[0648]

[0649]

[0650]

[0651]

[0652]

[0653]

[0654] In some specific applications, the bit width in the specific DSP implementation of the transceiver is 192 or 128. In order to facilitate hardware implementation, the number of symbols N in the superframe is F It should be an integer multiple of 192 and 128. Consider the number of symbols N in the superframe F It should be an integer multiple of 192 and 128. Combining Table 82, we can get Table 83. Then the frame redundancy OH of the case listed in Table 83 is less than 1.50%, and the number of symbols N in the superframe is F is an integer multiple of 192 and 128. In addition, the number of training symbols in each subframe is N TS The value range of is 2 to 11 symbols; Table 83 shows the number of symbols N in each subframe. S No limitation.

[0655] Table 83

[0656]

[0657]

[0658]

[0659]

[0660]

[0661] In some specific applications, the bit width in the specific DSP implementation of the transceiver is 192 or 128. In order to facilitate hardware implementation, it is better to use not only the number of symbols N of the superframe F It should be an integer multiple of 192 and 128, and the number of symbols in each subframe is N. S It should also be an integer multiple of 192 and 128. It should be understood that if N S is an integer multiple of 192 and 128, then N F It must be an integer multiple of 192 and 128, but not necessarily the opposite. Consider the number of symbols N in each subframe S is an integer multiple of 192 and 128, combined with Table 83, Table 84 can be obtained. Then the frame redundancy OH of the case listed in Table 84 is less than 1.50%, and the number of symbols N in the superframe F and the number of symbols in each subframe N Sare integer multiples of 192 and 128. In addition, the training symbol N in each subframe TS The value range of the number is from 2 to 11 symbols.

[0662] Table 84

[0663]

[0664]

[0665]

[0666] The present application also provides several specific superframe formats, which are described as follows:

[0667] Embodiment 1: The pre-framing symbol is obtained by OFEC encoding with a code redundancy of about 15.3%. The number of pre-framing symbols is 172032, and the pilot symbol interval is 128 symbols. The corresponding N SF 、N TS 、N PS 、N FAW 、N RES 、N S 、N F , OH and other parameters are shown in Table 85 below:

[0668] Table 85

[0669] <![CDATA[N SF ]]> <![CDATA[N PS ]]> <![CDATA[N S ]]> <![CDATA[N F ]]> OH <![CDATA[N FAW ]]> <![CDATA[N TS ]]> <![CDATA[N RES ]]> 12 113 14464 173568 0.89% 22 10 50

[0670] Fig.10 Schematic diagram of the first implementation of superframe and subframe in the embodiment of the present application. The superframe includes 12 subframes, each subframe includes 14464 symbols, such as Fig.10 The first type of subframe is shown in (a). Fig.10 As shown in (b), there are 113 pilot symbols, 10 training symbols, 22 frame synchronization symbols, and 50 reserved symbols. In the existing 400G-ZR and 800G-ZR standards, the first subframe also contains 22 frame synchronization symbols, which is conducive to multiplexing. The second type of subframe is as follows Fig.10 As shown in (c), there are also 113 pilot symbols and 10 training symbols. In each subframe, the first symbol in every 128 symbols is a pilot symbol; in some specific applications, the bit width in the specific DSP implementation of the transceiver is 192 or 128. In order to facilitate hardware implementation, the number of symbols N in the superframe is F is an integer multiple of 192 and 128, but the number of symbols in each subframe is N S Not an integer multiple of 192 or 128.

[0671] Embodiment 2: The pre-framing symbol is obtained by OFEC encoding with a code redundancy of about 15.3%. The number of pre-framing symbols is 344064, and the pilot symbol interval is 128 symbols. The corresponding N SF 、N TS 、N PS 、N FAW 、N RES 、N S 、N F , OH and other parameters are shown in Table 86 below:

[0672] Table 86

[0673] <![CDATA[N SF ]]> <![CDATA[N PS ]]> <![CDATA[N S ]]> <![CDATA[N F ]]> OH <![CDATA[N FAW ]]> <![CDATA[N TS ]]> <![CDATA[N RES ]]> 12 226 28928 347136 0.89% 22 11 218

[0674] Fig.11 FIG. 2 is a schematic diagram of a second implementation of a superframe and a subframe in an embodiment of the present application. The superframe includes 12 subframes, each of which includes 28928 symbols. Fig.11 The first type of subframe is shown in (a). Fig.11 As shown in (b), there are 226 pilot symbols, 11 training symbols, 22 frame synchronization symbols, and 218 reserved symbols. In the existing 400G-ZR and 800G-ZR standards, the first subframe also contains 11 training symbols and 22 frame synchronization symbols, which is conducive to multiplexing. Fig.11 As shown in (c), there are also 226 pilot symbols and 11 training symbols. In each subframe, the first symbol in every 128 symbols is a pilot symbol; in some specific applications, the bit width in the specific DSP implementation of the transceiver is 192 or 128. In order to facilitate hardware implementation, the number of symbols N in the superframe is F is an integer multiple of 192 and 128, but the number of symbols in each subframe is N S Not an integer multiple of 192 or 128.

[0675] Embodiment 3: The pre-framing symbol is obtained by OFEC encoding with a code redundancy of about 15.3%. The number of pre-framing symbols is 516096, and the pilot symbol interval is 128 symbols. The corresponding N SF 、N TS 、N PS 、N FAW 、N RES 、N S 、N F , OH and other parameters are shown in Table 87 below:

[0676] Table 87

[0677] <![CDATA[N SF ]]> <![CDATA[N PS ]]> <![CDATA[N S ]]> <![CDATA[N F ]]> OH <![CDATA[N FAW ]]> <![CDATA[N TS ]]> <![CDATA[N RES ]]> 97 42 5376 521472 1.04% 22 11 310

[0678] Fig.12FIG. 1 is a schematic diagram of a third implementation of a superframe and a subframe in an embodiment of the present application. The superframe includes 97 subframes, and each subframe includes 5376 symbols, such as Fig.12 The first type of subframe is shown in (a). Fig.12 As shown in (b), there are 42 pilot symbols, 11 training symbols, 22 frame synchronization symbols, and 310 reserved symbols. In the existing 400G-ZR and 800G-ZR standards, the first subframe also contains 11 training symbols and 22 frame synchronization symbols, which is conducive to multiplexing. The second type of subframe is as follows Fig.12 As shown in (c), there are also 42 pilot symbols and 11 training symbols. In each subframe, the first symbol in every 128 symbols is a pilot symbol; in some specific applications, the bit width in the specific DSP implementation of the transceiver is 192 or 128. In order to facilitate hardware implementation, the number of symbols N in the superframe is F is an integer multiple of 192 and 128. Preferably, the number of symbols N in each subframe in the superframe S It is also an integer multiple of 192 and 128.

[0679] Embodiment 4: The pre-framing symbol is obtained by OFEC encoding with a code redundancy of about 15.3%. The number of pre-framing symbols is 688128, and the pilot symbol interval is 128 symbols. The corresponding N SF 、N TS 、N PS 、N FAW 、N RES 、N S 、N F , OH and other parameters are shown in Table 88 below:

[0680] Table 88

[0681] <![CDATA[N SF ]]> <![CDATA[N PS ]]> <![CDATA[N S ]]> <![CDATA[N F ]]> OH <![CDATA[N FAW ]]> <![CDATA[N TS ]]> <![CDATA[N RES ]]> 67 81 10368 694656 0.95% 22 10 476

[0682] Fig.13 FIG. 4 is a schematic diagram of a fourth implementation of a superframe and a subframe in an embodiment of the present application. The superframe includes 67 subframes, each of which includes 10368 symbols. Fig.13 The first type of subframe is shown in (a). Fig.13 As shown in (b), there are 81 pilot symbols, 10 training symbols, 22 frame synchronization symbols, and 476 reserved symbols. In the existing 400G-ZR and 800G-ZR standards, the first subframe also contains 22 frame synchronization symbols, which is conducive to multiplexing. The second type of subframe is as follows Fig.13As shown in (c), there are also 81 pilot symbols and 10 training symbols. In each subframe, the first symbol in every 128 symbols is a pilot symbol; in some specific applications, the bit width in the specific DSP implementation of the transceiver is 192 or 128. In order to facilitate hardware implementation, the number of symbols in the superframe N F is an integer multiple of 192 and 128. Preferably, the number of symbols N in each subframe in the superframe S It is also an integer multiple of 192 and 128.

[0683] Embodiment 5: The pre-framing symbol is obtained by OFEC encoding with a code redundancy of about 17.9%. The number of pre-framing symbols is 150528, and the pilot symbol interval is 128 symbols. The corresponding N SF 、N TS 、N PS 、N FAW 、N RES 、N S 、N F , OH and other parameters are shown in Table 89 below:

[0684] Table 89

[0685] <![CDATA[N SF ]]> <![CDATA[N PS ]]> <![CDATA[N S ]]> <![CDATA[N F ]]> OH <![CDATA[N FAW ]]> <![CDATA[N TS ]]> <![CDATA[N RES ]]> 22 54 6912 152064 1.02% 22 11 106

[0686] Fig.14 FIG. 5 is a schematic diagram of a fifth implementation of a superframe and a subframe in an embodiment of the present application. The superframe includes 22 subframes, each of which includes 6912 symbols. Fig.14 The first type of subframe is shown in (a). Fig.14 As shown in (b), there are 54 pilot symbols, 11 training symbols, 22 frame synchronization symbols, and 106 reserved symbols. In the existing 400G-ZR and 800G-ZR standards, the first subframe also contains 11 training symbols and 22 frame synchronization symbols, which is conducive to multiplexing. The second type of subframe is as follows Fig.14 As shown in (c), there are also 54 pilot symbols and 11 training symbols. Fig.14 In each subframe, the first symbol in every 128 symbols is a pilot symbol; in some specific applications, the bit width in the specific DSP implementation of the transceiver is 192 or 128. In order to facilitate hardware implementation, the number of symbols in the superframe is N. F is an integer multiple of 192 and 128. Preferably, the number of symbols N in each subframe in the superframe S It is also an integer multiple of 192 and 128.

[0687] Embodiment 6: The pre-framing symbol is obtained by OFEC encoding with a code redundancy of about 21.5%. The number of pre-framing symbols is 129024, and the pilot symbol interval is 128 symbols. The corresponding NSF 、N TS 、N PS 、N FAW 、N RES 、N S 、N F , OH and other parameters are shown in Table 90 below:

[0688] Table 90

[0689] <![CDATA[N SF ]]> <![CDATA[N PS ]]> <![CDATA[N S ]]> <![CDATA[N F ]]> OH <![CDATA[N FAW ]]> <![CDATA[N TS ]]> <![CDATA[N RES ]]> 34 30 3840 130560 1.19% 22 11 154

[0690] Fig.15 FIG. 6 is a schematic diagram of a sixth implementation of a superframe and a subframe in an embodiment of the present application. The superframe includes 34 subframes, each of which includes 3840 symbols. Fig.15 The first type of subframe is shown in (a). Fig.15 As shown in (b), there are 30 pilot symbols, 11 training symbols, 22 frame synchronization symbols, and 154 reserved symbols. In the existing 400G-ZR and 800G-ZR standards, the first subframe also contains 11 training symbols and 22 frame synchronization symbols, which is conducive to multiplexing. The second type of subframe is as follows Fig.15 As shown in (c), there are also 30 pilot symbols and 11 training symbols. In each subframe, the first symbol in every 128 symbols is a pilot symbol; in some specific applications, the bit width in the specific DSP implementation of the transceiver is 192 or 128. In order to facilitate hardware implementation, the number of symbols N in the superframe is F is an integer multiple of 192 and 128. Preferably, the number of symbols N in each subframe in the superframe S It is also an integer multiple of 192 and 128.

[0691] Embodiment 7: The pre-framing symbol is obtained by OFEC encoding with a code redundancy of about 27.0%. The number of pre-framing symbols is 107520, and the pilot symbol interval is 128 symbols. The corresponding N SF 、N TS 、N PS 、N FAW 、N RES 、N S 、N F , OH and other parameters are shown in Table 91 below:

[0692] Table 91

[0693] <![CDATA[N SF ]]> <![CDATA[N PS ]]> <![CDATA[N S ]]> <![CDATA[N F ]]> OH <![CDATA[N FAW ]]> <![CDATA[N TS ]]> <![CDATA[N RES ]]> 25 34 4352 108800 1.19% 22 11 158

[0694] Fig.16 FIG. 7 is a schematic diagram of a seventh implementation of a superframe and a subframe in an embodiment of the present application. The superframe includes 25 subframes, each of which includes 4352 symbols. Fig.16The first type of subframe is shown in (a). Fig.16 As shown in (b), there are 34 pilot symbols, 11 training symbols, 22 frame synchronization symbols, and 158 reserved symbols. In the existing 400G-ZR and 800G-ZR standards, the first subframe also contains 11 training symbols and 22 frame synchronization symbols, which is conducive to multiplexing. The first type of subframe is as follows Fig.16 As shown in (c), there are also 34 pilot symbols and 11 training symbols. In each subframe, the first symbol in every 128 symbols is a pilot symbol; the number of symbols in the superframe is N F and the number of symbols in each subframe N S Neither is an integer multiple of 192 or 128.

[0695] Embodiment 8: The pre-framing symbol is obtained by CFEC encoding with a code redundancy of about 15.3%. The number of pre-framing symbols is 175616, and the pilot symbol interval is 128 symbols. The corresponding N SF 、N TS 、N PS 、N FAW 、N RES 、N S 、N F , OH and other parameters are shown in Table 92 below:

[0696] Table 92

[0697] <![CDATA[N SF ]]> <![CDATA[N PS ]]> <![CDATA[N S ]]> <![CDATA[N F ]]> OH <![CDATA[N FAW ]]> <![CDATA[N TS ]]> <![CDATA[N RES ]]> 21 66 8448 177408 1.02% 22 11 174

[0698] Fig.17 FIG. 8 is a schematic diagram of an eighth implementation of a superframe and a subframe in an embodiment of the present application. The superframe includes 21 subframes, each of which includes 8448 symbols. Fig.17 The first type of subframe is shown in (a). Fig.17 As shown in (b), there are 66 pilot symbols, 11 training symbols, 22 frame synchronization symbols, and 174 reserved symbols. In the existing 400G-ZR and 800G-ZR standards, the first subframe also contains 11 training symbols and 22 frame synchronization symbols, which is conducive to multiplexing. The second type of subframe is as follows Fig.17 As shown in (c), there are also 66 pilot symbols and 11 training symbols. In each subframe, the first symbol in every 128 symbols is a pilot symbol; in some specific applications, the bit width in the specific DSP implementation of the transceiver is 192 or 128. In order to facilitate hardware implementation, the number of symbols in the superframe N F is an integer multiple of 192 and 128. Preferably, the number of symbols N in each subframe in the superframe S It is also an integer multiple of 192 and 128.

[0699] Embodiment 9: The pre-framing symbol is obtained by OFEC encoding with a code redundancy of about 15.3%. The number of pre-framing symbols is 172032, and the pilot symbol interval is 96 symbols. The corresponding N SF 、N TS 、N PS 、N FAW 、N RES 、N S 、N F , OH and other parameters are shown in Table 93 below:

[0700] Table 93

[0701] <![CDATA[N SF ]]> <![CDATA[N PS ]]> <![CDATA[N S ]]> <![CDATA[N F ]]> OH <![CDATA[N FAW ]]> <![CDATA[N TS ]]> <![CDATA[N RES ]]> 33 55 5280 174240 1.28% 22 10 74

[0702] Fig.18 FIG. 9 is a schematic diagram of a ninth implementation of a superframe and a subframe in an embodiment of the present application. The superframe includes 33 subframes, each of which includes 5280 symbols. Fig.18 The first type of subframe is shown in (a). Fig.18 As shown in (b), there are 55 pilot symbols, 10 training symbols, 22 frame synchronization symbols, and 74 reserved symbols. In the existing 400G-ZR and 800G-ZR standards, the first subframe also contains 22 frame synchronization symbols, which is conducive to multiplexing. The second type of subframe is as follows Fig.18 As shown in (c), there are also 55 pilot symbols and 10 training symbols. In each subframe, the first symbol in every 96 symbols is a pilot symbol; the number of symbols in the superframe is N F and the number of symbols in each subframe N S Neither is an integer multiple of 192 or 128.

[0703] Embodiment 10: The pre-framing symbol is obtained by OFEC encoding with a code redundancy of about 15.3%. The number of pre-framing symbols is 344064, and the pilot symbol interval is 96 symbols. The corresponding N SF 、N TS 、N PS 、N FAW 、N RES 、N S 、N F , OH and other parameters are shown in Table 94 below:

[0704] Table 94

[0705]

[0706]

[0707] Fig.19FIG. 1 is a schematic diagram of the tenth implementation of a superframe and a subframe in an embodiment of the present application. The superframe includes 24 subframes, each subframe includes 14496 symbols, such as Fig.19 The first type of subframe is shown in (a). Fig.19 As shown in (b) of FIG. 1 , there are 151 pilot symbols, 6 training symbols, 22 frame synchronization symbols, and 74 reserved symbols. In the existing 400G-ZR and 800G-ZR standards, the first subframe also contains 22 frame synchronization symbols, which is conducive to multiplexing. The second type of subframe is as follows Fig.19 As shown in (c), there are also 151 pilot symbols and 6 training symbols. In each subframe, the first symbol in every 96 symbols is a pilot symbol; in some specific applications, the bit width in the specific DSP implementation of the transceiver is 192 or 128. In order to facilitate hardware implementation, the number of symbols N in the superframe is F is an integer multiple of 192 and 128, but the number of symbols in each subframe is N S Not an integer multiple of 192 or 128.

[0708] Embodiment 11: The pre-framing symbol is obtained by OFEC encoding with a code redundancy of about 15.3%. The number of pre-framing symbols is 516096, and the pilot symbol interval is 96 symbols. The corresponding N SF 、N TS 、N PS 、N FAW 、N RES 、N S 、N F , OH and other parameters are shown in Table 95 below:

[0709] Table 95

[0710] <![CDATA[N SF ]]> <![CDATA[N PS ]]> <![CDATA[N S ]]> <![CDATA[N F ]]> OH <![CDATA[N FAW ]]> <![CDATA[N TS ]]> <![CDATA[N RES ]]> 40 136 13056 522240 1.19% 22 11 282

[0711] Fig. 20 FIG. 11 is a schematic diagram of the eleventh implementation of a superframe and a subframe in an embodiment of the present application. The superframe includes 40 subframes, each of which includes 13056 symbols. Fig. 20 The first type of subframe is shown in (a). Fig. 20 As shown in (b), there are 136 pilot symbols, 11 training symbols, 22 frame synchronization symbols, and 282 reserved symbols. In the existing 400G-ZR and 800G-ZR standards, the first subframe also contains 11 training symbols and 22 frame synchronization symbols, which is conducive to multiplexing. The second type of subframe is as follows Fig. 20As shown in (c), there are also 136 pilot symbols and 11 training symbols. In each subframe, the first symbol in every 96 symbols is a pilot symbol; in some specific applications, the bit width in the specific DSP implementation of the transceiver is 192 or 128. In order to facilitate hardware implementation, the number of symbols N in the superframe is F is an integer multiple of 192 and 128. Preferably, the number of symbols N in each subframe in the superframe S It is also an integer multiple of 192 and 128.

[0712] Embodiment 12: The pre-framing symbol is obtained by OFEC encoding with a code redundancy of about 15.3%. The number of pre-framing symbols is 688128, and the pilot symbol interval is 96 symbols. The corresponding N SF 、N TS 、N PS 、N FAW 、N RES 、N S 、N F , OH and other parameters are shown in Table 96 below:

[0713] Table 96

[0714] <![CDATA[N SF ]]> <![CDATA[N PS ]]> <![CDATA[N S ]]> <![CDATA[N F ]]> OH <![CDATA[N FAW ]]> <![CDATA[N TS ]]> <![CDATA[N RES ]]> 49 148 14208 696192 1.17% 22 11 300

[0715] Fig.21 FIG. 12 is a schematic diagram of a twelfth implementation of a superframe and a subframe in an embodiment of the present application. The superframe includes 49 subframes, each of which includes 14208 symbols. Fig.21 The first type of subframe is shown in (a). Fig.21 As shown in (b), there are 148 pilot symbols, 11 training symbols, 22 frame synchronization symbols, and 300 reserved symbols. In the existing 400G-ZR and 800G-ZR standards, the first subframe also contains 11 training symbols and 22 frame synchronization symbols, which is conducive to multiplexing. The first type of subframe is as follows Fig.21 As shown in (c), there are also 148 pilot symbols and 11 training symbols. In each subframe, the first symbol in every 96 symbols is a pilot symbol; in some specific applications, the bit width in the specific DSP implementation of the transceiver is 192 or 128. In order to facilitate hardware implementation, the number of symbols N in the superframe is F is an integer multiple of 192 and 128. Preferably, the number of symbols N in each subframe in the superframe S It is also an integer multiple of 192 and 128.

[0716] Embodiment 13: The pre-framing symbol is obtained by OFEC encoding with a code redundancy of about 17.9%. The number of pre-framing symbols is 150528, and the pilot symbol interval is 96 symbols. The corresponding N SF 、NTS 、N PS 、N FAW 、N RES 、N S 、N F , OH and other parameters are shown in Table 97 below:

[0717] Table 97

[0718]

[0719]

[0720] Fig. 22 FIG. 13 is a schematic diagram of the thirteenth implementation of the superframe and subframe in the embodiment of the present application. The superframe includes 23 subframes, each subframe includes 6624 symbols, such as Fig. 22 The first type of subframe is shown in (a). Fig. 22 As shown in (b), there are 69 pilot symbols, 6 training symbols, 22 frame synchronization symbols, and 100 reserved symbols. In the existing 400G-ZR and 800G-ZR standards, the first subframe also contains 22 frame synchronization symbols, which is conducive to multiplexing. The first type of subframe is as follows Fig. 22 As shown in (c), there are also 69 pilot symbols and 6 training symbols. In each subframe, the first symbol in every 96 symbols is a pilot symbol; the number of symbols in the superframe is N F and the number of symbols in each subframe N S Neither is an integer multiple of 192 or 128.

[0721] Embodiment 14: The pre-framing symbol is obtained by OFEC encoding with a code redundancy of about 21.5%. The number of pre-framing symbols is 129024, and the pilot symbol interval is 96 symbols. The corresponding N SF 、N TS 、N PS 、N FAW 、N RES 、N S 、N F , OH and other parameters are shown in Table 98 below:

[0722] Table 98

[0723] <![CDATA[N SF ]]> <![CDATA[N PS ]]> <![CDATA[N S ]]> <![CDATA[N F ]]> OH <![CDATA[N FAW ]]> <![CDATA[N TS ]]> <![CDATA[N RES ]]> 10 136 13056 130560 1.19% 22 11 54

[0724] Fig.23 FIG. 14 is a schematic diagram of the fourteenth implementation of the superframe and subframe in the embodiment of the present application. The superframe includes 10 subframes, each subframe includes 13056 symbols, such as Fig.23 The first type of subframe is shown in (a). Fig.23As shown in (b), there are 136 pilot symbols, 11 training symbols, 22 frame synchronization symbols, and 54 reserved symbols. In the existing 400G-ZR and 800G-ZR standards, the first subframe also contains 11 training symbols and 22 frame synchronization symbols, which is conducive to multiplexing. The second type of subframe is as follows Fig.23 As shown in (c), there are also 136 pilot symbols and 11 training symbols. In each subframe, the first symbol in every 96 symbols is a pilot symbol; in some specific applications, the bit width in the specific DSP implementation of the transceiver is 192 or 128. In order to facilitate hardware implementation, the number of symbols N in the superframe is F is an integer multiple of 192 and 128. Preferably, the number of symbols N in each subframe in the superframe S It is also an integer multiple of 192 and 128.

[0725] Embodiment 15: The pre-framing symbol is obtained by OFEC encoding with a code redundancy of about 27.0%. The number of pre-framing symbols is 107520, and the pilot symbol interval is 96 symbols. The corresponding N SF 、N TS 、N PS 、N FAW 、N RES 、N S 、N F , OH and other parameters are shown in Table 99 below:

[0726] Table 99

[0727] <![CDATA[N SF ]]> <![CDATA[N PS ]]> <![CDATA[N S ]]> <![CDATA[N F ]]> OH <![CDATA[N FAW ]]> <![CDATA[N TS ]]> <![CDATA[N RES ]]> 16 71 6816 109056 1.43% 22 10 234

[0728] Fig.24 FIG. 15 is a schematic diagram of a fifteenth implementation of a superframe and a subframe in an embodiment of the present application. The superframe includes 16 subframes, and each subframe includes 6816 symbols, such as Fig.24 The first type of subframe is shown in (a). Fig.24 As shown in (b), there are 71 pilot symbols, 10 training symbols, 22 frame synchronization symbols, and 234 reserved symbols. In the existing 400G-ZR and 800G-ZR standards, the first subframe also contains 22 frame synchronization symbols, which is conducive to multiplexing. The first type of subframe is as follows Fig.24 As shown in (c), there are also 71 pilot symbols and 10 training symbols. In each subframe, the first symbol in every 96 symbols is a pilot symbol; in some specific applications, the bit width in the specific DSP implementation of the transceiver is 192 or 128. In order to facilitate hardware implementation, the number of symbols N in the superframe is F is an integer multiple of 192 and 128, but the number of symbols in each subframe is N S Not an integer multiple of 192 or 128.

[0729] Embodiment 16: The pre-framing symbol is obtained by CFEC encoding with a code redundancy of about 15.2%. The number of pre-framing symbols is 175616, and the pilot symbol interval is 96 symbols. The corresponding N SF 、N TS 、N PS 、N FAW 、N RES 、N S 、N F , OH and other parameters are shown in Table 100 below:

[0730] Table 100

[0731] <![CDATA[N SF ]]> <![CDATA[N PS ]]> <![CDATA[N S ]]> <![CDATA[N F ]]> OH <![CDATA[N FAW ]]> <![CDATA[N TS ]]> <![CDATA[N RES ]]> 58 32 3072 178176 1.46% 22 11 102

[0732] Fig.25 Schematic diagram of the sixteenth implementation of the superframe and subframe in the embodiment of the present application. The superframe includes 58 subframes, each subframe includes 3072 symbols, such as Fig.25 The first type of subframe is shown in (a). Fig.25 As shown in (b), there are 32 pilot symbols, 11 training symbols, 22 frame synchronization symbols, and 102 reserved symbols. In the existing 400G-ZR and 800G-ZR standards, the first subframe also contains 11 training symbols and 22 frame synchronization symbols, which is conducive to multiplexing. The first type of subframe is as follows Fig.25 As shown in (c), there are also 32 pilot symbols and 11 training symbols. In each subframe, the first symbol in every 96 symbols is a pilot symbol. In some specific applications, the bit width in the specific DSP implementation of the transceiver is 192 or 128. In order to facilitate hardware implementation, the number of symbols N in the superframe is F is an integer multiple of 192 and 128. Preferably, the number of symbols N in each subframe in the superframe S It is also an integer multiple of 192 and 128.

[0733] Fig.26 FIG. 1 is a schematic diagram of the structure of a data transmission device applied to a transmitting end in an embodiment of the present application. Fig.26As shown, the data transmission device includes: a processing unit 201 and a sending unit 202. The processing unit 201 is used to perform the operation of the above step 101, and the sending unit 202 is used to perform the operation of the above step 102. It should be understood that the data transmission device provided in the embodiment of the present application can also be implemented in other ways. For example, the unit division in the above device is only a logical function division, and there may be other division methods in actual implementation, for example, multiple units or components can be combined or integrated into another system. In addition, each functional unit in each embodiment of the present application can be integrated in a processing unit, or it can be each independent physical unit, or it can be two or more functional units integrated in a processing unit. The above-mentioned integrated unit can be implemented in the form of hardware or in the form of software functional units.

[0734] Fig. 27 FIG. 1 is a schematic diagram of the structure of a data transmission device applied to a receiving end in an embodiment of the present application. Fig. 27 As shown, the data transmission device includes: a receiving unit 301 and a processing unit 302. The receiving unit 301 is used to perform the operation of the above step 102, and the processing unit 302 is used to perform the operation of the above step 103. It should be understood that the data transmission device provided in the embodiment of the present application can also be implemented in other ways. For example, the unit division in the above device is only a logical function division, and there may be other division methods in actual implementation, for example, multiple units or components can be combined or integrated into another system. In addition, each functional unit in each embodiment of the present application can be integrated in a processing unit, or it can be each independent physical unit, or it can be two or more functional units integrated in a processing unit. The above-mentioned integrated unit can be implemented in the form of hardware or in the form of software functional units.

[0735] Fig.28 FIG. 2 is another structural diagram of a data transmission device in an embodiment of the present application. The data transmission device can be applied to a transmitting end or a receiving end. Fig.28 As shown, the data transmission device includes a processor 401 and a transceiver 402. The processor 401 and the transceiver 402 are connected to each other through a line. Specifically, the transceiver 402 is used to perform data transmission and reception operations, and the processor 401 is used to perform other operations except data transmission and reception. In a possible implementation, the processor 401 may include the above Fig.26 The processing unit 201 and the transceiver 402 shown include the above Fig.26 In another possible implementation, the processor 401 may include the above Fig. 27 The processing unit 301 and the transceiver 402 shown include the above Fig. 27The receiving unit 301 is shown. Optionally, the data transmission device may further include a memory 403, wherein the memory 403 is used to store program instructions and data.

[0736] The embodiment of the present application also provides a chip. The chip integrates a circuit and one or more interfaces for implementing the functions of the above-mentioned processor 401. When the chip integrates a memory, the chip can complete the method steps of any one or more embodiments in the above-mentioned embodiments. When the chip does not integrate a memory, it can be connected to an external memory through an interface. The chip implements the actions performed by the sending end device or the receiving end device in the above-mentioned embodiment according to the program code stored in the external memory.

[0737] Finally, it should be noted that the above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art who is familiar with the present technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims

1. A data transmission method, characterized in that: include: Obtain a superframe including a plurality of subframes, wherein the subframe includes training symbols and pilot symbols, wherein in one polarization direction, the number of the training symbols in the subframe is N TS , the number of pilot symbols in the subframe is N PS , N TS and N PS are all integers greater than 1, N TS +N PS is an odd number, N TS +N PS greater than or equal to 5, there is a symbol in the subframe that is both a training symbol and a pilot symbol, each of the training symbols and each of the pilot symbols is one of four complex numbers -A-Aj, -A+Aj, A-Aj and A+Aj, A is a real number, and each consecutive N in the subframe PG The N symbols include a pilot symbol located at a fixed position. PG 96 or 128; The superframe is transmitted.

2. The method according to claim 1, characterized in that In a subframe, a training symbol sequence including multiple training symbols in a first polarization direction is different from a training symbol sequence including multiple training symbols in a second polarization direction, a pilot symbol sequence including multiple pilot symbols in the first polarization direction is different from a pilot symbol sequence including multiple pilot symbols in the second polarization direction, and the first polarization direction is orthogonal to the second polarization direction.

3. The method according to claim 1 or 2, characterized in that: In one subframe, a total of N including all training symbols and all pilot symbols in one polarization direction TS +N PS The sum of the real parts of the N symbols is 0, including all training symbols and all pilot symbols in one polarization direction. TS +N PS The sum of the imaginary parts of -1 symbols is 0.

4. The method according to any one of claims 1 to 3, characterized in that In one subframe, a total of N including all training symbols and all pilot symbols in one polarization direction TS +N PS The difference between the number of symbols with the values ​​of -A-Aj, -A+Aj, A-Aj and A+Aj in -1 symbols is less than or equal to 2.

5. The method according to any one of claims 1 to 4, characterized in that In a subframe, the number of training symbols and pilot symbols that are -A-Aj in two polarization directions, the number of training symbols and pilot symbols that are -A+Aj in two polarization directions, the number of training symbols and pilot symbols that are A-Aj in two polarization directions, and the number of training symbols and pilot symbols that are A+Aj in two polarization directions are the same, and the two polarization directions are orthogonal to each other.

6. The method according to any one of claims 1 to 5, characterized in that In one subframe, N TS Continuous training symbols are arranged starting from the beginning of the subframe.

7. The method according to claim 6, characterized in that N TS The symbol at the starting position among the consecutive training symbols is both a training symbol and a pilot symbol.

8. The method according to any one of claims 1 to 7, characterized in that The subframe arranged at the first position in the superframe is a first-type subframe, and the first-type subframe also includes a frame synchronization symbol, a reserved symbol and a pre-framing symbol, each frame synchronization symbol is -A FAW -A FAW j, -A FAW +A FAW j. A FAW -A FAW j and A FAW +A FAW j is one of the four plural forms, A FAW is a real number. In the first type of subframe, the training symbol is located before the frame synchronization symbol, the frame synchronization symbol is located before the reserved symbol, and the reserved symbol is located before the pre-framing symbol.

9. The method according to claim 8, characterized in that A=A FAW 。 10. The method according to any one of claims 1 to 9, characterized in that The superframe includes at least one second-type subframe, the second-type subframe also includes a pre-framing symbol, and in the second-type subframe, the training symbol is located before the pre-framing symbol.

11. The method according to any one of claims 8 to 10, characterized in that The number of pre-framing symbols in the superframe is N CW , the number of all symbols in the superframe is N F , N PG 、N CW and N F The corresponding relationship between them is one of the following items: N PG =128, N CW =172032,N F =173440 or 173568 or 173696 or 173824 or 173952 or 174080; N PG =128,N CW =344064,N F =346880 or 347136 or 347392 or 347520 or 347648 or 347776 or 347904 or 348160; N PG =128, N CW =516096,N F =520192 or 520320 or 520448 or 520576 or 520704 or 520832 or 520960 or 521088 or 521472 or 521600 or 521856 or 522240; N PG =128,N CW =688128,N F =693760 or 693888 or 694144 or 694272 or 694400 or 694656 or 694784 or 694912 or 695040 or 695296 or 695552 or 695808 or 696192 or 696320; N PG =128,N CW =150528,N F =152064 or 152192 or 152320; N PG =128,N CW =129024,N F =130048 or 130176 or 130560; N PG =128,N CW =107520,N F =108416 or 108544 or 108672 or 108800; N PG =128, N CW =175616,N F =177152 or 177280 or 177408 or 177536 or 177664; N PG =128,N CW =351232,N F =354304 or 354432 or 354560 or 354688 or 354816 or 354944 or 355072 or 355200 or 355328; N PG =128, N CW =526848,N F =531200 or 531456 or 531712 or 531840 or 532224 or 532480 or 532608 or 532864 or 532992 or 533120; N PG =128, N CW =702464,N F =708096 or 708224 or 708480 or 708608 or 708736 or 708864 or 708992 or 709120 or 709376 or 709504 or 709632 or 709888 or 710016 or 710144 or 710272 or 710400 or 710528 or 710656; N PG =96, N CW =172032,N F =173952 or 174048 or 174240 or 174336 or 174432 or 174528; N PG =96, N CW =344064,N F =347904 or 348000 or 348096 or 348192 or 348384 or 348480 or 348672 or 348768 or 348864 or 349056; N PG =96, N CW =516096,N F =521664 or 521856 or 522144 or 522240 or 522720 or 522816 or 523008 or 523200 or 523296 or 523392 or 523488 or 523584 or 523776; N PG =96, N CW =688128,N F =695520 or 695808 or 695904 or 696000 or 696192 or 696384 or 696672 or 696768 or 696864 or 696960 or 697056 or 697248 or 697344 or 697536 or 697632 or 697728 or 698112 or 698400; N PG =96, N CW =150528,N F =152160 or 152256 or 152352 or 152448 or 152544 or 152640 or 152736; N PG =96, N CW =129024,N F =130464 or 130560 or 130752 or 130848 or 130944; N PG =96, N CW =107520,N F =108672 or 108768 or 108864 or 108960 or 109056; N PG =96, N CW =175616,N F =177504 or 177600 or 177888 or 177984 or 178080 or 178176; N PG =96, N CW =351232,N F =355008 or 355104 or 355200 or 355488 or 355680 or 355776 or 355872 or 355968 or 356160 or 356352 or 356448; N PG =96, N CW =526848,N F =532416 or 532512 or 532608 or 532704 or 532800 or 532896 or 532992 or 533280 or 533376 or 533568 or 533664 or 533760 or 533856 or 533952 or 534144 or 534240 or 534336 or 534432 or 534528; N PG =96, N CW =702464,N F =709920 or 710016 or 710112 or 710208 or 710304 or 710400 or 710688 or 710784 or 710976 or 711168 or 711264 or 711360 or 711552 or 711648 or 711744 or 711936 or 712320 or 712416 or 712704 or 712800 or 712896.

12. The method according to any one of claims 1 to 11, characterized in that In one polarization direction, the modulation format of the symbols in the superframe is quadrature phase shift keying QPSK, A=-1 or 1; Alternatively, in one polarization direction, the modulation format of the symbols in the superframe is 16QAM, A=-1, 1, -3, 3, -√5 or √5; Alternatively, in one polarization direction, the modulation format of the symbols in the superframe is 64QAM, A=-1, 1, -3, 3, -√21, √21, -5, 5, -7 or 7.

13. A data transmission method, characterized in that: include: A superframe including a plurality of subframes is received, wherein the subframe includes training symbols and pilot symbols, wherein in one polarization direction, the number of the training symbols in the subframe is N TS , the number of pilot symbols in the subframe is N PS , N TS and N PS are all integers greater than 1, N TS +N PS is an odd number, N TS +N PS is greater than or equal to 5, one symbol in the subframe is both a training symbol and a pilot symbol, each of the training symbols and each of the pilot symbols is one of four complex numbers -A-Aj, -A+Aj, A-Aj and A+Aj, A is a real number, and every consecutive 96 or 128 symbols in the subframe include a pilot symbol located at a fixed position; The superframe is decoded.

14. The method according to claim 13, characterized in that In one subframe, N TS Continuous training symbols are arranged starting from the beginning of the subframe.

15. The method according to claim 14, characterized in that N TS The symbol at the starting position among the consecutive training symbols is both a training symbol and a pilot symbol.

16. A chip, characterized in that: The chip includes a processor and a memory, wherein the memory and the processor are connected to each other via a line, instructions are stored in the memory, and the processor is used to execute the method according to any one of claims 1 to 15.

17. A data transmission device applied to a transmitting end, characterized in that: include: A processing unit and a sending unit; The processing unit is used to: obtain a superframe including a plurality of subframes, wherein the subframe includes training symbols and pilot symbols, wherein in one polarization direction, the number of the training symbols in the subframe is N TS , the number of pilot symbols in the subframe is N PS , N TS and N PS are all integers greater than 1, N TS +N PS is an odd number, N TS +N PS is greater than or equal to 5, one symbol in the subframe is both a training symbol and a pilot symbol, each of the training symbols and each of the pilot symbols is one of four complex numbers -A-Aj, -A+Aj, A-Aj and A+Aj, A is a real number, and every consecutive 96 or 128 symbols in the subframe include a pilot symbol located at a fixed position; The sending unit is used to send the superframe.

18. The data transmission device according to claim 17, characterized in that: In a subframe, a training symbol sequence including multiple training symbols in a first polarization direction is different from a training symbol sequence including multiple training symbols in a second polarization direction, a pilot symbol sequence including multiple pilot symbols in the first polarization direction is different from a pilot symbol sequence including multiple pilot symbols in the second polarization direction, and the first polarization direction is orthogonal to the second polarization direction.

19. The data transmission device according to claim 17 or 18, characterized in that: In one subframe, a total of N including all training symbols and all pilot symbols in one polarization direction TS +N PS The sum of the real parts of the N symbols is 0, including all training symbols and all pilot symbols in one polarization direction. TS +N PS The sum of the imaginary parts of -1 symbols is 0.

20. The data transmission device according to any one of claims 17 to 19, characterized in that: In one subframe, a total of N including all training symbols and all pilot symbols in one polarization direction TS +N PS The difference between the number of symbols with the values ​​of -A-Aj, -A+Aj, A-Aj and A+Aj in -1 symbols is less than or equal to 2.

21. The data transmission device according to any one of claims 17 to 20, characterized in that: In a subframe, the number of training symbols and pilot symbols that are -A-Aj in two polarization directions, the number of training symbols and pilot symbols that are -A+Aj in two polarization directions, the number of training symbols and pilot symbols that are A-Aj in two polarization directions, and the number of training symbols and pilot symbols that are A+Aj in two polarization directions are the same, and the two polarization directions are orthogonal to each other.

22. The data transmission device according to any one of claims 17 to 21, characterized in that: In one subframe, N TS Continuous training symbols are arranged starting from the beginning of the subframe.

23. The data transmission device according to claim 22, characterized in that: N TS The symbol at the starting position among the consecutive training symbols is both a training symbol and a pilot symbol.

24. The data transmission device according to any one of claims 17 to 23, characterized in that: The subframe arranged at the first position in the superframe is a first-type subframe, and the first-type subframe also includes a frame synchronization symbol, a reserved symbol and a pre-framing symbol, each frame synchronization symbol is -A FAW -A FAW j, -A FAW +A FAW j. A FAW -A FAW j and A FAW +A FAW j is one of the four plural forms, A FAW is a real number. In the first type of subframe, the training symbol is located before the frame synchronization symbol, the frame synchronization symbol is located before the reserved symbol, and the reserved symbol is located before the pre-framing symbol.

25. The data transmission device according to claim 24, characterized in that: A=A FAW 。 26. The data transmission device according to any one of claims 17 to 25, characterized in that: The superframe includes at least one second-type subframe, the second-type subframe also includes a pre-framing symbol, and in the second-type subframe, the training symbol is located before the pre-framing symbol.

27. The data transmission device according to any one of claims 24 to 26, characterized in that: The number of pre-framing symbols in the superframe is N CW , the number of all symbols in the superframe is N F , N PG 、N CW and N F The corresponding relationship between them is one of the following items: N PG =128, N CW =172032,N F =173440 or 173568 or 173696 or 173824 or 173952 or 174080; N PG =128,N CW =344064,N F =346880 or 347136 or 347392 or 347520 or 347648 or 347776 or 347904 or 348160; N PG =128, N CW =516096,N F =520192 or 520320 or 520448 or 520576 or 520704 or 520832 or 520960 or 521088 or 521472 or 521600 or 521856 or 522240; N PG =128,N CW =688128,N F =693760 or 693888 or 694144 or 694272 or 694400 or 694656 or 694784 or 694912 or 695040 or 695296 or 695552 or 695808 or 696192 or 696320; N PG =128,N CW =150528,N F =152064 or 152192 or 152320; N PG =128,N CW =129024,N F =130048 or 130176 or 130560; N PG =128,N CW =107520,N F =108416 or 108544 or 108672 or 108800; N PG =128,N CW =175616,N F =177152 or 177280 or 177408 or 177536 or 177664; N PG =128, N CW =351232,N F =354304 or 354432 or 354560 or 354688 or 354816 or 354944 or 355072 or 355200 or 355328; N PG =128,N CW =526848,N F =531200 or 531456 or 531712 or 531840 or 532224 or 532480 or 532608 or 532864 or 532992 or 533120; N PG =128,N CW =702464,N F =708096 or 708224 or 708480 or 708608 or 708736 or 708864 or 708992 or 709120 or 709376 or 709504 or 709632 or 709888 or 710016 or 710144 or 710272 or 710400 or 710528 or 710656; N PG =96, N CW =172032,N F =173952 or 174048 or 174240 or 174336 or 174432 or 174528; N PG =96, N CW =344064,N F =347904 or 348000 or 348096 or 348192 or 348384 or 348480 or 348672 or 348768 or 348864 or 349056; N PG =96, N CW =516096,N F =521664 or 521856 or 522144 or 522240 or 522720 or 522816 or 523008 or 523200 or 523296 or 523392 or 523488 or 523584 or 523776; N PG =96, N CW =688128,N F =695520 or 695808 or 695904 or 696000 or 696192 or 696384 or 696672 or 696768 or 696864 or 696960 or 697056 or 697248 or 697344 or 697536 or 697632 or 697728 or 698112 or 698400; N PG =96, N CW =150528,N F =152160 or 152256 or 152352 or 152448 or 152544 or 152640 or 152736; N PG =96, N CW =129024,N F =130464 or 130560 or 130752 or 130848 or 130944; N PG =96, N CW =107520,N F =108672 or 108768 or 108864 or 108960 or 109056; N PG =96, N CW =175616,N F =177504 or 177600 or 177888 or 177984 or 178080 or 178176; N PG =96, N CW =351232,N F =355008 or 355104 or 355200 or 355488 or 355680 or 355776 or 355872 or 355968 or 356160 or 356352 or 356448; N PG =96, N CW =526848,N F =532416 or 532512 or 532608 or 532704 or 532800 or 532896 or 532992 or 533280 or 533376 or 533568 or 533664 or 533760 or 533856 or 533952 or 534144 or 534240 or 534336 or 534432 or 534528; N PG =96, N CW =702464,N F =709920 or 710016 or 710112 or 710208 or 710304 or 710400 or 710688 or 710784 or 710976 or 711168 or 711264 or 711360 or 711552 or 711648 or 711744 or 711936 or 712320 or 712416 or 712704 or 712800 or 712896.

28. The data transmission device according to any one of claims 17 to 27, characterized in that: In one polarization direction, the modulation format of the symbols in the superframe is quadrature phase shift keying QPSK, A=-1 or 1; Alternatively, in one polarization direction, the modulation format of the symbols in the superframe is 16QAM, A=-1, 1, -3, 3, -√5 or √5; Alternatively, in one polarization direction, the modulation format of the symbols in the superframe is 64QAM, A=-1, 1, -3, 3, -√21, √21, -5, 5, -7 or 7.

29. A data transmission device applied to a receiving end, characterized in that: include: a receiving unit and a processing unit; The receiving unit is used to: receive a superframe including a plurality of subframes, wherein the subframe includes training symbols and pilot symbols, wherein in one polarization direction, the number of the training symbols in the subframe is N TS , the number of pilot symbols in the subframe is N PS , N TS and N PS are all integers greater than 1, N TS +N PS is an odd number, N TS +N PS is greater than or equal to 5, one symbol in the subframe is both a training symbol and a pilot symbol, each of the training symbols and each of the pilot symbols is one of four complex numbers -A-Aj, -A+Aj, A-Aj and A+Aj, A is a real number, and every consecutive 96 or 128 symbols in the subframe include a pilot symbol located at a fixed position; The processing unit is used for decoding the super frame.

30. The data transmission device according to claim 29, characterized in that: In one subframe, N TS Continuous training symbols are arranged starting from the beginning of the subframe.

31. The data transmission device according to claim 30, characterized in that: N TS The symbol at the starting position among the consecutive training symbols is both a training symbol and a pilot symbol.

32. A data transmission system, characterized in that: include: A data transmission device applied to a transmitting end as claimed in any one of claims 17 to 28 and a data transmission device applied to a receiving end as claimed in any one of claims 29 to 31.

Citation Information

Cited By

  • Data transmission method and related apparatus

    EP4773530A1

  • Data transmission method and related apparatus

    WO2025066220A1

  • Data transmission method and apparatus, and system

    WO2026056372A1