Automatic testing method and device, readable storage medium and electronic equipment

Abstract

The application discloses an automatic testing method and device, a readable storage medium and an electronic device. A first random number is generated through a random function, and a test sequence with the first random number as a sequence length is generated based on the random function, so that the randomness of the test sequence is improved, the test coverage of target simulation software is improved, and manual setting of simulation variables is avoided, thereby effectively improving the test efficiency. In addition, when the target simulation software runs incorrectly, the error sequence is determined and saved by checking the error of the pending test sequence, data recording and summary analysis of the software are realized, subsequent modification and upgrading of the target simulation software are facilitated, and the development efficiency of the target simulation software is improved.

Description

Technical Field

[0001] This invention relates to the field of memory technology, and more particularly to an automatic testing method, apparatus, readable storage medium, and electronic device. Background Technology

[0002] SD (Secure Digital) cards are a new generation of memory devices based on semiconductor flash memory. During factory testing of SD cards, simulation software is typically used to test the FTL (Flash Translation Layer) code to determine if errors exist, thus reducing the time spent on repeated card opening tests. However, using this simulation software requires manually setting corresponding simulation variables, resulting in insufficient test coverage of the SD card. Furthermore, this simulation software lacks data recording and summarization functions. Because the test sequences that trigger errors in the simulation software are long and generate large amounts of data, manually checking the test sequences to locate and correct errors in the simulation software cannot be done in a timely manner, leading to low testing efficiency. Summary of the Invention

[0003] The technical problem to be solved by the present invention is to provide an automatic testing method, apparatus, readable storage medium and electronic device to improve the test coverage of SD cards by simulation software and improve testing efficiency.

[0004] To solve the above-mentioned technical problems, the present invention adopts the following technical solution:

[0005] An automated testing method includes the following steps:

[0006] The first random number is obtained according to the preset random function;

[0007] A test sequence with the first random number as the sequence length is generated using the random function;

[0008] The target simulation software is triggered to run tests according to the test sequence;

[0009] If an error is detected in the target simulation software, the pending test sequence at the time of the error is checked to obtain an error sequence, which is a subset of the pending test sequence.

[0010] Save the error sequence to complete the test.

[0011] To solve the above-mentioned technical problems, another technical solution adopted by the present invention is as follows:

[0012] An automatic testing device, comprising:

[0013] The acquisition module is used to obtain a first random number based on a preset random function;

[0014] A generation module is used to generate a test sequence with the first random number as the sequence length through the random function;

[0015] The triggering module is used to trigger the target simulation software to run tests according to the test sequence;

[0016] The positioning module is used to perform error investigation on the pending test sequence when the target simulation software is detected to obtain an error sequence, wherein the error sequence is a subset of the pending test sequence;

[0017] The recording module is used to save the error sequence and complete the test.

[0018] To solve the above-mentioned technical problems, another technical solution adopted by the present invention is as follows:

[0019] A computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the steps of the aforementioned automatic testing method.

[0020] To solve the above-mentioned technical problems, another technical solution adopted by the present invention is as follows:

[0021] An electronic device includes a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the steps of the aforementioned automatic testing method.

[0022] The beneficial effects of this invention are as follows: By generating a first random number through a random function, and simultaneously generating a test sequence with the first random number as its length based on the random function, the randomness of the test sequence is improved, thereby increasing the test coverage of the target simulation software. Furthermore, it avoids manually setting simulation variables, effectively improving testing efficiency. In addition, when the target simulation software encounters errors, by troubleshooting the pending test sequences that result in errors, the error sequences are identified and saved, enabling data recording and summary analysis of the software. This facilitates subsequent modifications and upgrades to the target simulation software, improving its development efficiency. Attached Figure Description

[0023] Figure 1 A flowchart illustrating the steps of an automatic testing method provided in an embodiment of the present invention;

[0024] Figure 2 A flowchart of a program for generating a test sequence is provided in an embodiment of the present invention;

[0025] Figure 3 A flowchart of a procedure for locating an error sequence is provided in an embodiment of the present invention;

[0026] Figure 4 This is a schematic diagram of the structure of an automatic testing device provided in an embodiment of the present invention;

[0027] Figure 5 This is a schematic diagram of the structure of an electronic device provided in an embodiment of the present invention;

[0028] Label Explanation:

[0029] 200. An automatic testing device; 201. Acquisition module; 202. Generation module; 203. Triggering module; 204. Positioning module; 205. Recording module; 300. An electronic device; 301. Memory; 302. Processor. Detailed Implementation

[0030] To explain in detail the technical content, objectives, and effects of the present invention, the following description is provided in conjunction with the embodiments and accompanying drawings.

[0031] Please refer to Figure 1 An automatic testing method provided in this embodiment of the invention includes the following steps:

[0032] The first random number is obtained according to the preset random function;

[0033] A test sequence with the first random number as the sequence length is generated using the random function;

[0034] The target simulation software is triggered to run tests according to the test sequence;

[0035] If an error is detected in the target simulation software, the pending test sequence at the time of the error is checked to obtain an error sequence, which is a subset of the pending test sequence.

[0036] Save the error sequence to complete the test.

[0037] As described above, the beneficial effects of this invention are as follows: By generating a first random number using a random function, and simultaneously generating a test sequence with the first random number as its length, the randomness of the test sequence is improved, thereby increasing the test coverage of the target simulation software. Furthermore, it avoids manually setting simulation variables, effectively improving testing efficiency. In addition, when the target simulation software encounters errors, by troubleshooting the pending test sequences that result in errors, the error sequences are identified and saved, enabling data recording and summary analysis of the software. This facilitates subsequent modifications and upgrades to the target simulation software, improving its development efficiency.

[0038] Furthermore, the step of troubleshooting the pending test sequences when runtime errors occur yields error sequences including:

[0039] The undetermined test sequence is divided into corresponding undetermined test subsequences using a binary search method, and the undetermined test subsequences are sequentially written into the target simulation software for testing.

[0040] If an error is detected in the target simulation software, the shortest pending test subsequence that triggered the error is marked as an error sequence.

[0041] As described above, the binary search method can quickly find the corresponding error sequence from the undetermined test sequence that has errors, thereby saving error troubleshooting time and improving the efficiency of software analysis and summarization.

[0042] Furthermore, the step of troubleshooting the pending test sequence when an error occurs, to obtain the error sequence, also includes:

[0043] If the undetermined test subsequence with a sequence element count of 1 still does not trigger the target simulation software running error, then the undetermined test sequence will be checked for errors in turn to obtain the error sequence.

[0044] As described above, if the undetermined test subsequence with a sequence element count of 1 obtained by the bisection method still does not trigger the target simulation software running error, it means that the corresponding error sequence cannot be found by the bisection method. In this case, the undetermined test sequence is checked in turn to improve the accuracy of error location.

[0045] Furthermore, the step of sequentially performing error checks on the undetermined test sequence to obtain the following error sequences:

[0046] The undetermined test sequence is divided into multiple subsequences with the number of sequence elements increasing sequentially according to the current sequence order;

[0047] Each first subsequence is written into the target simulation software one by one in the test order of increasing sequence element count. Each time a first subsequence is written, a test is triggered until an error is detected in the target simulation software. The first subsequence is then identified as the initial error sequence.

[0048] Errors are identified by performing error investigation based on the initial error sequence, resulting in an error sequence.

[0049] As described above, the undetermined test sequence is divided into a first subsequence with an increasing number of sequence elements, and written into the target simulation software for execution in sequence. When the target simulation software encounters an error, it indicates that the current first subsequence is the first segment in the undetermined test sequence that caused the software to malfunction. Thus, the current first subsequence is determined as the initial error sequence. This method obtains a shorter undetermined test sequence, thereby reducing the number of errors to be identified, ensuring the accuracy of error localization, and improving the accuracy of software summary analysis.

[0050] Furthermore, the step of performing error investigation based on the initial error sequence to obtain the error sequence includes:

[0051] The first element of the initial erroneous sequence is discarded one by one according to the sequence order to obtain a second subsequence with the number of elements in multiple segments decreasing sequentially.

[0052] Each second subsequence is written into the target simulation software one by one in descending order of the sequence elements. Each time a second subsequence is written, a test is triggered until the target simulation software is detected to be running normally. The second subsequence that triggers the target simulation software to run normally is determined as the target sequence.

[0053] The second subsequence in the test sequence that precedes the target sequence is marked as an error sequence.

[0054] As described above, the initial error sequence is shortened sequentially from beginning to end to obtain a second subsequence with progressively decreasing sequence elements. These subsequences are then written into the target simulation software for execution until the software runs normally. This indicates that the current second subsequence is not an error sequence. Since the second subsequence is tested by decreasing the number of sequence elements, the second subsequence before the target simulation software runs normally is the shortest error sequence in the initial error sequence. This method locates the shortest error sequence, achieving precise error sequence localization and improving the accuracy of error analysis.

[0055] Furthermore, obtaining the first random number according to the preset random function includes:

[0056] Get the maximum length parameter of the test sequence;

[0057] Using the maximum length parameter as the input parameter of the random function, a first random number corresponding to the maximum length parameter is generated.

[0058] As described above, a first random number corresponding to the maximum length parameter is generated by a random function to improve the randomness of the test sequence length while ensuring the validity of the test sequence.

[0059] Further, generating a test sequence with the first random number as the sequence length using the random function includes:

[0060] Obtain the parameter range of the test sequence;

[0061] Using the parameter range as the input parameter of the random function, a plurality of second random numbers corresponding to the parameter range are generated;

[0062] Obtain a preset sequence structure and set the length of the sequence structure to the first random number;

[0063] The multiple second random numbers are written into the sequence variables corresponding to the sequence structure to obtain the test sequence.

[0064] As described above, the sequence length and sequence variables of the random sequence are both generated by a random function, which effectively improves the randomness of the random sequence and thus ensures the test coverage.

[0065] Furthermore, before performing error troubleshooting on the pending test sequence when an error occurs, and obtaining the error sequence, the process also includes:

[0066] The test sequence is repeated a preset number of times to trigger the target simulation software to run the test;

[0067] If the target simulation software still detects an error, the pending test sequence at the time of the error is checked to obtain the error sequence.

[0068] As described above, by repeatedly triggering the target simulation software to run tests, it is possible to confirm whether the simulation software has an accidental error or a real error, thus avoiding ineffective error localization.

[0069] Please refer to Figure 4 Another embodiment of the present invention provides an automatic testing device, comprising:

[0070] The acquisition module is used to obtain a first random number based on a preset random function;

[0071] A generation module is used to generate a test sequence with the first random number as the sequence length through the random function;

[0072] The triggering module is used to trigger the target simulation software to run tests according to the test sequence;

[0073] The positioning module is used to perform error investigation on the pending test sequence when the target simulation software is detected to obtain an error sequence, wherein the error sequence is a subset of the pending test sequence;

[0074] The recording module is used to save the error sequence and complete the test.

[0075] As described above, the beneficial effects of this invention are as follows: By generating a first random number using a random function, and simultaneously generating a test sequence with the first random number as its length, the randomness of the test sequence is improved, thereby increasing the test coverage of the target simulation software. Furthermore, it avoids manually setting simulation variables, effectively improving testing efficiency. In addition, when the target simulation software encounters errors, by troubleshooting the pending test sequences that result in errors, the error sequences are identified and saved, enabling data recording and summary analysis of the software. This facilitates subsequent modifications and upgrades to the target simulation software, improving its development efficiency.

[0076] Another embodiment of the present invention provides a readable storage medium having a computer program stored thereon, characterized in that the computer program, when executed by a processor, implements the various steps of the above-described automatic testing method.

[0077] Please refer to Figure 5 Another embodiment of the present invention provides an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that the processor executes the computer program to implement the various steps of the above-described automatic testing method.

[0078] As described above, the beneficial effects of this invention are as follows: By generating a first random number using a random function, and simultaneously generating a test sequence with the first random number as its length, the randomness of the test sequence is improved, thereby increasing the test coverage of the target simulation software. Furthermore, it avoids manually setting simulation variables, effectively improving testing efficiency. In addition, when the target simulation software encounters errors, by troubleshooting the pending test sequences that result in errors, the error sequences are identified and saved, enabling data recording and summary analysis of the software. This facilitates subsequent modifications and upgrades to the target simulation software, improving its development efficiency.

[0079] This invention provides an automatic testing method, apparatus, readable storage medium, and electronic device, which can be applied to SD card simulation testing software. This improves the testing coverage of the simulation software for SD cards, while also enabling error localization and increasing the development efficiency of the simulation software. Specific embodiments are described below:

[0080] Example 1

[0081] Please refer to Figures 1 to 3 An automatic testing method according to this embodiment includes the following steps:

[0082] S1. Obtain the first random number according to the preset random function.

[0083] In some embodiments, the method further includes the following steps prior to step S1:

[0084] S0. Initialize the random number generator to obtain the preset random function.

[0085] Reference Figure 2 In this embodiment, the random number generator is initialized by calling the `srand(unsigned int)time(NULL)` function. Here, `time(NULL)` refers to the number of seconds since midnight on January 1, 1970 (New Year's Day), i.e., the actual time. Before using the preset random function `rand()`, different random seeds are needed to generate different random numbers. That is, the random seed is initialized using the current time (`srandom(time(0))`), and then the initial random number is obtained using the `random` function. The initial random number is then moduloed by a specific parameter (for example, a specific parameter = (max - min + 1) + min, requiring a total of 5 different value ranges) to obtain a random number within the corresponding range. `max` and `min` can be set using corresponding instructions.

[0086] Specifically, step S1 includes:

[0087] S11. Obtain the maximum length parameter of the test sequence;

[0088] In some embodiments, users can modify the maximum length parameter N of the test sequence through specific instructions, and the maximum length parameter N of the test sequence can be directly obtained through the corresponding instruction recognition algorithm.

[0089] S12. Using the maximum length parameter as the input parameter of the random function, generate a first random number corresponding to the maximum length parameter.

[0090] In some embodiments, rand()%N is called to obtain a first random number, where rand()%N represents a random function with a maximum length parameter N as input. Specifically, the maximum length parameter N can be input as max among the specific parameters mentioned above, thereby obtaining random numbers within the corresponding range.

[0091] S2. Generate a test sequence with the first random number as the sequence length using the random function.

[0092] Specifically, step S2 includes:

[0093] S21. Obtain the parameter range of the test sequence;

[0094] S22. Using the parameter range as the input parameter of the random function, generate a plurality of second random numbers corresponding to the parameter range;

[0095] In some embodiments, rand()%X is called to obtain a second random number, where rand()%X represents a random function with a parameter range X as input. Specifically, the parameter range X can be input as max and min from the specific parameters mentioned above, thereby obtaining random numbers within the corresponding range.

[0096] S23. Obtain a preset sequence structure and set the length of the sequence structure to the first random number;

[0097] S24. Write the plurality of second random numbers into the sequence variable corresponding to the sequence structure to obtain the test sequence.

[0098] In some embodiments, each sequence member consists of 4 sequence variables, and each sequence member corresponds to a sequence structure, thereby obtaining the test sequence.

[0099] S3. Trigger the target simulation software to run the test according to the test sequence.

[0100] In some embodiments, the target simulation software pulls the corresponding parameters from a txt file for testing. Therefore, writing each sequence member in the test sequence into a txt file in a specific format can trigger the target simulation software to run the test.

[0101] S4. If an error is detected in the target simulation software, the pending test sequence at the time of the error is investigated to obtain an error sequence, which is a subset of the pending test sequence.

[0102] Reference Figure 3 Specifically, step S4 includes:

[0103] S40. Repeat the test sequence to trigger the target simulation software to run the test a preset number of times. If the target simulation software still runs into an error, then execute the following steps S41-S43. If the target simulation software does not run into an error, then the test sequence does not need to be checked for errors.

[0104] In some embodiments, the preset number of times is 5, and the test sequence is repeatedly written into the target simulation software to trigger the target simulation software to run the test.

[0105] S41. The undetermined test sequence is divided into corresponding undetermined test subsequences by a binary search method, and the undetermined test subsequences are sequentially written into the target simulation software for testing.

[0106] S42. If an error is detected in the target simulation software, the shortest pending test subsequence that triggered the error is marked as an error sequence.

[0107] In some embodiments, if the above-mentioned undetermined test subsequence does not detect the target simulation software runtime error, the undetermined test subsequence is further divided into corresponding undetermined test subsequences using a binary search method and the test is repeated until the undetermined test subsequence cannot be further divided (i.e., the shortest undetermined test subsequence). If the target simulation software runtime error still cannot be detected at this point, it indicates that the binary search method cannot find the error sequence.

[0108] In some embodiments, the undetermined test sequence is divided into two equal-length undetermined test subsequences using a bisection method. Specifically, when the number of sequence elements in the undetermined test sequence is odd, the undetermined test subsequence that occurs later in the sequence has one more sequence element than the undetermined test subsequence that occurs earlier in the sequence. For example, if the undetermined test sequence is A={1,2,3,4,5,6,7,8,9,10}, then based on the bisection method, two undetermined test subsequences can be obtained: A1={1,2,3,4,5} and A2={6,7,8,9,10}. If the undetermined test sequence is B={1,2,3,4,5}, then based on the bisection method, two undetermined test subsequences can be obtained: B1={1,2} and B2={3,4,5}.

[0109] In some embodiments, writing the two undetermined test sub-sequences into the target simulation software for testing specifically involves: first inputting A1 into the target simulation software for testing, and then inputting A2 into the target simulation software for testing. If no runtime errors occur in either A1 or A2, then A1 and A2 are bisected again, resulting in A1.1={1,2}, A1.2={3,4,5}, A2.1={6,7}, and A2.2={8,9,10}. The sequence A1 and A2.1 is combined and input into the target simulation software for testing. Then, the sequence A1.2 and A2 are combined and input into the target simulation software for testing. If no error occurs, the binary search test is continued according to the above rules until it cannot be divided further (when the number of sequence elements in the undetermined test subsequence is 1, the undetermined test subsequence is the shortest undetermined test subsequence, i.e., it cannot be divided further). If the sequence of A1 and A2.1 runs incorrectly, while the sequence of A1.2 and A2 runs normally, the sequence of A1 and A2.1 is binary searched according to the above rules until the shortest sequence in the undetermined test subsequence that triggers the target simulation software to run incorrectly is obtained, and this is taken as the error sequence. For example, if the undetermined test subsequence that triggers the target simulation software to run incorrectly includes {1,2,3}, {1,2}, and {4,5,6}, then {1,2} is the error sequence.

[0110] It should be noted that the error sequence is the shortest sequence among the pending test sequences that causes software malfunctions.

[0111] S43. If none of the pending test subsequences with a sequence element count of 1 trigger the target simulation software running error, then the pending test sequences are sequentially checked for errors to obtain the error sequence.

[0112] Specifically, step S43 includes:

[0113] S431. Divide the undetermined test sequence into multiple subsequences with the number of sequence elements increasing sequentially according to the current sequence order;

[0114] In some embodiments, assuming the test sequence to be determined is B={1,2,3,4,5}, then the first subsequences with the number of elements of the multiple sequences increasing sequentially can be obtained through step S431 as B1={1}, B2={1,2}, B3={1,2,3}, B4={1,2,3,4}, and B5={1,2,3,4,5}.

[0115] S432. Write each first subsequence into the target simulation software one by one in the test order of increasing sequence element count. Trigger a test run every time a first subsequence is written, until an error is detected in the target simulation software. Then, determine the first subsequence as the initial error sequence.

[0116] In some embodiments, the first subsequence is written into the target simulation software in the order of B1, B2, B3, B4, B5. If the first subsequence B4={1,2,3,4} triggers an error in the target simulation software, then the first subsequence B4={1,2,3,4} is determined as the initial error sequence.

[0117] S433. Based on the initial error sequence, perform error investigation to obtain the error sequence.

[0118] Specifically, step S433 includes:

[0119] S4331. According to the sequence order, discard the first element of the initial erroneous sequence one by one to obtain a second subsequence with the number of elements of multiple segments decreasing sequentially;

[0120] In some embodiments, if the initial erroneous sequence is B4={1,2,3,4}, then through step S4331, the second subsequences with the number of elements in the multiple sequences decreasing sequentially can be obtained as B4.1={2,3,4}, B4.2={3,4}, and B4.3={4}.

[0121] S4332. Write each second subsequence into the target simulation software one by one in the test order of decreasing sequence element count. Trigger a test run every time a second subsequence is written, until the target simulation software is detected to be running normally. Determine the second subsequence that triggers the target simulation software to run normally as the target sequence.

[0122] In some embodiments, the second subsequence is written into the target simulation software in the order of B4.1, B4.2, and B4.3. If the second subsequence B4.3={4} does not trigger an error in the target simulation software, then the second subsequence B4.3={4} is determined as the target sequence.

[0123] S4333, Mark the second subsequence that is one position before the target sequence in the test order as an error sequence.

[0124] In some embodiments, if the second subsequence of the test order is B4.2, then the second subsequence B4.2 is an incorrect sequence.

[0125] S5. Save the error sequence to complete the test.

[0126] Example 2

[0127] Please refer to Figure 4 An automatic testing device 200 according to this embodiment includes:

[0128] The acquisition module 201 is used to obtain a first random number according to a preset random function;

[0129] The generation module 201 is used to generate a test sequence with the first random number as the sequence length through the random function;

[0130] Trigger module 203 is used to trigger the target simulation software to run tests according to the test sequence;

[0131] The positioning module 204 is used to perform error investigation on the pending test sequence when the target simulation software is detected to obtain an error sequence, wherein the error sequence is a subset of the pending test sequence;

[0132] The recording module 205 is used to save the error sequence and complete the test.

[0133] Example 3

[0134] This embodiment provides a computer-readable storage medium storing a computer program thereon, which, when executed by a processor, implements the various steps of the automatic testing method described in Embodiment 1.

[0135] Example 4

[0136] Please refer to Figure 5 An electronic device 300 according to this embodiment includes a memory 301, a processor 302, and a computer program stored in the memory 301 and executable on the processor 302. When the processor 302 executes the computer program, it implements the various steps of the automatic testing method described in Embodiment 1.

[0137] In summary, the automatic testing method, apparatus, readable storage medium, and electronic device provided by this invention generate a first random number corresponding to the maximum length parameter of the test sequence using a random function. This first random number serves as the sequence length of the test sequence. Simultaneously, a second random number is generated based on the random function and filled into a preset sequence variable to obtain the test sequence. This invention improves the randomness of the test sequence by using random numbers instead of manually setting variables, thereby increasing the test coverage of the target simulation software and effectively improving testing efficiency. When errors occur in the target simulation software while running the test sequence, the error test points of the target simulation software are determined by accurately locating the error sequence. After modifying the error test points, the target simulation software is tested again using the error sequence to determine whether errors still exist. This improves the development efficiency of the simulation software and facilitates rapid upgrades to the simulation software in the future.

[0138] In the embodiments provided in this application, it should be understood that the disclosed methods, apparatuses, computer-readable storage media, and electronic devices can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative. For instance, the division of modules is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple components or modules may be combined or integrated into another device, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between devices, components, or modules may be electrical, mechanical, or other forms.

[0139] The components described as separate parts may or may not be physically separate. The components shown as components may or may not be physical modules; that is, they may be located in one place or distributed across multiple network modules. Some or all of the components can be selected to achieve the purpose of this embodiment according to actual needs.

[0140] Furthermore, the functional modules in the various embodiments of the present invention can be integrated into one processing module, or each component can exist physically separately, or two or more modules can be integrated into one module. The integrated modules described above can be implemented in hardware or as software functional modules.

[0141] If the integrated module is implemented as a software functional module and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0142] It should be noted that, for the sake of simplicity, the foregoing method embodiments are all described as a series of actions. However, those skilled in the art should understand that the present invention is not limited to the described order of actions, because according to the present invention, some steps can be performed in other orders or simultaneously. Furthermore, those skilled in the art should also understand that the embodiments described in the specification are preferred embodiments, and the actions and modules involved are not necessarily essential to the present invention.

[0143] In the above embodiments, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions of other embodiments.

[0144] The above description is merely an embodiment of the present invention and does not limit the patent scope of the present invention. Any equivalent modifications made based on the content of the present invention specification and drawings, or direct or indirect applications in related technical fields, are similarly included within the patent protection scope of the present invention.

Claims

1. An automatic testing method, characterized in that, Including the following steps: The first random number is obtained according to the preset random function; A test sequence with the first random number as the sequence length is generated using the random function; The target simulation software is triggered to run tests according to the test sequence; If an error is detected in the target simulation software, the pending test sequence at the time of the error is checked to obtain an error sequence, which is a subset of the pending test sequence. Save the error sequence to complete the test; The process of troubleshooting the pending test sequences when runtime errors occur yields the following error sequences: The undetermined test sequence is divided into corresponding undetermined test subsequences using a binary search method, and the undetermined test subsequences are sequentially written into the target simulation software for testing. If an error is detected in the target simulation software, the shortest pending test subsequence that triggered the error is marked as an error sequence. The step of troubleshooting the pending test sequence when an error occurs, and obtaining the error sequence, also includes: If the undetermined test subsequence with a sequence element count of 1 still does not trigger the target simulation software running error, then the undetermined test sequence will be checked for errors in turn to obtain the error sequence; The step of sequentially performing error checks on the undetermined test sequences to obtain erroneous sequences includes: The undetermined test sequence is divided into multiple subsequences with the number of sequence elements increasing sequentially according to the current sequence order; Each first subsequence is written into the target simulation software one by one in the test order of increasing sequence element count. Each time a first subsequence is written, a test is triggered until an error is detected in the target simulation software. The first subsequence is then identified as the initial error sequence. Errors are identified by performing error investigation based on the initial error sequence, resulting in an error sequence.

2. The automatic testing method according to claim 1, characterized in that, The step of error investigation based on the initial error sequence to obtain the error sequence includes: The first element of the initial erroneous sequence is discarded one by one according to the sequence order to obtain a second subsequence with the number of elements in multiple segments decreasing sequentially. Each second subsequence is written into the target simulation software one by one in a test order with the number of sequence elements decreasing sequentially. Each time a second subsequence is written, a test is triggered until the target simulation software is detected to be running normally. The second subsequence that triggers the target simulation software to run normally is determined as the target sequence. The second subsequence in the test sequence that precedes the target sequence is marked as an error sequence.

3. The automatic testing method according to claim 2, characterized in that, The step of obtaining the first random number according to the preset random function includes: Get the maximum length parameter of the test sequence; Using the maximum length parameter as the input parameter of the random function, a first random number corresponding to the maximum length parameter is generated.

4. The automatic testing method according to claim 1, characterized in that, The step of generating a test sequence with the first random number as the sequence length using the random function includes: Obtain the parameter range of the test sequence; Using the parameter range as the input parameter of the random function, a plurality of second random numbers corresponding to the parameter range are generated; Obtain a preset sequence structure and set the length of the sequence structure to the first random number; The multiple second random numbers are written into the sequence variables corresponding to the sequence structure to obtain the test sequence.

5. The automatic testing method according to claim 1, characterized in that, Before performing error troubleshooting on the pending test sequence when an error occurs, and obtaining the error sequence, the process also includes: The test sequence is repeated a preset number of times to trigger the target simulation software to run the test; If the target simulation software still detects an error, the pending test sequence at the time of the error is checked to obtain the error sequence.

6. An automatic testing device, characterized in that, include: The acquisition module is used to obtain a first random number based on a preset random function; A generation module is used to generate a test sequence with the first random number as the sequence length through the random function; The triggering module is used to trigger the target simulation software to run tests according to the test sequence; The positioning module is used to perform error investigation on the pending test sequence when the target simulation software is detected to obtain an error sequence, wherein the error sequence is a subset of the pending test sequence; The process of troubleshooting the pending test sequences when runtime errors occur yields the following error sequences: The undetermined test sequence is divided into corresponding undetermined test subsequences using a binary search method, and the undetermined test subsequences are sequentially written into the target simulation software for testing. If an error is detected in the target simulation software, the shortest pending test subsequence that triggered the error is marked as an error sequence. The step of troubleshooting the pending test sequence when an error occurs, and obtaining the error sequence, also includes: If the undetermined test subsequence with a sequence element count of 1 still does not trigger the target simulation software running error, then the undetermined test sequence will be checked for errors in turn to obtain the error sequence; The step of sequentially performing error checks on the undetermined test sequences to obtain erroneous sequences includes: The undetermined test sequence is divided into multiple subsequences with the number of sequence elements increasing sequentially according to the current sequence order; Each first subsequence is written into the target simulation software one by one in the test order of increasing sequence element count. Each time a first subsequence is written, a test is triggered until an error is detected in the target simulation software. The first subsequence is then identified as the initial error sequence. Error detection is performed based on the initial error sequence to obtain the error sequence; The recording module is used to save the error sequence and complete the test.

7. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, it implements the steps of the automatic testing method as described in any one of claims 1-5.

8. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, When the processor executes the computer program, it implements each step of the automatic testing method as described in any one of claims 1-5.

Images