Simulation software acceleration method and device

Abstract

The embodiment of the invention provides an acceleration method and device for simulation software, and is applied to the technical field of computers. Discretizing the CFD simulation task to be processed to generate a grid to be calculated; and distributing a target computing grid obtained by splitting the to-be-computed grid to a process, and mapping the process to a CPU core of the computing node for execution. And respectively realizing intra-node communication and inter-node message transmission of the computing nodes based on a shared memory mode and a process mapping message transmission mode. And calculating the computational nodes by using a neural network solver adapted to the heterogeneous accelerator to obtain a simulation result. The shared memory considers the memory and cache occupation amount in the node, the process mapping considers the storage and communication characteristics of the node, and calculation resources and storage resources are combined and optimized; the memory access characteristics of the heterogeneous accelerator are analyzed, a neural network solver suitable for the heterogeneous accelerator is provided for calculation, and the memory access frequency in the reasoning process of the heterogeneous accelerator is reduced. And the simulation performance of the CFD software is improved.

Description

Technical Field

[0001] The present application relates to the field of computer technology, and in particular to a method and device for accelerating simulation software. Background Art

[0002] The use of software to simulate complex real-world scenarios has been widely used in various fields.

[0003] Take Computational Fluid Dynamics (CFD) software as an example. This computational fluid dynamics software provides researchers with a cost-effective and low-risk numerical simulation environment, allowing researchers to achieve highly accurate simulations without having to build physical prototypes.

[0004] At present, the commonly used solution is to optimize the simulation of CFD software from aspects such as communication and computing operators with the help of supercomputing systems, and combine CFD with high-performance computing. With the development of artificial intelligence technology, researchers have gradually used neural networks to replace key operators in the CFD calculation process, and improved the calculation speed of CFD software by changing the computing paradigm. Neural networks are trained to approximate specific mathematical operators, and then the trained models are deployed on heterogeneous computing devices for efficient calculations.

[0005] The CFD software running acceleration scheme of the current architecture has little optimization for the storage bandwidth bottleneck encountered during the calculation process, and has not fully considered the storage and communication characteristics of the computing nodes in the supercomputing system. The computing resources and storage resources do not constitute a combination of optimization. The CFD software running acceleration scheme for artificial intelligence focuses on the simulation effect and ignores the adaptability of heterogeneous accelerators. In other words, it does not fully consider the storage and computing characteristics of heterogeneous computing devices. The proposed network structure does not conform to the architectural characteristics of heterogeneous accelerators and has additional memory access overhead. It can be seen that the simulation performance of CFD software in the current CFD software running acceleration scheme is low. Summary of the invention

[0006] In view of this, the present application provides a method and device for accelerating simulation software, which utilizes the heterogeneous characteristics and storage characteristics of supercomputing systems to comprehensively optimize the framework of CFD software: using intra-node shared memory mode communication and inter-node process mapping communication to optimize the communication speed of computing nodes, and using a neural network solver suitable for heterogeneous accelerators to perform node calculations to reduce the number of memory accesses; it can improve the simulation performance of CFD software.

[0007] To solve the above problems, the technical solutions provided by this application are as follows:

[0008] In a first aspect, an embodiment of the present application provides a method for accelerating simulation software, the method being applied to a supercomputing system, comprising:

[0009] In response to obtaining a computational fluid dynamics (CFD) simulation task to be processed, discretizing the CFD simulation task to be processed and generating a grid to be calculated;

[0010] The target computing grid obtained by splitting the to-be-computed grid is assigned to a message passing interface MPI process, and the MPI process is mapped to a central processing unit CPU core of a computing node for execution;

[0011] Implementing intra-node communication of the computing nodes based on a shared memory mode;

[0012] Determine the communication mapping result of the MPI process;

[0013] completing inter-node message transmission of the computing nodes based on the communication mapping result;

[0014] The computing nodes are calculated using a neural network solver adapted to a heterogeneous accelerator, and the calculation results of each computing node are integrated to obtain a simulation result.

[0015] In a possible implementation manner, determining the communication mapping result of the MPI process includes:

[0016] The communication hardware coverage boundary test algorithm is used to determine the number of computing nodes covered by each network routing module;

[0017] Based on the number of computing nodes covered by each network routing module, a communication cost matrix is ​​obtained by testing a dynamic topology awareness algorithm;

[0018] Determine the communication volume matrix according to the number of cross-grids of the target computing grid between the MPI processes;

[0019] The communication cost matrix and the communication volume matrix are matched to obtain a communication mapping result of the MPI process.

[0020] In a possible implementation, the method of determining the number of computing nodes covered by each network routing module using a communication hardware coverage boundary test algorithm includes:

[0021] determining a communication delay between the computing nodes;

[0022] The communication hardware coverage boundary test algorithm is used to compare the communication delays between the computing nodes to obtain the number of computing nodes covered by each network routing module.

[0023] In a possible implementation, the communication cost matrix is ​​obtained by testing using a dynamic topology awareness algorithm based on the number of computing nodes covered by each network routing module, including:

[0024] Determine the communication hardware coverage boundary based on the number of computing nodes covered by each network routing module, wherein the communication hardware coverage boundary includes the network routing modules corresponding to the row switches, the network routing modules corresponding to the column switches, and the nodes included in the network routing modules;

[0025] Using a communication delay test tool, respectively test the node delay of the same network routing module, the first delay between network routing modules of switches in the same row, the second delay between network routing modules of switches in the same column, and the switch delay between switches in different rows and different columns;

[0026] The communication cost matrix is ​​obtained by using a dynamic topology awareness algorithm based on the node delay, the first delay, the second delay and the switch delay test.

[0027] In a possible implementation manner, completing the inter-node message transmission of the computing node based on the communication mapping result includes:

[0028] Determine the message transmission path between the computing nodes where the MPI process is located based on the communication mapping result;

[0029] Inter-node message transmission of computing nodes is completed based on the message transmission path.

[0030] In a second aspect, an embodiment of the present application provides an acceleration device for simulation software, wherein the acceleration device is applied to a supercomputing system, comprising:

[0031] A discretization module, for discretizing the CFD simulation task to be processed and generating a grid to be calculated in response to obtaining the CFD simulation task to be processed;

[0032] An allocation module is used to allocate the target computing grid obtained by splitting the to-be-computed grid to a message passing interface MPI process, and the MPI process is mapped to the central processing unit CPU core of the computing node for execution;

[0033] An intra-node communication module, used to implement intra-node communication of the computing node based on a shared memory mode;

[0034] A determination module, used to determine the communication mapping result of the MPI process;

[0035] A message transmission module, used for completing the inter-node message transmission of the computing node based on the communication mapping result;

[0036] The computing module is used to use a neural network solver adapted to a heterogeneous accelerator to perform calculations on the computing nodes, and to fuse the calculation results of each computing node to obtain a simulation result.

[0037] In a possible implementation, the determining module includes:

[0038] A determination submodule, used to determine the number of computing nodes covered by each network routing module using a communication hardware coverage boundary test algorithm;

[0039] A testing submodule, used to obtain a communication cost matrix by testing using a dynamic topology awareness algorithm based on the number of computing nodes covered by each network routing module;

[0040] The determination submodule is further used to determine the communication volume matrix according to the number of cross-grids of the target computing grids between the MPI processes;

[0041] The matching submodule is used to match the communication cost matrix and the communication volume matrix to obtain the communication mapping result of the MPI process.

[0042] In a possible implementation, the determination submodule is used to determine the number of computing nodes covered by each network routing module using a communication hardware coverage boundary test algorithm, including:

[0043] A determination unit, configured to determine a communication delay between the computing nodes;

[0044] The comparison unit is used to compare the communication delays between the computing nodes using the communication hardware coverage boundary test algorithm to obtain the number of computing nodes covered by each network routing module.

[0045] In a possible implementation, the test submodule is specifically used for:

[0046] The communication hardware coverage boundary is determined based on the number of computing nodes covered by each network routing module, and the communication hardware coverage boundary includes the network routing modules corresponding to the row switches, the network routing modules corresponding to the column switches, and the nodes included in the network routing modules; the node delay of the same network routing module, the first delay between the network routing modules of the same row switches, the second delay between the network routing modules of the same column switches, and the switch delay between switches in different rows and different columns are tested using a communication delay testing tool; and the communication cost matrix is ​​obtained based on the node delay, the first delay, the second delay, and the switch delay test using a dynamic topology awareness algorithm.

[0047] In a possible implementation, the message transmission module is specifically used for:

[0048] The message transmission path between the computing nodes where the MPI process is located is determined based on the communication mapping result; and the message transmission between the computing nodes is completed based on the message transmission path.

[0049] In a third aspect, the present application provides an acceleration device for simulating software, the device comprising: a processor, a memory, and a system bus;

[0050] The processor and the memory are connected via the system bus;

[0051] The memory is used to store one or more programs, and the one or more programs include instructions. When the instructions are executed by the processor, the processor executes the acceleration method of the simulation software described in the first aspect above.

[0052] In a fourth aspect, the present application provides a computer-readable storage medium, which stores instructions. When the instructions are executed on a device, the device executes the acceleration method of the simulation software described in the first aspect above.

[0053] It can be seen that this application has the following beneficial effects:

[0054] The embodiment of the present application provides an acceleration method for simulation software, which is applied to a supercomputing system. First, in response to obtaining a computational fluid dynamics CFD simulation task to be processed, the CFD simulation task to be processed is discretized to generate a grid to be calculated. Secondly, the grid to be calculated is split to obtain a target calculation grid, and the target calculation grid is assigned to a message passing interface message passing interface (Message Passing Interface, MPI) process, and the MPI process is mapped to the CPU core of the central processing unit of the computing node for execution. Then, the intra-node communication of the computing node is realized based on the shared memory mode; the communication mapping result of the MPI process is determined, and the inter-node message transmission of the computing node is completed based on the communication mapping result. Finally, the computing node is calculated using a neural network solver adapted to a heterogeneous accelerator, and the calculation results of each computing node are fused to obtain a simulation result. In this way, a comprehensive optimization framework for CFD software for supercomputing systems is proposed, which optimizes the intra-node communication and inter-node communication of computing nodes and the reasoning speed of heterogeneous accelerators. Reduce the number of MPI processes in a single computing node, utilize the principle of communication locality, use intra-node shared memory mode communication and inter-node process mapping to optimize the communication speed of computing nodes, fully consider the storage and communication characteristics of computing nodes in supercomputing systems, and combine and optimize computing resources and storage resources. By analyzing the memory access characteristics of heterogeneous accelerators, a neural network solver adapted to heterogeneous accelerators is proposed for node computing, reducing the number of memory accesses during the reasoning process of heterogeneous accelerators. The embodiment of the present application achieves an improvement in the simulation performance of CFD software.

[0055] The embodiment of the present application also provides a device corresponding to the above method, which has the same beneficial effects as the above method. BRIEF DESCRIPTION OF THE DRAWINGS

[0056] Figure 1 A flowchart of a method for accelerating simulation software provided in an embodiment of the present application;

[0057] Figure 2 A schematic diagram of a supercomputing system process mapping framework of a two-dimensional network topology provided in an embodiment of the present application;

[0058] Figure 3 A schematic diagram of a neural network architecture of a digital signal processing unit DSP architecture feature according to an embodiment of the present application;

[0059] Figure 4 A schematic diagram of the structure of an acceleration device for simulation software provided in an embodiment of the present application;

[0060] Figure 5 A schematic diagram of the structure of an acceleration device for simulation software provided in an embodiment of the present application. DETAILED DESCRIPTION

[0061] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0062] In this application, relational terms such as first and second, etc. are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. The terms "comprise", "comprising" or any other variants thereof are intended to cover non-exclusive inclusion, so that the process, method, article or equipment including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or equipment. In the absence of further restrictions, the elements defined by the statement "comprising a ..." do not exclude the presence of other identical elements in the process, method, article or equipment including the elements.

[0063] CFD software is widely used, and improving the computational efficiency of CFD software on supercomputing systems is the key to improving simulation efficiency. At present, a large number of solutions have optimized the simulation of CFD software in terms of communication, computing operators, etc. with the help of supercomputing systems. These solutions provide inspiration for the combination of CFD and high-performance computing and bring a certain degree of performance improvement. With the development of artificial intelligence technology, the use of neural networks to replace key operators in the CFD calculation process has also improved the CFD calculation speed; among them, neural networks can be trained to approximate specific mathematical operators, and heterogeneous computing can be combined to improve the simulation performance of CFD.

[0064] However, the CFD software acceleration solution for the architecture does not fully consider the storage and communication characteristics of supercomputing nodes. The storage bandwidth bottleneck encountered by CFD software during the calculation process is rarely optimized, and computing resources and storage resources do not constitute a combined optimization. The solution of using artificial intelligence technology to accelerate CFD software mainly focuses on the simulation effect, and does not fully consider the storage and computing characteristics of heterogeneous computing devices. The proposed network structure is not suitable for the architectural characteristics of heterogeneous accelerators and has additional memory access overhead. In the above solution, the simulation performance of CFD software is low.

[0065] In view of this, an embodiment of the present application provides a simulation software acceleration method and device, which is applied to a supercomputing system. First, in response to obtaining a computational fluid dynamics (CFD) simulation task to be processed, the CFD simulation task to be processed is discretized to generate a grid to be calculated. Secondly, the grid to be calculated is split to obtain a target calculation grid, and the target calculation grid is assigned to a message passing interface (MPI) process, and the MPI process is mapped to the CPU core of the computing node for execution. Then, the intra-node communication of the computing node is realized based on the shared memory mode; the communication mapping result of the MPI process is determined, and the message passing between the computing nodes is completed based on the communication mapping result. Finally, the computing node is calculated using a neural network solver adapted to a heterogeneous accelerator, and the calculation results of each computing node are fused to obtain a simulation result. In this way, a comprehensive optimization framework for CFD software for supercomputing systems is proposed, which optimizes the intra-node communication and inter-node communication of computing nodes and the inference speed of heterogeneous accelerators. Reduce the number of MPI processes in a single computing node, utilize the principle of communication locality, use intra-node shared memory mode communication and inter-node process mapping communication to optimize the communication speed of computing nodes, fully consider the storage and communication characteristics of computing nodes in supercomputing systems, and combine and optimize computing resources and storage resources. By analyzing the memory access characteristics of heterogeneous accelerators, a neural network solver adapted to heterogeneous accelerators is proposed for node computing, reducing the number of memory accesses during the reasoning process of heterogeneous accelerators. The embodiment of the present application achieves an improvement in the simulation performance of CFD software.

[0066] In order to facilitate understanding of the technical solution provided in the embodiment of the present application, a simulation software acceleration method and device provided in the embodiment of the present application are described below in conjunction with the accompanying drawings.

[0067] See also Figure 1 , Figure 1 A flowchart of a simulation software acceleration method provided in an embodiment of the present application. The simulation software acceleration method can be applied to a supercomputing system, which can include multiple clusters, and allocate computing nodes to simulation tasks submitted by users according to the current cluster status. Specifically, an idle cluster is used to process simulation tasks. The acceleration method specifically includes S101-S105.

[0068] S101: In response to obtaining a computational fluid dynamics (CFD) simulation task to be processed, discretizing the CFD simulation task to be processed to generate a grid to be calculated.

[0069] The simulated physical space is regionally decomposed. After the regional decomposition is completed, the computational fluid dynamics (CFD) simulation task to be processed can be discretized into grids to be calculated, that is, the calculation domain specified by the user is discretized into grids to be calculated.

[0070] The pending CFD simulation task may include a CFD program and input data to be simulated, and the pending CFD simulation task is submitted to a supercomputing system for execution. Slurm on the supercomputing system will allocate computing nodes to the user according to the current cluster status.

[0071] After the computing nodes are allocated, the computing nodes execute executable files to perform communication and calculation.

[0072] S102: Allocate a target computing grid obtained by splitting the to-be-computed grid to a message passing interface MPI process, and map the MPI process to a central processing unit (CPU) core of a computing node for execution.

[0073] The CFD simulation tasks to be processed are described by MPI for coarse-grained parallelism. By calling the DecomposePar tool, the sub-area containing the computational grid to be processed is assigned to the MPI process according to the Scotch partitioning algorithm, that is, the grid to be calculated is split to obtain the target computational grid, and the target computational grid is assigned to the MPI process. The MPI process is directly mapped to the central processing unit (CPU) core of the computing node for execution, and the CPU core has intra-node communication or cross-node communication. Then, OpenFoam returns the number of grids contained in each MPI process and the number of grids intersecting with other MPI processes.

[0074] MPI processes can run on different computing nodes, and each computing node can run one or more MPI processes. Computing nodes provide computing resources and memory space for MPI processes, supporting the execution and communication of MPI processes. Each computing node contains a certain number of CPU cores for executing computing tasks, and MPI processes will be mapped to specific CPU cores for execution.

[0075] S103: Implementing intra-node communication of the computing node based on a shared memory mode.

[0076] In one possible implementation, intra-node communication of computing nodes can be performed based on a shared memory mode. The communication speed of shared memory is related to the memory occupancy rate, cache capacity, and the distribution of non-uniform memory access (NUMA) nodes. The computing characteristics of CFD software can be combined to reduce the number of CFD computing processes in a single computing node, reduce the memory and cache occupancy in a single computing node, and improve the speed of message transmission.

[0077] Specifically, the computational features of CFD software may include computational access memory ratio, CPU computation time, node memory occupancy, high-speed memory access characteristics, and memory access location characteristics. The computational access memory ratio represents the ratio of computational time overhead to memory access time overhead during the computation of the CFD program; the CPU computation time represents the time spent using the CPU for computation during the running of the CFD program; the node memory occupancy represents the amount of computational node memory occupied during the running of the CFD program; the high-speed memory access characteristics represent the read and write characteristics of computational data in the CPU cache during the computation of the CFD program, mainly including the number of read and write times, access misses, and other characteristics; the memory access location characteristics represent the memory location accessed by the CFD program. Different data storage locations will result in different memory access speeds, so memory access is not consistent access.

[0078] Analysis of the computational characteristics of the CFD software shows that the computational memory access of the CFD software is relatively low, and the memory access overhead is relatively large. Analysis of the CPU computation time and node memory usage shows that the computational and memory access loads of each MPI process are similar, and the phenomenon that the load of some MPI processes far exceeds that of other MPI processes will not occur. The load averaging of the MPI processes makes it possible to reduce the load of a single computing node.

[0079] The embodiments of the present application can reduce the number of MPI processes deployed on a single computing node and use more computing nodes for computing, wherein each MPI process occupies a NUMA cluster in a CPU alone. The aforementioned deployment method can reduce the memory usage of the total computing node and reduce the time consumption caused by refreshing the cache pool. At the same time, by reducing the number of MPI processes deployed in a single computing node, the MPI process can monopolize all the caches of the NUMA nodes in the CPU, increase the cache capacity visible to a single MPI process, and reduce the overhead caused by cache read and write misses.

[0080] In actual implementation, reducing the computational load of a single computing node can improve the overall performance. The partial differential equation solving component was accelerated by 6.29 times, and the overall speedup ratio was 2.58.

[0081] S104: Determine the communication mapping result of the MPI process.

[0082] Implement MPI process mapping during computing node communication and computing, and reduce the load on a single computing node. Figure 2 , Figure 2 A schematic diagram of a process mapping framework of a supercomputing system with a two-dimensional network topology provided in an embodiment of the present application.

[0083] Figure 2 The right part is the task decomposition part in the preprocessing process of the CFD software, which splits the overall grid to be calculated into different MPI processes for calculation, as shown in the Decompose part.

[0084] After the split is completed, the target computing grids of different MPI processes are crossed, and the cross-grid Halo Cell generates information exchange based on the requirements of the numerical calculation solver, thereby generating message transmission between MPI processes. That is, cross-process data exchange occurs between cross-grid Halo cells. The more cross-grid Halo Cells there are, the greater the communication volume between MPI processes.

[0085] Figure 2 The middle part is the process mapping part. The MPI process is mapped on the computing node HN through Process Mapping. For the convenience of display, Figure 2 In the example, an MPI process is mapped to a computing node HN through Process Mapping. In actual use, there may be multiple MPI processes mapped to a computing node to implement computing.

[0086] Figure 2The left part is the overall topology of the supercomputing system interconnection network, including row switches (ColumnSwitch, CS) and column switches (Row Switch, RS). The row and column switches are linked to the NetworkRouteModule (NRM). The coordinates of NRM represent the connection relationship between the row and column switches. For example, NRM (0,1) represents that the column switch with ID 0 is connected to the row switch with ID 1. NRM is attached to a specific computing node HN, which is used for specific computing implementation. The MPI process is mapped to the computing node HN to implement the calculation.

[0087] The 4*3 cube pointing to the computing node HN represents the computing task to which the MPI process belongs, that is, the target computing grid that the MPI process needs to calculate. Among them, the computing task is bound to the MPI process, so the computing task and the MPI process are essentially the same. The black part on the side of the target computing grid represents the cross-grid Halo Cell that intersects between MPI processes.

[0088] The process mapping method in the embodiment of the present application maps the MPI process with a large amount of communication to a computing device with a closer hardware distance, reducing the possibility of high-communication processes passing through long communication paths. The mapping process mainly consists of dynamic topology perception, communication volume approximation and process mapping. Please refer to the following for the mapping process.

[0089] The grid to be calculated is split into target calculation grids to be allocated to the MPI process, the communication mapping result of the MPI process is determined, and communication and calculation are realized based on the communication mapping result.

[0090] S105: completing inter-node message transmission of the computing nodes based on the communication mapping result.

[0091] By utilizing the parallel computing resources of the supercomputing system, CFD simulation tasks are distributed to multiple computing nodes to achieve large-scale parallel computing. Communication and computing are achieved based on the communication mapping results, and communication can be expressed at the data transmission level.

[0092] In one possible implementation, completing the inter-node message passing of the computing nodes based on the communication mapping result includes: determining the message passing path between the computing nodes where the MPI process is located based on the communication mapping result; and completing the inter-node message passing of the computing nodes based on the message passing path.

[0093] The data transmission (message transmission path) can be divided into three cases. First, the two MPI processes are located in different computing nodes HN in the same NRM, and the message is transmitted according to the path of computing node HN1-NRM-computing node HN2. Second, the two MPI processes are respectively located in the nodes belonging to different NRMs, wherein the two NRMs are in the same row / column, and the message is transmitted according to the path of computing node HN1-NRM1-row / column switch-NRM2-computing node HN2. Third, the two MPI processes are respectively located in the nodes belonging to different NRMs, wherein the row and column switches of the two NRMs are different, and the message is transmitted according to the path of computing node HN1-NRM1-row switch-column switch-NRM2-computing node HN2.

[0094] The message passing between computing nodes is completed based on the message passing path, and the computing tasks corresponding to the MPI process are further completed.

[0095] S106: Utilize a neural network solver adapted to a heterogeneous accelerator to perform calculations on the computing nodes, and fuse the calculation results of each computing node to obtain a simulation result.

[0096] The embodiment of the present application optimizes the CFD software deployed on the supercomputing system in two stages. The first stage is to optimize the communication layer of the CFD software, and the second stage is to optimize the neural network solver used in the CFD software.

[0097] When heterogeneous accelerators are used, the memory access speed and bandwidth are relatively limited, which in turn affects the speed of neural network reasoning. Taking a fully connected neural network as an example, the limited memory access speed and bandwidth mean that a single memory access can only obtain part of the neural network weights and part of the sample data, and can only perform part of the matrix multiplication. After multiple matrix multiplications, the reasoning results of a layer of neural network will be fully output. This process involves multiple segmented reads and multiple storages. The aforementioned memory access overhead affects the reasoning speed of the neural network.

[0098] The embodiment of the present application proposes a neural network solver with a special structure according to the read bandwidth of the heterogeneous accelerator, which increases the number of layers of the neural network. Figure 3 , Figure 3A schematic diagram of a neural network architecture featuring a digital signal processing unit (DSP) architecture of an embodiment of the present application. The number of neurons in the neural network solver matches the single memory access bandwidth of the heterogeneous accelerator, and the network layer therein can be loaded at one time. That is, if the number of single-layer weights of the neural network solver meets the bandwidth of a single memory access, only a single memory access is required to perform reasoning on a layer of weights, reducing the writing operation of intermediate results. Among them, the neural network architecture is based on full connectivity and uses Gaussian Error Linear Unit (GELU) as the activation function.

[0099] Solving ordinary differential equations (ODEs) is an important step in CFD programs. Through the above adaptation work, CFD programs can use neural network solvers adapted to heterogeneous accelerators to perform ODE calculations.

[0100] After executing the calculation of the computing node, the calculation results of each computing node are iterated to obtain the final simulation result.

[0101] In a possible implementation, when CFD software is actually used, the first step of each round of execution of the CFD program needs to solve the mass conservation equation and the momentum equation first. This process can be solved using the Generalized Algebraic MultiGrid (GAMG) solver. The GAMG solver is mainly used to solve the discretized form of partial differential equations (PDE). During the solution process, the target computational grid needs to synchronize data to ensure the consistency of the results, thereby introducing inter-process communication. The embodiment of the present application uses process mapping and reduces the load of a single node to optimize the performance of the solver.

[0102] The acceleration solution of the above simulation software can be applied to computational fluid dynamics software or computing frameworks such as OpenFoam and DeepFlame.

[0103] Based on the contents of the above steps S101-S106, it can be seen that the communication within the computing node, the communication between the computing nodes, and the reasoning speed of the heterogeneous accelerator are optimized. Specifically, for the shared memory communication mode within the computing node, the communication within the computing node is accelerated by reasonably occupying computing resources and improving the shared memory access bandwidth. For communication between computing nodes, process mapping is used to optimize the communication speed between computing nodes. In terms of speeding up heterogeneous accelerators, by analyzing the memory access characteristics of heterogeneous accelerators, a neural network solver suitable for heterogeneous accelerators is proposed, the network structure is modified, and the number of memory accesses during the accelerator reasoning process is reduced. In this way, the acceleration scheme of the simulation software is set by utilizing the heterogeneous characteristics and storage characteristics of the supercomputing system, and the efficient execution of multi-scale and high-precision CFD simulations is achieved by deeply integrating artificial intelligence models with high-performance computing resources, thereby improving the simulation performance of CFD.

[0104] The communication mapping result of determining the MPI process provided in the embodiment of the present application is described below.

[0105] The communication between computing nodes is expressed as the communication mapping of MPI processes. By utilizing the principle of communication locality, a dynamic topology awareness algorithm was invented. Based on the network topology, process mapping is used to optimize the communication speed between nodes.

[0106] In one possible implementation, determining the communication mapping result of the MPI process includes: using a communication hardware coverage boundary test algorithm to determine the number of computing nodes covered by each network routing module. Based on the number of computing nodes covered by each network routing module, a communication cost matrix is ​​obtained by testing a dynamic topology awareness algorithm. A communication volume matrix is ​​determined according to the number of cross-grids of the target computing grids between the MPI processes. The communication cost matrix and the communication volume matrix are matched to obtain the communication mapping result of the MPI process.

[0107] The dynamic topology awareness algorithm first obtains the number of nodes covered by different network routing modules (hardware devices) by executing the communication hardware coverage boundary test algorithm, and then uses the dynamic topology awareness algorithm to test and obtain the communication cost matrix used for MPI process mapping.

[0108] After obtaining the communication cost matrix, the number of cross-grid Halo cells between MPI processes can be used as an approximation of the communication volume to obtain the communication volume matrix between MPI processes of the CFD software. This communication volume matrix determines the MPI processes and communication volume that need to communicate synchronously in solving the PDE equation in each iteration.

[0109] The communication cost matrix and the communication volume matrix are matched using a quadratic allocation algorithm to obtain a mapping relationship between each MPI process and a specific computing device, that is, a communication mapping result, which is a mapping result with the minimum cost.

[0110] In one possible implementation, the communication hardware coverage boundary test algorithm obtains the number of computing nodes covered by each network routing module by comparing the delay of message transmission. Using the communication hardware coverage boundary test algorithm to determine the number of computing nodes covered by each network routing module includes: determining the communication delay between computing nodes, comparing the communication delay between computing nodes using the communication hardware coverage boundary test algorithm, and obtaining the number of computing nodes covered by each network routing module.

[0111]

[0112]

[0113] The calculation of communication delay may include:

[0114] The fixed-length data packets are transmitted between the calculation nodes, and the message transmission time is calculated. The message transmission time is averaged after multiple repeated transmission experiments as the communication delay. The length value of the data packet in the embodiment of the present application is the mode of the packet size in the CFD software; the number of transmission experiments is not limited and can be selected according to actual needs. In order to ensure the accuracy of the communication delay, the number of transmission experiments is generally not less than one thousand times.

[0115] In a possible implementation, based on the number of computing nodes covered by each network routing module, a communication cost matrix is ​​obtained by testing a dynamic topology awareness algorithm, including:

[0116] The communication hardware coverage boundary is determined based on the number of computing nodes covered by each network routing module. The communication hardware coverage boundary includes the network routing module corresponding to the row switch, the network routing module corresponding to the column switch, and the nodes contained in the network routing module. The communication delay test tool is used to test the node delay of the same network routing module, the first delay between network routing modules in the same row switch, the second delay between network routing modules in the same column switch, and the switch delay between switches in different rows and different columns. Using the dynamic topology awareness algorithm, the communication cost matrix is ​​obtained based on the node delay, first delay, second delay, and switch delay tests.

[0117]

[0118]

[0119] Among them, the computing nodes 1 and 2 under the NRM of different row / column switches are selected. According to the delay test method described above, a fixed-length packet is sent and the message transmission delay is tested to obtain the node delay Latency NRM , First delay Latency CS2. Latency RS And switch delay Latency DiffCR .

[0120] The above four delay data are used as weight values ​​of the communication standby matrix. Different weight values ​​are assigned to different row and column positions, and the positions and delays correspond one to one.

[0121] Communication cost matrix M phy The initialization value is 0. In the above for loop, the communication cost matrix M is assigned phy The corresponding numerical value.

[0122] In one possible implementation, the quadratic assignment algorithm is described. The quadratic assignment method is used to match two matrices so that the sum of the products of the two matrices is minimized. It analyzes the correlation or regression between the two matrices by comparing the similarity of the values ​​of each cell in the two matrices.

[0123] Assuming that there are adjacency matrices A and B, it is necessary to find a permutation of vertices so as to minimize the mismatch between the permuted A and B. The adjacency matrices A and B may be a communication cost matrix and a communication volume matrix.

[0124] The quadratic assignment algorithm begins by choosing an initial permutation matrix P(0), usually a "flat doubly stochastic matrix", i.e. a matrix where all elements are 1 / n. The objective function of the quadratic assignment problem (QAP) is usually defined as minimizing the product of the two. The QAP is relaxed to rQAP, which relaxes the constraints of the permutation matrix P to a doubly stochastic matrix D, i.e. a matrix where the sum of all rows and columns is 1.

[0125] This doubly random matrix may not be a permutation matrix, and it can be projected back to a set of permutation matrices through a linear assignment problem (LAP). The Frank-Wolfe algorithm is applied to solve a minimization problem with linear constraints to output a final permutation matrix that provides the optimal vertex matching between adjacency matrices A and B.

[0126] The above embodiment of the present application provides an acceleration method based on the above simulation software. Next, an acceleration device for simulation software also provided in the embodiment of the present application is described. The acceleration device is applied to a supercomputing system to execute the above Figure 1 The method shown.

[0127] The function of the acceleration device of the simulation software is explained. The structural diagram of the acceleration device of the simulation software is shown in FIG. Figure 4As shown, it includes a discretization module 401, an allocation module 402, an intra-node communication module 403, a determination module 404, a message transmission module 405 and a calculation module 406.

[0128] in,

[0129] Discretization module 401, for discretizing the CFD simulation task to be processed and generating a grid to be calculated in response to obtaining the CFD simulation task to be processed;

[0130] An allocation module 402 is used to allocate the target computing grid obtained by splitting the to-be-computed grid to a message passing interface MPI process, and the MPI process is mapped to a central processing unit CPU core of a computing node for execution;

[0131] The intra-node communication module 403 is used to implement the intra-node communication of the computing node based on the shared memory mode;

[0132] A determination module 404 is used to determine the communication mapping result of the MPI process;

[0133] A message transmission module 405, configured to complete inter-node message transmission of the computing node based on the communication mapping result;

[0134] The computing module 406 is used to use a neural network solver adapted to a heterogeneous accelerator to perform calculations on the computing nodes, and to fuse the calculation results of each computing node to obtain a simulation result.

[0135] In a possible implementation, the determining module 403 includes:

[0136] A determination submodule, used to determine the number of computing nodes covered by each network routing module using a communication hardware coverage boundary test algorithm;

[0137] A testing submodule, used to obtain a communication cost matrix by testing using a dynamic topology awareness algorithm based on the number of computing nodes covered by each network routing module;

[0138] The determination submodule is further used to determine the communication volume matrix according to the number of cross-grids of the target computing grids between the MPI processes;

[0139] The matching submodule is used to match the communication cost matrix and the communication volume matrix to obtain the communication mapping result of the MPI process.

[0140] In a possible implementation, the determination submodule is used to determine the number of computing nodes covered by each network routing module using a communication hardware coverage boundary test algorithm, including:

[0141] A determination unit, configured to determine a communication delay between the computing nodes;

[0142] The comparison unit is used to compare the communication delays between the computing nodes using the communication hardware coverage boundary test algorithm to obtain the number of computing nodes covered by each network routing module.

[0143] In a possible implementation, the test submodule is specifically used for:

[0144] The communication hardware coverage boundary is determined based on the number of computing nodes covered by each network routing module, and the communication hardware coverage boundary includes the network routing modules corresponding to the row switches, the network routing modules corresponding to the column switches, and the nodes included in the network routing modules; the node delay of the same network routing module, the first delay between the network routing modules of the same row switches, the second delay between the network routing modules of the same column switches, and the switch delay between switches in different rows and different columns are tested using a communication delay testing tool; and the communication cost matrix is ​​obtained based on the node delay, the first delay, the second delay, and the switch delay test using a dynamic topology awareness algorithm.

[0145] In a possible implementation, the message delivery module 405 is specifically used for:

[0146] The message transmission path between the computing nodes where the MPI process is located is determined based on the communication mapping result; and the message transmission between the computing nodes is completed based on the message transmission path.

[0147] The embodiment of the present application provides an acceleration device for simulation software, including a discretization module, an allocation module, an intra-node communication module, a determination module, a message passing module and a calculation module. The discretization module is used to discretize the CFD simulation task to be processed in response to obtaining a computational fluid dynamics CFD simulation task to be processed, and generate a grid to be calculated. The allocation module is used to allocate the target calculation grid obtained by splitting the grid to be calculated to the message passing interface MPI process, and the MPI process is mapped to the CPU core of the central processing unit of the computing node for execution. The intra-node communication module is used to realize the intra-node communication of the computing node based on the shared memory mode. The determination module is used to determine the communication mapping result of the MPI process. The message passing module is used to complete the inter-node message passing of the computing node based on the communication mapping result. The calculation module is used to calculate the computing node using a neural network solver adapted to a heterogeneous accelerator, and the calculation results of each computing node are integrated to obtain a simulation result. In this way, a comprehensive optimization framework for CFD software for supercomputing systems is proposed, which optimizes the intra-node communication and inter-node communication of computing nodes and the reasoning speed of heterogeneous accelerators. Reduce the number of MPI processes in a single computing node, utilize the principle of communication locality, use intra-node shared memory mode communication and inter-node process mapping to optimize the communication speed of computing nodes, fully consider the storage and communication characteristics of computing nodes in supercomputing systems, and combine and optimize computing resources and storage resources. By analyzing the memory access characteristics of heterogeneous accelerators, a neural network solver adapted to heterogeneous accelerators is proposed for node computing, reducing the number of memory accesses during the reasoning process of heterogeneous accelerators. The embodiment of the present application achieves an improvement in the simulation performance of CFD software.

[0148] Based on the acceleration method of simulation software provided by the above method embodiment, the embodiment of the present application provides an acceleration device for simulation software, see Figure 5 , the device includes: a processor, a memory, and a system bus;

[0149] The processor and the memory are connected via the system bus;

[0150] The memory is used to store one or more programs, and the one or more programs include instructions, which, when executed by the processor, enable the processor to execute the acceleration method of the simulation software described in any of the above embodiments.

[0151] Based on a simulation software acceleration method provided in the above method embodiment, an embodiment of the present application provides a computer-readable storage medium, which stores instructions. When the instructions are executed on a device, the device executes the simulation software acceleration method described in any of the above embodiments.

[0152] Each embodiment in this specification is described in a progressive manner, and the same or similar parts between the embodiments can be referred to each other, and each embodiment focuses on the differences from other embodiments. In particular, for the device or device embodiment, since it is basically similar to the method embodiment, the description is relatively simple, and the relevant parts can be referred to the partial description of the method embodiment. The device and device embodiments described above are merely schematic, wherein the units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, they may be located in one place, or they may be distributed on multiple network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the scheme of this embodiment. Ordinary technicians in this field can understand and implement it without paying creative labor.

[0153] Professionals may further appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the composition and steps of each example have been generally described in the above description according to function. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professionals and technicians may use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this application.

[0154] The above description of the disclosed embodiments enables those skilled in the art to implement or use the present application. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present application. Therefore, the present application will not be limited to the embodiments shown herein, but will conform to the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A method for accelerating simulation software, characterized in that: The method is applied to a supercomputing system, comprising: In response to obtaining a computational fluid dynamics (CFD) simulation task to be processed, discretizing the CFD simulation task to be processed and generating a grid to be calculated; The target computing grid obtained by splitting the to-be-computed grid is assigned to a message passing interface MPI process, and the MPI process is mapped to a central processing unit CPU core of a computing node for execution; Implementing intra-node communication of the computing nodes based on a shared memory mode; Determine the communication mapping result of the MPI process; completing inter-node message transmission of the computing nodes based on the communication mapping result; The computing nodes are calculated using a neural network solver adapted to a heterogeneous accelerator, and the calculation results of each computing node are integrated to obtain a simulation result.

2. The acceleration method according to claim 1, characterized in that: The determining of the communication mapping result of the MPI process comprises: The communication hardware coverage boundary test algorithm is used to determine the number of computing nodes covered by each network routing module; Based on the number of computing nodes covered by each network routing module, a communication cost matrix is ​​obtained by testing a dynamic topology awareness algorithm; Determine the communication volume matrix according to the number of cross-grids of the target computing grid between MPI processes; The communication cost matrix and the communication volume matrix are matched to obtain a communication mapping result of the MPI process.

3. The acceleration method according to claim 2, characterized in that: The method of using the communication hardware coverage boundary test algorithm to determine the number of computing nodes covered by each network routing module includes: determining a communication delay between the computing nodes; The communication hardware coverage boundary test algorithm is used to compare the communication delays between the computing nodes to obtain the number of computing nodes covered by each network routing module.

4. The acceleration method according to claim 2, characterized in that: The method of obtaining a communication cost matrix based on the number of computing nodes covered by each network routing module and using a dynamic topology awareness algorithm test includes: Determine the communication hardware coverage boundary based on the number of computing nodes covered by each network routing module, wherein the communication hardware coverage boundary includes the network routing modules corresponding to the row switches, the network routing modules corresponding to the column switches, and the nodes included in the network routing modules; Using a communication delay test tool, respectively test the node delay of the same network routing module, the first delay between network routing modules of switches in the same row, the second delay between network routing modules of switches in the same column, and the switch delay between switches in different rows and different columns; The communication cost matrix is ​​obtained by using a dynamic topology awareness algorithm based on the node delay, the first delay, the second delay and the switch delay test.

5. The acceleration method according to claim 1, characterized in that: The completing the inter-node message transmission of the computing node based on the communication mapping result includes: Determine the message transmission path between the computing nodes where the MPI process is located based on the communication mapping result; Inter-node message transmission of computing nodes is completed based on the message transmission path.

6. An acceleration device for simulation software, characterized in that: The acceleration device is applied to a supercomputing system, comprising: A discretization module, for discretizing the CFD simulation task to be processed and generating a grid to be calculated in response to obtaining the CFD simulation task to be processed; An allocation module is used to allocate the target computing grid obtained by splitting the to-be-computed grid to a message passing interface MPI process, and the MPI process is mapped to the central processing unit CPU core of the computing node for execution; An intra-node communication module, used to implement intra-node communication of the computing node based on a shared memory mode; A determination module, used to determine the communication mapping result of the MPI process; A message transmission module, used for completing the inter-node message transmission of the computing node based on the communication mapping result; The computing module is used to use a neural network solver adapted to a heterogeneous accelerator to perform calculations on the computing nodes, and to fuse the calculation results of each computing node to obtain a simulation result.

7. The acceleration device according to claim 6, characterized in that: The determining module comprises: A determination submodule, used to determine the number of computing nodes covered by each network routing module using a communication hardware coverage boundary test algorithm; A testing submodule, used to obtain a communication cost matrix by testing using a dynamic topology awareness algorithm based on the number of computing nodes covered by each network routing module; The determination submodule is further used to determine the communication volume matrix according to the number of cross-grids of the target computing grids between the MPI processes; The matching submodule is used to match the communication cost matrix and the communication volume matrix to obtain the communication mapping result of the MPI process.

8. The acceleration device according to claim 7, characterized in that: The determination submodule is used to determine the number of computing nodes covered by each network routing module using a communication hardware coverage boundary test algorithm, including: A determination unit, configured to determine a communication delay between the computing nodes; The comparison unit is used to compare the communication delays between the computing nodes using the communication hardware coverage boundary test algorithm to obtain the number of computing nodes covered by each network routing module.

9. The acceleration device according to claim 7, characterized in that: The test submodule is specifically used for: The communication hardware coverage boundary is determined based on the number of computing nodes covered by each network routing module, and the communication hardware coverage boundary includes the network routing modules corresponding to the row switches, the network routing modules corresponding to the column switches, and the nodes included in the network routing modules; the node delay of the same network routing module, the first delay between the network routing modules of the same row switches, the second delay between the network routing modules of the same column switches, and the switch delay between switches in different rows and different columns are tested using a communication delay testing tool; and the communication cost matrix is ​​obtained based on the node delay, the first delay, the second delay, and the switch delay test using a dynamic topology awareness algorithm.

10. The acceleration device according to claim 6, characterized in that: The message transmission module is specifically used for: The message transmission path between the computing nodes where the MPI process is located is determined based on the communication mapping result; and the message transmission between the computing nodes is completed based on the message transmission path.

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