Heterogeneous device task migration optimization method, system, device, medium and product

Abstract

The application discloses a heterogeneous device task migration optimization method, system, device, medium and product, relates to the fields of artificial intelligence and heterogeneous computing technology, and comprises the following steps: adjusting the mapping between task nodes in a preset directed acyclic graph and execution devices according to the resource state of the preset execution devices, obtaining a new directed acyclic graph; comparing the directed acyclic graph with the new directed acyclic graph, obtaining migration requirements; determining target device context of a target device according to the migration requirements and device context of a source device, and migrating the target device context to the target device, wherein the device context comprises a computing unit, memory capacity and data format of the execution device; mapping a task corresponding to the task node into an instruction task suitable for an instruction set of the target device; and calling a device acceleration library of the target device to process the instruction task. The application optimizes the task migration strategy between heterogeneous devices and improves migration efficiency.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of artificial intelligence and heterogeneous computing, and particularly relates to a heterogeneous device task migration optimization method, system, device, medium and product. BACKGROUND

[0002] With the rapid development of artificial intelligence technology and the increasing demand for computing, AI tasks have become increasingly complex and diverse. In order to cope with these challenges, modern computing systems usually adopt the way of multiple heterogeneous devices working together, such as GPU (Graphics Processing Unit), NPU (Neural Processing Unit) and CPU (Central Processing Unit) and so on. These heterogeneous devices each have unique hardware characteristics and advantages, and can jointly undertake different parts of AI tasks, thereby improving overall computing efficiency and performance. However, in practical applications, the task migration between heterogeneous devices has become a problem to be solved. The traditional task allocation method usually adopts a static way, that is, before the task starts to execute, the task is allocated to each device according to the preset rules or algorithms. The defect of this method is the lack of flexibility, which cannot dynamically adjust the task allocation according to the changes of device state and task demand. Especially in the processing of complex AI tasks, the static allocation method often leads to the problem of low efficiency of task migration. Because of the differences in hardware characteristics and computing capacity of different heterogeneous devices, static allocation can hardly guarantee that the task can fully utilize the hardware advantages of the target device. In addition, a large amount of context switching and data transmission is required when the task is migrated between devices, which will consume a lot of time and resources, further reducing the efficiency of task migration. Therefore, how to optimize the task migration strategy between heterogeneous devices and improve the migration efficiency has become a technical problem to be solved. SUMMARY

[0003] The main purpose of the present application is to provide a heterogeneous device task migration optimization method, system, device, medium and product, which aims to optimize the task migration strategy between heterogeneous devices and improve the migration efficiency.

[0004] To achieve the above-mentioned purpose, the present application provides a heterogeneous device task migration optimization method, comprising:

[0005] adjusting the mapping between the task nodes in the preset directed acyclic graph and the execution devices according to the preset resource state of the execution devices, to obtain a new directed acyclic graph;

[0006] comparing the directed acyclic graph and the new directed acyclic graph to obtain migration requirements, wherein the migration requirements include the migration of the task corresponding to the task node from the source device to the target device.

[0007] Determine a target device context of a target device according to a migration requirement and a device context of a source device, and migrate the target device context to the target device, wherein the device context includes a computing unit, memory capacity, and data format of the execution device;

[0008] Mapping the task corresponding to the task node to an instruction task adapted to the target device instruction set;

[0009] Call the device acceleration library of the target device to process the instruction task.

[0010] In one embodiment, the step of adjusting the mapping between task nodes and execution devices in a preset directed acyclic graph according to the resource status of the preset execution device to obtain a new directed acyclic graph includes:

[0011] Vectorize the resource status to generate resource vectors, and vectorize the tasks corresponding to the task nodes to generate task vectors;

[0012] Determine the matching degree between the execution device and the task according to the resource vector and the task vector;

[0013] Determine the mapping relationship between the execution device and the task node corresponding to the task based on the matching degree, wherein, for each task node, select the execution device with the highest matching degree with the task node to establish the mapping relationship;

[0014] Inputting the mapping relationship into a preset migration cost optimization model to obtain an optimized mapping relationship;

[0015] The new directed acyclic graph is adjusted according to the optimized mapping relationship, and the step of comparing the directed acyclic graph with the new directed acyclic graph is performed based on the adjusted new directed acyclic graph.

[0016] In one embodiment, the step of inputting the mapping relationship into a preset migration cost optimization model to obtain the optimized mapping relationship includes:

[0017] If there are multiple mapping relationships, the mapping relationships are input into a preset migration cost optimization model, and the total migration cost of the multiple mapping relationships is output;

[0018] The mapping relationship is optimized by the strategy of minimizing the total migration cost to obtain the optimized mapping relationship.

[0019] In one embodiment, the step of calling the device acceleration library of the target device to process the instruction task includes:

[0020] Calculate the performance indicators of each device acceleration library of the target device;

[0021] Call the device acceleration library with the highest performance index to process the instruction task.

[0022] In an embodiment, the step of mapping the task corresponding to the task node as an instruction task adapted to the instruction set of the target device comprises:

[0023] transmitting the source device context of the source device from the memory space of the source device to the shared memory space through a preset data channel, wherein the source device and the target device share the memory space;

[0024] determining the target device context in the shared memory space according to the migration requirement and the source device context;

[0025] transmitting the target device context in the shared memory space to the memory space of the target device.

[0026] In an embodiment, the step of obtaining the migration requirement comprises:

[0027] decomposing the migration requirement and the task of the task node, and decomposing the task into foreground tasks and background tasks, wherein the foreground tasks are key tasks that need to be executed immediately to ensure real-time and continuity, and the background tasks are auxiliary tasks that can be processed in an asynchronous mode and do not affect the main process;

[0028] processing the background tasks in the background of the target device using the idle resources of the target device while the foreground tasks are executed on the target device.

[0029] In addition, to achieve the above-mentioned purposes, the application further provides a heterogeneous device task migration optimization system, which comprises:

[0030] a graph management module configured to adjust the mapping between the task nodes in the preset directed acyclic graph and the execution devices according to the preset resource state of the execution devices, and obtain a new directed acyclic graph;

[0031] a migration requirement management module configured to compare the directed acyclic graph and the new directed acyclic graph, and obtain a migration requirement, wherein the migration requirement comprises the migration of the task corresponding to the task node from the source device to the target device;

[0032] a device context management module configured to determine the target device context of the target device according to the migration requirement and the device context of the source device, and migrate the target device context to the target device, wherein the device context comprises the computing unit, the memory capacity, and the data format of the execution device;

[0033] an instruction set mapping module configured to map the task corresponding to the task node as an instruction task adapted to the instruction set of the target device;

[0034] a device acceleration module configured to call the device acceleration library of the target device to process the instruction task.

[0035] In addition, to achieve the above object, the application further provides a heterogeneous device task migration optimization device, which comprises a memory, a processor and a computer program stored in the memory and executable on the processor, and the computer program is configured to implement the steps of the above-mentioned heterogeneous device task migration optimization method.

[0036] In addition, to achieve the above object, the application further provides a medium, which is a computer readable storage medium, and the medium stores a computer program, and the computer program is executable on a processor to implement the steps of the above-mentioned heterogeneous device task migration optimization method.

[0037] In addition, to achieve the above object, the application further provides a product, which is a computer program product, and the computer program product comprises a computer program, and the computer program is executable on a processor to implement the steps of the above-mentioned heterogeneous device task migration optimization method.

[0038] The one or more technical solutions provided by the application have at least the following technical effects:

[0039] The application adjusts the mapping between the task nodes in the preset directed acyclic graph and the execution devices according to the preset resource state of the execution devices, obtains a new directed acyclic graph, dynamically optimizes task allocation, ensures that tasks are scheduled to devices with more sufficient resources and higher execution efficiency, and improves overall system performance and resource utilization; by comparing the directed acyclic graph with the new directed acyclic graph, migration requirements are obtained, wherein the migration requirements include migration of tasks corresponding to the task nodes from source devices to target devices, and the priority and order of migration are determined, so that critical tasks can preferentially obtain required resources and system overhead and delay caused by migration are reduced; the target device context of the target device is determined according to the migration requirements and the device context of the source device, and the target device context is migrated to the target device, wherein the device context includes the computing unit, memory capacity, data format of the execution device, and environment configuration and dependency relationship required for task execution, so as to ensure that the task can run seamlessly on the target device and avoid errors caused by mismatched context; the task corresponding to the task node is mapped to an instruction task adapted to the instruction set of the target device, the execution efficiency of the task on the target device is further improved through instruction-level optimization, and performance loss caused by instruction translation and simulation is reduced; the device acceleration library of the target device is called to process the instruction task, the hardware acceleration capabilities of the target device such as GPU parallel computing and special hardware accelerator are fully utilized, fast processing of the task is realized, and overall system performance is improved. Through the above steps, the application not only solves the problems of resource waste and low execution efficiency caused by unreasonable task allocation, but also realizes efficient execution of the task and maximized utilization of resources through fine migration strategy and task adaptation. BRIEF DESCRIPTION OF DRAWINGS

[0040] The accompanying drawings, which are incorporated herein and constitute part of the specification, illustrate embodiments consistent with the application and, together with the description, further serve to explain the principles of the application.

[0041] In order to more clearly illustrate the technical solutions of the embodiments of the present application or the prior art, the accompanying drawings required by the embodiments or the prior art description will be briefly introduced as follows. Obviously, those skilled in the art can obtain other drawings from these drawings without creative effort.

[0042] Figure 1 A flowchart of the heterogeneous device task migration optimization method of the first embodiment of the present application;

[0043] Figure 2 A scenario diagram of the heterogeneous device task migration optimization method of the present application;

[0044] Figure 3 A flowchart of the heterogeneous device task migration optimization method of the second embodiment of the present application;

[0045] Figure 4 A module structure diagram of the heterogeneous device task migration optimization system of the embodiment of the present application;

[0046] Figure 5 A device structure diagram of the hardware running environment involved in the heterogeneous device task migration optimization method of the embodiment of the present application.

[0047] The object implementation, functional features and advantages of the present application will be further described with reference to the embodiments and the accompanying drawings. DETAILED DESCRIPTION

[0048] It should be understood that the specific embodiments described herein are only used to explain the technical solutions of the present application, and are not used to limit the present application.

[0049] In order to better understand the technical solutions of the present application, the following will be described in detail in combination with the drawings of the specification and the specific embodiments.

[0050] It should be noted that the execution subject of the present embodiment can be a computing service device with data processing, network communication and program running functions, such as a tablet computer, a personal computer, a mobile phone, etc., or an electronic device, a terminal system, etc. capable of realizing the above functions. The present embodiment and the following embodiments will be described below taking the system as an example.

[0051] Based on this, the present embodiment provides a heterogeneous device task migration optimization method, which will be described in detail with reference to Figure 1 , Figure 1A flowchart of a heterogeneous device task migration optimization method of the present application is shown in FIG. 1. The heterogeneous device task migration optimization method includes steps S10-S50.

[0052] In step S10, the mapping between task nodes in a preset directed acyclic graph and execution devices is adjusted according to a preset resource state of the execution devices, to obtain a new directed acyclic graph.

[0053] It should be noted that the preset execution devices refer to hardware devices such as servers and computers that are previously set for executing tasks. The resource state refers to the current resource usage of the execution devices, including computing power and memory occupation. The directed acyclic graph is a data structure composed of nodes and directed edges, and is used to represent the dependency relationship between tasks.

[0054] The system will adjust the previously defined directed acyclic graph according to the resource state (such as memory occupation rate) of each preset execution device. Each task node in the directed acyclic graph originally has a mapping relationship with a certain execution device, indicating that the task should be executed on the device. Now, according to the resource state, these mapping relationships will be adjusted to obtain a new directed acyclic graph. The mapping relationship between the task nodes in the new directed acyclic graph and the execution devices reflects the task allocation after resource optimization.

[0055] For example, the directed acyclic graph can be represented by formula (I):

[0056] G = (V, E), V = {task nodes}, E = {dependency relationship} formula (I)

[0057] Wherein, G is the directed acyclic graph, V represents the task node set, and E represents the dependency relationship set of the task nodes.

[0058] Adjusting the directed acyclic graph according to the resource state of the execution device can be represented by formula (II):

[0059] G 迁移后 = f(G 迁移前 , S d ) formula (II)

[0060] Wherein, G 迁移前 represents the original directed acyclic graph, S d represents the target device resource state, G 迁移后 represents the new directed acyclic graph, and f(G 迁移前 , S d ) represents a function of adjusting the directed acyclic graph according to the resource state.

[0061] Step S20, comparing the directed acyclic graph and the new directed acyclic graph to obtain migration requirements, wherein the migration requirements include tasks corresponding to the task migrating from the source device to the target device;

[0062] It should be noted that the migration requirement is the requirement of the task from the current execution device to another execution device. The source device is the execution device where the task is currently located. The target device is the execution device to which the task will be migrated.

[0063] The system will compare the original directed acyclic graph and the newly generated directed acyclic graph to find out which task nodes are migrated. This is usually achieved by comparing the positions of the same task nodes in the two directed acyclic graphs. If it is found that the position of a task node in the two directed acyclic graphs is different, it means that the task needs to be migrated. The migration requirement will clearly indicate that the task is migrated from the source device to the target device.

[0064] Exemplarily, referring to Figure 2 , migrating the task from the source device to the target device according to the migration requirement.

[0065] Step S30, determining the target device context of the target device according to the migration requirement and the device context of the source device, and migrating the target device context to the target device, wherein the device context includes the computing unit, memory capacity, and data format of the execution device.

[0066] It should be noted that the device context is the current configuration and state information of the execution device, such as the computing unit state, memory capacity, and data format.

[0067] The system will determine the target device context of the target device according to the migration requirement and the device context of the source device. The device context contains the current configuration and state information of the execution device, which is necessary for task migration to ensure that the task can be executed correctly on the target device. Therefore, the system needs to migrate the device context of the source device to the target device. This usually involves data copying and conversion to ensure that the target device can understand and process the data.

[0068] Exemplarily, the device context is represented by formula (three)

[0069] C d =(c1,c2,…,c n ) formula (three)

[0070] Wherein, C d represents the device context, and c1 to c n represents the computing unit, memory capacity, and data format of device 1 to device n.

[0071] The migration process of the device context is represented by formula (four)

[0072] C t = f(C s , T) Formula (Four)

[0073] where C s represents the source device context, C t represents the target device context, T represents the migration task requirement, and f(C s , T) represents a function with C s , T as variables.

[0074] Step S40, mapping the task corresponding to the task node into an instruction task adapted to the instruction set of the target device.

[0075] It should be noted that the instruction set is a collection of instructions that the execution device can understand and execute.

[0076] The system will map the task corresponding to the task node into an instruction task adapted to the instruction set of the target device. Since different execution devices may use different instruction sets, it is necessary to convert the task into an instruction format that the target device can understand and execute. This process usually involves steps such as compilation and linking to ensure that the generated instruction task is compatible with the hardware and software environment of the target device.

[0077] For example, the rule of task mapping instruction is represented as formula (five)

[0078] O v → τ d Formula (Five)

[0079] where O v is the task of the task node, and τ d is the instruction set adapted to the target device.

[0080] Step S50, calling the device acceleration library of the target device to process the instruction task.

[0081] It should be noted that the device acceleration library is provided by the execution device and is used to accelerate the processing of specific types of tasks.

[0082] The system will call the device acceleration library of the target device to process the instruction task. The device acceleration library is provided by the execution device and is used to accelerate the processing of specific types of tasks. It contains algorithms and data structures optimized for device hardware, which can significantly improve the processing speed of tasks. By calling these libraries, the system can fully utilize the performance advantages of the target device to quickly complete task processing.

[0083] The embodiment adjusts mapping between task nodes in the preset directed acyclic graph and execution devices according to a preset resource state of the execution devices, obtains a new directed acyclic graph, dynamically optimizes task allocation, ensures that tasks are scheduled to devices with more sufficient resources and higher execution efficiency, and improves overall system performance and resource utilization; compared with the directed acyclic graph and the new directed acyclic graph, migration requirements are obtained, wherein the migration requirements include migration of tasks corresponding to task nodes from source devices to target devices, and priority and order of the migration are determined, so that critical tasks can preferentially obtain required resources and system overhead and delay caused by migration are reduced; target device contexts of the target devices are determined according to the migration requirements and device contexts of the source devices, and the target device contexts are migrated to the target devices, wherein the device contexts include a computing unit, memory capacity, data format of the execution devices, and environment configuration and dependency required for task execution, so that the tasks can seamlessly run on the target devices and errors caused by context mismatch are avoided; tasks corresponding to the task nodes are mapped to instruction tasks suitable for instruction sets of the target devices, execution efficiency of the tasks on the target devices is further improved through instruction-level optimization, and performance loss caused by instruction translation and simulation is reduced; device acceleration libraries of the target devices are called to process the instruction tasks, hardware acceleration capabilities of the target devices such as GPU parallel computing and special hardware accelerators are fully utilized, fast processing of the tasks is implemented, and overall system performance is improved. Through the above steps, the embodiment not only solves the problems of resource waste and low execution efficiency caused by unreasonable task allocation, but also implements efficient execution of the tasks and maximized utilization of resources through fine migration strategies and task adaptation.

[0084] Based on the first embodiment, in the second embodiment, the same or similar contents as the above first embodiment can be referred to the above description, and the subsequent will not be described in detail. On this basis, referring to Figure 3 , the steps after step S10 further include steps A10-A50:

[0085] Step A10, performing vectorization processing on the resource state to generate a resource vector, and performing vectorization processing on the task corresponding to the task node to generate a task vector;

[0086] It should be noted that the resource vector is a vector form obtained by quantizing the resource state, and each component represents a state of a resource, such as a central processing unit usage rate and a memory occupation. The task vector is obtained by quantizing the task corresponding to the task node into a vector form, and each component can represent a specific attribute and a task amount of the task.

[0087] Step A20, determining a matching degree between the execution devices and the tasks according to the resource vector and the task vector;

[0088] It should be noted that the matching degree is the matching degree between the execution device and the task, which is used to evaluate whether the execution device is suitable for processing a specific task.

[0089] The system will use the resource vector and the task vector to calculate the matching degree between the execution device and the task requirement. This matching degree is an evaluation index for measuring whether the execution device is suitable for processing a specific task. The calculation of the matching degree may involve multiple factors, such as the availability of resources, the demand of the task for resources, the priority of the task, etc.

[0090] Exemplarily, the matching degree calculation formula is represented as formula (six)

[0091]

[0092] where S d is the resource vector, T t is the requirement vector, S d ·T t is the dot product of the two vectors, ‖S d ‖·‖T t ‖ is the product of the modulus of the two vectors, and the value range of formula (six) is between [-1, 1]. When S d and T t are in the same direction, the matching degree is 1, indicating that the device resources completely meet the task requirements. When S d and T t are in completely opposite directions, the matching degree is -1, indicating that the device resources are completely mismatched with the task requirements. When S d and T t are completely perpendicular, the matching degree is 0, indicating that the device resources have no correlation with the task requirements.

[0093] Step A30, determining the mapping relationship between the execution device and the task node according to the matching degree, wherein for each task node, the execution device with the highest matching degree with the task node is selected to establish a mapping relationship;

[0094] According to the matching degree of the execution device and the task corresponding to the task node, the system will determine the mapping relationship between the execution device and the task node. This mapping relationship indicates which tasks should be migrated to which execution devices for execution. This step is the core of task migration, which determines the efficiency and effect of migration.

[0095] For example, assume there is a distributed computing system with three execution devices (A, B, C) and five task nodes (T1, T2, T3, T4, T5). Device A: a high-performance computing server, good at handling compute-intensive tasks, currently low load. Device B: a memory-optimized server, with a large amount of memory, suitable for handling data-intensive tasks, currently medium load. Device C: an I / O-optimized server, with fast network bandwidth and storage speed, suitable for handling I / O-intensive tasks, currently high load. Task T1: a compute-intensive task that requires a large amount of computing resources. Task T2: a data-intensive task that requires processing a large amount of data. Task T3: an I / O-intensive task that requires frequent reading and writing to disk. Task T4: similar to T1, but with slightly less computing. Task T5: similar to T2, but with slightly less data processing.

[0096] The system will calculate the matching degree based on the resource capabilities of each device and the requirements of each task. For example: the matching degree of device A and task T1 is very high, because A is good at handling compute-intensive tasks and the current load is low. The matching degree of device B and task T2 is also very high, because B has a large amount of memory and is suitable for handling data-intensive tasks. The matching degree of device C and task T3 may be low, because C is currently under high load and is not suitable for handling I / O-intensive tasks (although it is optimized in this regard).

[0097] Based on these matching degrees, the system may decide: to establish a mapping relationship between task T1 and device A. To establish a mapping relationship between task T2 and device B. To establish a mapping relationship between task T3 and another device more suitable for handling I / O-intensive tasks (if such a device exists in the system), or if it must be selected, it may choose A or B with lower load, although this is not the optimal choice. To establish a mapping relationship between tasks T4 and T5 with A and B respectively, because they are similar to T1 and T2, but the resource requirements are slightly smaller. Through such a mapping relationship, the system can ensure that tasks are scheduled to the most suitable devices for execution, thereby improving the performance and efficiency of the overall system.

[0098] Step A40, input the mapping relationship into the preset migration cost optimization model to obtain an optimized mapping relationship;

[0099] It should be noted that the migration cost optimization model is a mathematical model for calculating the optimal task migration scheme based on the migration requirements and the resource state of the execution device to minimize the migration cost.

[0100] After obtaining the preliminary mapping relationship, the system will input it into the preset migration cost optimization model. This model will calculate the optimal task migration scheme based on the migration requirements and the resource state of the execution device to minimize the migration cost. The migration cost may include data transmission cost, device startup cost, task interruption cost, etc.

[0101] Step A50, adjust the new directed acyclic graph according to the optimized mapping relationship, and perform the step of comparing the directed acyclic graph and the new directed acyclic graph according to the adjusted new directed acyclic graph.

[0102] According to the optimized mapping relationship, the system will adjust the new directed acyclic graph (DAG) to reflect the new state of the task migration. Then, the system will continue to perform the step of comparing the directed acyclic graph and the new directed acyclic graph to ensure that the task allocation after migration is reasonable and there is no missing or repeated task. This process may be iterated multiple times until the optimal task migration scheme is found.

[0103] This embodiment embodies the idea of determining the task migration optimization scheme based on resource vectors and demand vectors. By quantifying the resource state and migration demand, the matching degree is calculated, and the optimal migration scheme is obtained by using the migration cost optimization model. This method can significantly improve the efficiency and effectiveness of task migration and optimize resource utilization.

[0104] In a feasible implementation, the step of step A40 further includes steps B10-B20:

[0105] Step B10, if there are multiple mapping relationships, input the mapping relationship into the preset migration cost optimization model, and output the total migration cost of multiple mapping relationships;

[0106] It should be noted that the total migration cost is the total cost required for task migration, which is calculated according to the migration cost optimization model, including but not limited to the cost caused by data transmission volume, device resource consumption, task interruption time, etc.

[0107] The system will calculate the migration cost of the current mapping relationship according to the preset migration cost optimization model. This migration cost is the total cost after considering the data transmission cost, device startup cost, task interruption time cost, etc. of the current multiple mapping relationships. The migration cost optimization model will calculate the corresponding migration cost according to different migration schemes (a migration scheme includes multiple mapping relationships), and output the cost value.

[0108] Step B20, optimize the mapping relationship by minimizing the total migration cost to obtain the optimized mapping relationship.

[0109] The system will adopt a strategy to optimize the mapping relationship to minimize the migration cost. This strategy may include various methods such as greedy algorithm, dynamic programming, heuristic search, etc. The specific strategy adopted depends on the specific form of the migration cost optimization model, the constraints of task migration, and the optimization goal of the system. In the process of optimization, the system will continuously adjust the mapping relationship, try different task migration schemes, and calculate the migration cost of each scheme. By comparing these cost values, the system can find the scheme with the lowest migration cost, i.e. the optimal mapping relationship. Finally, the system will apply the optimized mapping relationship to the actual task migration process. In this way, tasks can be migrated to the appropriate execution device according to the optimal mapping relationship, thereby minimizing the cost of task migration.

[0110] Exemplarily, the minimization of migration cost strategy is represented as formula (seven)

[0111]

[0112] where C ij represents the migration cost of migrating tasks from source device i to target device j, x ij represents the allocation of tasks from source device i to target device j, n is the number of source devices, and m is the number of target devices.

[0113] Exemplarily, assume we have a distributed computing system containing four execution devices (D1, D2, D3, D4) and five tasks to be executed (T1, T2, T3, T4, T5). There are multiple possible mapping relationships between these task nodes and execution devices, i.e. different tasks can be executed on different devices. The initial mapping relationship is as follows: mapping relationship 1: T1→D1, T2→D2, T3→D3, T4→D4, T5→D1; mapping relationship 2: T1→D2, T2→D3, T3→D4, T4→D1, T5→D2.

[0114] For each mapping relationship, input it into the migration cost optimization model, and the model will output the total migration cost of that mapping relationship. For example: the total migration cost of mapping relationship 1 may be 100 units (assuming based on the comprehensive calculation of the above factors). The total migration cost of mapping relationship 2 may be 120 units.

[0115] Because the goal is to find a mapping relationship that minimizes the total migration cost. Therefore, the system will compare the total migration cost of all mapping relationships, and select the one with the lowest cost as the optimized mapping relationship. For example, if the total migration cost of mapping relationship 1 is the lowest, then the system selects T1→D1, T2→D2, T3→D3, T4→D4, T5→D1 as the optimized mapping relationship.

[0116] This embodiment embodies the idea of calculating and optimizing task migration schemes by migrating cost optimization models. By comprehensively considering various migration cost factors and using a strategy optimization method to adjust the mapping relationship, the system can find a migration scheme with the lowest cost, thereby improving the efficiency and effectiveness of task migration.

[0117] Based on the first or second embodiment of the present application, in the third embodiment of the present application, the same or similar content as the above first or second embodiment can be referred to the above introduction, and will not be described in detail. The steps of step S50 further include steps C10-C20:

[0118] Step C10, calculate the performance index of each device acceleration library of the target device;

[0119] It should be noted that the device acceleration library is a software library optimized for a specific target device, used to accelerate the execution of instruction tasks. These libraries may contain efficient algorithm implementations, hardware-specific optimization codes, etc. The performance index is a quantitative index to measure the performance of the device acceleration library in processing specific instruction tasks, such as execution speed, resource utilization, power consumption, etc.

[0120] The system will evaluate the performance of each device acceleration library of the target device and calculate its performance index. This process may involve running a series of benchmark tests or simulation tasks to measure the performance of each device acceleration library in processing these tasks. Performance indicators can be multi-faceted, including but not limited to execution speed (i.e. how fast tasks are processed), resource utilization (such as CPU, memory, bandwidth, etc. Resource usage), power consumption (i.e. the amount of electricity consumed when executing tasks), etc. These performance indicators will be used as the basis for selecting device acceleration libraries later.

[0121] Step C20, call the device acceleration library with the highest performance index to process the instruction task.

[0122] The system will select the device acceleration library with the highest performance index to process the instruction task according to the calculated performance index. This process may involve weighing and comparing multiple performance indicators to determine which device acceleration library is the best overall. For example, if execution speed is the most important performance indicator, the system may select the device acceleration library with the fastest execution speed; if power consumption is a key factor, the system may select the device acceleration library with the lowest power consumption, while considering other performance indicators to ensure the overall performance is acceptable. Finally, the system calls the selected device acceleration library to process the instruction task. This calling process may involve passing the instruction task to the device acceleration library and waiting for its return processing result. Since the device acceleration library has been optimized for the target device, it is expected to have high efficiency and performance in processing the instruction task.

[0123] Exemplarily, the device acceleration library selection rule is represented as formula (eight)

[0124] M(O v )=argmax k {P k} formula (eight)

[0125] wherein, M(O v ) is the optimal device acceleration library, each k (k is a positive integer greater than 1) corresponds to a different device acceleration library, P k is the performance of the device acceleration library, and the device acceleration library with the highest performance index can be determined as the optimal device acceleration library through formula (eight).

[0126] The embodiment embodies the idea of calculating the performance index of the device acceleration library and selecting the optimal device acceleration library to process the instruction task. This method can ensure that the performance and resources of the target device can be fully utilized when processing the instruction task, and the efficiency and performance of the overall system are improved.

[0127] In a feasible implementation, the heterogeneous device task migration optimization method further includes steps D10-D20:

[0128] Step D10, transmitting the source device context of the source device from the memory space of the source device to the shared memory space through a preset data channel, wherein the source device and the target device share the memory space;

[0129] It should be noted that in this embodiment, different devices (such as CPU, GPU, etc.) share the same memory space, and the source device and the target device can access the same memory address without the need for data copying, thereby simplifying memory management and optimizing data transmission.

[0130] It should be noted that the preset data channel is a path or mechanism for transmitting data between the source device and the target device. This channel can be physical (such as a bus, network cable) or logical (such as a software-defined communication protocol).

[0131] Step D20, determining the target device context in the shared memory space according to the migration requirements and the source device context;

[0132] Step D30, transmitting the target device context in the shared memory space to the memory space of the target device.

[0133] The system applies a unified memory management model to adjust the memory space of the source device and the target device. This process involves configuring the memory management unit (MMU) or similar hardware / software components to ensure that the source device and the target device can access the same memory space. In this embodiment, the source device and the target device can share the memory address space, which means they can directly access and modify the same memory region without the need for data copying or additional memory allocation.

[0134] In combination with data prefetching and caching mechanisms, memory access efficiency can be further optimized, and data transmission latency can be reduced. For example, based on the historical access patterns and prediction models of tasks, it is determined which data should be prefetched intelligently. Machine learning algorithms are introduced to analyze the data access patterns of tasks and dynamically adjust the prefetching strategy. A cache system containing multiple levels (such as L1, L2, L3 cache) is constructed to fully utilize the speed and capacity advantages of different levels of storage devices. For different types of data and tasks, the cache replacement algorithm (such as LRU, LFU, etc.) is optimized to improve cache hit rate. By optimizing data structures and algorithms, the locality of data (i.e. the continuity and closeness of data in memory) is improved to reduce the probability of cache misses. Techniques such as loop unrolling and array transposition are used to improve the access pattern of data, making it more consistent with the access characteristics of the cache. A cache synchronization mechanism is implemented between heterogeneous devices to ensure data consistency between multiple devices. High-speed network interfaces and protocols (such as PCIe, NVLink, etc.) are used to speed up data transmission between devices.

[0135] The system transmits data between the source device and the target device in the memory space through a pre-configured data channel. Since the source device and the target device have been configured with a unified memory space, they can directly read and write data in this shared memory space. The pre-configured data channel can be a high-speed, low-latency communication path, such as a PCIe bus (Peripheral Component Interconnect Express, a high-speed serial computer expansion bus standard) or a DMA (Direct Memory Access) controller. This channel is responsible for transmitting data from the memory space of the source device to the memory space of the target device without the need for data copying through the central processor or other intermediate devices.

[0136] Exemplarily, the transmission time model is represented as formula (Nine)

[0137]

[0138] where T 传输 is the transmission time, D is the data volume, B is the transmission bandwidth, and L is the transmission delay.

[0139] The transmission time model after the data channel optimization transmission is represented by formula (ten)

[0140]

[0141] Where T 数据通道 is the transmission time after data channel optimization transmission, B 数据通道 is the transmission bandwidth after data channel optimization transmission.

[0142] The embodiment takes advantage of the unified memory management model, simplifies memory management and optimizes data transmission. By allowing the source device and the target device to directly access the same memory space, the system reduces the need for data replication, reduces the delay and overhead of data transmission. In addition, the preset data channel provides an efficient and reliable data transmission mechanism, ensuring the integrity and consistency of the data.

[0143] In a feasible implementation, the heterogeneous device task migration optimization method further includes steps E10-E20:

[0144] Step E10, decompose the tasks of the migration demand and the task node, and divide the tasks into foreground tasks and background tasks, wherein the foreground tasks are key tasks that need to be executed immediately to ensure real-time and continuity, and the background tasks are auxiliary tasks that can be processed in an asynchronous mode and do not affect the main process;

[0145] It should be noted that the asynchronous mode is a mode that can independently and in parallel execute tasks without blocking the execution of the main thread or foreground tasks. Asynchronous tasks in asynchronous mode are usually used to process operations that take a long time and do not need to be completed immediately. The background tasks of the embodiment can also be referred to as asynchronous tasks relative to the foreground tasks. In the embodiment, the background tasks refer to tasks that process data transmission and context switching, ensuring that the migration process has no blocking effect on the foreground tasks, and the foreground tasks refer to other tasks other than data transmission and context switching.

[0146] The system will decompose the tasks of the migration demand and the task node. This decomposition process involves detailed analysis and division of tasks to determine which tasks can be executed asynchronously and can be used as background tasks, and which tasks need to be completed immediately and need to be used as foreground tasks.

[0147] Step E20, while the foreground tasks are executed on the target device, the idle resources of the target device are used to process the background tasks in the background of the target device.

[0148] After determining the foreground tasks and background tasks, the system will perform parallel processing on these background tasks in the background while the foreground tasks are being executed. The foreground tasks are usually closely related to user interaction and require high real-time performance and response speed. The background tasks, on the other hand, are completed independently and in parallel without blocking the execution of foreground tasks. This processing method can significantly improve the overall performance of the system and user experience. Specifically, foreground tasks may involve interface operations, data display, and other tasks related to user interaction, which require immediate response to maintain good user experience. Background tasks may involve time-consuming operations such as data calculation, storage, and transmission, which can be performed asynchronously to avoid blocking the execution of foreground tasks.

[0149] Exemplarily, the task time model is represented as formula (eleven)

[0150] T 总 = max(T 迁移 , T 执行 ) formula (eleven)

[0151] where T 迁移 is the required time for the migration task, T 执行 is the required time for the execution task, and T 总 is the total required time.

[0152] The event flow is represented as formula (twelve)

[0153] ε = {e1, e2, …, e n} formula (twelve)

[0154] where ε represents a migration task, e1 to e n represent the steps of the migration task.

[0155] Further, message queues and event-driven architecture can be introduced to better manage the execution and communication of asynchronous tasks. For example, according to the requirements of the task and the characteristics of the system, select appropriate message queue middleware (such as RabbitMQ, Kafka, etc.). Configure the persistence, load balancing and fault tolerance mechanism of the message queue to ensure the reliability of the message and the stability of the system. Design an event-driven task scheduler to trigger task execution based on events. Use priority queue, work-stealing algorithm and other technologies to optimize task scheduling and execution efficiency. Introduce monitoring tools to track the execution status and progress of asynchronous tasks in real time. Design retry mechanism, timeout processing and error recovery strategy to deal with abnormal situations in task execution. Implement event communication mechanism between heterogeneous devices to ensure consistency and synchronization of events between multiple devices. Use the distributed characteristics of message queues to realize cross-device event broadcasting and subscription.

[0156] Through the embodiment, the system can more effectively utilize resources and improve the efficiency of task execution. Meanwhile, since the asynchronous task is executed in the background, it does not interfere with the normal progress of the foreground task, thereby ensuring the stability of the system and the user experience.

[0157] It should be noted that the above examples are only used to understand the present application and do not constitute a limitation on the heterogeneous device task migration optimization method of the present application. More forms of simple transformation based on this technical concept are within the protection scope of the present application.

[0158] The present application also provides a heterogeneous device task migration optimization system, please refer to Figure 4 The heterogeneous device task migration optimization system comprises:

[0159] A graph management module 10 adjusts the mapping of the task nodes in the preset directed acyclic graph and the execution devices according to the preset resource state of the execution devices, to obtain a new directed acyclic graph;

[0160] A migration demand management module 20 compares the directed acyclic graph and the new directed acyclic graph to obtain a migration demand, wherein the migration demand comprises the migration of the task corresponding to the task node from the source device to the target device;

[0161] A device context management module 30 determines a target device context of the target device according to the migration demand and the device context of the source device, and migrates the target device context to the target device, wherein the device context comprises a computing unit, a memory capacity and a data format of the execution device;

[0162] An instruction set mapping module 40 maps the task corresponding to the task node into an instruction task adapted to the instruction set of the target device;

[0163] A device acceleration module 50 calls a device acceleration library of the target device to process the instruction task.

[0164] The heterogeneous device task migration optimization system provided by the present application adopts the heterogeneous device task migration optimization method in the above embodiment, can optimize the task migration strategy between heterogeneous devices, and improve the migration efficiency. Compared with the prior art, the heterogeneous device task migration optimization system provided by the present application has the same beneficial effects as the heterogeneous device task migration optimization method provided by the above embodiment, and the other technical features in the heterogeneous device task migration optimization system are the same as the features disclosed in the above embodiment method, which will not be repeated here.

[0165] The application provides a heterogeneous device task migration optimization device, which comprises at least one processor and a memory connected with the at least one processor in communication; wherein the memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to perform the heterogeneous device task migration optimization method in the above-mentioned embodiment one.

[0166] Reference will be made to the following Figure 5 which shows a structural schematic diagram of the heterogeneous device task migration optimization device suitable for being used to implement the embodiments of the application. The heterogeneous device task migration optimization device in the embodiments of the application can include, but is not limited to, mobile terminals such as mobile phones, notebook computers, digital broadcast receivers, PDAs (Personal Digital Assistant), PADs (Portable Application Description), PMPs (Portable Media Player), vehicle-mounted terminals (such as vehicle-mounted navigation terminals), and the like, and fixed terminals such as digital TVs, desktop computers, and the like. Figure 5 The shown heterogeneous device task migration optimization device is only an example, and should not bring any limitation to the functions and use ranges of the embodiments of the application.

[0167] As Figure 5As shown, the heterogeneous device task migration optimization device can include a processing device 1001 (e.g., a central processor, a graphics processor, etc.) that can perform various appropriate actions and processes according to programs stored in a read only memory (ROM) 1002 or programs loaded from a storage device 1003 into a random access memory (RAM) 1004. Various programs and data required for the operation of the heterogeneous device task migration optimization device are also stored in the RAM 1004. The processing device 1001, the ROM 1002, and the RAM 1004 are connected to each other through a bus 1005. An input / output (I / O) interface 1006 is also connected to the bus. Generally, the following systems can be connected to the I / O interface 1006: input devices 1007 including, for example, a touch screen, a touch pad, a keyboard, a mouse, an image sensor, a microphone, an accelerometer, a gyroscope, etc.; output devices 1008 including, for example, a liquid crystal display (LCD), a speaker, a vibrator, etc.; the storage device 1003 including, for example, a magnetic tape, a hard disk, etc.; and a communication device 1009. The communication device 1009 can allow the heterogeneous device task migration optimization device to communicate with other devices wirelessly or by wire to exchange data. Although the heterogeneous device task migration optimization device with various systems is shown in the figure, it should be understood that all the shown systems are not required to be implemented or possessed. More or fewer systems can be alternatively implemented or possessed.

[0168] In particular, according to embodiments of the present disclosure, the processes described above with reference to the flowcharts can be implemented as a computer software program. For example, embodiments of the present disclosure include a computer program product comprising a computer program carried on a computer readable medium, the computer program containing program code for performing the methods shown in the flowcharts. In such embodiments, the computer program can be downloaded and installed from a network through the communication device, or installed from the storage device 1003, or installed from the ROM 1002. When the computer program is executed by the processing device 1001, the above-mentioned functions defined in the methods of the embodiments of the present disclosure are performed.

[0169] The heterogeneous device task migration optimization device provided by the present disclosure adopts the heterogeneous device task migration optimization method in the above-mentioned embodiments, can optimize the task migration strategy between heterogeneous devices, and improve the migration efficiency. Compared with the prior art, the heterogeneous device task migration optimization device provided by the present disclosure has the same beneficial effects as the heterogeneous device task migration optimization method provided by the above-mentioned embodiments, and other technical features in the heterogeneous device task migration optimization device are the same as the features disclosed in the previous embodiment method, which will not be repeated here.

[0170] It should be understood that portions of the application disclosed can be implemented in hardware, software, firmware, or combinations thereof. In the description of the embodiments above, specific features, structures, materials or characteristics can be combined in any suitable manner in one or more embodiments or examples.

[0171] The above merely provides the specific implementation of the present application, but the protection scope of the present application is not limited thereto, and any person skilled in the art can easily think of the changes or replacements within the technical scope disclosed by the present application, which should be covered within the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims.

[0172] The present application provides a medium, which is a computer readable storage medium, having computer readable program instructions (i.e. computer programs) stored thereon, the computer readable program instructions being used to execute the heterogeneous device task migration optimization method in the above embodiments.

[0173] The computer readable storage medium provided by the present application may, for example, be a U disk, but is not limited to an electric, magnetic, optical, electromagnetic, infrared, or semiconductor system or device, or any combination thereof. More specific examples of the computer readable storage medium can include, but are not limited to, an electric connection with one or more conductive wires, a portable computer disk, a hard disk, a random access memory (RAM), a read only memory (ROM), an erasable programmable read only memory (EPROM or flash memory), an optical fiber, a portable compact disk read only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination thereof. In the present embodiment, the computer readable storage medium can be any tangible medium containing or storing a program, which can be used by or in combination with an instruction execution system or device. The program code contained on the computer readable storage medium can be transmitted by any suitable medium, including but not limited to an electric wire, an optical cable, an RF (Radio Frequency), etc., or any suitable combination thereof.

[0174] The above computer readable storage medium can be contained in the heterogeneous device task migration optimization device; or can exist separately without being assembled into the heterogeneous device task migration optimization device.

[0175] The above computer readable storage medium carries one or more programs, which, when executed by the heterogeneous device task migration optimization device, cause the heterogeneous device task migration optimization device to:

[0176] adjust the mapping between the task nodes in the preset directed acyclic graph and the execution devices according to the preset resource state of the execution devices, to obtain a new directed acyclic graph;

[0177] compare the directed acyclic graph with the new directed acyclic graph, to obtain a migration requirement, wherein the migration requirement comprises migration of a task corresponding to a task node from a source device to a target device;

[0178] determine a target device context of the target device according to the migration requirement and a device context of the source device, and migrate the target device context to the target device, wherein the device context comprises a computing unit, a memory capacity, and a data format of the execution device;

[0179] map the task corresponding to the task node into an instruction task adapted to an instruction set of the target device;

[0180] invoke a device acceleration library of the target device to process the instruction task.

[0181] Computer program code for carrying out operations of the present application can be written in any combination of one or more programming languages, including an object oriented programming language such as Java, Smalltalk, C++ or the like and conventional procedural programming languages, such as the "C" programming language or similar programming languages. The program code can execute entirely on the user's computer, partly on the user's computer, as a stand-alone software package, partly on the user's computer and partly on a remote computer or entirely on the remote computer or server. In the latter scenario, the remote computer can be connected to the user's computer through any type of network, including a local area network (LAN) or a wide area network (WAN), or the connection can be made to an external computer (for example, through the Internet using an Internet Service Provider).

[0182] The flowcharts and block diagrams in the drawings illustrate the architecture, functionality, and operation of possible implementations of systems, methods and computer program products according to various embodiments of the present application. In this regard, each block in the flowcharts or block diagrams can represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical functions. It should also be noted that in some alternative implementations, the functions noted in the blocks can occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently or the blocks can sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and / or flowchart illustrations, and combinations thereof, can be implemented by a dedicated hardware-based system that performs the specified functions or operations, or combinations of hardware and software.

[0183] The modules involved in the embodiments of the present application can be implemented in software or in hardware. In some cases, the names of the modules do not limit the modules themselves.

[0184] The readable storage medium provided by the present application is a computer readable storage medium, which stores computer readable program instructions (i.e., a computer program) for executing the above-mentioned heterogeneous device task migration optimization method, and can optimize the task migration strategy between heterogeneous devices and improve the migration efficiency. Compared with the prior art, the computer readable storage medium provided by the present application has the same beneficial effects as the heterogeneous device task migration optimization method provided by the above-mentioned embodiments, which will not be repeated here.

[0185] The present application also provides a product, which is a computer program product, comprising a computer program, which is executed by a processor to implement the steps of the above-mentioned heterogeneous device task migration optimization method.

[0186] The computer program product provided by the present application can optimize the task migration strategy between heterogeneous devices and improve the migration efficiency. Compared with the prior art, the computer program product provided by the present application has the same beneficial effects as the heterogeneous device task migration optimization method provided by the above-mentioned embodiments, which will not be repeated here.

[0187] The above are only some embodiments of the present application, and do not limit the patent scope of the present application. Any equivalent structural transformation made by using the contents of the present application specification and drawings, or direct / indirect application in other related technical fields is included in the patent protection scope of the present application.

Claims

1. A heterogeneous device task migration optimization method, characterized in that: The heterogeneous device task migration optimization method includes: Adjusting the mapping between the task nodes and the execution devices in the preset directed acyclic graph according to the resource status of the preset execution devices to obtain a new directed acyclic graph; Comparing the directed acyclic graph and the new directed acyclic graph to obtain a migration requirement, wherein the migration requirement includes migrating the task corresponding to the task node from the source device to the target device; Determining a target device context of the target device according to the migration requirement and the device context of the source device, and migrating the target device context to the target device, wherein the device context includes a computing unit, memory capacity, and data format of the execution device; Mapping the task corresponding to the task node to an instruction task adapted to the target device instruction set; Calling the device acceleration library of the target device to process the instruction task; The step of adjusting the mapping between the task nodes and the execution devices in the preset directed acyclic graph according to the resource status of the preset execution device to obtain a new directed acyclic graph includes: Performing vector processing on the resource state to generate a resource vector, and performing vector processing on the task corresponding to the task node to generate a task vector; determining a matching degree between the execution device and the task according to the resource vector and the task vector; Determine a mapping relationship between the execution device and the task node corresponding to the task according to the matching degree, wherein, for each task node, select the execution device with the highest matching degree with the task node to establish a mapping relationship; Inputting the mapping relationship into a preset migration cost optimization model to obtain an optimized mapping relationship; Adjusting the new directed acyclic graph according to the optimized mapping relationship, and performing the step of comparing the directed acyclic graph with the new directed acyclic graph according to the adjusted new directed acyclic graph; The step of obtaining the migration requirements includes: Decompose the migration requirements and the tasks of the task nodes into foreground tasks and background tasks. Foreground tasks are critical tasks that need to be executed immediately to ensure real-time and consistency, while background tasks are auxiliary tasks that can be processed in asynchronous mode and do not affect the main process. While the foreground task is being executed on the target device, the background task is processed in the background of the target device by utilizing the idle resources of the target device.

2. The heterogeneous device task migration optimization method according to claim 1, characterized in that: The step of inputting the mapping relationship into a preset migration cost optimization model to obtain an optimized mapping relationship includes: If there are multiple mapping relationships, input the mapping relationships into a preset migration cost optimization model, and output a total migration cost of the multiple mapping relationships; The mapping relationship is optimized by a strategy of minimizing the total migration cost to obtain an optimized mapping relationship.

3. The heterogeneous device task migration optimization method according to claim 1, characterized in that: The step of calling the device acceleration library of the target device to process the instruction task includes: Calculating a performance index of each device acceleration library of the target device; The device acceleration library with the highest performance index is called to process the instruction task.

4. The heterogeneous device task migration optimization method according to any one of claims 1 to 3, characterized in that: Before the step of mapping the task corresponding to the task node to an instruction task adapted to the target device instruction set, the method further comprises: Transferring the source device context of the source device from the memory space of the source device to the shared memory space of the target device through a preset data channel, wherein the source device and the target device share the shared memory space; Determining the target device context in the shared memory space according to the migration requirement and the source device context; The target device context in the shared memory space is transferred to the memory space of the target device.

5. A heterogeneous device task migration optimization system, characterized in that: The heterogeneous device task migration optimization system includes: A graph management module adjusts the mapping between the task nodes in the preset directed acyclic graph and the execution devices according to the resource status of the preset execution devices to obtain a new directed acyclic graph; A migration requirement management module compares the directed acyclic graph and the new directed acyclic graph to obtain a migration requirement, wherein the migration requirement includes migrating the task corresponding to the task node from the source device to the target device, and the migration requirement management module is further used to vectorize the resource state to generate a resource vector, and vectorize the task corresponding to the task node to generate a task vector; determine the matching degree between the execution device and the task according to the resource vector and the task vector; determine the mapping relationship between the execution device and the task node corresponding to the task according to the matching degree, wherein, for each task node, select the execution device with the highest matching degree of the task node to establish a mapping relationship; and map the mapping relationship between the execution device and the task node. The mapping relationship is input into a preset migration cost optimization model to obtain an optimized mapping relationship; the new directed acyclic graph is adjusted according to the optimized mapping relationship, and the step of comparing the directed acyclic graph and the new directed acyclic graph is performed according to the adjusted new directed acyclic graph. The migration demand management module is also used to decompose the migration demand and the task of the task node, and decompose the task into foreground tasks and background tasks, wherein the foreground task is a key task that needs to be executed immediately to ensure real-time and continuity, and the background task is an auxiliary task that can be processed in asynchronous mode and does not affect the main process; while the foreground task is executed on the target device, the idle resources of the target device are utilized to process the background task in the background of the target device; a device context management module, configured to determine a target device context of the target device according to the migration requirement and the device context of the source device, and migrate the target device context to the target device, wherein the device context includes a computing unit, a memory capacity, and a data format of the execution device; An instruction set mapping module maps the task corresponding to the task node to an instruction task adapted to the target device instruction set; The device acceleration module calls the device acceleration library of the target device to process the instruction task.

6. A heterogeneous device task migration optimization device, characterized in that: The heterogeneous device task migration optimization device includes: a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the computer program is configured to implement the steps of the heterogeneous device task migration optimization method according to any one of claims 1 to 4.

7. A computer-readable storage medium having a computer program stored thereon, wherein when the computer program is executed by a processor, the steps of the heterogeneous device task migration optimization method according to any one of claims 1 to 4 are implemented.

8. A computer program product, comprising a computer program, wherein when the computer program is executed by a processor, the computer program implements the steps of the heterogeneous device task migration optimization method according to any one of claims 1 to 4.

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