Unmanned aerial vehicle bus simulation excitation method

Abstract

The invention belongs to the technical field of avionics, and discloses an unmanned aerial vehicle bus simulation excitation method, which comprises the following steps of: firstly, setting RS422 bus data frames which are in a cyclic transmission form, automatically increasing frame count in circulation, storing the set RS422 bus data frames into a storage unit of an RS422 bus module, completing data packet framing of the RS422 bus data frames by a DSP (Digital Signal Processor), and transmitting the RS422 bus data frames to the storage unit of the RS422 bus module; and the upper-layer application software sends an instruction to control the RS422 bus data frame to be sent, and finally functional verification is carried out. Through dynamic signal simulation, serial ports and simulation parameters are preset according to files and are circularly sent through a hardware layer, so that the simulation and test time is greatly shortened, and the efficiency is improved; and the data is sent circularly according to the file presetting, so that the data sending time sequence is improved.

Description

Technical Field

[0001] The invention belongs to the field of avionics technology, and relates to a dynamic simulation excitation method based on bus signals, and specifically to a bus simulation excitation method for unmanned aerial vehicles. Background Art

[0002] According to the demand analysis of bus simulation excitation of a certain type of UAV, new real-time requirements are put forward for the simulation excitation technology of bus signals. The existing bus signal simulation excitation technology can no longer meet the testing and verification requirements of a certain UAV, and cannot fully verify the test depth and breadth of a certain UAV, which hinders the verification and development of a certain UAV. Therefore, it is urgent to provide a new bus signal simulation excitation method. Summary of the invention

[0003] In order to solve the above problems, the present invention provides a UAV bus simulation excitation method.

[0004] The technical solution of the present invention is as follows:

[0005] A UAV bus simulation excitation method comprises the following steps:

[0006] S1, set the RS422 bus data frame, the RS422 bus data frame is in the form of cyclic transmission, and the frame count is automatically incremented during the cycle;

[0007] S2, storing the set RS422 bus data frame in the storage unit of the RS422 bus module;

[0008] S3, DSP completes the data packet framing of the RS422 bus data frame;

[0009] S4, the upper application software issues instructions to control the RS422 bus data frame transmission;

[0010] S5, perform functional verification.

[0011] Furthermore, in S1, the RS422 bus data frame is composed of 1-16 data packets, and the RS422 bus data frame includes the number of frames sent, whether frame counting is performed when sending packets, the width of the frame counting, the starting position of the frame counting, whether the incremental code is enabled, the incremental code parameters, whether to check, the check code parameters, the data packet length, and the packet sending buff.

[0012] Furthermore, in S3, the data packet framing method is:

[0013] S31, scan the upper layer configuration update flag;

[0014] S32, copy the configuration parameters to the backup buffer;

[0015] S33, start framing;

[0016] S34, obtain the packet header, copy it to the first two bytes of the data packet, and determine whether to use the frame count; if yes, the frame count is calculated, the first frame is directly set to 0, and the non-first frame is added by 1 based on the previous frame; otherwise, directly enter S35;

[0017] S35, calculating the data of the data packet, the first frame uses the initial value configured by the upper layer, and the second frame selects "maintain" or "increase" according to the configuration;

[0018] S36, determine whether to verify, if yes, calculate the packet verification value, take the set length, and put it in the specified position; otherwise, directly enter S37;

[0019] S37, determine whether the current frame and current data packet are active, if yes, place the data packet in the frame storage position, otherwise directly enter S38;

[0020] S38, determine whether the current frame is the last packet, if yes, proceed to S38, otherwise proceed to the next packet of data and return to S34;

[0021] S39, the data frame is sent to FPGA for processing. FPGA numbers the data frame, generates RS422 waveform according to the set packet period and frame period, and then sends the data. Finally, it is determined whether to stop. If yes, the data packet framing is completed. Otherwise, the next frame of data is calculated and the process returns to S33.

[0022] Furthermore, the framing in S33 is: assembling the data packets in the form of "packet header-frame count-data 1-data 2-...-data n-check", where n is the number of data packets, and the ellipsis means that the sequentially arranged data packets are omitted.

[0023] Furthermore, in S1, before setting the packet period and frame period, the time required to send the data packet and data frame is calculated according to the currently set channel baud rate, and the data bit, stop bit, and check bit channel parameters, which serves as the basis for setting the packet period and frame period.

[0024] Furthermore, when the packets are continuous, the packet period setting is invalid, and the data packets of the same frame are sent in sequence without idle waiting time in between. When all the data packets are sent and the frame period has not yet arrived, it will idle wait until the frame period ends, and then send the next frame of data.

[0025] Furthermore, when the packets are discontinuous, the packet period setting is valid, and each data packet is sent according to the set packet period. After the current data packet is sent, if the packet period has not arrived, it will wait idle until the packet period ends, and then send the next packet of data; when all data packets are sent and the frame period has not arrived, it will wait idle until the frame period ends, and then send the next frame of data.

[0026] Furthermore, the method for functional verification in S5 is specifically as follows:

[0027] S51, select two RS422 modules with the same bus attributes, one as a sending module T, and the other as a receiving module R, and configure the same hardware parameters of module T and module R: baud rate, check mode, data bit and stop bit;

[0028] S52, the receiving module R starts receiving first;

[0029] S53, the sending module T sends the parameter configuration to the DSP and starts sending;

[0030] S54, the receiving module R receives and records the data in real time;

[0031] S55, checking whether the recorded data is the same as the data frame to be sent.

[0032] The beneficial effects of the present invention are as follows:

[0033] 1. The original simulation stimulus data transmission was implemented through the BUFFER interface, which required the setting of each serial port and each simulation parameter, and was inefficient. Now, through dynamic signal simulation, it supports setting serial ports and simulation parameters according to file presets, and sends them cyclically through the hardware layer, which greatly shortens the simulation and test time and improves efficiency.

[0034] 2. The original simulation stimulus data sending requires manual clicks one by one. In actual testing, multiple parameters need to be input at the same time, which makes it difficult to ensure the timing requirements of the simulation data. Now, the stimulus method based on dynamic signal simulation can send data in a preset cycle according to the file, which improves the timing of sending data.

[0035] 3. The original simulation stimulus data needs to be set up manually one by one, and there is a situation where the preset input data does not match the actual input data. Now, by reading the file and setting the simulation data, the accuracy of the simulation data input is improved.

[0036] 4. The excitation method based on dynamic signal simulation of the present invention can meet multi-channel, multi-parameter, automatic loading and sending data in multiple systems, broaden the scope of simulation and testing, and enhance the depth and breadth of UAV verification. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] Figure 1 It is a schematic diagram of the DSP workflow of the present invention;

[0038] Figure 2 It is a schematic diagram of the framing of the present invention;

[0039] Figure 3 It is a parameter configuration schematic diagram of the present invention. DETAILED DESCRIPTION

[0040] This section is an embodiment of the present invention, which is used to explain and illustrate the technical solution of the present invention. In the absence of conflict, the embodiments of the present invention and the features in the embodiments can be combined with each other.

[0041] In the description of the present invention, it should be understood that the terms "center", "longitudinal", "lateral", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside" and the like indicate directions or positional relationships based on the orientations or positional relationships in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or case referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present invention. In addition, the terms "first", "second", etc. are used for descriptive purposes only, and cannot be understood as indicating or implying relative importance or implying the number of technical features indicated. Thus, features defined as "first", "second", etc. may explicitly or implicitly include more of the features. In the description of the present invention, unless otherwise specified, "multiple" means two or more.

[0042] In the description of the present invention, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected" and "connected" should be interpreted in a broad sense, for example, it can be a fixed connection, a detachable connection or an integrated connection; it can be a mechanical connection or a point connection; it can be a direct connection or an indirect connection through an intermediate medium, or it can be the internal communication of two components. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood by specific circumstances.

[0043] Embodiment 1:

[0044] A UAV bus simulation excitation method comprises the following steps:

[0045] S1, set the RS422 bus data frame, the RS422 bus data frame is in the form of cyclic transmission, and the frame count is automatically incremented during the cycle;

[0046] S2, storing the set RS422 bus data frame in the storage unit of the RS422 bus module;

[0047] S3, DSP completes the data packet framing of the RS422 bus data frame;

[0048] S4, the upper application software issues instructions to control the RS422 bus data frame transmission;

[0049] S5, perform functional verification.

[0050] In S1, the RS422 bus data frame consists of 1-16 data packets. The RS422 bus data frame includes the number of frames sent, whether frame counting is performed when sending packets, the width of the frame counting, the starting position of the frame counting, whether the incremental code is enabled, the incremental code parameters, whether to check, the check code parameters, the data packet length, and the packet sending buff.

[0051] In S3, the data packet framing method is:

[0052] S31, scan the upper layer configuration update flag;

[0053] S32, copy the configuration parameters to the backup buffer;

[0054] S33, start framing;

[0055] S34, obtain the packet header, copy it to the first two bytes of the data packet, and determine whether to use the frame count; if yes, the frame count is calculated, the first frame is directly set to 0, and the non-first frame is added by 1 based on the previous frame; otherwise, directly enter S35;

[0056] S35, calculating the data of the data packet, the first frame uses the initial value configured by the upper layer, and the second frame selects "maintain" or "increase" according to the configuration;

[0057] S36, determine whether to verify, if yes, calculate the packet verification value, take the set length, and put it in the specified position; otherwise, directly enter S37;

[0058] S37, determine whether the current frame and current data packet are active, if yes, place the data packet in the frame storage position, otherwise directly enter S38;

[0059] S38, determine whether the current frame is the last packet, if yes, proceed to S38, otherwise proceed to the next packet of data and return to S34;

[0060] S39, the data frame is sent to FPGA for processing. FPGA numbers the data frame, generates RS422 waveform according to the set packet period and frame period, and then sends the data. Finally, it is determined whether to stop. If yes, the data packet framing is completed. Otherwise, the next frame of data is calculated and the process returns to S33.

[0061] The framing in S33 is: assembling the data packets in the form of "packet header-frame count-data 1-data 2-...-data n-check", where n is the number of data packets, and the ellipsis means that the data packets arranged in sequence are omitted.

[0062] In S1, before setting the packet period and frame period, the time required to send the data packet and data frame is calculated according to the currently set channel baud rate, as well as the data bit, stop bit, and check bit channel parameters, which serves as the basis for setting the packet period and frame period.

[0063] When the packets are continuous, the packet cycle setting is invalid. The data packets of the same frame are sent in sequence without idle waiting time in between. When all the data packets are sent and the frame cycle has not yet arrived, it will idle wait until the frame cycle ends, and then send the next frame of data.

[0064] When the packets are discontinuous, the packet period setting is valid, and each data packet is sent according to the set packet period. After the current data packet is sent, if the packet period has not arrived, it will wait idle until the packet period ends, and then send the next packet of data; when all data packets are sent and the frame period has not arrived, it will wait idle until the frame period ends, and then send the next frame of data.

[0065] The specific method of functional verification in S5 is:

[0066] S51, select two RS422 modules with the same bus attributes, one as a sending module T, and the other as a receiving module R, and configure the same hardware parameters of module T and module R: baud rate, check mode, data bit and stop bit;

[0067] S52, the receiving module R starts receiving first;

[0068] S53, the sending module T sends the parameter configuration to the DSP and starts sending;

[0069] S54, the receiving module R receives and records the data in real time;

[0070] S55, checking whether the recorded data is the same as the data frame to be sent.

[0071] Embodiment 2:

[0072] An excitation method based on bus signal simulation aims to provide a bus simulation excitation method based on a certain type of UAV, to realize real-time simulation excitation of bus signals, including RS-422 bus signals, etc., to fully verify the test depth and breadth of a certain UAV, and to improve the reliability and stability of a certain UAV.

[0073] The present invention relates to a bus simulation excitation method based on a certain type of unmanned aerial vehicle. Traditional RS-422 bus communication data transmission is usually implemented in a BUFFER interface mode, and the application layer sends as much data as the application layer fills in a certain time period. In order to meet the requirements of multi-channel and communication cycle of the RS-422 bus of a certain type of unmanned aerial vehicle, the present invention designs a module hardware according to the RS-422 bus data frame set in accordance with the specified requirements to realize bottom-level cyclic transmission, and during the cyclic transmission, the frame count can be automatically incremented and the data packet checksum can be recalculated.

[0074] (Compared to non-bus solutions, the bus takes the form of data packet packaging, and there is no need to read and contact the serial port one by one)

[0075] It is characterized by comprising the following steps:

[0076] (a) Data packet format design:

[0077] The RS-422 data frame introduced here can be composed of 1-16 data packets. The data packet is the basic component unit of the data frame. The structure of the data frame is introduced below.

[0078]

[0079]

[0080] (b) Storage of hardware modules:

[0081] A certain amount of storage space is opened up in the storage unit of the RS-422 bus module for the calculation and transmission of data frames.

[0082] Hardware storage space planning:

[0083] Taking RS-422 signal as an example, 1 frame is planned to have 16 packets, each packet can be filled with up to 1024 bytes, a total of 16KB data; RS-422 bus module has 32 transmission channels, so the required buffer space is 512KB. The module's onboard storage space is generally 64MB, and there is enough storage space for all cyclic transmissions to meet the storage space requirements for the required transmission data.

[0084] The storage space status reporting mechanism allows the program to determine whether new data can be written to the module, which can effectively prevent cache space overflow.

[0085] (c) Packet Framing

[0086] The framing of the data packet is completed by the DSP. The processing flow of the DSP is as follows: Figure 1 shown.

[0087] After DSP detects the upper layer related parameters, data frame framing is its important function.

[0088] Framing is an assembly process. Figure 2 shown.

[0089] (d) Instructions for setting frame period and packet period

[0090] Before setting the packet period and frame period, it is necessary to calculate the time required to send the data packet and data frame according to the currently set channel baud rate, as well as channel parameters such as data bit, stop bit, and check bit, so as to serve as the basis for setting the packet period and frame period. The following describes their relationship in two cases.

[0091] Packet Continuous:

[0092] The packet cycle setting is invalid. Each data packet of the same frame is sent in sequence without idle waiting time in between. When all data packets are sent and the frame cycle has not yet arrived, it will idle wait until the frame cycle ends, and then send the next frame of data.

[0093] Packets are not continuous:

[0094] The packet period setting is effective, and each data packet is sent according to the set packet period. After the current data packet is sent, if the packet period has not arrived, it will idle and wait until the packet period ends, and then send the next packet of data; when all data packets are sent and the frame period has not arrived, it will idle and wait until the frame period ends, and then send the next frame of data.

[0095] Therefore, in theory, the sum of the packet periods of each packet must be less than the frame period to ensure that the data frame is sent completely.

[0096] (e) Interactive interface design

[0097] The interactive interface refers to the function interface that the upper-layer application software can call for the sending function, as shown below.

[0098] Table 1 Dynamic sending function interface

[0099] Serial number Function Name Function 1 Set_T_Frame_N Set DA output parameters,

[0100] (f) Functional Verification

[0101] Overview of the functional verification process:

[0102] The functional verification process steps are as follows:

[0103] 1) Select two RS-422 modules with the same bus properties, one for sending T and the other for receiving R. The sending and receiving modules are configured with the same hardware parameters: baud rate, check mode, data bits and stop bits, etc.;

[0104] 2) The receiving module R starts receiving first;

[0105] 3) The sending module T sends the parameter configuration to the DSP and starts sending;

[0106] 4) The receiving module R receives and records data in real time;

[0107] 5) Check whether the recorded data is the same as the data frame to be sent.

[0108] Functional verification process record:

[0109] The configuration parameters related to the data frame are as follows. The parameter configuration is as follows Figure 3 shown.

[0110] The relevant parameters are explained as follows:

[0111] Frame period: 1600ms;

[0112] Frame mode: cyclic sending;

[0113] Packet active period: 1, then each data packet will appear in every frame;

[0114] Number of packets: 3, one frame of data contains up to 3 data packets;

[0115] Frame count enable: Enable, frame count related configuration is effective;

[0116] FrameCountError: Disabled;

[0117] Frame count width: 4 bytes;

[0118] Frame count position: 2. The first two bytes of the data packet are the header by default, occupying bytes 0 and 1. Therefore, the 4-byte frame count follows the header. Increment code enable: Allowed. Then, each time the next frame is sent, the relevant data bit will be incremented by 1 by default.

[0119] Incremental code starting position: 6;

[0120] Incremental code length: 1016, then the incremental code starts from the 6th byte of the data packet and continues to the 1021st byte, increasing by 1;

[0121] Verification Enable: Enable, verify that the relevant configuration is valid;

[0122] Check start bit: 0;

[0123] Check length: 1022, then the 0th to 1021st bytes of the data packet are involved in the check;

[0124] Check digit position: 1022,

[0125] Check bit width: 2, then the 1022nd and 1023rd bits of the data packet are the check results;

[0126] Verification mode: summation, the verification width is 2, so the lower 16 bits of the summation are taken as the verification result;

[0127] Check error enable: Disable;

[0128] Check digit arrangement order: little endian;

[0129] Packet continuous enable: continuous;

[0130] Packet period: Since the packet is continuously enabled, the packet period setting is invalid;

[0131] Packet length: (packet header) 2 + frame count (4) + data (1016) + checksum (2) = 1024;

[0132] Data: 0. The data packet carries the initial value of "data", which increases by 1 for each frame sent.

[0133] The data recorded by the receiving module is as follows:

[0134] Table 2 Record data

[0135]

[0136]

[0137] Comparing the parameter configuration and recorded data shows that the purpose of design verification has been achieved.

[0138] Embodiment 3:

[0139] In order to more clearly illustrate the technical solution of the present invention, the present invention is described in detail below in conjunction with the accompanying drawings and specific embodiments. The specific implementation content of a certain type of unmanned aerial vehicle bus simulation excitation method provided by the present invention is as follows:

[0140] (a) Data packet format design:

[0141] The RS-422 data frame introduced here can be composed of 1-16 data packets. The data packet is the basic component unit of the data frame. The structure of the data frame is introduced below.

[0142]

[0143]

[0144] (b) Storage of hardware modules:

[0145] A certain amount of storage space is opened up in the storage unit of the RS-422 bus module for the calculation and transmission of data frames.

[0146] Hardware storage space planning:

[0147] Taking RS-422 signal as an example, 1 frame is planned to have 16 packets, each packet can be filled with up to 1024 bytes, a total of 16KB data; RS-422 bus module has 32 transmission channels, so the required buffer space is 512KB. The module's onboard storage space is generally 64MB, and there is enough storage space for all cyclic transmissions to meet the storage space requirements for the required transmission data.

[0148] The storage space status reporting mechanism allows the program to determine whether new data can be written to the module, which can effectively prevent cache space overflow.

[0149] (c) Packet Framing

[0150] The framing of the data packet is completed by the DSP. The processing flow of the DSP is as follows: Figure 1 shown.

[0151] After DSP detects the upper layer related parameters, data frame framing is its important function.

[0152] Framing is an assembly process. Figure 2 shown.

[0153] (d) Instructions for setting frame period and packet period

[0154] Before setting the packet period and frame period, it is necessary to calculate the time required to send the data packet and data frame according to the currently set channel baud rate, as well as channel parameters such as data bit, stop bit, and check bit, so as to serve as the basis for setting the packet period and frame period. The following describes their relationship in two cases.

[0155] Packet Continuous:

[0156] The packet cycle setting is invalid. Each data packet of the same frame is sent in sequence without idle waiting time in between. When all data packets are sent and the frame cycle has not yet arrived, it will idle wait until the frame cycle ends, and then send the next frame of data.

[0157] Packets are not continuous:

[0158] The packet period setting is effective, and each data packet is sent according to the set packet period. After the current data packet is sent, if the packet period has not arrived, it will idle and wait until the packet period ends, and then send the next packet of data; when all data packets are sent and the frame period has not arrived, it will idle and wait until the frame period ends, and then send the next frame of data.

[0159] Therefore, in theory, the sum of the packet periods of each packet must be less than the frame period to ensure that the data frame is sent completely.

[0160] (e) Interactive interface design

[0161] The interactive interface refers to the functions that the upper-level application software can call for the sending function.

[0162] Interface. As shown below.

[0163] Table 1 Dynamic sending function interface

[0164] Serial number Function Name Function 1 Set_T_Frame_N Set DA output parameters,

[0165] (f) Functional Verification

[0166] Overview of the functional verification process:

[0167] The functional verification process steps are as follows:

[0168] 6) Select two RS-422 modules with the same bus properties, one for sending T and the other for receiving R. The sending and receiving modules are configured with the same hardware parameters: baud rate, check mode, data bits and stop bits, etc.;

[0169] 7) The receiving module R starts receiving first;

[0170] 8) Sending module T sends parameter configuration to DSP and starts sending;

[0171] 9) The receiving module R receives and records data in real time;

[0172] 10) Check whether the recorded data is the same as the data frame to be sent.

[0173] Functional verification process record:

[0174] The configuration parameters related to the data frame are as follows. The parameter configuration is as follows Figure 3 shown.

[0175] The relevant parameters are explained as follows:

[0176] Frame period: 1600ms;

[0177] Frame mode: cyclic sending;

[0178] Packet active period: 1, then each data packet will appear in every frame;

[0179] Number of packets: 3, one frame of data contains up to 3 data packets;

[0180] Frame count enable: Enable, frame count related configuration is effective;

[0181] FrameCountError: Disabled;

[0182] Frame count width: 4 bytes;

[0183] Frame count position: 2. The first two bytes of the data packet are the header by default, occupying bytes 0 and 1. Therefore, the 4-byte frame count follows the header.

[0184] Incremental code enable: If enabled, then the relevant data bit will be incremented by 1 by default for each next frame sent;

[0185] Incremental code starting position: 6;

[0186] Incremental code length: 1016, then the incremental code starts from the 6th byte of the data packet and continues to the 1021st byte, increasing by 1;

[0187] Verification Enable: Enable, verify that the relevant configuration is valid;

[0188] Check start bit: 0;

[0189] Check length: 1022, then the 0th to 1021st bytes of the data packet are involved in the check;

[0190] Check digit position: 1022,

[0191] Check bit width: 2, then the 1022nd and 1023rd bits of the data packet are the check results;

[0192] Verification mode: summation, the verification width is 2, so the lower 16 bits of the summation are taken as the verification result;

[0193] Check error enable: Disable;

[0194] Check digit arrangement order: little endian;

[0195] Packet continuous enable: continuous;

[0196] Packet period: Since the packet is continuously enabled, the packet period setting is invalid;

[0197] Packet length: (packet header) 2 + frame count (4) + data (1016) + checksum (2) = 1024;

[0198] Data: 0. The data packet carries the initial value of "data", which increases by 1 for each frame sent.

[0199] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, but the protection scope of the present invention is not limited thereto. Any technician familiar with the field can easily think of various equivalent modifications or substitutions within the technical scope disclosed by the present invention, and these modifications or substitutions should all be covered within the protection scope of the present invention.

Claims

1. A UAV bus simulation excitation method, characterized in that: The following steps are involved: S1, set the RS422 bus data frame, the RS422 bus data frame is in the form of cyclic transmission, and the frame count is automatically incremented during the cycle; S2, storing the set RS422 bus data frame in the storage unit of the RS422 bus module; S3, DSP completes the data packet framing of the RS422 bus data frame; S4, the upper application software issues instructions to control the RS422 bus data frame transmission; S5, perform functional verification.

2. A UAV bus simulation excitation method according to claim 1, characterized in that: In S1, the RS422 bus data frame consists of 1-16 data packets. The RS422 bus data frame includes the number of frames sent, whether frame counting is performed when sending packets, the width of the frame counting, the starting position of the frame counting, whether the incremental code is enabled, the incremental code parameters, whether to check, the check code parameters, the data packet length, and the packet sending buff.

3. A UAV bus simulation excitation method according to claim 1, characterized in that: In S3, the data packet framing method is: S31, scan the upper layer configuration update flag; S32, copy the configuration parameters to the backup buffer; S33, start framing; S34, obtain the packet header, copy it to the first two bytes of the data packet, and determine whether to use the frame count; if yes, the frame count is calculated, the first frame is directly set to 0, and the non-first frame is added by 1 based on the previous frame; otherwise, directly enter S35; S35, calculate the data of the data packet, the first frame uses the initial value configured by the upper layer, and the second frame selects "maintain" or "increase" according to the configuration; S36, determine whether to verify, if yes, calculate the packet verification value, take the set length, and put it in the specified position; otherwise, directly enter S37; S37, determine whether the current frame and current data packet are active, if yes, place the data packet in the frame storage position, otherwise directly enter S38; S38, determine whether the current frame is the last packet, if yes, proceed to S38, otherwise proceed to the next packet of data and return to S34; S39, the data frame is sent to FPGA for processing. FPGA numbers the data frame, generates RS422 waveform according to the set packet period and frame period, and then sends the data. Finally, it is determined whether to stop. If yes, the data packet framing is completed. Otherwise, the next frame of data is calculated and the process returns to S33.

4. A UAV bus simulation excitation method according to claim 3, characterized in that: The framing in S33 is: assembling the data packets in the form of "packet header-frame count-data 1-data 2-...-data n-check", where n is the number of data packets, and the ellipsis means that the data packets in the sequence are omitted.

5. A UAV bus simulation excitation method according to claim 2, characterized in that: In S1, before setting the packet period and frame period, the time required to send the data packet and data frame is calculated according to the currently set channel baud rate, as well as the data bit, stop bit, and check bit channel parameters, which serves as the basis for setting the packet period and frame period.

6. A UAV bus simulation excitation method according to claim 5, characterized in that: When the packets are continuous, the packet cycle setting is invalid. The data packets of the same frame are sent in sequence without idle waiting time in between. When all the data packets are sent and the frame cycle has not yet arrived, it will idle wait until the frame cycle ends, and then send the next frame of data.

7. A UAV bus simulation excitation method according to claim 5, characterized in that: When the packets are discontinuous, the packet period setting is valid, and each data packet is sent according to the set packet period. After the current data packet is sent, if the packet period has not arrived, it will wait idle until the packet period ends, and then send the next packet of data; when all data packets are sent and the frame period has not arrived, it will wait idle until the frame period ends, and then send the next frame of data.

8. The UAV bus simulation excitation method according to claim 1 is characterized in that: The specific method of functional verification in S5 is: S51, select two RS422 modules with the same bus attributes, one as a sending module T, and the other as a receiving module R, and configure the same hardware parameters of module T and module R: baud rate, check mode, data bit and stop bit; S52, the receiving module R starts receiving first; S53, the sending module T sends the parameter configuration to the DSP and starts sending; S54, the receiving module R receives and records the data in real time; S55, checking whether the recorded data is the same as the data frame to be sent.

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