Full-spectrum LED epitaxial wafer, preparation method thereof and LED chip

Abstract

The application relates to the field of photoelectric technology, and discloses a full-spectrum LED epitaxial wafer, a preparation method thereof and an LED chip. The epitaxial wafer comprises a substrate, a buffer layer, an N-type GaN layer, a multi-spectrum light emitting well layer and a P-type GaN layer arranged on the substrate in sequence; the multi-spectrum light emitting well layer comprises a first light emitting well layer, a second light emitting well layer and a third light emitting well layer stacked in sequence; the first light emitting well layer comprises a plurality of groups of In x Ga (1‑x) N quantum well layers, Al a Ga (1‑a) N interface layers and first GaN quantum barrier layers stacked in sequence; the second light emitting well layer comprises a plurality of groups of In y Ga (1‑y) N quantum well layers, Al b Ga (1‑b) N interface layers and second GaN quantum barrier layers stacked in sequence; and the third light emitting well layer comprises a plurality of groups of In z Ga (1‑z) N quantum well layers, Al c Ga (1‑c) N interface layers and third GaN quantum barrier layers stacked in sequence. The full-spectrum LED epitaxial wafer can improve the light emitting efficiency and color rendering index of a full-spectrum chip.

Description

Technical Field

[0001] This invention relates to the field of optoelectronic technology, and in particular to a full-spectrum LED epitaxial wafer and its preparation method, as well as an LED chip. Background Technology

[0002] Full-spectrum LEDs cover a wider spectral range, including multiple color bands such as red, orange, yellow, green, and blue, enabling them to simulate the lighting effect of sunlight and provide a more natural and uniform lighting experience. The most common full-spectrum LEDs are composed of LED chips of various wavelengths, a process that is complex and costly to manufacture. Another method uses fluorescent conversion materials, such as phosphors or fluorescent dyes, to convert single-wavelength light into other wavelengths, forming a full-spectrum light, but this method has lower conversion efficiency. Summary of the Invention

[0003] The technical problem to be solved by the present invention is to provide a full-spectrum LED epitaxial wafer that improves the luminous efficiency and color rendering index of full-spectrum chips.

[0004] The technical problem to be solved by the present invention is to provide a method for preparing a full-spectrum LED epitaxial wafer, which has a simple process and can stably produce a full-spectrum LED epitaxial wafer with good luminous performance.

[0005] To solve the above-mentioned technical problems, the present invention provides a full-spectrum LED epitaxial wafer, comprising a substrate, wherein a buffer layer, an N-type GaN layer, a multispectral light-emitting trap layer, and a P-type GaN layer are sequentially disposed on the substrate;

[0006] The multispectral light-emitting trap layer comprises a first light-emitting trap layer, a second light-emitting trap layer, and a third light-emitting trap layer stacked sequentially. The first light-emitting trap layer comprises several groups of In-sequentially stacked In x Ga (1-x) N quantum well layer, Al a Ga (1-a) The second light-emitting trap layer comprises an N-interface layer and a first GaN quantum barrier layer, and includes several groups of sequentially stacked In... y Ga (1-y) N quantum well layer, Al b Ga (1-b) The N-interface layer and the second GaN quantum barrier layer, the third light-emitting trap layer comprising several groups of sequentially stacked In z Ga (1-z) N quantum well layer, Al c Ga (1-c) The N-interface layer and the third GaN quantum barrier layer, wherein the emission wavelength of the first light-emitting trap layer is greater than the emission wavelength of the second light-emitting trap layer and the emission wavelength of the third light-emitting trap layer.

[0007] In some embodiments, x > y > z.

[0008] In some embodiments, 0.25≤x≤0.35, 0.15≤y≤0.25, and 0.05≤z≤0.15.

[0009] In some embodiments, a > b > c.

[0010] In some embodiments, 0.15≤a≤0.25, 0.1≤b≤0.2, and 0.05≤c≤0.15.

[0011] In some embodiments, the first light-emitting trap layer includes L1 groups of In layers stacked sequentially. x Ga (1-x) N quantum well layer, Al a Ga (1-a) The second light-emitting trap layer comprises an N-interface layer and a first GaN quantum barrier layer, and includes L2 groups of sequentially stacked In atoms. y Ga (1-y) N quantum well layer, Al b Ga (1-b) The N-interface layer and the second GaN quantum barrier layer, the third light-emitting trap layer comprising L3 groups of sequentially stacked In z Ga (1-z) N quantum well layer, Al c Ga (1-c) The N-interface layer and the third GaN quantum barrier layer, L3 > L2 > L1.

[0012] In some embodiments, the emission wavelength range of the first light-emitting trap layer is 462 nm to 480 nm;

[0013] The emission wavelength range of the second light-emitting trap layer is 445nm to 461nm;

[0014] The emission wavelength range of the third light-emitting trap layer is 428nm to 444nm.

[0015] In some embodiments, the thickness of the first GaN quantum barrier layer is greater than the thickness of the second GaN quantum barrier layer, which is greater than the thickness of the third GaN quantum barrier layer.

[0016] To address the above problems, the present invention also provides a method for preparing a full-spectrum LED epitaxial wafer, comprising the following steps:

[0017] S1, Provide a substrate;

[0018] S2. A buffer layer, an N-type GaN layer, a multispectral light-emitting trap layer, and a P-type GaN layer are sequentially deposited on the substrate.

[0019] The multispectral light-emitting trap layer comprises a first light-emitting trap layer, a second light-emitting trap layer, and a third light-emitting trap layer stacked sequentially. The first light-emitting trap layer comprises several groups of In-sequentially stacked In x Ga (1-x) N quantum well layer, Al a Ga (1-a) The second light-emitting trap layer comprises an N-interface layer and a first GaN quantum barrier layer, and includes several groups of sequentially stacked In... y Ga (1-y) N quantum well layer, Al b Ga (1-b) The N-interface layer and the second GaN quantum barrier layer, the third light-emitting trap layer comprising several groups of sequentially stacked In z Ga (1-z) N quantum well layer, Al c Ga (1-c) The N-interface layer and the third GaN quantum barrier layer, wherein the emission wavelength of the first light-emitting trap layer is greater than the emission wavelength of the second light-emitting trap layer and the emission wavelength of the third light-emitting trap layer.

[0020] Accordingly, the present invention also provides an LED chip, the LED chip comprising a full-spectrum LED epitaxial wafer as described above.

[0021] Implementing this invention has the following beneficial effects:

[0022] In the full-spectrum LED epitaxial wafer provided by this invention, the multispectral light-emitting trap layer includes a first light-emitting trap layer, a second light-emitting trap layer, and a third light-emitting trap layer stacked sequentially. The first light-emitting trap layer includes several groups of In-type materials stacked sequentially. x Ga (1-x) N quantum well layer, Al a Ga (1-a) The second light-emitting trap layer comprises an N-interface layer and a first GaN quantum barrier layer, and includes several groups of sequentially stacked In... y Ga (1-y) N quantum well layer, Al b Ga (1-b) The N-interface layer and the second GaN quantum barrier layer, the third light-emitting trap layer comprising several groups of sequentially stacked In z Ga (1-z) N quantum well layer, Al c Ga (1-c)The N-interface layer and the third GaN quantum barrier layer have the following emission wavelengths: the first emission well layer > the second emission well layer > the third emission well layer. The emission wavelengths of the emission well layers closer to the N-type GaN layer are longer, while those closer to the P-type GaN layer are shorter. The ground state energy level gradually increases from low to high from the long-wavelength emission well to the short-wavelength emission well. Charge carriers preferentially fill the lower ground state energy level region near the N-side, significantly improving the uniformity of charge carrier distribution from the N-side to the P-side emission well. This also enhances the effective radiative recombination efficiency in the long-wavelength band, making the peak intensities of the three wavelength bands more similar, improving the excitation efficiency of the mixed phosphor, and ultimately improving the color rendering index of the full-spectrum chip. Attached Figure Description

[0023] Figure 1 This is a schematic diagram of the structure of the full-spectrum LED epitaxial wafer provided by the present invention;

[0024] Figure 2 This is a schematic diagram of the structure of the first light-emitting trap layer of the full-spectrum LED epitaxial wafer provided by the present invention;

[0025] Figure 3 This is a schematic diagram of the structure of the second light-emitting trap layer of the full-spectrum LED epitaxial wafer provided by the present invention;

[0026] Figure 4 This is a schematic diagram of the structure of the third light-emitting trap layer of the full-spectrum LED epitaxial wafer provided by the present invention. Detailed Implementation

[0027] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. Examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the invention, and should not be construed as limiting the invention. Furthermore, it should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.

[0028] In the description of this invention, it should be understood that the terms "length", "width", "upper", "lower", "left", "right", "horizontal", "top", "bottom", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this invention.

[0029] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the stated features. In the description of this invention, "a plurality of" means two or more, unless otherwise explicitly specified.

[0030] In the description of this invention, it should be noted that, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection, an electrical connection, or a connection that allows for communication; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.

[0031] In this invention, unless otherwise explicitly specified and limited, "above" or "below" the second feature can include direct contact between the first and second features, or contact between the first and second features through another feature between them. Furthermore, "above," "over," and "on top" of the second feature includes the first feature directly above or diagonally above the second feature, or simply indicates that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature includes the first feature directly below or diagonally below the second feature, or simply indicates that the first feature is at a lower horizontal level than the second feature.

[0032] The following disclosure provides numerous different embodiments or examples for implementing various structures of the invention. To simplify the disclosure, specific examples of components and arrangements are described below. These are merely examples and are not intended to limit the invention. Furthermore, reference numerals and / or letters may be repeated in different examples; such repetition is for simplification and clarity and does not in itself indicate a relationship between the various embodiments and / or arrangements discussed. In addition, examples of various specific processes and materials are provided in this invention, but those skilled in the art will recognize the application of other processes and / or the use of other materials.

[0033] In this invention, "preferred" and "more preferred" are merely descriptions of better implementation methods or embodiments, and should be understood as not constituting a limitation on the scope of protection of this invention. In this invention, the technical features described in an open-ended manner include both closed-ended technical solutions composed of the listed features and open-ended technical solutions that include the listed features. In this invention, numerical ranges are involved; unless otherwise specified, they include the two endpoints of the numerical range.

[0034] To address the above problems, this invention provides a full-spectrum LED epitaxial wafer, such as... Figure 1 As shown, it includes a substrate 100, on which a buffer layer 200, an N-type GaN layer 300, a multispectral light-emitting trap layer 400, and a P-type GaN layer 500 are sequentially disposed;

[0035] The multispectral light-emitting trap layer 400 includes a first light-emitting trap layer 410, a second light-emitting trap layer 420, and a third light-emitting trap layer 430 stacked sequentially. The first light-emitting trap layer 410 includes several groups of In-sequentially stacked In x Ga (1-x) N quantum well layer 411, Al a Ga (1-a) The N-interface layer 412 and the first GaN quantum barrier layer 413, and the second light-emitting trap layer 420 includes several groups of sequentially stacked In... y Ga (1-y) N quantum well layer 421, Al b Ga (1-b) The N-interface layer 422 and the second GaN quantum barrier layer 423, and the third light-emitting trap layer 430 include several groups of sequentially stacked In z Ga (1-z) N quantum well layer 431, Al c Ga (1-c) The N-interface layer 432 and the third GaN quantum barrier layer 433 have an emission wavelength of the first light-emitting trap layer 410 > the emission wavelength of the second light-emitting trap layer 420 > the emission wavelength of the third light-emitting trap layer 430.

[0036] In the full-spectrum LED epitaxial wafer provided by this invention, the emission wavelength of the light-emitting trap layer near the N-type GaN layer is longer, while the emission wavelength of the light-emitting trap layer near the P-type GaN layer is shorter. The ground state energy level gradually changes from low to high from the long-wavelength light-emitting trap to the short-wavelength light-emitting trap. Charge carriers preferentially fill the low ground state energy level region near the N side, which fully improves the uniformity of charge carrier distribution from the N side to the P side of the light-emitting trap. At the same time, it improves the effective radiative recombination efficiency in the long-wavelength band, making the peak intensities of the three-band spectrum closer, improving the excitation efficiency of the mixed phosphor, and thus improving the color rendering index of the full-spectrum chip.

[0037] like Figures 2-4 As shown, the multispectral luminescent trap layer 400 will be described in detail below.

[0038] In some embodiments, the emission wavelength range of the first light-emitting trap layer 410 is 462 nm to 480 nm; the emission wavelength range of the second light-emitting trap layer 420 is 445 nm to 461 nm; and the emission wavelength range of the third light-emitting trap layer 430 is 428 nm to 444 nm. Preferably, the emission wavelength range of the first light-emitting trap layer 410 is 465 nm to 480 nm; the emission wavelength range of the second light-emitting trap layer 420 is 450 nm to 460 nm; and the emission wavelength range of the third light-emitting trap layer 430 is 430 nm to 440 nm. In some embodiments, by controlling the wavelength range and peak wavelength interval of the light-emitting trap layers, the ability to excite phosphors can be improved, resulting in a wider spectral coverage after final encapsulation, which is closer to the full spectrum of sunlight.

[0039] In some embodiments, the first light-emitting trap layer 410 includes L1 groups of In layers stacked sequentially. x Ga (1-x) N quantum well layer 411, Al a Ga (1-a) The N-interface layer 412 and the first GaN quantum barrier layer 413, the second light-emitting trap layer 420 includes L2 groups of sequentially stacked In y Ga (1-y) N quantum well layer 421, Al b Ga (1-b) The N-interface layer 422 and the second GaN quantum barrier layer 423, the third light-emitting trap layer 430 includes L3 groups of In layers stacked sequentially. z Ga (1-z) N quantum well layer 431, Al c Ga (1-c) The N-interface layer 432 and the third GaN quantum barrier layer 433 are arranged in the order L3 > L2 > L1. Preferably, 10 > L3 > L2 > L1 > 1. By controlling the values ​​of L3, L2, and L1, the peak intensity of the three bands is adjusted, the proportion of short-wavelength blue light peaks is improved, thereby reducing the blue light spectral intensity in the encapsulated spectrum and effectively reducing blue light damage.

[0040] In some embodiments, x > y > z. Preferably, 0.25 ≤ x ≤ 0.35, 0.15 ≤ y ≤ 0.25, and 0.05 ≤ z ≤ 0.15. More preferably, 0.26 ≤ x ≤ 0.35, 0.15 ≤ y ≤ 0.25, and 0.05 ≤ z ≤ 0.14. The In composition of the quantum well layers of the three sets of light-emitting well layers gradually decreases from large to small along the growth direction. By adjusting the In composition, the distribution of the center wavelength of the three sets of light-emitting well layers is controlled.

[0041] In some embodiments, a > b > c. Preferably, 0.15 ≤ a ≤ 0.25, 0.1 ≤ b ≤ 0.2, and 0.05 ≤ c ≤ 0.15. More preferably, 0.15 ≤ a ≤ 0.25, 0.1 ≤ b ≤ 0.14, and 0.05 ≤ c ≤ 0.09. This invention inserts an interface treatment layer, AlGaN, between the quantum well and the quantum barrier. Al atoms can fill deep-level defects caused by excessive In composition, thereby improving product yield.

[0042] In some embodiments, the thickness of the first GaN quantum barrier layer 413 is greater than the thickness of the second GaN quantum barrier layer 423, which is greater than the thickness of the third GaN quantum barrier layer 433. The thickness of the GaN quantum barrier layers in the three sets of light-emitting well layers gradually decreases along the growth direction. By controlling the barrier thickness, a thick barrier can be grown in the quantum well region with a higher In content, which can improve the crystal quality degradation caused by In segregation and increase product yield.

[0043] Accordingly, the present invention provides a method for preparing a full-spectrum LED epitaxial wafer, comprising the following steps:

[0044] S1. Provide substrate 100;

[0045] In some embodiments, the substrate 100 may be selected from one of the following: sapphire substrate, SiO2-sapphire composite substrate, silicon substrate, silicon carbide substrate, gallium nitride substrate, and zinc oxide substrate. Preferably, the substrate 100 is a sapphire substrate. Sapphire is a commonly used GaN-based LED substrate material. Sapphire substrates have mature manufacturing processes, low prices, are easy to clean and process, and have good stability at high temperatures.

[0046] S2. A buffer layer 200, an N-type GaN layer 300, a multispectral light-emitting trap layer 400, and a P-type GaN layer 500 are sequentially deposited on the substrate 100.

[0047] The multispectral light-emitting trap layer 400 includes a first light-emitting trap layer 410, a second light-emitting trap layer 420, and a third light-emitting trap layer 430 stacked sequentially. The first light-emitting trap layer 410 includes several groups of In-sequentially stacked In x Ga (1-x) N quantum well layer 411, Al a Ga (1-a) The N-interface layer 412 and the first GaN quantum barrier layer 413, and the second light-emitting trap layer 420 includes several groups of sequentially stacked In... y Ga (1-y) N quantum well layer 421, Al b Ga (1-b) The N-interface layer 422 and the second GaN quantum barrier layer 423, and the third light-emitting trap layer 430 include several groups of sequentially stacked In z Ga(1-z) N quantum well layer 431, Al c Ga (1-c) The N-interface layer 432 and the third GaN quantum barrier layer 433 have an emission wavelength of the first light-emitting trap layer 410 > the emission wavelength of the second light-emitting trap layer 420 > the emission wavelength of the third light-emitting trap layer 430.

[0048] Specifically, step S2 above includes the following steps:

[0049] S21. Deposit the buffer layer 200 on the substrate 100.

[0050] In some embodiments, an AlN buffer layer is deposited in the applied material PVD. The AlN buffer layer provides nucleation centers with the same orientation as the substrate, releases the stress caused by lattice mismatch between GaN and the substrate, and the thermal stress caused by the mismatch of thermal expansion coefficients. It provides a flat nucleation surface for further growth, reduces the contact angle of its nucleation growth, and enables the island-grown GaN grains to connect into a surface within a smaller thickness, transforming into two-dimensional epitaxial growth.

[0051] S22. Deposit the N-type GaN layer 300 on the buffer layer 200.

[0052] In some embodiments, the temperature of the reaction chamber is controlled at 1000℃~1200℃, the pressure is controlled at 100torr~600torr, and an N source, a Ga source, and a Si source are introduced to grow the N-type GaN layer.

[0053] S23. Deposit the multispectral light-emitting trap layer 400 on the N-type GaN layer 300.

[0054] In some embodiments, the multispectral light-emitting trap layer is prepared by the following method:

[0055] A first luminescent trap layer 410, a second luminescent trap layer 420, and a third luminescent trap layer 430 are grown sequentially to obtain a multispectral luminescent trap layer.

[0056] In some embodiments, the first light-emitting trap layer 410 is fabricated using the following method:

[0057] The growth temperature in the reaction chamber was maintained at 820℃~935℃, and the growth pressure at 50 torr~390 torr, to grow several groups of sequentially stacked In x Ga (1-x) N quantum well layer 411, Al a Ga (1-a) The first light-emitting trap layer 410 is obtained by combining the N-interface layer 412 and the first GaN quantum barrier layer 413.

[0058] The second light-emitting trap layer 420 is prepared by the following method:

[0059] The growth temperature in the reaction chamber was maintained at 820℃~935℃, and the growth pressure at 50 torr~390 torr, to grow several groups of sequentially stacked In y Ga (1-y) N quantum well layer 421, Al b Ga (1-b) The second light-emitting trap layer 420 is obtained by combining the N-interface layer 422 and the second GaN quantum barrier layer 423.

[0060] The third light-emitting trap layer 430 is prepared by the following method:

[0061] The growth temperature in the reaction chamber was maintained at 820℃~935℃, and the growth pressure at 50 torr~390 torr, to grow several groups of sequentially stacked In z Ga (1-z) N quantum well layer 431, Al c Ga (1-c) The N-interface layer 432 and the third GaN quantum barrier layer 433 are combined to obtain the third luminescent trap layer 430.

[0062] S24. Deposit the P-type GaN layer 500 on the multispectral light-emitting trap layer 400.

[0063] In some embodiments, the temperature of the reaction chamber is controlled at 900°C to 1050°C, the pressure is controlled at 100 torr to 600 torr, and an N source, a Mg source, and a Ga source are introduced to grow the P-type GaN layer.

[0064] Accordingly, the present invention also provides an LED chip, which includes the aforementioned full-spectrum LED epitaxial wafer. The full-spectrum LED epitaxial wafer is the fundamental material for LED chip manufacturing; its quality and characteristics directly affect the performance and yield of the final LED chip. In some embodiments, the LED chip is manufactured using the following method: the full-spectrum LED epitaxial wafer is fabricated into a chip, encapsulated in a substrate, and coated with a mixed phosphor. Preferably, the full-spectrum LED epitaxial wafer is fabricated into a 2235 type chip, encapsulated in a 3528 substrate, and then coated with a mixed phosphor composed of blue, green, and red phosphors. The present invention utilizes the multispectral design of the light-emitting trap in the epitaxial structure layer to improve the luminous efficiency and color rendering index of the full-spectrum chip, enhance the continuity of the full-spectrum spectrum, and effectively reduce blue light damage.

[0065] The present invention is further illustrated below with specific embodiments:

[0066] Example 1

[0067] This embodiment provides a full-spectrum LED epitaxial wafer, including a substrate, on which a buffer layer, an N-type GaN layer, a multispectral light-emitting trap layer, and a P-type GaN layer are sequentially disposed;

[0068] The multispectral light-emitting trap layer comprises a first light-emitting trap layer, a second light-emitting trap layer, and a third light-emitting trap layer stacked sequentially. The first light-emitting trap layer comprises two sets of In-type elements stacked sequentially. x Ga (1-x) N quantum well layer, Al a Ga (1-a) The second light-emitting trap layer comprises an N-interface layer and a first GaN quantum barrier layer, and includes three sets of sequentially stacked In... y Ga (1-y) N quantum well layer, Al b Ga (1-b) The N-interface layer and the second GaN quantum barrier layer, the third light-emitting trap layer comprising 5 groups of sequentially stacked In z Ga (1-z) N quantum well layer, Al c Ga (1-c) The N-interface layer and the third GaN quantum barrier layer, wherein the emission wavelength of the first light-emitting trap layer is greater than the emission wavelength of the second light-emitting trap layer and the emission wavelength of the third light-emitting trap layer.

[0069] Where x is 0.3, y is 0.25, z is 0.1, a is 0.15, b is 0.1, and c is 0.05.

[0070] Example 2

[0071] This embodiment provides a full-spectrum LED epitaxial wafer, including a substrate, on which a buffer layer, an N-type GaN layer, a multispectral light-emitting trap layer, and a P-type GaN layer are sequentially disposed;

[0072] The multispectral light-emitting trap layer comprises a first light-emitting trap layer, a second light-emitting trap layer, and a third light-emitting trap layer stacked sequentially. The first light-emitting trap layer comprises two sets of In-type elements stacked sequentially. x Ga (1-x) N quantum well layer, Al a Ga (1-a) The second light-emitting trap layer comprises an N-interface layer and a first GaN quantum barrier layer, and includes three sets of sequentially stacked In... y Ga (1-y) N quantum well layer, Al b Ga (1-b) The N-interface layer and the second GaN quantum barrier layer, the third light-emitting trap layer comprising 5 groups of sequentially stacked In z Ga (1-z) N quantum well layer, Al c Ga (1-c)The N-interface layer and the third GaN quantum barrier layer, wherein the emission wavelength of the first light-emitting trap layer is greater than the emission wavelength of the second light-emitting trap layer and the emission wavelength of the third light-emitting trap layer.

[0073] Where x is 0.3, y is 0.25, z is 0.1, a is 0.25, b is 0.2, and c is 0.15.

[0074] Example 3

[0075] This embodiment provides a full-spectrum LED epitaxial wafer, including a substrate, on which a buffer layer, an N-type GaN layer, a multispectral light-emitting trap layer, and a P-type GaN layer are sequentially disposed;

[0076] The multispectral light-emitting trap layer comprises a first light-emitting trap layer, a second light-emitting trap layer, and a third light-emitting trap layer stacked sequentially. The first light-emitting trap layer comprises two sets of In-type elements stacked sequentially. x Ga (1-x) N quantum well layer, Al a Ga (1-a) The second light-emitting trap layer comprises an N-interface layer and a first GaN quantum barrier layer, and includes three sets of sequentially stacked In... y Ga (1-y) N quantum well layer, Al b Ga (1-b) The N-interface layer and the second GaN quantum barrier layer, the third light-emitting trap layer comprising 5 groups of sequentially stacked In z Ga (1-z) N quantum well layer, Al c Ga (1-c) The N-interface layer and the third GaN quantum barrier layer, wherein the emission wavelength of the first light-emitting trap layer is greater than the emission wavelength of the second light-emitting trap layer and the emission wavelength of the third light-emitting trap layer.

[0077] Where x is 0.25, y is 0.2, z is 0.15, a is 0.15, b is 0.1, and c is 0.05.

[0078] Example 4

[0079] This embodiment provides a full-spectrum LED epitaxial wafer, including a substrate, on which a buffer layer, an N-type GaN layer, a multispectral light-emitting trap layer, and a P-type GaN layer are sequentially disposed;

[0080] The multispectral light-emitting trap layer comprises a first light-emitting trap layer, a second light-emitting trap layer, and a third light-emitting trap layer stacked sequentially. The first light-emitting trap layer comprises two sets of In-type elements stacked sequentially. x Ga (1-x) N quantum well layer, Al a Ga (1-a) The second light-emitting trap layer comprises an N-interface layer and a first GaN quantum barrier layer, and includes four sets of sequentially stacked In...y Ga (1-y) N quantum well layer, Al b Ga (1-b) The N-interface layer and the second GaN quantum barrier layer, the third light-emitting trap layer comprising 5 groups of sequentially stacked In z Ga (1-z) N quantum well layer, Al c Ga (1-c) The N-interface layer and the third GaN quantum barrier layer, wherein the emission wavelength of the first light-emitting trap layer is greater than the emission wavelength of the second light-emitting trap layer and the emission wavelength of the third light-emitting trap layer.

[0081] Where x is 0.3, y is 0.25, z is 0.1, a is 0.15, b is 0.1, and c is 0.05.

[0082] Comparative Example 1

[0083] This comparative example provides a full-spectrum LED epitaxial wafer, including a substrate, on which a buffer layer, an N-type GaN layer, a light-emitting trap layer, and a P-type GaN layer are sequentially disposed; the light-emitting trap layer includes In layers stacked sequentially. x Ga (1-x) The N quantum well layer and GaN quantum barrier layer are used, where x is 0.3.

[0084] Full-spectrum LED epitaxial wafers prepared in Examples 1-4 and Comparative Example 1 were used to fabricate LED chips using the same chip manufacturing process. Specifically, the process included: fabricating a 2235 chip, encapsulating it in a 3528 substrate, and then coating it with a mixed phosphor composed of blue, green, and red phosphors. Electrical tests were performed on the 2235 chip at a test current of 120mA, and the specific test results are shown in Table 1.

[0085] Table 1. Performance test results of the LED chips prepared in Examples 1 to 4 and Comparative Example 1.

[0086]

[0087] The luminous efficacy of the package fabricated using the epitaxial wafer proposed in this invention is improved by approximately 2%, the color rendering index is increased by approximately 1% to 2%, and the product yield is also improved. This invention utilizes a longer emission wavelength in the light-emitting trap layer near the N-type GaN layer and a shorter emission wavelength in the light-emitting trap layer near the P-type GaN layer. The ground state energy level gradually changes from low to high from the long-wavelength light-emitting trap to the short-wavelength light-emitting trap. Charge carriers preferentially fill the low ground state energy level region near the N-side, significantly improving the uniformity of charge carrier distribution from the N-side to the P-side light-emitting trap. Simultaneously, it improves the effective radiative recombination efficiency in the long-wavelength band, making the peak intensities of the three-band spectrum more similar, improving the excitation efficiency of the mixed phosphor, and thus enhancing the color rendering index of the full-spectrum chip.

[0088] In the description of this specification, the references to terms such as "some embodiments," "illustrative embodiments," "examples," "specific examples," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with an embodiment or example is included in at least one embodiment or example of this application. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0089] The above description is a preferred embodiment of the invention. It should be noted that, for those skilled in the art, several improvements and modifications can be made without departing from the principle of the invention, and these improvements and modifications are also considered to be within the scope of protection of the invention.

Claims

1. A full spectrum LED epitaxial wafer, characterized in that, The substrate includes a buffer layer, an N-type GaN layer, a multispectral light-emitting trap layer, and a P-type GaN layer, which are sequentially disposed on the substrate. The multispectral light-emitting trap layer comprises a first light-emitting trap layer, a second light-emitting trap layer, and a third light-emitting trap layer stacked sequentially. The first light-emitting trap layer comprises several groups of In-sequentially stacked In x Ga (1-x) N quantum well layer, Al a Ga (1-a) The second light-emitting trap layer comprises an N-interface layer and a first GaN quantum barrier layer, and includes several groups of sequentially stacked In... y Ga (1-y) N quantum well layer, Al b Ga (1-b) The N-interface layer and the second GaN quantum barrier layer, the third light-emitting trap layer comprising several groups of sequentially stacked In z Ga (1-z) N quantum well layer, Al c Ga (1-c) The N-interface layer and the third GaN quantum barrier layer, wherein the emission wavelength of the first light-emitting trap layer is greater than the emission wavelength of the second light-emitting trap layer and the emission wavelength of the third light-emitting trap layer; Where a > b > c, 0.15 ≤ a ≤ 0.25, 0.1 ≤ b ≤ 0.2, and 0.05 ≤ c ≤ 0.15; The first light-emitting trap layer includes L1 groups of In layers stacked sequentially. x Ga (1-x) N quantum well layer, Al a Ga (1-a) The second light-emitting trap layer comprises an N-interface layer and a first GaN quantum barrier layer, and includes L2 groups of sequentially stacked In atoms. y Ga (1-y) N quantum well layer, Al b Ga (1-b) The N-interface layer and the second GaN quantum barrier layer, the third light-emitting trap layer comprising L3 groups of sequentially stacked In z Ga (1-z) N quantum well layer, Al c Ga (1-c) The N-interface layer and the third GaN quantum barrier layer, wherein 10 > L3 > L2 > L1 > 1.

2. The full-spectrum LED epitaxial wafer of claim 1, wherein, x > y > z.

3. The full-spectrum LED epitaxial wafer as described in claim 1, characterized in that, 0.25≤x≤0.35, 0.15≤y≤0.25, 0.05≤z≤0.

15.

4. The full-spectrum LED epitaxial wafer of claim 1, wherein, The emission wavelength range of the first light-emitting trap layer is 462nm~480nm; The emission wavelength range of the second light-emitting trap layer is 445nm~461nm; The emission wavelength range of the third light-emitting trap layer is 428nm~444nm.

5. The full-spectrum LED epitaxial wafer as described in claim 1, characterized in that, The thickness of the first GaN quantum barrier layer is greater than the thickness of the second GaN quantum barrier layer, which is greater than the thickness of the third GaN quantum barrier layer.

6. A method of fabricating a full spectrum LED epitaxial wafer as claimed in any one of claims 1 to 5, characterized in that, Includes the following steps: S1, Provide a substrate; S2. A buffer layer, an N-type GaN layer, a multispectral light-emitting trap layer, and a P-type GaN layer are sequentially deposited on the substrate. The multispectral light-emitting trap layer comprises a first light-emitting trap layer, a second light-emitting trap layer, and a third light-emitting trap layer stacked sequentially. The first light-emitting trap layer comprises several groups of In-sequentially stacked In x Ga (1-x) N quantum well layer, Al a Ga (1-a) The second light-emitting trap layer comprises an N-interface layer and a first GaN quantum barrier layer, and includes several groups of sequentially stacked In... y Ga (1-y) N quantum well layer, Al b Ga (1-b) The N-interface layer and the second GaN quantum barrier layer, the third light-emitting trap layer comprising several groups of sequentially stacked In z Ga (1-z) N quantum well layer, Al c Ga (1-c) The N-interface layer and the third GaN quantum barrier layer, wherein the emission wavelength of the first light-emitting trap layer is greater than the emission wavelength of the second light-emitting trap layer and the emission wavelength of the third light-emitting trap layer.

7. An LED chip, characterized by The LED chip includes a full-spectrum LED epitaxial wafer as described in any one of claims 1 to 5.

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