Bit-to-symbol mapping design for bit-level constellation shaping

Abstract

The apparatus may be configured to process input information including a set of information bits for a Quadrature Amplitude Modulation (QAM) transmission by performing a bit shaping operation for the set of information bits to generate a shaped set of bits, and performing Forward Error Correction (FEC) on a combination of the set of information bits and a Cyclic Redundancy Check (CRC) bit after adding the Cyclic Redundancy Check (CRC) bit. The apparatus may also be configured to transmit the QAM transmission. The apparatus may be configured to receive a QAM transmission; performing FEC decoding on the QAM transmission; obtaining a CRC bit from the QAM transmission after the FEC decoding; and performing a bit-level de-shaping operation on the shaped bit set to obtain a set of information bits.

Description

Technical Field

[0001] The present disclosure relates generally to communication systems, and more particularly to signal encoding based on bit-to-symbol mapping. Background Art

[0002] Wireless communication systems are widely deployed to provide a variety of telecommunication services, such as telephony, video, data, messaging, and broadcast. Typical wireless communication systems may employ multiple access technologies capable of supporting communication with multiple users by sharing available system resources. Examples of such multiple access technologies include code division multiple access (CDMA) systems, time division multiple access (TDMA) systems, frequency division multiple access (FDMA) systems, orthogonal frequency division multiple access (OFDMA) systems, single carrier frequency division multiple access (SC-FDMA) systems, and time division synchronous code division multiple access (TD-SCDMA) systems.

[0003] These multiple access technologies have been adopted in various telecommunication standards to provide a common protocol that enables different wireless devices to communicate at city, country, region, and even global levels. An example telecommunication standard is 5G New Radio (NR). 5G NR is part of the continuous mobile broadband evolution promulgated by the Third Generation Partnership Project (3GPP) to meet new requirements associated with latency, reliability, security, scalability (e.g., with the Internet of Things (IoT)) and other requirements. 5G NR includes services associated with enhanced mobile broadband (eMBB), massive machine type communication (mMTC), and ultra-reliable low latency communication (URLLC). Certain aspects of 5G NR may be based on 4G Long Term Evolution (LTE) standards. It is necessary to further improve 5G NR technology. In addition, these improvements may also be applicable to other multiple access technologies and telecommunication standards that employ these technologies. Summary of the invention

[0004] The following presents a summary of one or more aspects in order to provide a basic understanding of these aspects. This summary is not an extensive review of all envisioned aspects. This summary is neither intended to identify the key or important elements of all aspects, nor to describe the scope of any or all aspects. Its only purpose is to present some concepts of one or more aspects in a simplified form as a prelude to a more detailed description presented later.

[0005] In one aspect of the present disclosure, a method, a computer readable medium, and an apparatus are provided. The apparatus may be configured to process input information including a set of information bits for a quadrature amplitude modulation (QAM) transmission by performing a bit shaping operation on the set of information bits to generate a set of shaped bits, and performing forward error correction (FEC) on the combination of the set of information bits and the CRC bits after adding cyclic redundancy check (CRC) bits. The apparatus may also be configured to transmit the QAM transmission.

[0006] In one aspect of the present disclosure, a method, a computer readable medium, and an apparatus are provided. The apparatus may be configured to receive a QAM transmission; perform FEC decoding on the QAM transmission; obtain CRC bits from the QAM transmission after the FEC decoding; and perform a bit-level deshaping operation on a shaped bit set to obtain an information bit set.

[0007] In one aspect of the present disclosure, a method, a computer readable medium, and an apparatus are provided. The apparatus may be configured to: perform a bit shaping operation on a set of information bits to generate a set of shaped information bits; map the set of shaped information bits, non-shaped information bits, shaping bits, parity bits, and CRC bits to symbols by a bit-to-symbol mapping for block code-based shaping in an order based on one or more rules; and transmit a QAM transmission.

[0008] In one aspect of the present disclosure, a method, computer readable medium, and apparatus are provided. The apparatus may be configured to receive an indication of a set of one or more rules for bit-to-symbol mapping for block code-based shaping of a set of shaped information bits, non-shaped information bits, shaped bits, parity bits, and CRC bits to symbols; receive a QAM transmission; perform decoding on the QAM transmission; and perform a bit-level deshaping operation on a set of shaped bits included in the QAM transmission based on the indication of the one or more rules to obtain a set of information bits.

[0009] To achieve the aforementioned and related purposes, one or more aspects include the features fully described below and particularly pointed out in the claims. The following description and the accompanying drawings set forth in detail some exemplary features of one or more aspects. However, these features are only indicative of only some of the various ways in which the principles of the various aspects can be employed. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] Figure 1 is a diagram illustrating an example of a wireless communication system and an access network.

[0011] Figure 2A is a diagram illustrating an example of a first frame according to various aspects of the present disclosure.

[0012] Figure 2B is a diagram illustrating an example of downlink (DL) channels within a subframe according to various aspects of the present disclosure.

[0013] Figure 2C is a diagram illustrating an example of a second frame according to various aspects of the present disclosure.

[0014] Figure 2D is a diagram illustrating an example of uplink (UL) channels within a subframe according to various aspects of the present disclosure.

[0015] Figure 3 is a block diagram of a base station 310 communicating with a UE 350 in an access network.

[0016] Figure 4 is a diagram illustrating a set of modules and / or components of an encoder including probability shaping.

[0017] Figure 5 is a diagram illustrating an encoding pipeline according to some aspects of the present disclosure.

[0018] Figure 6 is a diagram 60 illustrating an encoding pipeline according to some aspects of the present disclosure.

[0019] Figure 7 is a set of diagrams illustrating different potential bit mappings to a set of five symbols according to some aspects of the present disclosure.

[0020] Figure 8 is a diagram illustrating a transmitting device and a receiving device using bit-level mapping according to some aspects of the present disclosure.

[0021] Fig. 9 is a flow chart of a method of wireless communication.

[0022] Fig.10 is a flow chart of a method of wireless communication.

[0023] Fig.11 is a flow chart of a method of wireless communication.

[0024] Fig.12 is a flow chart of a method of wireless communication.

[0025] Fig.13 is a diagram illustrating an example of a hardware implementation of an apparatus.

[0026] Fig.14 is a diagram illustrating an example of a hardware implementation of a network entity. DETAILED DESCRIPTION

[0027] In some aspects of wireless communication, the encoder and / or encoding pipeline may include probability shaping. There is a relationship between the bit level and the symbol transmit power, for example, the second bit (e.g., the most significant bit (MSB)) or the third bit (e.g., the least significant bit (LSB)) may determine the transmit power more than the sign bit. For example, the power associated with the symbol "S" may be related to the square of the amplitude of the symbol, so that switching the bit u0 from "1" to "0" may reduce the transmit power (from "49" to "1" or from "25" to "9"), and switching the bit u1 from "1" to "0" may reduce the transmit power (from "49" to "25" or from "9" to "1").

[0028] During the shaping process, the probability that "u0" and / or "u1" takes the value "0" may be increased compared to the probability that "u0" and / or "u1" takes the value "1", so that the average power is reduced. In some aspects of the shaping encoder, the transmitter may "mask" the information bits and then jointly encode the shaped information bits and the information used for shaping. The corresponding decoder may jointly decode the shaped information bits and the information used for shaping, and then re-encode the bits to restore the original information bits. For some specific implementations, bit-level shaping is performed by mapping parity bits to high reliability bits (e.g., flag bits), and the shaped bits may be mapped to the remaining bit positions (e.g., MSB and / or LSB, excluding the flag bit). In some aspects of the present disclosure, mapping of shaped information bits, non-shaped information bits, shaping bits, parity bits, and / or CRC bits is provided to reduce the average transmission power.

[0029] The detailed description set forth below in conjunction with the accompanying drawings is a description of various configurations and does not represent the only configurations with which the concepts described herein can be practiced. In order to provide a thorough understanding of the various concepts, the specific embodiments include specific details. However, these concepts can be practiced without these specific details. In some instances, well-known structures and components are shown in block diagram form to avoid obscuring these concepts.

[0030] Several aspects of the telecommunication system are also presented with reference to various apparatuses and methods. These apparatuses and methods are described in the following detailed description and illustrated in the accompanying drawings by various blocks, components, circuits, processes, algorithms, etc. (collectively referred to as "elements"). These elements can be implemented using electronic hardware, computer software, or any combination thereof. Whether these elements are implemented as hardware or software depends on the specific application and the design constraints imposed on the overall system.

[0031] As an example, an element or any part of an element or any combination of elements can be implemented as a "processing system", which includes one or more processors. The example of a processor includes a microprocessor, a microcontroller, a graphics processing unit (GPU), a central processing unit (CPU), an application processor, a digital signal processor (DSP), a reduced instruction set computing (RISC) processor, a system on a chip (SoC), a baseband processor, a field programmable gate array (FPGA), a programmable logic device (PLD), a state machine, a gate logic piece, a discrete hardware circuit and other suitable hardware configured to perform various functionalities described throughout the present disclosure. One or more processors in a processing system can execute software. Whether referred to as software, firmware, middleware, microcode, hardware description language or other terms, software should be broadly interpreted as meaning an instruction, an instruction set, a code, a code segment, a program code, a program, a subroutine, a software component, an application, a software application, a software package, a routine, a subroutine, an object, an executable, a thread of execution, a process, a function or any combination thereof.

[0032] Therefore, in one or more example aspects, specific implementations and / or use cases, the described functions may be implemented with hardware, software, or any combination thereof. If implemented with software, the functions may be stored or encoded as one or more instructions or codes on a computer-readable medium. Computer-readable media include computer storage media. Storage media may be any available medium that can be accessed by a computer. As an example, such computer-readable media may include random access memory (RAM), read-only memory (ROM), electrically erasable programmable ROM (EEPROM), optical disk storage, magnetic disk storage, other magnetic storage devices, combinations of these types of computer-readable media, or any other medium that can be used to store computer-executable code in the form of instructions or data structures that can be accessed by a computer.

[0033] Although various aspects, implementations and / or use cases are described in this application by illustrating some examples, additional or different aspects, implementations and / or use cases may be generated in many different arrangements and scenarios. The various aspects, implementations and / or use cases described herein may be implemented across many different platform types, devices, systems, shapes, sizes and packaging arrangements. For example, aspects, implementations and / or use cases may be generated via integrated chip implementations and other devices based on non-module components (e.g., end-user devices, vehicles, communication devices, computing devices, industrial equipment, retail / purchase devices, medical devices, devices that enable artificial intelligence (AI), etc.). Although some examples may be specifically for use cases or applications, or may not be specifically for use cases or applications, the examples described may have a wide range of applicability. Aspects, implementations and / or use cases may range from chip-level or modular components to non-modular, non-chip-level implementations, and further to the range of aggregated, distributed or original equipment manufacturer (OEM) devices or systems in conjunction with one or more technologies herein. In some practical environments, the device in conjunction with the various aspects and features described may also include additional components and features for implementing and practicing the various aspects protected and described by the claims. For example, the transmission and reception of wireless signals necessarily include multiple components for analog and digital purposes (e.g., hardware components including antennas, RF chains, power amplifiers, modulators, buffers, processors, interleavers, adders / summers, etc.). The various techniques described herein can be practiced in a wide variety of devices of various sizes, shapes, and configurations, chip-level components, systems, distributed arrangements, aggregated or disaggregated components, end-user devices, etc.

[0034] The deployment of a communication system (such as a 5G NR system) can be arranged with various components or constituent parts in a variety of ways. In a 5G NR system or network, a network node, a network entity, a mobility element of a network, a radio access network (RAN) node, a core network node, a network element or a network equipment (such as a base station (BS), or one or more units (or one or more components) that perform base station functionality) can be implemented in an aggregated architecture or a decomposed architecture. For example, a BS (such as a Node B (NB), an evolved NB (eNB), an NR BS, a 5G NB, an access point (AP), a transmit receive point (TRP) or a cell, etc.) can be implemented as an aggregated base station (also referred to as an independent BS or a monolithic BS) or a decomposed base station.

[0035] A converged base station may be configured to utilize a radio protocol stack physically or logically integrated within a single RAN node. A decomposed base station may be configured to utilize a protocol stack physically or logically distributed between two or more units, such as one or more central or centralized units (CUs), one or more distributed units (DUs), or one or more radio units (RUs). In some aspects, a CU may be implemented within a RAN node, and one or more DUs may be co-located with the CU, or alternatively, may be geographically or virtually distributed in one or more other RAN nodes. A DU may be implemented to communicate with one or more RUs. Each of a CU, a DU, and a RU may be implemented as a virtual unit, i.e., a virtual central unit (VCU), a virtual distributed unit (VDU), or a virtual radio unit (VRU).

[0036] Base station operation or network design may take into account the aggregated nature of base station functionality. For example, a disaggregated base station may be used in an integrated access backhaul (IAB) network, an open radio access network (O-RAN (network configuration such as that initiated by the O-RAN Alliance)), or a virtualized radio access network (vRAN, also known as a cloud radio access network (C-RAN)). Decomposition may include distributing functionality across two or more units at various physical locations, as well as virtually distributing functionality of at least one unit, which may enable flexibility in network design. Individual units of a disaggregated base station or disaggregated RAN architecture may be configured for wired or wireless communication with at least one other unit.

[0037] Figure 1 1 is a diagram 100 illustrating an example of a wireless communication system and an access network. The illustrated wireless communication system includes a disaggregated base station architecture. The disaggregated base station architecture may include one or more CUs 110 that may communicate directly with a core network 120 via a backhaul link, or indirectly with the core network 120 through one or more disaggregated base station units, such as a near real-time (near RT) RAN intelligent controller (RIC) 125 via an E2 link, or a non-real-time (non-RT) RIC 115 associated with a service management and orchestration (SMO) framework 105, or both. The CU 110 may communicate with one or more DUs 130 via corresponding midhaul links, such as an F1 interface. The DU 130 may communicate with one or more RUs 140 via corresponding fronthaul links. The RU 140 may communicate with corresponding UEs 104 via one or more radio frequency (RF) access links. In some implementations, a UE 104 may be served simultaneously by multiple RUs 140.

[0038] Each of the units (i.e., CU 110, DU 130, RU 140, and near-RT RIC 125, non-RT RIC 115, and SMO framework 105) may include or be coupled to one or more interfaces configured to receive or send signals, data, or information (collectively referred to as signals) via a wired or wireless transmission medium. Each of these units or an associated processor or controller that provides instructions to the communication interface of these units may be configured to communicate with one or more of the other units via a transmission medium. For example, these units may include a wired interface configured to receive or send signals to one or more of the other units on a wired transmission medium. Additionally, these units may include a wireless interface that may include a receiver, transmitter, or transceiver (such as an RF transceiver) configured to receive or send signals, or both, to one or more of the other units on a wireless transmission medium.

[0039] In some aspects, CU 110 may host one or more higher layer control functions. Such control functions may include radio resource control (RRC), packet data convergence protocol (PDCP), service data adaptation protocol (SDAP), etc. Each control function may be implemented using an interface configured to communicate signals with other control functions hosted by CU 110. CU 110 may be configured to handle user plane functionality (i.e., central unit-user plane (CU-UP)), control plane functionality (i.e., central unit-control plane (CU-CP)), or a combination thereof. In some specific implementations, CU 110 may be logically divided into one or more CU-UP units and one or more CU-CP units. When implemented in an O-RAN configuration, the CU-UP unit may communicate bidirectionally with the CU-CP unit via an interface (such as an E1 interface). As needed, CU 110 may be implemented to communicate with DU 130 for network control and signaling.

[0040] DU 130 may correspond to a logical unit that includes one or more base station functions for controlling the operation of one or more RUs 140. In some aspects, DU 130 may host one or more of a radio link control (RLC) layer, a medium access control (MAC) layer, and one or more high physical (PHY) layers (such as modules for forward error correction (FEC) encoding and decoding, scrambling, modulation and demodulation, etc.) at least in part according to a functional split such as those defined by 3GPP. In some aspects, DU 130 may further host one or more low PHY layers. Each layer (or module) may be implemented using an interface that is configured to communicate signals with other layers (and modules) hosted by DU 130 or with control functions hosted by CU 110.

[0041] The lower layer functionality may be implemented by one or more RUs 140. In some deployments, the RU 140 controlled by the DU 130 may correspond to a logical node that hosts RF processing functions or low PHY layer functions (such as performing fast Fourier transform (FFT), inverse FFT (iFFT), digital beamforming, physical random access channel (PRACH) extraction and filtering, etc.), or both, based at least in part on functional partitioning (such as lower layer functional partitioning). In such an architecture, the RU 140 may be implemented to handle over-the-air (OTA) communications with one or more UEs 104. In some specific implementations, real-time and non-real-time aspects of control plane communications and user plane communications with the RU 140 may be controlled by the corresponding DU 130. In some scenarios, this configuration may enable the implementation of the DU 130 and the CU 110 in a cloud-based RAN architecture (such as a vRAN architecture).

[0042] The SMO framework 105 may be configured to support RAN deployment and provisioning of non-virtualized network elements and virtualized network elements. For non-virtualized network elements, the SMO framework 105 may be configured to support the deployment of dedicated physical resources for RAN coverage requirements, which may be managed via an operation and maintenance interface (such as an O1 interface). For virtualized network elements, the SMO framework 105 may be configured to interact with a cloud computing platform (such as an open cloud (O-Cloud) 190) to perform network element lifecycle management (such as to instantiate virtualized network elements) via a cloud computing platform interface (such as an O2 interface). Such virtualized network elements may include, but are not limited to, CU 110, DU 130, RU 140, and near-RT RIC 125. In some specific implementations, the SMO framework 105 may communicate with hardware aspects of the 4G RAN (such as an open eNB (O-eNB) 111) via the O1 interface. In addition, in some specific implementations, the SMO framework 105 may communicate directly with one or more RUs 140 via the O1 interface. The SMO framework 105 may also include a non-RT RIC 115 configured to support the functionality of the SMO framework 105 .

[0043] The non-RT RIC 115 may be configured to include logic functions that enable non-real-time control and optimization of RAN elements and resources, artificial intelligence (AI) / machine learning (ML) (AI / ML) workflows including model training and updating, or policy-based guidance of applications / features in the near-RT RIC 125. The non-RT RIC 115 may be coupled to or communicate with the near-RT RIC 125 (such as via an A1 interface). The near-RT RIC 125 may be configured to include logic functions that enable near-real-time control and optimization of RAN elements and resources via data collection and actions through an interface (such as via an E2 interface) that connects one or more CUs 110, one or more DUs 130, or both, and the O-eNB with the near-RT RIC 125.

[0044] In some implementations, in order to generate an AI / ML model to be deployed in the near-RT RIC 125, the non-RT RIC 115 may receive parameters or external enrichment information from an external server. Such information may be utilized by the near-RT RIC 125 and may be received from a non-network data source or from a network function at the SMO framework 105 or the non-RT RIC 115. In some examples, the non-RT RIC 115 or the near-RT RIC 125 may be configured to tune RAN behavior or performance. For example, the non-RT RIC 115 may monitor long-term trends and patterns of performance and employ AI / ML models to perform corrective actions through the SMO framework 105 (such as via reconfiguration of O1) or via the creation of RAN management policies (such as A1 policies).

[0045] At least one of the CU 110, the DU 130, and the RU 140 may be referred to as a base station 102. Therefore, the base station 102 may include one or more of the CU 110, the DU 130, and the RU 140 (each component is indicated by a dotted line to indicate that each component may be included in the base station 102, or may not be included in the base station). The base station 102 provides an access point to the core network 120 for the UE 104. The base station 102 may include a macro cell (a high-power cellular base station) and / or a small cell (a low-power cellular base station). Small cells include femto cells, pico cells, and micro cells. A network including both small cells and macro cells may be referred to as a heterogeneous network. A heterogeneous network may also include a home evolved Node B (eNB) (HeNB), which may provide services to a restricted group referred to as a closed subscriber group (CSG). The communication link between RU 140 and UE 104 may include uplink (UL) (also known as reverse link) transmission from UE 104 to RU 140 and / or downlink (DL) (also known as forward link) transmission from RU 140 to UE 104. The communication link may use multiple-input multiple-output (MIMO) antenna technology, including spatial multiplexing, beamforming and / or transmit diversity. The communication link may pass through one or more carriers. For each carrier allocated in a carrier aggregation of up to Yx MHz (x component carriers) for transmission in each direction, the base station 102 / UE 104 may use a spectrum of up to Y MHz (e.g., 5MHz, 10MHz, 15MHz, 20MHz, 100MHz, 400MHz, etc.) bandwidth. The carriers may be adjacent to each other or may not be adjacent to each other. The allocation of carriers may be asymmetric with respect to DL and UL (e.g., more or fewer carriers may be allocated to DL compared to UL). The component carrier may include a primary component carrier and one or more secondary component carriers. The primary component carrier may be referred to as a primary cell (PCell) and the secondary component carrier may be referred to as a secondary cell (SCell).

[0046] Some UEs 104 may communicate with each other using a device-to-device (D2D) communication link 158. The D2D communication link 158 may use DL / UL wireless wide area network (WWAN) spectrum. The D2D communication link 158 may use one or more sidelink channels, such as a physical sidelink broadcast channel (PSBCH), a physical sidelink discovery channel (PSDCH), a physical sidelink shared channel (PSSCH), and a physical sidelink control channel (PSCCH). The D2D communication may be through a variety of wireless D2D communication systems, such as, for example, Bluetooth, Wi-Fi based on the Institute of Electrical and Electronics Engineers (IEEE) 802.11 standard, LTE, or NR.

[0047] The wireless communication system may also include a Wi-Fi AP 150 that communicates with a UE 104 (also referred to as a Wi-Fi station (STA)) via a communication link 154, for example, in a 5 GHz unlicensed spectrum, etc. When communicating in an unlicensed spectrum, the UE 104 / AP 150 may perform a clear channel assessment (CCA) to determine whether a channel is available prior to communication.

[0048] The electromagnetic spectrum is typically subdivided into various categories, bands, channels, etc. based on frequency / wavelength. In 5G NR, two initial operating bands have been identified as frequency range designations FR1 (410 MHz-7.125 GHz) and FR2 (24.25 GHz-52.6 GHz). Although a portion of FR1 is greater than 6 GHz, FR1 is often (interchangeably) referred to as the "sub-6 GHz" band in various documents and articles. A similar naming issue sometimes occurs with respect to FR2, which is often (interchangeably) referred to as the "millimeter wave" band in documents and articles, although different from the extremely high frequency (EHF) band (30 GHz-300 GHz) identified as the "millimeter wave" band by the International Telecommunication Union (ITU).

[0049] Frequencies between FR1 and FR2 are generally referred to as mid-band frequencies. Recent 5G NR research has identified the operating bands for these mid-band frequencies as frequency range designation FR3 (7.125GHz-24.25GHz). The bands falling within FR3 can inherit FR1 characteristics and / or FR2 characteristics, so the features of FR1 and / or FR2 can be effectively extended to mid-band frequencies. In addition, higher frequency bands are currently being explored to extend 5G NR operations to more than 52.6GHz. For example, three higher operating bands have been identified as frequency range designations FR2-2 (52.6GHz-71GHz), FR4 (71GHz-114.25GHz) and FR5 (114.25GHz-300GHz). Each of these higher frequency bands falls within the EHF band.

[0050] In view of the above, unless otherwise specified, if the term "6 GHz or less" is used in this document, it can broadly refer to frequencies that may be less than 6 GHz, may be within FR1, or may include mid-band frequencies. In addition, unless otherwise specified, if the term "millimeter wave" is used in this document, it can broadly refer to frequencies that may include mid-band frequencies, may be within FR2, FR4, FR2-2 and / or FR5, or may be within the EHF band.

[0051] The base station 102 and the UE 104 may each include multiple antennas (such as antenna elements, antenna panels, and / or antenna arrays) to facilitate beamforming. The base station 102 may send a beamformed signal 182 to the UE 104 in one or more transmit directions. The UE 104 may receive the beamformed signal from the base station 102 in one or more receive directions. The UE 104 may also send a beamformed signal 184 to the base station 102 in one or more transmit directions. The base station 102 may receive the beamformed signal from the UE 104 in one or more receive directions. The base station 102 / UE 104 may perform beam training to determine the best receive direction and transmit direction for each of the base station 102 / UE 104. The transmit direction and receive direction of the base station 102 may be the same or different. The transmit direction and receive direction of the UE 104 may be the same or different.

[0052] The base station 102 may include and / or be referred to as a gNB, a Node B, an eNB, an access point, a base transceiver station, a radio base station, a radio transceiver, a transceiver function, a basic service set (BSS), an extended service set (ESS), a transmit receive point (TRP), a network node, a network entity, a network equipment, or some other suitable term. The base station 102 may be implemented as an integrated access backhaul (IAB) node, a relay node, a sidelink node, an aggregated (monolithic) base station with a baseband unit (BBU) (including a CU and a DU) and a RU, or as a disaggregated base station including one or more of a CU, a DU, and / or a RU. A set of base stations that may include disaggregated base stations and / or aggregated base stations may be referred to as a next generation (NG) RAN (NG-RAN).

[0053] The core network 120 may include an access and mobility management function (AMF) 161, a session management function (SMF) 162, a user plane function (UPF) 163, a unified data management (UDM) 164, one or more location servers 168, and other functional entities. AMF 161 is a control node that handles signaling between UE 104 and the core network 120. AMF 161 supports registration management, connection management, mobility management, and other functions. SMF 162 supports session management and other functions. UPF 163 supports packet routing, packet forwarding, and other functions. UDM 164 supports the generation of authentication and key agreement (AKA) credentials, user identity handling, access authorization, and subscription management. One or more location servers 168 are illustrated as including a gateway mobile location center (GMLC) 165 and a location management function (LMF) 166. However, in general, the one or more location servers 168 may include one or more location / positioning servers, which may include one or more of the GMLC 165, the LMF 166, the positioning determination entity (PDE), the serving mobile location center (SMLC), the mobile positioning center (MPC), etc. The GMLC 165 and the LMF 166 support UE location services. The GMLC 165 provides an interface for clients / applications (e.g., emergency services) to access UE positioning information. The LMF 166 receives measurements and assistance information from the NG-RAN and the UE 104 via the AMF 161 to calculate the positioning of the UE 104. The NG-RAN may determine the positioning of the UE 104 using one or more positioning methods. Positioning the UE 104 may involve signal measurements, positioning estimates, and optional speed calculations based on these measurements. Signal measurements may be performed by the UE 104 and / or the serving base station 102. The measured signals may be based on a satellite positioning system (SPS) 170 (e.g., one or more of a global navigation satellite system (GNSS), a global positioning system (GPS), a non-terrestrial network (NTN), or other satellite positioning / location systems), LTE signals, wireless local area network (WLAN) signals, Bluetooth signals, a terrestrial beacon system (TBS), sensor-based information (e.g., an atmospheric pressure sensor, a motion sensor), an NR enhanced cell ID (NR E-CID) method, NR signals (e.g., multi-round trip time (multi-RTT), DL angle of departure (DL-AoD), DL time difference of arrival (DL-TDOA), UL time difference of arrival (UL-TDOA), and UL angle of arrival (UL-AoA) positioning), and / or one or more of other systems / signals / sensors.

[0054] Examples of UE 104 include cellular phones, smart phones, session initiation protocol (SIP) phones, laptops, personal digital assistants (PDAs), satellite radios, global positioning systems, multimedia devices, video devices, digital audio players (e.g., MP3 players), cameras, game consoles, tablet computers, smart devices, wearable devices, vehicles, electric meters, gas pumps, large or small kitchen appliances, healthcare equipment, implants, sensors / actuators, displays, or any other similarly functional devices. Some of the UEs 104 may be referred to as IoT devices (e.g., parking meters, gas pumps, toasters, vehicles, heart monitors, etc.). UE 104 may also be referred to as stations, mobile stations, subscriber stations, mobile units, subscriber units, wireless units, remote units, mobile devices, wireless devices, wireless communication devices, remote devices, mobile subscriber stations, access terminals, mobile terminals, wireless terminals, remote terminals, mobile phones, user agents, mobile clients, clients, or some other suitable terminology. In some scenarios, the term UE may also be applied to one or more supporting devices, such as in a device constellation arrangement. One or more of these devices may access the network collectively and / or individually.

[0055] Refer again Figure 1In some aspects, the UE 104 or base station 102 may include a bit-level constellation shaping (BLCS) component 198, which may be configured to: process input information including a set of information bits for a QAM transmission by: performing a bit shaping operation on the set of information bits to generate a set of shaped bits, and performing FEC on a combination of the set of information bits and the CRC bits after adding CRC bits; and transmitting the QAM transmission. In some aspects, the BLCS component 198 may be configured to: receive the QAM transmission; perform FEC decoding on the QAM transmission; obtain CRC bits from the QAM transmission after the FEC decoding; and perform a bit-level deshaping operation on the set of shaped bits to obtain a set of information bits. In some aspects, the BLCS component 198 may be configured to: perform a bit shaping operation on the set of information bits to generate a set of shaped information bits; map the set of shaped information bits, non-shaped information bits, shaping bits, parity bits, and CRC bits to symbols in an order based on one or more rules by a bit-to-symbol mapping for block code-based shaping; and transmit the QAM transmission. In certain aspects, the BLCS component 198 may be configured to: receive an indication of a set of one or more rules for bit-to-symbol mapping for block code-based shaping of a set of shaped information bits, non-shaped information bits, shaped bits, parity bits, and CRC bits to symbols; receive a QAM transmission; perform decoding on the QAM transmission; and perform a bit-level deshaping operation on a set of shaped bits included in the QAM transmission based on the indication of the one or more rules to obtain a set of information bits. Although the following description may focus on 5GNR, the concepts described herein may be applicable to other similar fields, such as LTE, LTE-A, CDMA, GSM, and other wireless technologies.

[0056] Figure 2A FIG200 is a diagram illustrating an example of a first subframe within a 5G NR frame structure. Figure 2B FIG230 is a diagram illustrating an example of DL channels within a 5G NR subframe. Figure 2C FIG250 is a diagram illustrating an example of a second subframe within a 5G NR frame structure. Figure 2D FIG280 is a diagram illustrating an example of UL channels within a 5G NR subframe. The 5G NR frame structure may be frequency division duplex (FDD), where for a particular set of subcarriers (carrier system bandwidth), subframes within that subcarrier set are dedicated to either DL or UL, or may be time division duplex (TDD), where for a particular set of subcarriers (carrier system bandwidth), subframes within that subcarrier set are dedicated to both DL and UL. Figure 2A , Figure 2CIn the example provided, the 5G NR frame structure is assumed to be TDD, where subframe 4 is configured with slot format 28 (most of which are DL), where D is DL, U is UL, and F is flexible between DL / UL, and subframe 3 is configured with slot format 1 (all of which are UL). Although subframes 3 and 4 are shown as having slot formats 1 and 28, respectively, any particular subframe may be configured with any of the various available slot formats 0 to 61. Slot formats 0 and 1 are both DL and both UL, respectively. Other slot formats 2-61 include a mix of DL, UL, and flexible symbols. The slot format is configured for the UE via a received slot format indicator (SFI) (dynamically configured via DL control information (DCI) or semi-statically / statically configured via radio resource control (RRC) signaling). Note that the following description also applies to the 5G NR frame structure as TDD.

[0057] FIG. 2A to FIG. 2D The frame structure is illustrated, and various aspects of the present disclosure may be applicable to other wireless communication technologies that may have different frame structures and / or different channels. A frame (10ms) may be divided into 10 subframes of the same size (1ms). Each subframe may include one or more time slots. A subframe may also include a microslot, which may include 7, 4 or 2 symbols. Each time slot may include 14 or 12 symbols, depending on whether the cyclic prefix (CP) is conventional or extended. For a conventional CP, each time slot may include 14 symbols, and for an extended CP, each time slot may include 12 symbols. The symbol on the DL may be a CP orthogonal frequency division multiplexing (OFDM) (CP-OFDM) symbol. The symbol on the UL may be a CP-OFDM symbol (for high throughput scenarios) or a discrete Fourier transform (DFT) spread OFDM (DFT-s-OFDM) symbol (also known as a single carrier frequency division multiple access (SC-FDMA) symbol) (for power-limited scenarios; limited to single-stream transmission). The number of time slots within a subframe is based on the CP and parameter set. The numerology defines the subcarrier spacing (SCS) (see Table 1). The symbol length / duration is scalable with 1 / SCS.

[0058]

[0059] Table 1: Parameter set, SCS and CP

[0060] For normal CP (14 symbols / slot), different parameter sets μ0 to 4 allow 1, 2, 4, 8, and 16 slots per subframe, respectively. For extended CP, parameter set 2 allows 4 slots per subframe. Accordingly, for normal CP and parameter set μ, there are 14 symbols / slot and 2 μ timeslots / subframe. The subcarrier spacing can be equal to 2 μ*15kHz, where μ is parameter set 0 to 4. Therefore, the subcarrier spacing for parameter set μ=0 is 15kHz, and the subcarrier spacing for parameter set μ=4 is 240kHz. The symbol length / duration is inversely related to the subcarrier spacing. FIG. 2A to FIG. 2D An example of a parameter set μ=2 with a normal CP of 14 symbols per slot and 4 slots per subframe is provided. The slot duration is 0.25 ms, the subcarrier spacing is 60 kHz, and the symbol duration is about 16.67 μs. Within a frame set, there may be one or more different bandwidth parts (BWPs) that are frequency-division multiplexed (see Figure 2B ). Each BWP may have a specific parameter set and CP (normal or extended).

[0061] A resource grid may be used to represent a frame structure. Each slot includes a resource block (RB) (also referred to as a physical RB (PRB)) extending over 12 consecutive subcarriers. The resource grid is divided into a plurality of resource elements (REs). The number of bits carried by each RE depends on the modulation scheme.

[0062] like Figure 2A As illustrated, some of the REs carry reference (pilot) signals (RS) for the UE. The RS may include a demodulation RS (DM-RS) (indicated as R for a particular configuration, but other DM-RS configurations are possible) and a channel state information reference signal (CSI-RS) for channel estimation at the UE. The RS may also include a beam measurement RS (BRS), a beam refinement RS (BRRS), and a phase tracking RS (PT-RS).

[0063] Figure 2BExamples of various DL channels within a subframe of a frame are illustrated. A physical downlink control channel (PDCCH) carries DCI within one or more control channel elements (CCEs) (e.g., 1, 2, 4, 8, or 16 CCEs), each CCE including six RE groups (REGs), each REG including 12 consecutive REs in an OFDM symbol of an RB. A PDCCH within a BWP may be referred to as a control resource set (CORESET). The UE is configured to monitor PDCCH candidates in a PDCCH search space (e.g., a common search space, a UE-specific search space) during a PDCCH monitoring opportunity on a CORESET, wherein the PDCCH candidates have different DCI formats and different aggregation levels. Additional BWPs may be located at higher and / or lower frequencies on the channel bandwidth. A primary synchronization signal (PSS) may be within symbol 2 of a particular subframe of a frame. The PSS is used by UE 104 to determine subframe / symbol timing and physical layer identity. A secondary synchronization signal (SSS) may be within symbol 4 of a particular subframe of a frame. The SSS is used by the UE to determine the physical layer cell identity group number and the radio frame timing. Based on the physical layer identity and the physical layer cell identity group number, the UE can determine the physical cell identifier (PCI). Based on the PCI, the UE can determine the location of the DM-RS. The physical broadcast channel (PBCH) carrying the master information block (MIB) can be logically grouped with the PSS and SSS to form a synchronization signal (SS) / PBCH block (also referred to as an SS block (SSB)). The MIB provides the system frame number (SFN) and the number of RBs in the system bandwidth. The physical downlink shared channel (PDSCH) carries user data, broadcast system information such as system information blocks (SIBs) that are not sent via the PBCH, and paging messages.

[0064] like Figure 2C As illustrated, some of the REs carry DM-RS (indicated as R for a particular configuration, but other DM-RS configurations are possible) for channel estimation at the base station. The UE may send a DM-RS for a physical uplink control channel (PUCCH) and a DM-RS for a physical uplink shared channel (PUSCH). The PUSCH DM-RS may be sent in the first or first two symbols of the PUSCH. Depending on whether a short PUCCH or a long PUCCH is sent and depending on the specific PUCCH format used, the PUCCH DM-RS may be sent in different configurations. The UE may send a sounding reference signal (SRS). The SRS may be sent in the last symbol of a subframe. The SRS may have a comb structure, and the UE may send the SRS on one of the teeth of the comb. The SRS may be used by the base station for channel quality estimation to achieve frequency-dependent scheduling of the UL.

[0065] Figure 2DExamples of various UL channels within a subframe of a frame are illustrated. The PUCCH may be located at a position as indicated in one configuration. The PUCCH carries uplink control information (UCI), such as scheduling requests, channel quality indicators (CQI), precoding matrix indicators (PMI), rank indicators (RI), and hybrid automatic repeat request (HARQ) acknowledgement (ACK) (HARQ-ACK) feedback (i.e., one or more HARQ ACK bits indicating one or more ACKs and / or negative ACKs (NACKs)). The PUSCH carries data and may additionally be used to carry a buffer status report (BSR), a power headroom report (PHR), and / or UCI.

[0066] Figure 3 370 is a block diagram of a base station 310 communicating with a UE 350 in an access network. In the DL, Internet Protocol (IP) packets may be provided to a controller / processor 375. The controller / processor 375 implements layer 3 and layer 2 functionality. Layer 3 includes a radio resource control (RRC) layer, and layer 2 includes a service data adaptation protocol (SDAP) layer, a packet data convergence protocol (PDCP) layer, a radio link control (RLC) layer, and a medium access control (MAC) layer. The controller / processor 375 provides RRC layer functionality associated with broadcasting of system information (e.g., MIB, SIB), RRC connection control (e.g., RRC connection paging, RRC connection establishment, RRC connection modification, and RRC connection release), inter-radio access technology (RAT) mobility, and measurement configuration for UE measurement reporting; PDCP layer functionality associated with header compression / decompression, security (encryption, decryption, integrity protection, integrity verification), and handover support functions; RLC layer functionality associated with delivery of upper layer packet data units (PDUs), error correction through ARQ, concatenation, segmentation and reassembly of RLC service data units (SDUs), re-segmentation of RLC data PDUs, and reordering of RLC data PDUs; and MAC layer functionality associated with mapping between logical channels and transport channels, multiplexing of MAC SDUs onto transport blocks (TBs), demultiplexing of MAC SDUs from TBs, scheduling information reporting, error correction through HARQ, priority handling, and logical channel prioritization.

[0067] The transmit (TX) processor 316 and receive (RX) processor 370 implement layer 1 functionality associated with various signal processing functions. Layer 1, including the physical (PHY) layer, may include: error detection on the transport channel, FEC coding / decoding of the transport channel, interleaving, rate matching, mapping to the physical channel, modulation / demodulation of the physical channel, and MIMO antenna processing. The TX processor 316 handles the mapping to the signal constellation based on various modulation schemes (e.g., binary phase shift keying (BPSK), quadrature phase shift keying (QPSK), M-order phase shift keying (M-PSK), M-order quadrature amplitude modulation (M-QAM)). The coded and modulated symbols can then be divided into parallel streams. Each stream can then be mapped to an OFDM subcarrier, multiplexed with a reference signal (e.g., a pilot) in the time and / or frequency domain, and then combined using an inverse fast Fourier transform (IFFT) to produce a physical channel carrying a time domain OFDM symbol stream. The OFDM stream is spatially precoded to produce multiple spatial streams. The channel estimate from the channel estimator 374 may be used to determine the coding and modulation schemes, as well as for spatial processing. The channel estimate may be derived from a reference signal and / or channel state feedback sent by the UE 350. Each spatial stream may then be provided to a different antenna 320 via a separate transmitter 318Tx. Each transmitter 318Tx may modulate a radio frequency (RF) carrier with a corresponding spatial stream for transmission.

[0068] At the UE 350, each receiver 354Rx receives a signal through its corresponding antenna 352. Each receiver 354Rx recovers the information modulated onto the RF carrier and provides the information to a receive (RX) processor 356. The TX processor 368 and the RX processor 356 implement layer 1 functionality associated with various signal processing functions. The RX processor 356 can perform spatial processing on the information to recover any spatial stream destined for the UE 350. If multiple spatial streams are destined for the UE 350, they can be merged into a single OFDM symbol stream by the RX processor 356. The RX processor 356 then converts the OFDM symbol stream from the time domain to the frequency domain using a fast Fourier transform (FFT). The frequency domain signal includes a separate OFDM symbol stream for each subcarrier of the OFDM signal. The symbols on each subcarrier and the reference signal are recovered and demodulated by determining the most likely signal constellation point sent by the base station 310. These soft decisions can be based on channel estimates calculated by the channel estimator 358. The soft decisions are then decoded and deinterleaved to recover the data and control signals originally sent on the physical channel by the base station 310. The data and control signals are then provided to the controller / processor 359, which implements layer 3 and layer 2 functionality.

[0069] The controller / processor 359 may be associated with a memory 360 that stores program codes and data. The memory 360 may be referred to as a computer readable medium. In the UL, the controller / processor 359 provides demultiplexing between transport channels and logical channels, packet reassembly, decryption, header decompression, and control signal processing to recover IP packets. The controller / processor 359 is also responsible for error detection using ACK and / or NACK protocols to support HARQ operations.

[0070] Similar to the functionality described in conjunction with DL transmissions performed by the base station 310, the controller / processor 359 provides RRC layer functionality associated with system information (e.g., MIB, SIB) acquisition, RRC connection, and measurement reporting; PDCP layer functionality associated with header compression / decompression and security (encryption, decryption, integrity protection, integrity verification); RLC layer functionality associated with delivery of upper layer PDUs, error correction through ARQ, concatenation, segmentation and reassembly of RLC SDUs, resegmentation of RLC data PDUs, and reordering of RLC data PDUs; and MAC layer functionality associated with mapping between logical channels and transport channels, multiplexing of MAC SDUs onto TBs, demultiplexing of MAC SDUs from TBs, scheduling information reporting, error correction through HARQ, priority handling, and logical channel prioritization.

[0071] The TX processor 368 may use channel estimates derived by the channel estimator 358 from a reference signal or feedback sent by the base station 310 to select appropriate coding and modulation schemes and to facilitate spatial processing. The spatial streams generated by the TX processor 368 may be provided to different antennas 352 via corresponding transmitters 354Tx. Each transmitter 354Tx may modulate an RF carrier with a corresponding spatial stream for transmission.

[0072] UL transmissions are processed at the base station 310 in a manner similar to that described in conjunction with the receiver functionality at the UE 350. Each receiver 318Rx receives a signal through its respective antenna 320. Each receiver 318Rx recovers information modulated onto an RF carrier and provides the information to the RX processor 370.

[0073] The controller / processor 375 may be associated with a memory 376 that stores program codes and data. The memory 376 may be referred to as a computer readable medium. In the UL, the controller / processor 375 provides demultiplexing between transport channels and logical channels, packet reassembly, decryption, header decompression, control signal processing to recover IP packets. The controller / processor 375 is also responsible for error detection using ACK and / or NACK protocols to support HARQ operations.

[0074] At least one of the TX processor 368, the RX processor 356, and the controller / processor 359 may be configured to perform operations related to Figure 1 The BLCS component 198 combines various aspects.

[0075] At least one of the TX processor 316, the RX processor 370, and the controller / processor 375 may be configured to perform operations related to Figure 1 The BLCS component 198 combines various aspects.

[0076]

[0013] In some aspects of wireless communications, an encoder and / or encoding pipeline can include probability shaping. Figure 4 4 is a diagram illustrating a set of modules and / or components of an encoder including probability shaping. The encoding pipeline may begin with a set of transmit (Tx) bits 402. The Tx bits 402 may be processed by a demultiplexer 404 into sets of k bits, where k is a uniform input bit length to a distribution matcher (DM) 406. The distribution matcher may perform a probability shaping operation that produces a set of n bits, where n is greater than k (e.g., a shaping rate R s A larger number of bits may be used to achieve a unique mapping of a set of input bits to a set of output bits (or symbols) having a particular bit distribution (or group of bits mapped to symbols). The set of output bits may be mapped by component 408 to a magnitude (or symbol representing a set of m bits). For example, m may correspond to 2 m The ASK size may be log-2 (e.g., the number of bits per 1 dimension), and n may correspond to the shaped output of the 1-dimensional ASK sequence length. The FEC encoder 410 may combine a set of shaped bits 410A, a set of non-shaped bits 410B, and a set of parity check (check) bits 410C to produce a set of bits used by the constellation map 412 to determine an amplitude (A) 412A and a set of signs (S) 412B for the transmitted signal (e.g., x=A*S). The transmitted signal may be transmitted via a channel 414 characterized by a matrix H and received at a decoding device. The decoding pipeline at the decoding device may reflect the functionality of the encoding pipeline. For example, the constellation demapping component 416 may identify a set of amplitudes and signs, and generate a set of shaped bits 418A, a set of non-shaped bits 418B, and a set of parity check (check) bits 418C at the FEC encoder 418. The shaped bits may then be processed at component 420 to produce a set of n bits from a set of (m-1)*n shaped bits. The n bits may then be processed by a distribution dematcher 422 that maps the n bits to a set of k bits. The set of k bits and a set of γn bits associated with the non-shaped bits 418B may then be processed at multiplexer 424 to produce a set of Rx bits 426, where γ corresponds to the rate of additional (e.g., uniform) data bits carried on the symbol flags. The FEC rate R c Corresponds to Rc =(m-1+γ) / m≥(m-1) / m. Transmission rate R t It can be expressed as R t =R S +γ <H(A)+γ。

[0077] There is a relationship between the bit level and the symbol transmit power, for example, the second bit (e.g., the MSB bit "u0" in Table 2 below) or the third bit (e.g., the LSB bit "u1" in the table below) may be more determinative of the transmit power than the sign bit. For example, the power associated with the symbol "S" may be related to the square of the magnitude of the symbol, such that switching the bit u0 from "1" to "0" may reduce the transmit power (from "49" to "1" or from "25" to "9"), and switching the bit u1 from "1" to "0" may reduce the transmit power (from "49" to "25" or from "9" to "1").

[0078] S -7 -5 -3 -1 1 3 5 7 Logo 0 0 0 0 1 1 1 1 <![CDATA[u0]]> 1 1 0 0 0 0 1 1 <![CDATA[u1]]> 0 1 1 0 0 1 1 0

[0079] Table 2: Bit-to-symbol mapping for 8-ASK

[0080] During the shaping process, the probability that "u0" and / or "u1" takes the value "0" may be increased compared to the probability that "u0" and / or "u1" takes the value "1", so that the average power is reduced. In some aspects of the shaping encoder, the transmitter may "mask" the information bits and then jointly encode the shaped information bits and the information used for shaping. The corresponding decoder may jointly decode the shaped information bits and the information used for shaping, and then re-encode the bits to recover the original information bits. For some specific implementations, bit-level shaping is performed by mapping parity bits to high reliability bits (e.g., flag bits), and the shaped bits may be mapped to the remaining bit positions (e.g., MSB and / or LSB, excluding the flag bit). In some aspects of the present disclosure, mapping of shaped information bits, non-shaped information bits, shaping bits, parity bits, and / or CRC bits is provided to reduce the average transmission power. *

[0081] Figure 5 500 is a diagram illustrating an encoding pipeline according to some aspects of the present disclosure. The encoding pipeline illustrated in diagram 500 may include input information 504 (u), a CRC component 506, which in some aspects may add CRC bits to the information bits. After adding the CRC bits, the encoding pipeline may include a bit reshaping component 508. The bit reshaping component 508 may include a demultiplexer 510 that may decompose the input to the bit reshaping component 508 into a first set of bits u0 for reshaping and a second set of bits u1 for inclusion without additional reshaping. ns .

[0082] The encoding pipeline illustrated in diagram 700 may shape the first set of information bits (including CRC bits) based on the configured probability distribution of "0" and "1" at the shaping decoder 512 and the shaping encoder 514 to reduce the average transmit power. Bit shaping may be based on the shaped information bits (u s ), unshaped information bits (u ns ), shaping bits (providing information about the shaping performed on the shaped information bits), and a known or configured mapping of parity bits for block-coded based shaping. The parity bits may be generated by the FEC component 520. In some aspects, the mapping of shaping bits, parity bits, shaped information bits, and unshaped information bits may be accomplished by a bit-to-symbol mapper 521.

[0083] For example, a known or configured mapping implemented by the bit-to-symbol mapper 521 may include a first mapping that maps a first set of unshaped information bits to a set of flag bits; maps a second set of shaped information bits to a set of MSBs (e.g., corresponding to the u0 bits of Table 2); maps a third set of unshaped information bits to a set of remaining LSBs (e.g., corresponding to the u1 bits of Table 2); and maps a set of shaped bits and parity bits to the LSBs remaining after the information bits are mapped. In some aspects, the known or configured mapping may include a second mapping that maps a first set of shaping bits and parity bits to a set of flag bits, maps a second set of shaped information bits to a set of MSBs (e.g., corresponding to the u0 bits of Table 2); maps a third set of unshaped information bits to a first set of LSBs (e.g., corresponding to the u1 bits of Table 2); and maps a fourth set of parity bits that are not included in the first set of shaping bits and parity bits (e.g., because there are more shaping bits and parity bits than flag bits) to the LSBs remaining after mapping the information bits. In some aspects, the encoding pipeline may select one of the first mapping or the second mapping based on the MCS sent, the FEC decoding rate, or the shaping rate. The mapping may produce a one-dimensional set of symbols (e.g., a set of values ​​of "S" on a linear axis).

[0084] The output of the bit-to-symbol mapper 521 may then be processed at a quadrature amplitude modulation (QAM) mapping component 522 by QAM mapping, which maps linear values ​​to amplitude and phase of a QAM signal. The QAM mapped signal may then be transmitted, and the receiving device may perform a reverse operation to decode the transmitted signal. For example, a decoding device may receive an indication of a set of one or more rules for bit-to-symbol mapping for block code-based shaping of a set of shaped information bits, non-shaped information bits, shaped bits, parity bits, and CRC bits to symbols; perform decoding on the QAM transmission; and perform a bit-level deshaping operation on a set of shaped bits included in the QAM transmission based on the indication of the one or more rules to obtain a set of information bits.

[0085] Figure 6 600 is a diagram illustrating an encoding pipeline according to some aspects of the present disclosure. The encoding pipeline illustrated in diagram 600 may include input information 604 (u) and a bit reshaping component 608. The bit reshaping component 608 may include a demultiplexer 610 that may decompose the input to the bit reshaping component 608 into a first set of bits u0 for reshaping and a second set of bits u1 for inclusion without additional reshaping. ns .

[0086] The encoding pipeline illustrated in diagram 600 may shape the first set of information bits based on the configured probability distribution of "0" and "1" at the shaping decoder 612 and the shaping encoder 614 to reduce the average transmission power. Bit shaping may be based on the shaped information bits (u s ), unshaped information bits (u ns ), shaping bits (providing information about the shaping performed on the shaped information bits), and a known or configured mapping of parity bits for block-based coding shaping. After shaping, the encoding pipeline may include a CRC component 606, which in some aspects may add CRC bits to the shaped bits. Parity bits may be generated by the FEC component 620. In some aspects, the mapping of shaping bits, parity bits, CRC bits, shaped information bits, and unshaped information bits may be achieved by a bit-to-symbol mapper component 621.

[0087] For example, a known or configured mapping implemented by the bit-to-symbol mapper 621 may include a first mapping that maps a first set of unshaped information bits to a set of flag bits; maps a second set of shaped information bits to a set of MSBs (e.g., corresponding to the u0 bits of Table 2); maps a third set of unshaped information bits to a set of remaining LSBs (e.g., corresponding to the u1 bits of Table 2); and maps a set of shaped bits, CRC bits, and parity bits to the LSBs remaining after mapping the information bits. The shaped bits, CRC bits, and parity bits may be mapped to the LSBs in this order or in another order. In some aspects, the known or configured mapping may include a second mapping that maps a first set of shaping bits and CRC bits to a set of flag bits, maps a second set of unshaped information bits to a set of bits remaining in the flag bits, maps a third set of shaped information bits to the MSBs (e.g., corresponding to the u0 bits of Table 2); maps a fourth set of unshaped information bits to a first set of LSBs (e.g., corresponding to the u1 bits of Table 2); and maps a fifth set of parity bits to the LSBs remaining after mapping the information bits. In some aspects, the encoding pipeline may select one of the first mapping or the second mapping based on the MCS, FEC decoding rate, or shaping rate being transmitted. The mapping may produce a one-dimensional set of symbols (e.g., a set of values ​​of "S" on a linear axis).

[0088] The output of the bit-to-symbol mapper 621 may then be processed at the QAM mapping component 622 by a QAM mapping that maps linear values ​​to amplitude and phase of a QAM signal. The QAM mapped signal may then be transmitted, and the receiving device may perform a reverse operation to decode the transmitted signal. For example, a decoding device may receive an indication of a set of one or more rules for bit-to-symbol mapping for block code-based shaping of a set of shaped information bits, non-shaped information bits, shaped bits, parity bits, and CRC bits to symbols; perform decoding on the QAM transmission; and perform a bit-level deshaping operation on a set of shaped bits included in the QAM transmission based on the indication of the one or more rules to obtain a set of information bits.

[0089] Figure 7is a set of diagrams (e.g., diagrams 700, 710, 720, and 730) illustrating different potential bit mappings to sets of five symbols according to some aspects of the present disclosure. For example, diagram 700 illustrates a first mapping that may map a first set of non-shaped information bits to a set of flag bits, a second set of shaped information bits to a set of MSBs, a third set of non-shaped information bits to a set of LSBs, a fourth set of shaped bits to a set of next LSBs, and a fifth set of parity (or CRC) bits to a set of last LSBs. Diagram 710 illustrates a second mapping that may map a first set of shaped bits to a set of flag bits, a second set of first parity bits to a set of remaining flag bits, a third set of shaped information bits to a set of MSBs, a fourth set of non-shaped information bits to a set of LSBs, and a fifth set of parity (or CRC) bits to a set of last LSBs. Diagram 710 illustrates a second mapping that may map a first set of shaped bits to a set of flag bits, a second set of first parity bits to a set of remaining flag bits, a third set of shaped information bits to a set of MSBs, a fourth set of non-shaped information bits to a set of LSBs, and a fifth set of parity (or CRC) bits to a set of last LSBs.

[0090] Diagram 720 illustrates a third mapping that may map the first set of shaped bits to the set of flag bits, the second set of non-shaped information bits to the set of remaining flag bits, the third set of shaped information bits to the MSB set, the fourth set of non-shaped information bits to the LSB set, the fifth set of CRC bits to the next set of LSBs, and the sixth set of parity bits to the last set of LSBs. Diagram 730 illustrates a fourth mapping that may map the first set of shaped bits to the set of flag bits, the second set of CRC bits to the next set of flag bits, the third set of non-shaped information bits to the set of remaining flag bits, the fourth set of shaped information bits to the MSB set, the fifth set of non-shaped information bits to the LSB set, and the sixth set of CRC bits to the last set of LSBs. Additional configuration using the MSB for shaped information bits and other bits (eg, flag bits and / or LSBs) for non-shaped information bits, shaping bits, parity bits, and / or CRC bits.

[0091] Figure 8 800 is a diagram illustrating a transmit (Tx) device 802 and a receive (Rx) device 804 using bit-level mapping according to some aspects of the present disclosure. The Tx device 802 may send and the RX device 804 may receive a set of mapping rules 806 for decoding QAM signals and / or transmitting. In some aspects, the Rx device 804 (and the Tx device 802) may receive the mapping rules from a third network node (not illustrated). In some aspects, the Tx device 802 may receive and the Rx device 804 may send the mapping rules 806. The mapping rules may indicate the mapping rules described above with respect to Figure 7One or more of the mappings discussed. In some aspects, the mapping rules may include a correspondence between each specific mapping and a set of characteristics of the communication or encoding (eg, MCS, FEC coding rate, or shaping rate).

[0092] At 808, the Tx device 802 may process the set of bits for QAM transmission. In some aspects, processing the set of input bits may include performing a bit shaping operation on the set of input information bits at 810 to generate a set of shaped information bits, a set of non-shaped information bits, a set of shaped bits, and a set of parity bits and / or CRC bits. In some aspects, processing the set of input bits at 808 may include adding CRC bits prior to processing by an FEC component (e.g., FEC component 520 or 620), wherein the CRC bits may be added before or after the bit shaping operation at 810, as described above with respect to the above. Figure 5 and Figure 6 In some aspects, the Tx device may omit adding the CRC bits at 812.

[0093] The Tx device may then map the shaped bit set, the non-shaped bits, the shaped bits, the parity bits, and / or the CRC bits based on the mapping rule 806. The mapping may be based on the above description of Figure 7 Any of the mappings discussed or any other mapping of shaped bits to the MSB set. Based on the mapping, the Tx device 802 can transmit and the Rx device 804 can receive the QAM signal 816.

[0094] At 818, the Rx device 804 may begin processing the QAM signal 816. Processing the QAM signal 816 may include performing FEC decoding on the QAM signal 816 at 820. After FEC, the Rx device 804 may obtain a set of CRC bits at 822 (if CRC is used in encoding). At 824, the Rx device may also perform a bit-level deshaping operation on the shaped bit set according to the mapping rule to obtain a set of information bits (e.g., an input information bit set processed by the encoding Tx device 802). In some aspects, obtaining CRC bits at 822 may be performed before the bit-level deshaping operation at 824 (e.g., if CRC bits are added after the bit-level shaping operation performed by the encoding Tx device 802). In some aspects, obtaining CRC bits at 822 may be performed after the bit-level deshaping operation at 824 (e.g., if CRC bits are added before the bit-level shaping operation performed by the encoding Tx device 802).

[0095] Fig. 9900 is a flowchart of a method of wireless communication. The method may be performed by a transmitting device such as a UE (e.g., UE 104; Tx device 802; apparatus 1304) or a network node (e.g., base station 102; Tx device 802; network entity 1402). At 902, the Tx device may process input information including a set of information bits for QAM (or other amplitude modulation) transmission. In some aspects, the processing input at 902 may include performing a bit shaping operation on the set of information bits at 904 to generate a shaped set of bits. In some aspects, the processing input at 902 may include performing FEC on a combination of the set of information bits and the CRC bits after adding the CRC bits at 906. For example, 902-906 may be performed by Fig.13 and Fig.14 The addition of CRC bits at 906 may be performed before the bit shaping operation at 904. For example, referring to Figures 5 to 8 , a Tx device 802 implementing the encoding pipeline illustrated in diagrams 500 or 600 may process a set of input information bits for QAM transmission according to a mapping, such as one of mappings 700-730, at 808.

[0096] The mapping may be one of: a first mapping that may map the first set of non-shaped information bits to a set of flag bits, the second set of shaped information bits to a set of MSBs, the third set of non-shaped information bits to a set of LSBs, the fourth set of shaped bits to a set of next LSBs, and the fifth set of parity (or CRC) bits to a set of last LSBs. In some aspects, the mapping may be a second mapping that may map the first set of shaped bits to a set of flag bits, the second set of first parity bits to a set of remaining flag bits, the third set of shaped information bits to a set of MSBs, the fourth set of non-shaped information bits to a set of LSBs, and the fifth set of parity (or CRC) bits to a set of last LSBs.

[0097] In some aspects, the mapping may be a third mapping that may map the first set of shaped bits to the set of flag bits, the second set of non-shaped information bits to the set of remaining flag bits, the third set of shaped information bits to the set of MSBs, the fourth set of non-shaped information bits to the set of LSBs, the fifth set of CRC bits to the next set of LSBs, and the sixth set of parity bits to the last set of LSBs. In some aspects, the mapping may be a fourth mapping that may map the first set of shaped bits to the set of flag bits, the second set of CRC bits to the next set of flag bits, the third set of non-shaped information bits to the set of remaining flag bits, the fourth set of shaped information bits to the set of MSBs, the fifth set of non-shaped information bits to the set of LSBs, and the sixth set of CRC bits to the last set of LSBs. Additional configuration using MSBs for shaped information bits and other bits (e.g., flag bits and / or LSBs) for non-shaped information bits, shaped bits, parity bits, and / or CRC bits.

[0098] At 908, the Tx device may send a QAM transmission. For example, 908 may be Fig.13 and Fig.14 The application processor 1306, the cellular baseband processor 1324, the transceiver 1322, the antenna 1380, the CU processor 1412, the DU processor 1432, the RU processor 1442, the transceiver 1446, the antenna 1480, and / or the BLCS component 198 are executed. For example, referring to Figure 8 , the Tx device 802 can send a QAM signal 816.

[0099] Fig.10 1000 is a flow chart of a method of wireless communication. The method may be performed by a receiving device such as a UE (e.g., UE 104; Rx device 804; apparatus 1304) or a network node (e.g., base station 102; Rx device 804; network entity 1402). At 1002, the Rx device may receive a QAM (or other amplitude modulation) transmission. For example, 1002 may be performed by Fig.13 and Fig.14 The application processor 1306, the cellular baseband processor 1324, the transceiver 1322, the antenna 1380, the CU processor 1412, the DU processor 1432, the RU processor 1442, the transceiver 1446, the antenna 1480, and / or the BLCS component 198 are executed. Figure 8 , for example, the Rx device 804 can receive the QAM signal 816.

[0100] At 1004, the Rx device may perform FEC decoding of the QAM transmission. For example, 1004 may be performed by Fig.13 and Fig.14The FEC decoding may be performed by the application processor 1306, the cellular baseband processor 1324, the CU processor 1412, the DU processor 1432, the RU processor 1442, and / or the BLCS component 198. The FEC decoding may reproduce a soft bit set associated with a shaped bit set, a shaped bit, and a non-shaped bit. For example, referring to Figures 5 to 8 , the Rx device 804 may perform FEC decoding at 820 on a set of shaped information bits, non-shaped information bits, shaped bits, parity bits, and / or CRC bits from the QAM signal 816 according to the mapping of any of diagrams 700-730.

[0101] At 1006, the Rx device may perform bit-level deshaping and error detection. The bit-level deshaping and error detection may include obtaining CRC bits from the QAM transmission after FEC decoding at 1008, and performing a bit-level deshaping operation on the shaped bit set to obtain the information bit set at 1010. For example, 1006-1010 may be performed by Fig.13 and Fig.14 The CRC may be performed by the application processor 1306, the cellular baseband processor 1324, the CU processor 1412, the DU processor 1432, the RU processor 1442, and / or the BLCS component 198. Based on whether the CRC is added to the information bits before or after the shaping operation, the CRC bits may be obtained at 1008 before or after the bit-level de-shaping at 1010. In some aspects, the CRC may be added after the bit shaping operation to allow the RX device to perform error detection operations immediately after FEC decoding, rather than after bit-level de-shaping is performed to recover the CRC bits to be used for error detection operations. However, adding the CRC after the bit shaping operation may cause the CRC bits to be placed at bits with higher reliability, thereby reducing performance compared to adding the CRC bits before the bit-level shaping operation. For example, referring to Figures 5 to 8 , based on one of the encoding pipelines illustrated in diagrams 500 or 600 and one of the mappings 700 - 730 , the RX device 804 may obtain the CRC bits at 822 and perform a bit-level de-shaping operation at 824 .

[0102] Fig.11 1100 is a flow chart of a method of wireless communication. The method may be performed by a transmitting device such as a UE (e.g., UE 104; Tx device 802; apparatus 1304) or a network node (e.g., base station 102; Tx device 802; network entity 1402). At 1102, the Tx device may perform a bit shaping operation on a set of information bits to generate a set of shaped information bits. For example, 1102 may be performed by Fig.13 and Fig.14The application processor 1306, the cellular baseband processor 1324, the CU processor 1412, the DU processor 1432, the RU processor 1442 and / or the BLCS component 198 are executed. For example, referring to Figures 5 to 8 , the Tx device 802 implementing the encoding pipeline illustrated in diagram 500 or 600 may perform a bit shaping operation on the information bit set at 810 to generate a shaped information bit set, a non-shaped information bit set, shaping bits, and parity bits.

[0103] At 1104, the Tx device may map the shaped information bit sets, non-shaped information bits, shaped bits, and parity bits to symbols based on a bit-to-symbol mapping for block code-based shaping in an order based on one or more rules. For example, 1104 may be composed of Fig.13 and Fig.14 The mapping may be performed by the application processor 1306, the cellular baseband processor 1324, the CU processor 1412, the DU processor 1432, the RU processor 1442, and / or the BLCS component 198. The mapping may be one of the following: a first mapping that may map the first set of non-shaped information bits to the flag bit set, the second set of shaped information bits to the MSB set, the third set of non-shaped information bits to the LSB set, the fourth set of shaped bits to the next LSB set, and the fifth set of parity (or CRC) bits to the last LSB set. In some aspects, the mapping may be a second mapping that may map the first set of shaped bits to the flag bit set, the second set of first parity bits to the remaining flag bit set, the third set of shaped information bits to the MSB set, the fourth set of non-shaped information bits to the LSB set, and the fifth set of parity (or CRC) bits to the last LSB set.

[0104] In some aspects, the mapping may be a third mapping that may map the first set of shaped bits to the set of flag bits, the second set of non-shaped information bits to the set of remaining flag bits, the third set of shaped information bits to the set of MSBs, the fourth set of non-shaped information bits to the set of LSBs, the fifth set of CRC bits to the next set of LSBs, and the sixth set of parity bits to the last set of LSBs. In some aspects, the mapping may be a fourth mapping that may map the first set of shaped bits to the set of flag bits, the second set of CRC bits to the next set of flag bits, the third set of non-shaped information bits to the set of remaining flag bits, the fourth set of shaped information bits to the set of MSBs, the fifth set of non-shaped information bits to the set of LSBs, and the sixth set of CRC bits to the last set of LSBs. Additional configuration using MSBs for shaped information bits and other bits (e.g., flag bits and / or LSBs) for non-shaped information bits, shaped bits, parity bits, and / or CRC bits. For example, refer to Figure 5 , Figure 6 and Figure 8 At 814, the Tx device 802 may use one of the bit-to-symbol mappers 521 and / or 621 to map the shaped information bit sets, non-shaped information bits, shaping bits, and parity bits to symbols based on the bit-to-symbol mapping for block code based shaping in an order based on one or more rules.

[0105] At 1106, the Tx device may send a QAM transmission. For example, 1106 may be performed by Fig.13 and Fig.14 The application processor 1306, the cellular baseband processor 1324, the transceiver 1322, the antenna 1380, the CU processor 1412, the DU processor 1432, the RU processor 1442, the transceiver 1446, the antenna 1480, and / or the BLCS component 198 are executed. For example, referring to Figure 8 , the Tx device 802 can send a QAM signal 816.

[0106] Fig.12 1200 is a flow chart of a method of wireless communication. The method may be performed by a receiving device such as a UE (e.g., UE 104; Rx device 804; apparatus 1304) or a network node (e.g., base station 102; Rx device 804; network entity 1402). At 1202, the Rx device may receive an indication of a set of one or more rules for bit-to-symbol mapping for block code-based shaping of a set of shaped information bits, non-shaped information bits, shaped bits, parity bits, and CRC bits to symbols. For example, 1202 may be performed by Fig.13 and Fig.14The mapping may be performed by the application processor 1306, the cellular baseband processor 1324, the transceiver 1322, the antenna 1380, the CU processor 1412, the DU processor 1432, the RU processor 1442, the transceiver 1446, the antenna 1480, and / or the BLCS component 198. The mapping may include a first mapping that may map a first set of non-shaped information bits to a set of flag bits, a second set of shaped information bits to a set of MSBs, a third set of non-shaped information bits to a set of LSBs, a fourth set of shaped bits to a next set of LSBs, and a fifth set of parity (or CRC) bits to a last set of LSBs. In some aspects, the mapping may include a second mapping that may map the first set of shaped bits to a set of flag bits, map the second set of first parity bits to a set of remaining flag bits, map the third set of shaped information bits to an MSB set, map the fourth set of non-shaped information bits to an LSB set, and map the fifth set of parity (or CRC) bits to a last set of LSBs.

[0107] In some aspects, the mapping may include a third mapping that may map the first set of shaped bits to the set of flag bits, the second set of non-shaped information bits to the set of remaining flag bits, the third set of shaped information bits to the MSB set, the fourth set of non-shaped information bits to the LSB set, the fifth set of CRC bits to the next set of LSBs, and the sixth set of parity bits to the last set of LSBs. In some aspects, the mapping may include a fourth mapping that may map the first set of shaped bits to the set of flag bits, the second set of CRC bits to the next set of flag bits, the third set of non-shaped information bits to the set of remaining flag bits, the fourth set of shaped information bits to the MSB set, the fifth set of non-shaped information bits to the LSB set, and the sixth set of CRC bits to the last set of LSBs. In some aspects, the indication may indicate the use of the MSB for shaped information bits and additional configurations for other bits (e.g., flag bits and / or LSBs) for non-shaped information bits, shaped bits, parity bits, and / or CRC bits. In some aspects, the indication may also indicate a set of conditions for utilizing each of a plurality of indicated mappings. For example, referring to Figure 8 , the Rx device 804 may receive mapping rules 806 indicating that shaped information bit sets, non-shaped information bits, shaped bits, parity bits, and / or CRC bits are mapped to symbols based on one or more bit-to-symbol mappings for block code based shaping in an order based on the one or more rules.

[0108] At 1204, the Rx device may receive a QAM (or other amplitude modulation) transmission. For example, 1204 may be Fig.13 and Fig.14 The application processor 1306, the cellular baseband processor 1324, the transceiver 1322, the antenna 1380, the CU processor 1412, the DU processor 1432, the RU processor 1442, the transceiver 1446, the antenna 1480, and / or the BLCS component 198 are executed. Figure 8 , for example, the Rx device 804 can receive the QAM signal 816.

[0109] At 1206, the Rx device may perform decoding of the QAM transmission. For example, 1206 may be performed by Fig.13 and Fig.14 The decoding may be performed by the application processor 1306, the cellular baseband processor 1324, the CU processor 1412, the DU processor 1432, the RU processor 1442, and / or the BLCS component 198. The decoding may be FEC decoding for reproducing a soft bit set associated with a shaped bit set, a shaped bit, and a non-shaped bit. For example, referring to Figures 5 to 8 , the Rx device 804 may perform FEC decoding at 820 on a set of shaped information bits, non-shaped information bits, shaped bits, parity bits, and / or CRC bits from the QAM signal 816 according to the mapping of any of diagrams 700-730.

[0110] At 1208, the Rx device may perform bit-level deshaping and error detection. The bit-level deshaping and error detection may include obtaining CRC bits from the QAM transmission after FEC decoding at 1210, performing an error detection operation based on the CRC bits at 1212, and performing a bit-level deshaping operation on the shaped bit set to obtain an information bit set at 1214. For example, 1208-1214 may be performed by Fig.13 and Fig.14 The CRC may be performed by the application processor 1306, the cellular baseband processor 1324, the CU processor 1412, the DU processor 1432, the RU processor 1442, and / or the BLCS component 198. Based on whether the CRC is added to the information bits before or after the shaping operation, the CRC bits may be obtained at 1210 and error detection may be performed at 1212 before or after the bit-level de-shaping at 1214. In some aspects, the CRC may be added after the bit shaping operation to allow the RX device to perform an error detection operation immediately after FEC decoding, rather than after bit-level de-shaping is performed to recover the CRC bits to be used for error detection operations. However, adding the CRC after the bit shaping operation may cause the CRC bits to be placed at bits with higher reliability, thereby reducing performance compared to adding the CRC bits before the bit-level shaping operation. For example, referring to Figures 5 to 8, based on one of the encoding pipelines illustrated in diagrams 500 or 600 and one of the mappings 700 - 730 , the RX device 804 may obtain the CRC bits at 822 and perform a bit-level de-shaping operation at 824 .

[0111] Fig.131300 is an example of a hardware implementation of an example device 1304. The device 1304 may be a UE, a component of a UE, or may implement UE functionality. In some aspects, the device 1304 may include a cellular baseband processor 1324 (also referred to as a modem) coupled to one or more transceivers 1322 (e.g., a cellular RF transceiver). The cellular baseband processor 1324 may include on-chip memory 1324'. In some aspects, the device 1304 may also include one or more subscriber identity module (SIM) cards 1320 and an application processor 1306 coupled to a secure digital (SD) card 1308 and a screen 1310. The application processor 1306 may include on-chip memory 1306'. In some aspects, the device 1304 may also include a Bluetooth module 1312, a WLAN module 1314, an SPS module 1316 (e.g., a GNSS module), one or more sensor modules 1318 (e.g., an atmospheric pressure sensor / altimeter; a motion sensor such as an inertial measurement unit (IMU), a gyroscope, and / or an accelerometer; light detection and ranging (LIDAR), radio-aided detection and ranging (RADAR), sound navigation and ranging (SONAR), a magnetometer, audio, and / or other technologies for positioning), an additional memory module 1326, a power source 1330, and / or a camera 1332. The Bluetooth module 1312, the WLAN module 1314, and the SPS module 1316 may include an on-chip transceiver (TRX) (or in some cases, only a receiver (RX)). The Bluetooth module 1312, the WLAN module 1314, and the SPS module 1316 may include their own dedicated antennas and / or communicate using an antenna 1380. The cellular baseband processor 1324 communicates with the UE 104 and / or with the RU associated with the network entity 1302 through the transceiver 1322 via one or more antennas 1380. The cellular baseband processor 1324 and the application processor 1306 may each include a computer-readable medium / memory 1324', 1306', respectively. The additional memory module 1326 may also be considered as a computer-readable medium / memory. Each computer-readable medium / memory 1324', 1306', 1326 may be non-transitory. The cellular baseband processor 1324 and the application processor 1306 are each responsible for general processing, including executing software stored on a computer-readable medium / memory. The software enables the cellular baseband processor 1324 / application processor 1306 to perform the various functions described above when executed by the cellular baseband processor 1324 / application processor 1306. The computer-readable medium / memory can also be used to store data manipulated by the cellular baseband processor 1324 / application processor 1306 when executing the software.The cellular baseband processor 1324 / application processor 1306 may be a component of the UE 350 and may include the memory 360 and / or at least one of the TX processor 368, the RX processor 356, and the controller / processor 359. In one configuration, the device 1304 may be a processor chip (modem and / or application) and include only the cellular baseband processor 1324 and / or the application processor 1306, while in another configuration, the device 1304 may be the entire UE (e.g., see. Figure 3 350) and includes additional modules of device 1304.

[0112] As discussed above, the BLCS component 198 is configured to process input information including a set of information bits for a QAM transmission by: performing a bit shaping operation on the set of information bits to generate a set of shaped bits, and performing FEC on the combination of the set of information bits and the CRC bits after adding CRC bits; and transmitting the QAM transmission. In some aspects, the BLCS component 198 may be configured to: receive the QAM transmission; perform FEC decoding on the QAM transmission; obtain CRC bits from the QAM transmission after the FEC decoding; and perform a bit-level deshaping operation on the set of shaped bits to obtain the set of information bits. In some aspects, the BLCS component 198 may be configured to: perform a bit shaping operation on the set of information bits to generate a set of shaped information bits; map the set of shaped information bits, non-shaped information bits, shaping bits, parity bits, and CRC bits to symbols in an order based on one or more rules by a bit-to-symbol mapping for block code-based shaping; and transmit the QAM transmission. In certain aspects, the BLCS component 198 may be configured to: receive an indication of a set of one or more rules for bit-to-symbol mapping for block code-based shaping of a shaped information bit set, non-shaped information bits, shaped bits, parity bits, and CRC bits to symbols; receive a QAM transmission; perform decoding on the QAM transmission; and perform a bit-level deshaping operation on the shaped bit set included in the QAM transmission based on the indication of the one or more rules to obtain a set of information bits. The BLCS component 198 may be within the cellular baseband processor 1324, the application processor 1306, or both the cellular baseband processor 1324 and the application processor 1306. The BLCS component 198 may be one or more hardware components that are specifically configured to perform the process / algorithm, implemented by one or more processors configured to perform the process / algorithm, stored in a computer-readable medium for implementation by one or more processors, or some combination of the above. As shown, the device 1304 may include a variety of components configured for various functions. In one configuration, the device 1304 (and specifically the cellular baseband processor 1324 and / or the application processor 1306) includes a component for processing input information including a set of information bits for a QAM transmission. The device 1304 (and specifically the cellular baseband processor 1324 and / or the application processor 1306) may also include a component for performing a bit shaping operation on the set of information bits to generate a shaped set of bits. The device 1304 (and specifically the cellular baseband processor 1324 and / or the application processor 1306) may also include a component for performing FEC on the combination of the set of information bits and the CRC bits after adding the CRC bits. The device 1304 (and specifically the cellular baseband processor 1324 and / or the application processor 1306) may also include a component for sending the QAM transmission.The device 1304 (and specifically the cellular baseband processor 1324 and / or the application processor 1306) may also include a component for receiving a QAM transmission. The device 1304 (and specifically the cellular baseband processor 1324 and / or the application processor 1306) may also include a component for performing FEC decoding on the QAM transmission. The device 1304 (and specifically the cellular baseband processor 1324 and / or the application processor 1306) may also include a component for obtaining CRC bits from the QAM transmission after the FEC decoding. The device 1304 (and specifically the cellular baseband processor 1324 and / or the application processor 1306) may also include a component for performing a bit-level deshaping operation on a shaped set of bits to obtain a set of information bits. The device 1304 (and specifically the cellular baseband processor 1324 and / or the application processor 1306) may also include a component for performing a bit-shaping operation on a set of information bits to generate a shaped set of information bits. The apparatus 1304 (and specifically the cellular baseband processor 1324 and / or the application processor 1306) may also include means for mapping the set of shaped information bits, non-shaped information bits, shaping bits, and parity check bits to symbols in an order based on one or more rules based on a bit-to-symbol mapping for block code based shaping. The apparatus 1304 (and specifically the cellular baseband processor 1324 and / or the application processor 1306) may also include means for transmitting a QAM transmission. The apparatus 1304 (and specifically the cellular baseband processor 1324 and / or the application processor 1306) may also include means for receiving an indication of a set of one or more rules for bit-to-symbol mapping for block code based shaping of the set of shaped information bits, non-shaped information bits, shaping bits, parity check bits, and CRC bits to symbols. The apparatus 1304 (and specifically the cellular baseband processor 1324 and / or the application processor 1306) may also include means for receiving a QAM transmission. The apparatus 1304 (and specifically the cellular baseband processor 1324 and / or the application processor 1306) may also include means for performing decoding of the QAM transmission. The apparatus 1304 (and specifically the cellular baseband processor 1324 and / or the application processor 1306) may also include means for performing a bit-level de-shaping operation on a set of shaped bits included in the QAM transmission to obtain a set of information bits based on the indication of the one or more rules. The apparatus may include means for performing combining. Figures 9 to 12 The various aspects described in the flowcharts and / or by Figure 8The components may be a BLCS component 198 of the device 1304 configured to perform the functions recited by the components. As described above, the device 1304 may include a TX processor 368, an RX processor 356, and a controller / processor 359. Therefore, in one configuration, these components may be a TX processor 368, an RX processor 356, and / or a controller / processor 359 configured to perform the functions recited by the components.

[0113] Fig.14 1400 is a diagram illustrating an example of a hardware implementation of a network entity 1402. The network entity 1402 may be a BS, a component of a BS, or may implement BS functionality. The network entity 1402 may include at least one of a CU 1410, a DU 1430, or a RU 1440. For example, depending on the layer functionality handled by the BLCS component 198, the network entity 1402 may include a CU 1410; both a CU 1410 and a DU 1430; each of the CU 1410, the DU 1430, and the RU 1440; the DU 1430; both a DU 1430 and a RU 1440; or a RU 1440. The CU 1410 may include a CU processor 1412. The CU processor 1412 may include an on-chip memory 1412'. In some aspects, the CU 1410 may also include an additional memory module 1414 and a communication interface 1418. CU 1410 communicates with DU 1430 via a midhaul link, such as an F1 interface. DU 1430 may include a DU processor 1432. DU processor 1432 may include on-chip memory 1432'. In some aspects, DU 1430 may also include additional memory modules 1434 and a communication interface 1438. DU 1430 communicates with RU 1440 via a fronthaul link. RU 1440 may include a RU processor 1442. RU processor 1442 may include on-chip memory 1442'. In some aspects, RU 1440 may also include additional memory modules 1444, one or more transceivers 1446, antenna 1480, and communication interface 1448. RU 1440 communicates with UE 104. On-chip memory 1412', 1432', 1442' and additional memory modules 1414, 1434, 1444 may each be considered a computer-readable medium / memory. Each computer readable medium / memory may be non-transitory. Each of processors 1412, 1432, 1442 is responsible for general processing, including executing software stored on the computer readable medium / memory. The software, when executed by the corresponding processor, causes the processor to perform the various functions described above. The computer readable medium / memory may also be used to store data manipulated by the processor when executing the software.

[0114] As discussed above, the BLCS component 198 is configured to process input information including a set of information bits for a QAM transmission by: performing a bit shaping operation on the set of information bits to generate a set of shaped bits, and performing FEC on the combination of the set of information bits and the CRC bits after adding CRC bits; and transmitting the QAM transmission. In some aspects, the BLCS component 198 may be configured to: receive the QAM transmission; perform FEC decoding on the QAM transmission; obtain CRC bits from the QAM transmission after the FEC decoding; and perform a bit-level deshaping operation on the set of shaped bits to obtain the set of information bits. In some aspects, the BLCS component 198 may be configured to: perform a bit shaping operation on the set of information bits to generate a set of shaped information bits; map the set of shaped information bits, non-shaped information bits, shaping bits, parity bits, and CRC bits to symbols in an order based on one or more rules by a bit-to-symbol mapping for block code-based shaping; and transmit the QAM transmission. In certain aspects, the BLCS component 198 may be configured to: receive an indication of a set of one or more rules for bit-to-symbol mapping for block code-based shaping of a shaped information bit set, non-shaped information bits, shaped bits, parity bits, and CRC bits to symbols; receive a QAM transmission; perform decoding on the QAM transmission; and perform a bit-level deshaping operation on the shaped bit set included in the QAM transmission to obtain a set of information bits based on the indication of the one or more rules. The BLCS component 198 may be within one or more processors of one or more of the CU 1410, DU 1430, and RU 1440. The BLCS component 198 may be one or more hardware components that are specifically configured to perform the process / algorithm, implemented by one or more processors configured to perform the process / algorithm, stored in a computer-readable medium for implementation by one or more processors, or some combination of the above. The network entity 1402 may include a variety of components configured for various functions. In one configuration, the network entity 1402 includes a component for processing input information including a set of information bits for a QAM transmission. The device, the network entity 1302 (and specifically the cellular baseband processor 1324 and / or the application processor 1306) may also include a component for performing a bit shaping operation on the set of information bits to generate a shaped set of bits. The network entity 1402 may also include a component for performing FEC on the combination of the set of information bits and the CRC bits after adding the CRC bits. The network entity 1402 may also include a component for sending the QAM transmission. The network entity 1402 may also include a component for receiving the QAM transmission. The network entity 1402 may also include a component for performing FEC decoding on the QAM transmission. The network entity 1402 may also include a component for obtaining CRC bits from the QAM transmission after the FEC decoding.The network entity 1402 may also include means for performing a bit-level deshaping operation on the shaped set of bits to obtain a set of information bits. The network entity 1402 may also include means for performing a bit-shaping operation on the set of information bits to generate a shaped set of information bits. The network entity 1402 may also include means for mapping the shaped set of information bits, non-shaped information bits, shaping bits, and parity bits to symbols based on a bit-to-symbol mapping for block-code-based shaping in an order based on one or more rules. The network entity 1402 may also include means for sending a QAM transmission. The network entity 1402 may also include means for receiving an indication of a set of one or more rules for bit-to-symbol mapping for block-code-based shaping of the shaped set of information bits, non-shaped information bits, shaping bits, parity bits, and CRC bits to symbols. The network entity 1402 may also include means for receiving a QAM transmission. The network entity 1402 may also include means for performing decoding on the QAM transmission. The network entity 1402 may also include means for performing a bit level de-shaping operation on a set of shaped bits included in the QAM transmission to obtain a set of information bits based on the indication of the one or more rules. The apparatus may include means for performing combining. Figures 9 to 12 The various aspects described in the flowcharts and / or by Figure 8 The components may be a BLCS component 198 of the network entity 1402 configured to perform the functions recited by the components. As described above, the network entity 1402 may include a TX processor 316, an RX processor 370, and a controller / processor 375. Therefore, in one configuration, the components may be a TX processor 316, an RX processor 370, and / or a controller / processor 375 configured to perform the functions recited by the components.

[0115] During the shaping process, the probability that "u0" and / or "u1" takes the value "0" may be increased compared to the probability that "u0" and / or "u1" takes the value "1", so that the average power is reduced. In some aspects of the shaping encoder, the transmitter may "mask" the information bits and then jointly encode the shaped information bits and the information used for shaping. The corresponding decoder may jointly decode the shaped information bits and the information used for shaping, and then re-encode the bits to recover the original information bits. For some specific implementations, bit-level shaping is performed by mapping parity bits to high reliability bits (e.g., flag bits), and the shaped bits may be mapped to the remaining bit positions (e.g., MSB and / or LSB, excluding the flag bit). In some aspects of the present disclosure, mapping of shaped information bits, non-shaped information bits, shaping bits, parity bits, and / or CRC bits is provided to reduce the average transmission power. *

[0116] It should be understood that the specific order or hierarchy of the blocks in the disclosed process / flowchart is only an illustration of the exemplary method. It should be understood that the specific order or hierarchy of the blocks in the process / flowchart can be rearranged based on design preferences. In addition, some blocks can be combined or omitted. The attached method claims provide the elements of each block in a sample order, but are not limited to the specific order or hierarchy provided.

[0117] The foregoing description is provided to enable any person skilled in the art to practice the various aspects described herein. Various modifications to these aspects will be apparent to those skilled in the art, and the general principles defined herein can be applied to other aspects. Therefore, the claims are not limited to the various aspects described herein, but should be given the full scope consistent with the language claims. Unless otherwise specified, reference to an element in the singular form does not mean "one and only one", but "one or more". Terms such as "if", "when ..." and "at ..." do not mean a direct temporal relationship or reaction. That is, these phrases, such as "when ...", do not mean an instant action in response to the occurrence of an action or during the occurrence of an action, but only mean that if the condition is met, the action will occur without a specific or instantaneous time constraint to make the action occur. The word "exemplary" is used herein to mean "used as an example, instance, or illustration". Any aspect described as "exemplary" herein is not necessarily interpreted as being preferred or having an advantage over other aspects. Unless otherwise specified, the term "some" refers to one or more. Combinations such as "at least one of A, B, or C", "one or more of A, B, or C", "at least one of A, B and C", "one or more of A, B, and C", and "A, B, C, or any combination thereof" include any combination of A, B, and / or C, which may include multiple A, multiple B, or multiple C. Specifically, combinations such as "at least one of A, B, or C", "one or more of A, B, or C", "at least one of A, B, and C", "one or more of A, B, and C", and "A, B, C, or any combination thereof" may be only A, only B, only C, A and B, A and C, B and C, or A and B and C, where any such combination may contain one or more members of A, B, or C. A set should be interpreted as a set of elements, where the number of elements is one or more. Thus, for a set of X, X will include one or more elements. If the first device receives data from the second device or sends data to the second device, data may be directly received / sent between the first device and the second device, or indirectly received / sent between the first device and the second device through a collection of devices. All structural and functional equivalents of the elements throughout the various aspects described in this disclosure that are known or will be known later to a person of ordinary skill in the art are expressly incorporated herein by reference and are covered by the claims. In addition, nothing disclosed herein is intended to be dedicated to the public, regardless of whether such disclosure is explicitly stated in the claims. Words such as "module", "mechanism", "element", "device" cannot replace the word "component". Therefore, no claim element will be understood as a component plus function unless the element is explicitly stated using the phrase "component for..."

[0118] As used herein, the phrase "based on" should not be interpreted as referring to a closed set of information, one or more conditions, one or more factors, etc. In other words, the phrase "based on A" (where "A" can be information, a condition, a factor, etc.) should be interpreted as "based at least on A" unless specifically stated differently.

[0119] The following aspects are merely illustrative and may be combined with other aspects or teachings described herein without limitation.

[0120] Aspect 1 is a method for wireless communication, the method comprising: processing input information including a set of information bits for QAM transmission by: (1) performing a bit shaping operation on the information bit set to generate a shaped bit set, and (2) performing FEC on a combination of the information bit set and the CRC bits after adding CRC bits; and sending the QAM transmission.

[0121] Aspect 2 is a method according to aspect 1, wherein the CRC bits are added to the set of information bits before performing the bit shaping operation on the set of information bits.

[0122] Aspect 3 is a method according to any one of aspects 1 and 2, wherein the CRC bits are added to the set of information bits after performing the bit shaping operation on the set of information bits.

[0123] Aspect 4 is a method according to any one of Aspects 1 to 3, wherein the method further includes mapping the shaped information bit set, non-shaped information bits, shaped bits, and parity bits to symbols based on a bit-to-symbol mapping for block code-based shaping in an order based on one or more rules.

[0124] Aspect 5 is a method according to Aspect 4, wherein the bit-to-symbol mapping includes mapping the non-shaped information bits to a flag bit set and mapping the shaped information bit set to an MSB set, and mapping the remaining non-shaped information bits and the shaped bits and the parity bits to a remaining bit set.

[0125] Aspect 6 is a method according to Aspect 4, wherein the bit-to-symbol mapping includes mapping a first set of the shaping bits and the parity bits to a flag bit set, mapping the shaped information bit set to an MSB set, and mapping a second set of the parity bits to an LSB set.

[0126] Aspect 7 is a method according to aspect 6, wherein the bit-to-symbol mapping further comprises mapping the non-shaped information bits to a bit set between the MSB to which the shaped information bit set is mapped and the LSB to which the second bit set of the parity bits is mapped.

[0127] Aspect 8 is a method of wireless communication, the method comprising: receiving a QAM transmission; performing FEC decoding on the QAM transmission; obtaining CRC bits from the QAM transmission after the FEC decoding; and performing a bit-level deshaping operation on a shaped bit set to obtain an information bit set.

[0128] Aspect 9 is a method according to aspect 8, wherein the CRC bits are obtained and a CRC check is performed after the bit-level de-shaping operation.

[0129] Aspect 10 is a method according to aspect 8, wherein the CRC bits are obtained and a CRC check is performed before the bit-level de-shaping operation.

[0130] Aspect 11 is a method according to any one of Aspects 8 to 10, the method further comprising demapping a set of symbols into the set of shaped information bits, non-shaped information bits, shaped bits, and parity bits based on a bit-to-symbol mapping for block code-based shaping in an order based on one or more rules.

[0131] Aspect 12 is a method according to Aspect 11, wherein the bit-to-symbol mapping includes mapping the non-shaped information bits to a flag bit set and mapping the shaped information bit set to an MSB set, and mapping the remaining non-shaped information bits, the shaped bits and the parity bits to a remaining bit set.

[0132] Aspect 13 is a method according to Aspect 11, wherein the bit-to-symbol mapping includes mapping a first set of the shaping bits and the parity bits to a flag bit set, mapping the shaped information bit set to an MSB set, and mapping a second set of the parity bits to an LSB set.

[0133] Aspect 14 is a method according to aspect 11, wherein the bit-to-symbol mapping further comprises mapping the non-shaped information bits to a bit set between the MSBs to which the shaped information bit set is mapped and the LSBs to which the second bit set of parity bits is mapped.

[0134] Aspect 15 is a method of wireless communication, the method comprising: performing a bit shaping operation on a set of information bits to generate a set of shaped information bits; mapping the set of shaped information bits, non-shaped information bits, shaping bits, and parity bits to symbols based on a bit-to-symbol mapping for block code-based shaping in an order based on one or more rules; and sending a QAM transmission.

[0135] Aspect 16 is a method according to Aspect 15, wherein the bit-to-symbol mapping includes mapping the non-shaped information bits to a flag bit set and mapping the shaped information bit set to an MSB set, and mapping the remaining non-shaped information bits and the shaped bits and the parity bits to a remaining bit set.

[0136] Aspect 17 is a method according to Aspect 15, wherein the bit-to-symbol mapping includes mapping a first set of the shaping bits and the parity bits to a flag bit set, mapping the shaped information bit set to an MSB set, and mapping a second set of the parity bits to an LSB set.

[0137] Aspect 18 is a method according to aspect 17, wherein the bit-to-symbol mapping further comprises mapping the non-shaped information bits to a bit set between the MSB to which the shaped information bit set is mapped and the LSB to which the second bit set of the parity bits is mapped.

[0138] Aspect 19 is a method according to any one of Aspects 15 to 18, wherein CRC bits are added to the set of information bits before performing the bit shaping operation on the set of information bits, and performing the bit shaping operation includes performing the bit shaping operation on the set of information bits and the CRC bits to generate the shaped set of information bits.

[0139] Aspect 20 is a method according to any one of Aspects 15 to 18, wherein the bit-to-symbol mapping further comprises mapping CRC bits to symbols based on the bit-to-symbol mapping for block code based shaping in the order based on the one or more rules.

[0140] Aspect 21 is a method of wireless communication, the method comprising: receiving an indication of a set of one or more rules for bit-to-symbol mapping, the bit-to-symbol mapping being used for block code-based shaping of a shaped information bit set, non-shaped information bits, shaped bits, parity bits, and CRC bits to symbols; receiving a QAM transmission; performing decoding on the QAM transmission; and performing a bit-level deshaping operation on the shaped bit set included in the QAM transmission based on the indication of the one or more rules to obtain a set of information bits.

[0141] Aspect 22 is a method according to aspect 21, the method further comprising: obtaining CRC bits for error detection after the bit-level deshaping operation; and performing an error detection operation based on the CRC bits.

[0142] Aspect 23 is a method according to aspect 21, the method further comprising: obtaining CRC bits for error detection before the bit-level deshaping operation; and performing an error detection operation based on the CRC bits before performing the bit-level deshaping operation.

[0143] Aspect 24 is a method according to any one of Aspects 21 to 23, wherein the bit-to-symbol mapping includes mapping the non-shaped information bits to a flag bit set and mapping the shaped information bit set to an MSB set, and mapping the remaining non-shaped information bits, the shaped bits and the parity bits to a remaining bit set.

[0144] Aspect 25 is a method according to Aspects 21 to 23, wherein the bit-to-symbol mapping includes mapping a first set of the shaping bits and the parity bits to a flag bit set, mapping the shaped information bit set to an MSB set, and mapping a second set of the parity bits to an LSB set.

[0145] Aspect 26 is a method according to aspect 25, wherein the bit-to-symbol mapping further comprises mapping the non-shaped information bits to a bit set between the MSBs to which the shaped information bit set is mapped and the LSBs to which the second bit set of parity bits is mapped.

[0146] Aspect 27 is an apparatus for wireless communication at a device, the apparatus comprising a memory and at least one processor, the at least one processor being coupled to the memory and being configured to implement any one of Aspects 1 to 26 based at least in part on information stored in the memory.

[0147] Aspect 28 is the apparatus of aspect 27, further comprising a transceiver or an antenna coupled to the at least one processor.

[0148] Aspect 29 is an apparatus for wireless communication at a device, the apparatus comprising means for implementing any one of aspects 1 to 26.

[0149] Aspect 30 is a computer-readable medium (eg, a non-transitory computer-readable medium) storing computer-executable code, wherein the code, when executed by a processor, causes the processor to implement any one of aspects 1 to 26.

Claims

1. A device for wireless communication, the device comprising: Memory; as well as at least one processor coupled to the memory and based at least in part on the information stored in the memory, the at least one processor configured to: Input information comprising a set of information bits for Quadrature Amplitude Modulation (QAM) transmission is processed by: performing a bit shaping operation on the set of information bits to generate a set of shaped bits; as well as performing forward error correction (FEC) on the combination of the information bit set and the CRC bits after adding cyclic redundancy check (CRC) bits; as well as Send the QAM transmission.

2. The apparatus of claim 1 , wherein the CRC bits are added to the set of information bits before the bit shaping operation is performed on the set of information bits.

3. The apparatus of claim 1, wherein the CRC bits are added to the set of information bits after the bit shaping operation is performed on the set of information bits.

4. The apparatus of claim 1 , wherein the at least one processor is further configured to: The set of shaped information bits, non-shaped information bits, shaping bits, and parity bits are mapped to symbols based on a bit-to-symbol mapping for block code based shaping in an order based on one or more rules.

5. The apparatus of claim 4 , wherein the bit-to-symbol mapping comprises mapping the non-shaped information bits to a set of flag bits and mapping the set of shaped information bits to a set of most significant bits (MSBs), and mapping remaining non-shaped information bits and shaped bits and the parity bits to a set of remaining bits.

6. The apparatus of claim 4 , wherein the bit-to-symbol mapping comprises mapping a first set of the shaping bits and the parity bits to a set of flag bits, mapping the set of shaped information bits to a set of most significant bits (MSBs), and mapping a second set of the parity bits to a set of least significant bits (LSBs).

7. The apparatus of claim 6, wherein the bit-to-symbol mapping further comprises mapping the non-shaped information bits to a set of bits between the MSBs to which the set of shaped information bits is mapped and the LSBs to which the second set of bits of the parity bits is mapped.

8. The apparatus of claim 1, further comprising a transceiver or an antenna coupled to the at least one processor, wherein the at least one processor is configured to transmit the QAM transmission via the transceiver or the antenna.

9. An apparatus for wireless communication, the apparatus comprising: Memory; as well as at least one processor coupled to the memory and based at least in part on the information stored in the memory, the at least one processor configured to: Receives quadrature amplitude modulation (QAM) transmissions; performing forward error correction (FEC) decoding on the QAM transmission; obtaining cyclic redundancy check (CRC) bits from the QAM transmission after the FEC decoding; and A bit level de-shaping operation is performed on the shaped set of bits to obtain a set of information bits.

10. The apparatus of claim 9, wherein the CRC bits are obtained after the bit-level de-shaping operation and a CRC check is performed.

11. The apparatus of claim 9, wherein the CRC bits are obtained and a CRC check is performed prior to the bit-level de-shaping operation.

12. The apparatus of claim 9, wherein the at least one processor is further configured to: The set of symbols is demapped into the set of shaped information bits, non-shaped information bits, shaping bits, and parity bits based on a bit-to-symbol mapping for block code based shaping in an order based on one or more rules.

13. The apparatus of claim 12, wherein the bit-to-symbol mapping comprises mapping the non-shaped information bits to a set of flag bits and mapping the set of shaped information bits to a set of most significant bits (MSBs), and mapping remaining non-shaped information bits, shaping bits, and the parity bits to a set of remaining bits.

14. The apparatus of claim 12, wherein the bit-to-symbol mapping comprises mapping a first set of the shaping bits and the parity bits to a set of flag bits, mapping the set of shaped information bits to a set of most significant bits (MSBs), and mapping a second set of the parity bits to a set of least significant bits (LSBs).

15. The apparatus of claim 14, wherein the bit-to-symbol mapping further comprises mapping the non-shaped information bits to a set of bits between the MSBs to which the set of shaped information bits is mapped and the LSBs to which the second set of parity bits is mapped.

16. The apparatus of claim 9, further comprising a transceiver or an antenna coupled to the at least one processor, wherein the at least one processor is configured to receive the QAM transmission via the transceiver or the antenna.

17. An apparatus for wireless communication, the apparatus comprising: Memory; as well as at least one processor coupled to the memory and based at least in part on the information stored in the memory, the at least one processor configured to: performing a bit shaping operation on the set of information bits to generate a set of shaped information bits; mapping the set of shaped information bits, non-shaped information bits, shaping bits, and parity bits to symbols based on a bit-to-symbol mapping for block code based shaping in an order based on one or more rules; as well as Transmit Quadrature Amplitude Modulation (QAM) transmission.

18. The apparatus of claim 17, wherein the bit-to-symbol mapping comprises mapping the non-shaped information bits to a set of flag bits and mapping the set of shaped information bits to a set of most significant bits (MSBs), and mapping remaining non-shaped information bits and shaped bits and the parity bits to a set of remaining bits.

19. The apparatus of claim 17, wherein the bit-to-symbol mapping comprises mapping a first set of the shaping bits and the parity bits to a set of flag bits, mapping the set of shaped information bits to a set of most significant bits (MSBs), and mapping a second set of the parity bits to a set of least significant bits (LSBs).

20. The apparatus of claim 19, wherein the bit-to-symbol mapping further comprises mapping the non-shaped information bits to a set of bits between the MSBs to which the set of shaped information bits is mapped and the LSBs to which the second set of parity bits is mapped.

21. The apparatus of claim 17, wherein cyclic redundancy check (CRC) bits are added to the set of information bits before performing the bit shaping operation on the set of information bits, and performing the bit shaping operation comprises performing the bit shaping operation on the set of information bits and the CRC bits to generate the shaped set of information bits.

22. The apparatus of claim 17, wherein the bit-to-symbol mapping further comprises mapping cyclic redundancy check (CRC) bits to symbols based on the bit-to-symbol mapping for block code based shaping in the order based on the one or more rules.

23. The apparatus of claim 17, further comprising a transceiver or an antenna coupled to the at least one processor, wherein the at least one processor is configured to transmit the QAM transmission via the transceiver or the antenna.

24. An apparatus for wireless communication, the apparatus comprising: Memory; as well as at least one processor coupled to the memory and based at least in part on the information stored in the memory, the at least one processor configured to: receiving an indication of a set of one or more rules for bit-to-symbol mapping for block code based shaping of a set of shaped information bits, non-shaped information bits, shaping bits, parity bits, and cyclic redundancy check (CRC) bits to symbols; Receives quadrature amplitude modulation (QAM) transmissions; performing decoding on the QAM transmission; and A bit level de-shaping operation is performed on a set of shaped bits included in the QAM transmission based on the indication of the one or more rules to obtain a set of information bits.

25. The apparatus of claim 24, wherein the at least one processor is further configured to: obtaining CRC bits for error detection after the bit level deshaping operation; and An error detection operation is performed based on the CRC bits.

26. The apparatus of claim 24, wherein the at least one processor is further configured to: obtaining CRC bits for error detection prior to said bit level deshaping operation; and An error detection operation is performed based on the CRC bits before performing the bit level de-shaping operation.

27. The apparatus of claim 24, wherein the bit-to-symbol mapping comprises mapping the non-shaped information bits to a set of flag bits and mapping the set of shaped information bits to a set of most significant bits (MSBs), and mapping remaining non-shaped information bits, shaping bits, and the parity bits to a set of remaining bits.

28. The apparatus of claim 24, wherein the bit-to-symbol mapping comprises mapping a first set of the shaping bits and the parity bits to a set of flag bits, mapping the set of shaped information bits to a set of most significant bits (MSBs), and mapping a second set of the parity bits to a set of least significant bits (LSBs).

29. The apparatus of claim 28, wherein the bit-to-symbol mapping further comprises mapping the non-shaped information bits to a set of bits between the MSBs to which the set of shaped information bits is mapped and the LSBs to which the second set of parity bits is mapped.

30. The apparatus of claim 24, further comprising a transceiver or an antenna coupled to the at least one processor, wherein the at least one processor is configured to receive the QAM transmission via the transceiver or the antenna.

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