Method, device and electronic device for determining optimal reading voltage

Abstract

The embodiments of the present application provide a method, device and electronic device for determining an optimal read voltage, and relate to the field of data storage technology. The method includes: when the data reading of the storage device using the valley voltage obtained by the search fails, predicting the current number of error bits of the storage device; judging whether the current number of error bits meets a preset condition; wherein the preset condition is determined based on the decoding capability of the decoder; if it meets the preset condition, searching for a voltage value that can obtain the number of error bits fed back by the decoder within the fine scanning range to which the valley voltage belongs, as the optimal read voltage. Based on this, by applying the solution provided by the embodiments of the present application, when the data reading of the valley voltage obtained by the search fails, the optimal read voltage can be determined, thereby improving the data reading success rate of the storage device.

Description

Technical Field

[0001] The present application relates to the technical field of data storage, and in particular to a method, device and electronic device for determining an optimal read voltage. Background Art

[0002] At present, due to the influence of various factors during use, the threshold voltage distribution of the storage device often changes, resulting in a change in the optimal read voltage when performing a data read operation on the storage device.

[0003] like Figure 1 As shown, a storage device whose storage unit is MLC (Multi-Level Cell, double-layer storage unit) is taken as an example. Figure 1 It is a schematic diagram of the threshold voltage distribution of MLC, referred to as the VT diagram of MLC. , , is the position of the optimal read voltage. Due to the influence of PE (Program / Erase Cycle), DR (Data Retention), RD (Read Disturb), CT (Cross Temperature), PD (Program Disturb), etc., the threshold voltage distribution function of MLC will change. For example, Figure 1 The threshold voltage distribution of MLC in the figure moves from the solid line to the dotted line, which in turn causes the optimal read voltage to change. , , Move to , , If you still use , , If data is read as the optimal read voltage, the data reading fails.

[0004] It can be seen that accurate optimal read voltage is the key to ensuring successful data reading. In order to ensure successful data reading, the optimal read voltage needs to be searched out and set as the read voltage to ensure data reading integrity and successful data reading.

[0005] Usually, if Figure 1As shown, there are multiple peaks and valleys in the shape of the VT graph of the storage device. Therefore, in the related art, it can be assumed that the valley voltage is the optimal read voltage, and the valley voltage is obtained through voltage search, and the above voltage search process can include two stages: coarse scanning and fine scanning. Among them, firstly, the larger voltage range where the optimal read voltage is located is estimated based on empirical values, etc., and the smaller voltage range where the optimal read voltage is located is determined within the voltage range according to a larger step size. This process is a coarse scanning process, and the obtained smaller voltage range can be called a fine scanning range; then, according to a smaller step size, the valley voltage is searched within the above fine scanning range as the optimal read voltage.

[0006] However, in the above-mentioned related technologies, due to the fact that the actual threshold voltage distribution of the storage device is not an ideal Gaussian distribution and there is noise interference during the search process, the valley voltage searched above may not be the actual optimal read voltage. When the non-optimal read voltage is used for data reading, the FBC (Fail bit cnt, number of error bits) fed back by the decoder for hard decoding of the read data will increase, increasing the probability of data reading failure. When the FBC exceeds the decoding capability of the hardware device, the data reading success rate will drop significantly. Therefore, how to determine the optimal read voltage and improve the data reading success rate of the storage device when the valley voltage data reading fails is a technical problem that needs to be solved urgently. Summary of the invention

[0007] The purpose of the embodiments of the present application is to provide a method, device and electronic device for determining an optimal read voltage, so as to determine the optimal read voltage when the valley voltage data read fails, thereby improving the data read success rate of the storage device. The specific technical solution is as follows:

[0008] In a first aspect, an embodiment of the present application provides a method for determining an optimal read voltage, the method comprising:

[0009] When data reading of a storage device fails using the valley voltage obtained by searching, predicting the current number of error bits of the storage device;

[0010] Determine whether the current number of bit errors meets a preset condition; wherein the preset condition is determined based on the decoding capability of the decoder;

[0011] If the condition is satisfied, then within the fine scan range to which the valley voltage belongs, a voltage value capable of obtaining the number of bit errors fed back by the decoder is searched as the optimal read voltage.

[0012] Optionally, in a specific implementation manner, the determining whether the current number of error bits meets a preset condition includes:

[0013] Determine whether the current number of bit errors is not greater than a preset threshold; if so, the current number of bit errors meets the preset condition; or,

[0014] Determine whether the current number of bit errors belongs to any preset interval; if so, the current number of bit errors meets the preset condition.

[0015] Optionally, in a specific implementation, searching, within a fine scan range to which the valley voltage belongs, for a voltage value capable of obtaining the number of error bits fed back by the decoder as an optimal read voltage includes:

[0016] Searching for each candidate voltage within a fine scanning range to which the valley bottom voltage belongs according to a specified step length;

[0017] Acquire the number of bit errors fed back by the decoder performing hard decoding on the read data when the storage device is read using each candidate voltage as a read voltage;

[0018] The candidate voltage with the smallest number of error bits fed back by the decoder is determined as the optimal read voltage.

[0019] Optionally, in a specific implementation, searching, within a fine scan range to which the valley voltage belongs, for a voltage value capable of obtaining the number of error bits fed back by the decoder as an optimal read voltage includes:

[0020] According to the specified step length, traverse each candidate voltage in the fine scanning range to which the valley bottom voltage belongs in sequence;

[0021] When traversing each candidate voltage, determining whether the decoder performs hard decoding on the read data to feed back the number of bit errors when using the candidate voltage as a read voltage to read data from the storage device;

[0022] If yes, the candidate voltage traversed is determined as the optimal read voltage, and the candidate voltage traversal is terminated;

[0023] Otherwise, the next candidate voltage is traversed.

[0024] Optionally, in a specific implementation, the predicting the current number of error bits of the storage device includes:

[0025] Acquire a device state of the storage device as a current device state; wherein the device state includes at least: at least one of erase cycle, data retention, read disturbance, cross temperature and write disturbance;

[0026] Based on a preset correspondence between a device state and a number of bit errors, the number of bit errors corresponding to the current device state is determined as the current number of bit errors of the storage device.

[0027] Optionally, in a specific implementation, the method for establishing the correspondence between the device state and the number of bit errors includes:

[0028] Set various device states;

[0029] For each device state, multiple storage devices having the device state are provided, and a threshold voltage distribution of each storage device is determined;

[0030] For each storage device, traverse each voltage value in the threshold voltage distribution of the storage device, and obtain the number of error bits fed back by the decoder performing hard decoding on the read data when each traversed voltage value is used as a read voltage to read data from the storage device;

[0031] Based on the device state of each storage device and the minimum value of the acquired number of bit errors, a corresponding relationship between the device state and the number of bit errors is established.

[0032] Optionally, in a specific implementation, the predicting the current number of error bits of the storage device includes:

[0033] Acquire a current read voltage sequence and a current storage cell number sequence determined in the valley voltage search process as current data; wherein the current read voltage sequence includes: each voltage traversed in the search process, and the current storage cell number sequence includes: when each voltage traversed in the search process is used as a read voltage to read data from the storage device, the difference in the number of storage cells obtained when each two adjacent voltages are used as read voltages;

[0034] Based on a preset correspondence between a read voltage sequence, a storage unit number sequence, and a number of bit errors, the number of bit errors corresponding to the current data is determined as the current number of bit errors of the storage device.

[0035] Optionally, in a specific implementation, the method for establishing the correspondence between the read voltage sequence, the storage unit number sequence and the number of error bits includes:

[0036] Setting various device states, and for each device state, setting a plurality of storage devices having the device state;

[0037] For each storage device, determining a read voltage sequence and a storage unit number sequence in a search process for an optimal read voltage of the storage device as the read voltage sequence and storage unit number sequence corresponding to the storage device;

[0038] For each storage device, when the optimal read voltage of the storage device obtained by searching is used to read data from the storage device, the number of error bits fed back by the decoder when decoding the read data is obtained as the number of error bits corresponding to the storage device;

[0039] Based on the read voltage sequence, storage unit number sequence and the number of bit errors corresponding to each storage device, a corresponding relationship between the read voltage sequence, the storage unit number sequence and the number of bit errors is established.

[0040] Optionally, in a specific implementation, the method further includes:

[0041] If the current number of error bits does not meet the preset condition, data is read from the storage device using a soft decoding method.

[0042] In a second aspect, an embodiment of the present application provides a device for determining an optimal read voltage, the device comprising:

[0043] A quantity prediction module, used for predicting the current number of error bits of the storage device when data reading of the storage device fails using the valley voltage obtained by searching;

[0044] A condition judgment module, used to judge whether the current number of error bits meets a preset condition; if so, trigger the voltage determination module;

[0045] The voltage determination module is used to search, within the fine scanning range to which the valley voltage belongs, for a voltage value capable of obtaining the number of error bits fed back by the decoder as the optimal read voltage.

[0046] Optionally, in a specific implementation, the condition judgment module is specifically used to:

[0047] Determine whether the current number of bit errors is not greater than a preset threshold; if so, the current number of bit errors meets the preset condition; or,

[0048] Determine whether the current number of bit errors belongs to any preset interval; if so, the current number of bit errors meets the preset condition.

[0049] Optionally, in a specific implementation, the voltage determination module is specifically used to:

[0050] Searching for each candidate voltage within a fine scanning range to which the valley bottom voltage belongs according to a specified step length;

[0051] Acquire the number of bit errors fed back by the decoder performing hard decoding on the read data when the storage device is read using each candidate voltage as a read voltage;

[0052] The candidate voltage with the smallest number of error bits fed back by the decoder is determined as the optimal read voltage.

[0053] Optionally, in a specific implementation, the voltage determination module is specifically used to:

[0054] According to the specified step length, traverse each candidate voltage in the fine scanning range to which the valley bottom voltage belongs in sequence;

[0055] When traversing each candidate voltage, determining whether the decoder performs hard decoding on the read data to feed back the number of bit errors when using the candidate voltage as a read voltage to read data from the storage device;

[0056] If yes, the candidate voltage traversed is determined as the optimal read voltage, and the candidate voltage traversal ends;

[0057] Otherwise, the next candidate voltage is traversed.

[0058] Optionally, in a specific implementation, the quantity prediction module is specifically used to:

[0059] Acquire a device state of the storage device as a current device state; wherein the device state includes at least: at least one of erase cycle, data retention, read disturbance, cross temperature and write disturbance;

[0060] Based on a preset correspondence between a device state and a number of bit errors, the number of bit errors corresponding to the current device state is determined as the current number of bit errors of the storage device.

[0061] Optionally, in a specific implementation, the apparatus further includes a first establishing module for establishing the correspondence between the device state and the number of bit errors; the first establishing module is specifically configured to:

[0062] Set various device states;

[0063] For each device state, multiple storage devices having the device state are provided, and a threshold voltage distribution of each storage device is determined;

[0064] For each storage device, traverse each voltage value in the threshold voltage distribution of the storage device, and obtain the number of error bits fed back by the decoder performing hard decoding on the read data when each traversed voltage value is used as a read voltage to read data from the storage device;

[0065] Based on the device state of each storage device and the minimum value of the acquired number of error bits, a corresponding relationship between the device state and the number of error bits is established.

[0066] Optionally, in a specific implementation, the quantity prediction module is specifically used to:

[0067] Acquire a current read voltage sequence and a current storage cell number sequence determined in the valley voltage search process as current data; wherein the current read voltage sequence includes: each voltage traversed in the search process, and the current storage cell number sequence includes: when each voltage traversed in the search process is used as a read voltage to read data from the storage device, the difference in the number of storage cells obtained when each two adjacent voltages are used as read voltages;

[0068] Based on a preset correspondence between a read voltage sequence, a storage unit number sequence, and a number of bit errors, the number of bit errors corresponding to the current data is determined as the current number of bit errors of the storage device.

[0069] Optionally, in a specific implementation, the device further includes a second establishing module for establishing the correspondence between the read voltage sequence, the storage unit number sequence and the number of error bits; the second establishing module is specifically used to:

[0070] Setting various device states, and for each device state, setting a plurality of storage devices having the device state;

[0071] For each storage device, determining a read voltage sequence and a storage unit number sequence in a search process for an optimal read voltage of the storage device as the read voltage sequence and storage unit number sequence corresponding to the storage device;

[0072] For each storage device, when the optimal read voltage of the storage device obtained by searching is used to read data from the storage device, the number of error bits fed back by the decoder when decoding the read data is obtained as the number of error bits corresponding to the storage device;

[0073] Based on the read voltage sequence, storage unit number sequence and the number of bit errors corresponding to each storage device, a corresponding relationship between the read voltage sequence, the storage unit number sequence and the number of bit errors is established.

[0074] Optionally, in a specific implementation, the device further includes:

[0075] The soft decoding module is used to read data from the storage device by using a soft decoding method if the current number of error bits does not meet the preset condition.

[0076] In a third aspect, an embodiment of the present application provides an electronic device, including:

[0077] Memory, used to store computer programs;

[0078] The processor is used to implement the steps of any method for determining the optimal read voltage provided in the first aspect when executing the program stored in the memory.

[0079] In a fourth aspect, an embodiment of the present application provides a computer-readable storage medium, wherein the computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps of any method for determining an optimal read voltage provided in the first aspect are implemented.

[0080] In a fifth aspect, an embodiment of the present application provides a computer program product comprising instructions, which, when executed on a computer, enables the computer to execute the steps of any method for determining an optimal read voltage provided in the first aspect above.

[0081] Beneficial effects of the embodiments of the present application:

[0082] As can be seen from the above, by applying the solution provided by the embodiment of the present application, when the data reading of the storage device fails using the valley voltage obtained by the search as the optimal read voltage, the current number of error bits of the storage device can be predicted, and the current number of error bits can be compared with the preset conditions to determine whether the current number of error bits meets the preset conditions. If the current number of error bits meets the preset conditions, a voltage value that can obtain the number of error bits fed back by the decoder can be searched within the fine scan range to which the valley voltage belongs as the optimal read voltage, that is, within the fine scan range, a voltage value is searched as the new optimal read voltage. When the storage device is read using the new optimal read voltage, the decoder hard decodes the read data and can feed back the number of error bits. At this time, it can be determined that the data reading using the new optimal read voltage is successful.

[0083] Based on this, by applying the solution provided in the embodiment of the present application, when the valley voltage obtained by searching is used as the optimal read voltage to read data from the storage device, the valley voltage can be calibrated by using the current number of error bits of the storage device to determine a new optimal read voltage, so that when the valley voltage obtained by searching is used as the optimal read voltage to read data from the storage device, a new optimal read voltage can be re-determined to improve the data reading success rate of the storage device. Moreover, compared with the above-mentioned related art, in which the valley voltage is searched as the optimal read voltage, the solution provided in the embodiment of the present application uses FBC as the voltage search index, which is essentially to search for a voltage that can make hard decoding successful in a given voltage range, rather than just searching for the voltage corresponding to the valley. Therefore, when the storage device is at the critical capacity of hard decoding, the hard decoding success rate of the storage device can be improved, and compared with directly using soft decoding to read data when the storage device is at the critical capacity of hard decoding, the time overhead can be reduced and the data reading efficiency can be improved.

[0084] Of course, implementing any product or method of the present application does not necessarily require achieving all of the advantages described above at the same time. BRIEF DESCRIPTION OF THE DRAWINGS

[0085] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application, and for ordinary technicians in this field, other embodiments can also be obtained based on these drawings.

[0086] Figure 1 A schematic diagram of the threshold voltage distribution of the memory cell MLC;

[0087] Figure 2 A schematic diagram of a flow chart of a method for determining an optimal read voltage provided in an embodiment of the present application;

[0088] Figure 3 A schematic diagram of performing Gaussian fitting on a VT graph of a storage device provided in an embodiment of the present application;

[0089] Figure 4 A schematic flow chart of another method for determining an optimal read voltage provided in an embodiment of the present application;

[0090] Figure 5 A schematic flow chart of another method for determining an optimal read voltage provided in an embodiment of the present application;

[0091] Figure 6 A schematic flow chart of another method for determining an optimal read voltage provided in an embodiment of the present application;

[0092] Figure 7 A schematic flow chart of an overall technical solution for determining an optimal read voltage provided in an embodiment of the present application;

[0093] Figure 8 A flowchart of a method for establishing a corresponding relationship between a device state and the number of bit errors provided in an embodiment of the present application;

[0094] Fig. 9 A flow chart of a method for establishing a corresponding relationship between a read voltage sequence, a storage unit number sequence and a number of error bits provided in an embodiment of the present application;

[0095] Fig.10 A schematic diagram of the structure of a device for determining an optimal read voltage provided in an embodiment of the present application;

[0096] Fig.11 A schematic diagram of the structure of an electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0097] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field based on the present application belong to the scope of protection of the present application.

[0098] In the related art, due to the fact that the actual threshold voltage distribution of the storage device is not an ideal Gaussian distribution and there is noise interference during the search process, the valley voltage searched above may not be the actual optimal read voltage. When a non-optimal read voltage is used to read data, the FBC fed back by the decoder for hard decoding of the read data will increase, increasing the probability of data reading failure. When the FBC exceeds the decoding capability of the hardware device, the data reading success rate will drop significantly.

[0099] In order to solve the above technical problem, an embodiment of the present application provides a method for determining an optimal read voltage.

[0100] Among them, the method for determining the optimal read voltage provided by the embodiment of the present invention will be described below. It can be understood that the following example is only a possible application scenario of the method for determining the optimal read voltage provided by the embodiment of the invention. In other possible embodiments, the method for determining the optimal read voltage provided by the embodiment of the present invention can also be applied to other possible application scenarios, and the following example does not impose any limitation on this. In addition, the method for determining the optimal read voltage provided by the embodiment of the present application can be executed by electronic devices with computing capabilities such as hard disk devices, computers, and servers, and this embodiment of the present application does not make specific limitations on this.

[0101] A method for determining an optimal read voltage provided in an embodiment of the present application may include the following steps:

[0102] When data reading of a storage device fails using the valley voltage obtained by searching, predicting the current number of error bits of the storage device;

[0103] Determine whether the current number of bit errors meets a preset condition; wherein the preset condition is determined based on the decoding capability of the decoder;

[0104] If the condition is satisfied, then within the fine scan range to which the valley voltage belongs, a voltage value capable of obtaining the number of bit errors fed back by the decoder is searched as the optimal read voltage.

[0105] As can be seen from the above, by applying the solution provided by the embodiment of the present application, when the data reading of the storage device fails using the valley voltage obtained by the search as the optimal read voltage, the current number of error bits of the storage device can be predicted, and the current number of error bits can be compared with the preset conditions to determine whether the current number of error bits meets the preset conditions. If the current number of error bits meets the preset conditions, a voltage value that can obtain the number of error bits fed back by the decoder can be searched within the fine scan range to which the valley voltage belongs as the optimal read voltage, that is, within the fine scan range, a voltage value is searched as the new optimal read voltage. When the storage device is read using the new optimal read voltage, the decoder hard decodes the read data and can feed back the number of error bits. At this time, it can be determined that the data reading using the new optimal read voltage is successful.

[0106] Based on this, by applying the solution provided in the embodiment of the present application, when the valley voltage obtained by searching is used as the optimal read voltage to read data from the storage device, the valley voltage can be calibrated by using the current number of error bits of the storage device to determine a new optimal read voltage, so that when the valley voltage obtained by searching is used as the optimal read voltage to read data from the storage device, a new optimal read voltage can be re-determined to improve the data reading success rate of the storage device. Moreover, compared with the above-mentioned related art, in which the valley voltage is searched as the optimal read voltage, the solution provided in the embodiment of the present application uses FBC as the voltage search index, which is essentially to search for a voltage that can make hard decoding successful in a given voltage range, rather than just searching for the voltage corresponding to the valley. Therefore, when the storage device is at the critical capacity of hard decoding, the hard decoding success rate of the storage device can be improved, and compared with directly using soft decoding to read data when the storage device is at the critical capacity of hard decoding, the time overhead can be reduced and the data reading efficiency can be improved.

[0107] In order to facilitate understanding of the solutions provided by the embodiments of the present application, the relevant technical contents involved in the embodiments of the present application are first described below.

[0108] 1. Storage devices (such as various hard disk devices, etc.) include multiple storage blocks, and each storage block is composed of multiple storage cells. When writing data, the storage cell will be adjusted to different storage states according to the stored data. When reading data, the data stored in the storage cell can be determined according to the storage state of the storage cell, thereby realizing data reading. The storage state is distinguished according to the value range to which the voltage value of the storage cell belongs, and the value range is divided according to the optimal read voltage. However, affected by various factors, such as PE, DR, RD, CT, PD, etc., the voltage of the storage cell will change, causing the voltage of the storage cell to exceed the value range corresponding to the storage state of the storage cell. Therefore, when reading data, it is necessary to determine the optimal read voltage for dividing the value range.

[0109] For example, NAND (NAND Flash memory) is a Flash medium, which is widely used as a storage block in storage devices such as SSD (Solid State Disk). Among them, the storage cells included in NAND are usually SLC (Single-Level Cell), MLC, TLC (Triple-Level Cell) and QLC (Quad-Level Cell), a total of four types, among which each storage cell of SLC stores 1 bit of data, corresponding to 2 storage states, each storage cell of MLC stores 2 bits of data, corresponding to 4 storage states, each storage cell of TLC stores 3 bits of data, corresponding to 8 storage states, and each storage cell of QLC stores 4 bits of data, corresponding to 16 storage states.

[0110] Taking MLC as an example, assuming that the four corresponding storage states are the first storage state, the second storage state, the third storage state and the fourth storage state, the first storage state corresponds to data "00", the second storage state corresponds to data "01", the third storage state corresponds to data "10", and the fourth storage state corresponds to data "11". If the MLC is in the second storage state, it can be determined that the data stored in the storage unit is "01". Figure 1 As shown, it is assumed that the value regions corresponding to the four storage states when writing data are divided by three optimal read voltages, and the three optimal read voltages are respectively recorded as , , , if the voltage value of the storage unit is less than , the storage unit is in the first storage state, if the voltage value is greater than and less than , the storage unit is in the second storage state, if the voltage value is greater than and less than , the storage unit is in the third storage state, if the voltage value is greater than , the storage unit is in the fourth storage state. Therefore, if the data stored in the storage unit is "01", the voltage value of the storage unit will be adjusted to the value range ( , ). Due to various factors, the voltage of the storage unit in the second storage state changes to more than If the storage state of the memory cell is still distinguished according to the value interval divided by the original optimal read voltage when reading data, the storage state of the memory cell may be incorrectly determined, resulting in incorrect data being read.

[0111] 2. In the related art, the method of obtaining the valley voltage as the optimal read voltage through coarse scanning and fine scanning is as follows:

[0112] First, the first voltage range where the optimal read voltage is located is estimated based on empirical values, etc., as a rough scan range; for example, taking NAND as an example, the optimal read voltage of NAND in various states can be tested in advance to estimate the voltage range to which the optimal read voltage of NAND in various device states belongs, so that the above-mentioned rough scan range can be estimated based on the above-mentioned estimated voltage range. Among them, the PE, DR, RD, CT, PD, etc. of NAND in different states are different. Afterwards, the first step length is determined as the rough scan step length, and each voltage value is searched within the above-mentioned rough scan range according to the above-mentioned rough scan step length; then, when each voltage value is searched, the voltage value is used to read data from the storage device, and the cnt (number of storage cells) corresponding to the voltage value is determined. In this way, the voltage range composed of two voltage values ​​adjacent to the corresponding cnt minimum voltage value among the searched voltage values ​​is used as the fine scan range, and the fine scan range is smaller than the above-mentioned rough scan range.

[0113] Furthermore, for the above-mentioned fine scanning range, a second step length is determined as the fine scanning step length, that is, the fine scanning step length is smaller than the above-mentioned coarse scanning step length. Then, each voltage value can be searched within the above-mentioned fine scanning range according to the above-mentioned fine scanning range, and when each voltage value is searched, the voltage value is used to read data from the storage device, and the cnt corresponding to the voltage value is determined. Finally, the voltage value corresponding to the minimum cnt among the searched voltage values ​​can be determined as the valley voltage as the optimal voltage value.

[0114] 3. Hard decoding and soft decoding. Decoding is the process of using a specific method to restore digital codes to the content they represent or convert electrical pulse signals into the information, data, etc. they represent. Among them, hard decoding refers to decoding based on hard decisions, and soft decoding refers to decoding based on soft decisions, also known as probabilistic decoding. Decoding is the inverse process of encoding. The process of using a decoding table to translate text into a group of digital numbers or using a decoding table to translate a series of signals representing a certain information into text is called decoding.

[0115] When reading data from a storage device, the decoder will perform hard decoding on the read data, and when the hard decoding is successful, it will feedback FBC, which can be understood as the number of bits with errors in the read data. When FBC is large, it can be said that the number of bits with errors in the read data is large. When hard decoding fails, the decoder will feedback a signal used to characterize the failure of hard decoding, such as "an uncorrectable error has occurred", without FBC feedback. Among them, FBC can also be called the number of bit errors, which is the number of bit errors generated when reading data from a storage device. In addition, during a data reading process, a read voltage is used to read data from a storage device, and a decoder is used to perform hard decoding on the read data. If the decoder feedbacks FBC, it can be considered that the decoder hard decoding is successful, and then, it can be considered that the data reading using the above read voltage is successful. On the contrary, if the decoder feedbacks a signal used to characterize the failure of hard decoding, it can be considered that the hard decoding has failed, and then, it can be considered that the data reading using the above read voltage has failed.

[0116] Compared with soft decoding, hard decoding consumes less power and takes less time. However, hard decoding is limited by the decoding capability of the decoder. When the FBC generated by data reading approaches or exceeds the decoding capability of the decoder, it can be considered that the decoder is at or exceeds the critical capability of hard decoding. At this time, hard decoding fails, and thus data reading fails. In the case of hard decoding failure, data reading can be achieved through soft decoding.

[0117] For a storage device, the process of writing the original data to be stored into the storage unit of the storage device is called the encoding process, and the original data to be stored is called the information bit. During the encoding process, the check data of the original data is added, and the newly added check data is called the check bit. Due to the addition of the check bit, the encoded original data may change, that is, the original data recorded in the storage unit may not be completely the same as the original data to be stored. Correspondingly, the process of reading the original data from the above storage unit is called the decoding process, which includes: reading the written information bit and check bit, and decoding the read information bit and check bit to obtain the original data, two processes. As mentioned above, FBC is the number of erroneous bits in the above information bit and check bit determined by the encoder in the process of hard decoding the read information bit and check bit. When the hard decoding is successful, the decoder will feedback the FBC, and when the hard decoding fails, the decoder will not feedback the FBC. Among them, the code rate of the storage device is: the ratio of the length of the above information bit divided by the length and value of the above information bit and check bit, that is, code rate = information bit length / (information bit length + check bit length). In this way, when the information bit length and check bit length of the storage device are determined, the code rate of the storage device is determined, and the decoding capability of the decoder is determined. Generally, for the same decoder, the decoding capability of the decoder can change according to the code rate of different storage devices. The higher the code rate of the storage device, the worse the decoding capability of the decoder.

[0118] Below, in conjunction with the accompanying drawings, a method for determining an optimal read voltage provided in an embodiment of the present application is specifically described.

[0119] Figure 2 A flow chart of a method for determining an optimal read voltage provided in an embodiment of the present application is shown as follows: Figure 2 As shown, the method may include the following steps S201-S203.

[0120] S201: When data reading from a storage device fails using the valley voltage obtained by searching, predict the current number of error bits of the storage device.

[0121] Since the technical problem to be solved by the embodiments of the present application is how to determine the optimal read voltage when the searched valley voltage data reading fails, therefore, when reading data from a storage device, the above-mentioned "coarse scan" and "fine scan" processes can be first used to determine the valley voltage as the optimal read voltage, and the valley voltage can be used to read data from the above-mentioned storage device. When the data reading fails, the process of determining the optimal read voltage provided by the embodiments of the present application can be entered.

[0122] Among them, the failure to read data from the storage device using the valley voltage obtained by the search means: after the valley voltage as the optimal read voltage is searched by the above-mentioned "coarse scan" and "fine scan" processes, the data is read from the storage device using the valley voltage, and the decoder is used to hard-decode the read data, and the decoder does not feedback the FBC, but feedbacks a signal used to characterize the failure of hard decoding. Then, the decoder fails to hard-decode the read data, and thus, the content represented by the read data cannot be restored. Then, it can be determined that the data reading from the storage device using the valley voltage obtained by the search has failed. Therefore, when the signal used to characterize the failure of hard decoding fed back by the above-mentioned decoder is obtained, it can be determined that the data reading from the storage device using the valley voltage obtained by the search has failed. At this time, since the FBC fed back by the decoder cannot be obtained, it is necessary to predict the current FBC of the storage device. That is to say, when the data reading from the storage device using the valley voltage obtained by the search fails, the current number of error bits of the storage device is predicted. Among them, the current number of error bits can be understood as: when the storage device is read using the actual optimal read voltage of the above-mentioned storage device, the number of error bits fed back by the decoder when hard decoding the read data, that is, the predicted number of erroneous bits in the read data when the storage device is read using the actual optimal read voltage of the above-mentioned storage device (that is, the number of error bits in the read data).

[0123] Optionally, when the data reading of the storage device fails using the valley voltage obtained by the search, the current number of bit errors can be predicted by Gaussian fitting. Assuming that the VT graph of the storage device conforms to the Gaussian distribution, the VT graph of the storage device can be Gaussian fitted. Figure 1 As shown, the VT diagram of the storage device includes multiple independent voltage distribution curves, each of which includes a peak and a valley. After Gaussian fitting, the adjacent voltage distribution curves between the above voltage distribution curves can intersect, that is, there is an intersection area. Therefore, when the data reading of the storage device fails using the valley voltage obtained by the search, the VT diagram of the storage device can be Gaussian fitted. For the VT diagram after Gaussian fitting, the sum of the areas of each intersection area can be determined, and the sum is the current number of error bits of the above storage device. Among them, the above sum can be calculated by integral calculation, discrete summation, etc.

[0124] For example, Figure 3 Schematic diagram of voltage distribution curve after Gaussian fitting of VT diagram of storage device, as shown in Figure 3 As shown, the horizontal axis is voltage (i.e. Figure 3 V in the figure), the ordinate is the number of storage units (i.e. Figure 3Among them, there are two adjacent voltage distribution curves intersecting in the VT diagram after Gaussian fitting, then the intersection area of ​​the two adjacent voltage distribution curves (i.e. Figure 3 The area of ​​the shaded area in the figure can be used as the current number of error bits of the storage device predicted when the data reading of the storage device fails using the valley voltage obtained by the search (i.e. Figure 3 in FBC).

[0125] S202: Determine whether the current number of error bits meets a preset condition. If so, execute S203.

[0126] The above preset conditions are determined based on the decoding capability of the decoder.

[0127] After obtaining the current number of bit errors, the relationship between the current number of bit errors and the preset conditions can be compared. Since the preset conditions are determined based on the decoding capability of the decoder, the preset conditions can reflect the decoding capability of the decoding device. Therefore, when the current number of bit errors meets the preset conditions, it can be explained that the storage device does not exceed the critical capability of the hard decoding of the decoder, and there is still a possibility of successful hard decoding.

[0128] Among them, the above-mentioned preset condition may include a preset threshold value, or may include one or more preset intervals. According to different expressions of the above-mentioned preset condition, the basis for judging whether the above-mentioned current number of error bits meets the preset condition is different.

[0129] Optionally, in a specific implementation, the above step S202 may include the following step 2021.

[0130] Step 2021: Determine whether the current number of error bits is not greater than a preset threshold; if so, the current number of error bits meets the preset condition.

[0131] In this specific implementation, the above-mentioned preset condition may include a preset threshold, and the preset threshold is determined based on the decoding capability of the decoder. Furthermore, in this specific implementation, the specific implementation of determining whether the current number of error bits meets the preset condition is to determine whether the current number of error bits is not greater than the preset threshold, wherein if the current number of error bits is not greater than the preset threshold, it can be considered that the current number of error bits meets the preset condition.

[0132] Optionally, in a specific implementation, the above step S202 may include the following step 2022.

[0133] Step 2022: Determine whether the current number of bit errors belongs to any preset interval; if so, the current number of bit errors meets the preset condition.

[0134] In this specific implementation, the above-mentioned preset condition may include one or more preset intervals, and the one or more preset intervals are determined based on the decoding capability of the decoder. Each preset interval is a value range of FBC, and when the current number of bit errors is within the value range, it can be considered that the decoder at this time has a certain hard decoding success rate. Furthermore, in this specific implementation, the specific implementation method of determining whether the current number of bit errors meets the preset condition is to determine whether the current number of bit errors belongs to any preset interval, wherein if the current number of bit errors is within any preset interval, it can be considered that the current number of bit errors meets the preset condition.

[0135] For example, suppose the decoder has the following decoding capabilities:

[0136] If FBC<250, the decoding success rate is 100%;

[0137] If 250≤FBC≤300, the decoding success rate is 80%;

[0138] If FBC>300, the decoding success rate is 20%.

[0139] In a specific implementation, the above preset condition can be set as a preset threshold, and the preset threshold is 300. If the current number of error bits is not greater than 300, it can be considered that the current number of error bits meets the preset condition.

[0140] In another specific implementation, the above-mentioned preset condition may be set to include multiple preset intervals, and the multiple preset intervals include and , if the current number of bit errors is or , it can be considered that the current number of error bits meets the preset condition.

[0141] S203: Searching for a voltage value capable of obtaining the number of bit errors fed back by the decoder within the fine scanning range to which the valley voltage belongs, as the optimal read voltage.

[0142] As mentioned above, when the current number of error bits meets the preset condition, it can be explained that the storage device has not exceeded the critical capacity of hard decoding, and there is still a possibility of successful hard decoding. Furthermore, since the valley voltage is obtained by coarse scanning and fine scanning, the actual optimal read voltage is likely to be within the fine scanning range to which the valley voltage belongs. Therefore, a voltage value that can be used as the optimal read voltage can be searched within the fine scanning range to which the valley voltage belongs.

[0143] Among them, since the decoder will feedback the number of bit errors when the data is read successfully, for the voltage value that can be used as the optimal read voltage in the above-mentioned fine scan range, when the voltage value is used as the read voltage and the storage device is read using the voltage value, the decoder needs to successfully hard-decode the read data, that is, the number of bit errors feedback by the decoder needs to be obtained. Based on this, the voltage value that can obtain the number of bit errors feedback by the decoder can be searched in the fine scan range to which the above-mentioned valley voltage belongs as the optimal read voltage.

[0144] That is, when a voltage value is searched within the above-mentioned fine scanning range, the voltage value is used as a read voltage to read data from the storage device, and the decoder is used to hard decode the read data. Whether the decoder feeds back FBC determines whether the voltage value has the possibility of being used as the optimal read voltage. If the decoder feeds back FBC, the voltage value has the possibility of being used as the optimal read voltage, and if the decoder does not feed back FBC, the voltage value cannot be used as the optimal read voltage.

[0145] Optionally, in a specific implementation, such as Figure 4 As shown, the above step S203 may include the following steps S2031-S2033.

[0146] S2031: Search for each candidate voltage within the fine scanning range to which the valley bottom voltage belongs according to the specified step size.

[0147] S2032: Obtaining the number of bit errors fed back by the decoder performing hard decoding on the read data when the storage device is read using each candidate voltage as the read voltage.

[0148] S2033: Determine the candidate voltage with the smallest number of bit errors fed back by the decoder as the optimal read voltage.

[0149] In this specific implementation, as mentioned above, the actual optimal read voltage is likely to be within the fine scan range to which the valley bottom voltage belongs. Therefore, each voltage can be searched as a candidate voltage within the fine scan range to which the valley bottom voltage belongs according to a specified step size.

[0150] Among them, when the above preset conditions include one or more preset intervals, if the above current error bit number meets the preset conditions, that is, the above current error bit number is within a preset interval, in this case, the preset interval where the above current error bit number is located can be used as the target interval. Furthermore, when the target interval is determined, the above specified step size can be further determined according to the above target interval. Thus, according to the determined specified step size, within the fine sweep range where the above bottom voltage is located, each candidate voltage is searched. For example, if the values within the target interval are relatively large, each candidate voltage can be searched within the above fine sweep range according to a relatively small specified step size. Also, for example, if the values within the target interval are relatively small, each candidate voltage can be searched within the above fine sweep range according to a relatively large step size.

[0151] After each of the above candidate voltages is searched, for each candidate voltage, the candidate voltage can be used as the read voltage to read data from the storage device, that is, the candidate voltage is used to read data from the storage device. Furthermore, the decoder is used to perform hard decoding on the read data. Thus, when the decoder's hard decoding is successful, the error bit number feedback by the decoder can be obtained. In this way, when each candidate voltage is used as the read voltage to read data from the storage device, the error bit number feedback by the decoder for hard decoding the read data can be obtained. Furthermore, the candidate voltage with the smallest error bit number feedback by the decoder can be determined as the optimal read voltage.

[0152] For example, there are candidate voltages V1, V2, V3, and V4.

[0153] Taking V1 as the read voltage, using V1 to read data from the storage device, and using the decoder to perform hard decoding on the read data, the FBC feedback by the decoder is obtained and denoted as FBC-1;

[0154] Taking V2 as the read voltage, using V2 to read data from the storage device, and using the decoder to perform hard decoding on the read data, the FBC feedback by the decoder is obtained and denoted as FBC-2;

[0155] Taking V3 as the read voltage, using V3 to read data from the storage device, and using the decoder to perform hard decoding on the read data, the signal indicating hard decoding failure feedback by the decoder is obtained;

[0156] Taking V4 as the read voltage, using V4 to read data from the storage device, and using the decoder to perform hard decoding on the read data, the FBC feedback by the decoder is obtained and denoted as FBC-4.

[0157] Among them, if FBC-2 < FBC-1 < FBC-4, then V2 can be determined as the optimal read voltage.

[0158] As described above, for each of the candidate voltages, when the decoder successfully hard-decodes the data read from the storage device using the candidate voltage as the read voltage, the decoder feeds back FBC, and the candidate voltage can be considered available, that is, the candidate voltage is an available value. Conversely, when the decoder fails to hard-decode the data read from the storage device using the candidate voltage as the read voltage, the decoder feeds back a signal for characterizing the hard decoding failure, and cannot feed back FBC, and the candidate voltage can be considered unavailable, that is, the candidate voltage is an unavailable value.

[0159] Based on this, optionally, when all the above candidate voltages are unusable values, it can be said that it is impossible to determine the optimal read voltage within the fine scanning range of the above valley voltage through the specific implementation method shown in the above steps S2031-S2033. In this case, the hard decoding of the storage device fails and soft decoding is required to read the data.

[0160] As can be seen from the above, in some cases, when the above-mentioned candidate voltages are used as read voltages to read data from a storage device, not all candidate voltages can be read successfully. Therefore, in order to save time in searching for the optimal read voltage within the fine scan range to which the above-mentioned valley voltage belongs, the first voltage value that can successfully read data can be directly used as the optimal read voltage.

[0161] Based on this, optionally, in a specific implementation, such as Figure 5 As shown, the above step S203 may include the following steps S203A-S203C.

[0162] S203A: traversing each candidate voltage in the fine scanning range to which the valley bottom voltage belongs in sequence according to the specified step length;

[0163] S203B: When traversing each candidate voltage, determine whether the decoder hard-decodes the read data to feedback the number of error bits when using the candidate voltage as the read voltage to read data from the storage device; if so, execute S203C; otherwise, traverse the next candidate voltage.

[0164] S203C: Determine the candidate voltage found through the traversal as the optimal read voltage, and end the candidate voltage traversal.

[0165] In this specific implementation, as mentioned above, the probability that the actual optimal read voltage is within the fine scan range to which the valley bottom voltage belongs is relatively high, therefore, each candidate voltage within the fine scan range to which the valley bottom voltage belongs can be traversed in sequence according to a specified step length. For example, starting from the start voltage of the fine scan range to which the valley bottom voltage belongs, each candidate voltage within the fine scan range to which the valley bottom voltage belongs can be traversed in sequence according to a specified step length, and each candidate voltage traversed increases in sequence; for another example, starting from the end voltage of the fine scan range to which the valley bottom voltage belongs, each candidate voltage within the fine scan range to which the valley bottom voltage belongs can be traversed in sequence according to a specified step length, and each candidate voltage traversed decreases in sequence.

[0166] Among them, Figure 4 Similar to the specific implementation shown, in the case where the above-mentioned preset conditions include one or more preset intervals, if the above-mentioned current number of error bits meets the preset conditions, then the above-mentioned current number of error bits is located in a preset interval. In this case, the preset interval where the above-mentioned current number of error bits is located can be used as the target interval. Furthermore, when the target interval is determined, the above-mentioned specified step size can be further determined according to the above-mentioned target interval, so that, according to the determined specified step size, each candidate voltage in the fine scanning range to which the valley bottom voltage belongs is traversed in sequence. For example, if each numerical value in the target interval is large, it is possible to start from the starting voltage or the ending voltage of the fine scanning range to which the above-mentioned valley bottom voltage belongs, and traverse each candidate voltage in sequence in the above-mentioned fine scanning range according to a smaller specified step size. For another example, if each numerical value in the target interval is small, it is possible to start from the starting voltage or the ending voltage of the fine scanning range to which the above-mentioned valley bottom voltage belongs, and traverse each candidate voltage in sequence in the above-mentioned fine scanning range according to a larger specified step size.

[0167] When traversing to each candidate voltage, the candidate voltage can be used as a read voltage to read data from the storage device, that is, the traversed candidate voltage is used to read data from the storage device, and then, the decoder is used to hard-decode the read data. Therefore, when the hard decoding of the decoder is successful, the number of error bits fed back by the decoder is obtained, and when the hard decoding of the decoder fails, the signal fed back by the decoder for characterizing the failure of hard decoding is obtained.

[0168] In this way, when each candidate voltage is traversed, it can be determined whether the decoder feeds back the number of bit errors when hard decoding the read data is performed on the storage device using the candidate voltage as the read voltage.

[0169] If the decoder performs hard decoding on the read data and feeds back the number of bit errors, it can be said that the decoder hard decoding is successful, and further, it can be said that the candidate voltage traversed successfully reads the data of the storage device, so that the candidate voltage traversed can be used as the optimal read voltage to read the data of the storage device. Therefore, the candidate voltage traversed is determined as the optimal read voltage. At this point, the optimal read voltage is obtained, and the candidate voltage traversal can be ended.

[0170] On the contrary, if the decoder performs hard decoding on the read data and does not feedback the number of bit errors, it can be said that the decoder hard decoding fails. At this time, the decoder feedbacks a signal used to indicate the hard decoding failure, which further indicates that the candidate voltage traversed fails to read the data of the storage device, and thus, the candidate voltage traversed cannot be used as the optimal read voltage to read data from the storage device. Therefore, it is necessary to traverse the next candidate voltage.

[0171] In this way, the first voltage value that can successfully read data can be used as the optimal read voltage without traversing all candidate voltages, which can save time for searching the optimal read voltage in the fine scan range to which the valley bottom voltage belongs.

[0172] For example, starting from the starting voltage V1 of the fine scanning range to which the valley bottom voltage belongs, each candidate voltage in the fine scanning range to which the valley bottom voltage belongs is sequentially traversed according to the specified step length L.

[0173] The first candidate voltage traversed is V1, V1 is used to read data from the storage device, and the decoder is used to hard-decode the read data to obtain a signal fed back by the decoder for indicating a hard decoding failure;

[0174] The second candidate voltage traversed is V1+L. V1+L is used to read data from the storage device, and the decoder is used to hard-decode the read data to obtain a signal fed back by the decoder that indicates a hard decoding failure.

[0175] The third candidate voltage traversed is V1+2L. V1+2L is used to read data from the storage device, and the decoder is used to hard decode the read data, and the FBC fed back by the decoder is obtained. The candidate voltage V1+2L is determined as the optimal read voltage, and the traversal ends.

[0176] If the current number of bit errors determined in step S201 is not greater than the preset threshold, then the candidate voltages are searched in the fine scanning range to which the valley bottom voltage belongs according to the specified step length. When each candidate voltage is searched, the storage device is read using the candidate voltage, and the data read here is hard-decoded using the decoder. If the hard decoding is successful, the candidate voltage is directly determined as the optimal read voltage. At this time, even if the fine scanning range is not traversed according to the specified step length, the traversal is stopped, thereby saving the time for searching the optimal read voltage in the fine scanning range to which the valley bottom voltage belongs.

[0177] As described above, for each of the candidate voltages, when the decoder successfully hard-decodes the data read from the storage device using the candidate voltage as the read voltage, the decoder feeds back FBC, and the candidate voltage can be considered available, that is, the candidate voltage is an available value. Conversely, when the decoder fails to hard-decode the data read from the storage device using the candidate voltage as the read voltage, the decoder feeds back a signal for characterizing the hard decoding failure, and cannot feed back FBC, and the candidate voltage can be considered unavailable, that is, the candidate voltage is an unavailable value.

[0178] Based on this, optionally, when traversing each candidate voltage, the decoder feedbacks a signal for characterizing a hard decoding failure, that is, after traversing all candidate voltages within the fine scan range to which the above-mentioned valley bottom voltage belongs, the optimal read voltage cannot be determined. This indicates that the optimal read voltage cannot be determined within the fine scan range of the above-mentioned valley bottom voltage through the specific implementation method shown in the above steps S203A-S203C. In this case, the hard decoding of the storage device fails, and soft decoding needs to be used to read data.

[0179] It should be noted that the above Figure 4 and Figure 5 The specific implementation method shown is only an example of the implementation method of the above step S203, and is not a limitation. Any method that can be implemented within the fine scanning range to which the valley bottom voltage belongs, and can search for a voltage value that can obtain the number of error bits fed back by the decoder as the optimal read voltage, all belong to the protection scope of the embodiments of the present application. For example, non-repetitive voltage values ​​can be obtained at any time within the fine scanning range to which the valley bottom voltage belongs. When each voltage value is obtained, it is determined whether the decoder hard decodes the read data to feed back the number of error bits when the voltage value is used as the read voltage to read data from the storage device; if so, the obtained voltage value is used as the optimal read voltage, otherwise, the next voltage value is randomly obtained. In addition, the voltage value obtained each time is non-repetitive.

[0180] Optionally, a specific implementation method, such as Figure 6As shown, a method for determining an optimal read voltage provided in an embodiment of the present application may further include the following step S204.

[0181] S204: If the current number of error bits does not meet a preset condition, a soft decoding method is used to read data from the storage device.

[0182] In this specific implementation, when the current number of bit errors does not meet the preset conditions, for example, the current number of bit errors is greater than the preset threshold, and for another example, the current number of bit errors does not belong to any preset interval, that is, the current number of bit errors is not included in all preset intervals, it can be explained that the storage device may exceed the critical capacity of the decoder's hard decoding, and the possibility of successful hard decoding is small, or even there is no possibility of successful hard decoding, and soft decoding can be directly used to read data.

[0183] As can be seen from the above, an overall technical solution for determining the optimal read voltage provided by the embodiment of the present application is as follows: Figure 7 The overall technical solution may include the following steps S701-S707.

[0184] S701: Valley search.

[0185] That is, the above-mentioned coarse scanning process and fine scanning process are used to search for the valley voltage as the optimal read voltage.

[0186] S702: Determine whether the hard decoding is successful. If successful, the data reading process ends; if unsuccessful, execute step S703.

[0187] That is, the valley voltage searched in step S701 is used as the optimal read voltage to read data from the storage device, and the decoder is used to hard-decode the read data. Then, according to whether the information fed back by the decoder is FBC or a signal used to indicate hard decoding failure, it is determined whether the decoder hard decoding is successful, and then it is determined whether the data reading using the valley voltage searched in step S701 is successful.

[0188] Among them, if the decoder feedback is FBC, it means that the decoder hard decoding is successful, and it can be determined that the data reading is successful using the valley voltage searched in step S701, and the data reading process is ended; conversely, if the decoder feedback is a signal used to characterize the failure of hard decoding, it means that the decoder hard decoding is successful, and it can be determined that the data reading is unsuccessful using the valley voltage searched in step S701.

[0189] S703: Estimate the current FBC of the storage device.

[0190] When the judgment result of the above step S702 is that the hard decoding fails, it can be explained that the data reading using the valley voltage searched in step S701 fails, and thus, the current FBC of the storage device can be estimated, that is, the current FBC of the storage device can be predicted.

[0191] S704: Determine whether the current FBC is greater than a preset threshold. If not, execute step S705; if greater, execute step S707.

[0192] S705: Searching for an optimal read voltage based on the FBC.

[0193] That is Figure 7 In the overall technical solution shown, the preset condition includes a preset threshold value, and when the current FBC is not greater than the preset threshold value, it is determined that the current FBC meets the preset condition. Therefore, the judgment result of the above step S704 is: when the current FBC estimated in the above step S703 is not greater than the preset threshold value, the voltage value that can obtain the number of error bits fed back by the decoder can be searched within the fine scanning range to which the valley bottom voltage searched in the above step S701 belongs, as the optimal read voltage.

[0194] For example, each candidate voltage may be searched within the fine scanning range to which the valley voltage obtained by searching in step S701 belongs according to a specified step length. Then, each candidate voltage is used as a read voltage to read data from the storage device, and a decoder is used to hard decode the read data, thereby obtaining the number of error bits fed back by the decoder. In this way, the candidate voltage with the smallest number of error bits fed back by the decoder can be determined as the optimal read voltage.

[0195] For another example, each candidate voltage within the fine scan range to which the valley bottom voltage belongs can be traversed in sequence according to a specified step length. When each candidate voltage is traversed, the candidate voltage can be used as a read voltage to read data from the storage device, and then the decoder is used to hard decode the read data. If the decoder feeds back the number of bit errors, the traversed candidate voltage is determined as the optimal read voltage, and the candidate voltage traversal ends. Conversely, if the decoder does not feed back the number of bit errors, the next candidate voltage is traversed. Until the optimal read voltage is obtained, or all candidate voltages are traversed.

[0196] S706: Determine whether the hard decoding is successful. If successful, end the data reading process; if unsuccessful, execute step S707.

[0197] That is, the optimal read voltage determined in the above step S705 is used to read data from the storage device, and the decoder is used to hard-decode the read data, thereby obtaining the information fed back by the decoder, and determining whether the hard decoding is successful based on the information fed back by the decoder. Among them, when the decoder feeds back FBC, it can be determined that the hard decoding of the decoder is successful, and it is determined that the data reading of the storage device using the optimal read voltage determined in the above step S705 is successful, and the data reading process ends. On the contrary, when the decoder feeds back a signal used to characterize the failure of hard decoding, it can be determined that the hard decoding of the decoder has failed, and it is determined that the data reading of the storage device using the optimal read voltage determined in the above step S705 has failed, and further, it is explained that the optimal read voltage determined in the above step S705 is not the actual optimal read voltage, and the optimal read voltage that can be used cannot be determined, so step S707 is executed to read data using soft decoding.

[0198] S707: Soft decoding.

[0199] When the judgment result of step S704 is that the current FBC estimated in step S703 is greater than the preset threshold, it can be explained that the storage device may exceed the critical capacity of hard decoding at this time, and the possibility of hard decoding success is small, or even there is no possibility of hard decoding success. Therefore, the soft decoding method can be directly used to read the data. In addition, when the data reading of the storage device using the optimal read voltage determined in step S705 fails, step S707 can be executed to read the data using the soft decoding method.

[0200] As mentioned above, the embodiment of the present application provides a method for determining the optimal read voltage. Its essence is to calibrate the valley voltage when the data reading of the storage device fails using the valley voltage obtained by the search as the optimal read voltage, so that the data reading of the storage device can be successfully realized using the calibrated optimal read voltage. Therefore, compared with the above-mentioned related technology, the valley voltage is searched as the optimal read voltage. The scheme provided in the embodiment of the present application uses FBC as the voltage search index. Its essence is to traverse the given voltage interval and search for the voltage that can make the hard decoding successful, rather than just searching for the voltage corresponding to the valley. Therefore, when the storage device is at the critical capacity of hard decoding, the hard decoding success rate of the storage device can be improved, and compared with soft decoding, the time overhead can be reduced and the data reading efficiency can be improved.

[0201] As can be seen from the above, by applying the solution provided by the embodiment of the present application, when the data reading of the storage device fails using the valley voltage obtained by the search as the optimal read voltage, the current number of error bits of the storage device can be predicted, and the current number of error bits can be compared with the preset conditions to determine whether the current number of error bits meets the preset conditions. If the current number of error bits meets the preset conditions, a voltage value that can obtain the number of error bits fed back by the decoder can be searched within the fine scan range to which the valley voltage belongs as the optimal read voltage, that is, within the fine scan range, a voltage value is searched as the new optimal read voltage. When the storage device is read using the new optimal read voltage, the decoder hard decodes the read data and can feed back the number of error bits. At this time, it can be determined that the data reading using the new optimal read voltage is successful.

[0202] Based on this, by applying the solution provided in the embodiment of the present application, when the valley voltage obtained by searching is used as the optimal read voltage to read data from the storage device, the valley voltage can be calibrated by using the current number of error bits of the storage device to determine a new optimal read voltage, so that when the valley voltage obtained by searching is used as the optimal read voltage to read data from the storage device, a new optimal read voltage can be re-determined to improve the data reading success rate of the storage device. Moreover, compared with the above-mentioned related art, in which the valley voltage is searched as the optimal read voltage, the solution provided in the embodiment of the present application uses FBC as the voltage search index, which is essentially to search for a voltage that can make hard decoding successful in a given voltage range, rather than just searching for the voltage corresponding to the valley. Therefore, when the storage device is at the critical capacity of hard decoding, the hard decoding success rate of the storage device can be improved, and compared with directly using soft decoding to read data when the storage device is at the critical capacity of hard decoding, the time overhead can be reduced and the data reading efficiency can be improved.

[0203] As described above, in order to implement a method for determining an optimal read voltage provided by an embodiment of the present application, when the data reading of the storage device fails using the valley voltage obtained by the search, the possibility of the decoder hard decoding success is judged to select the optimal error correction path for the data reading failure. The key point is to predict the current FBC of the storage device when the data reading of the storage device fails using the valley voltage obtained by the search, and the core of predicting the current FBC of the storage device is to establish a corresponding relationship about FBC. For example, a mathematical model about FBC, thereby realizing the prediction of the above-mentioned current FBC.

[0204] Based on this, a variety of corresponding relationships about FBC can be established in different ways, for example, a variety of mathematical models about FBC can be established in different ways, and then, according to different corresponding relationships about FBC, the above-mentioned current FBC can be predicted in a variety of ways.

[0205] Optionally, in a specific implementation, in the above step S201, predicting the current number of error bits of the storage device may include the following steps 2011-2012.

[0206] Step 2011: Obtain the device status of the storage device as the current device status.

[0207] The device status includes at least one of: erase cycle, data retention, read disturb, cross temperature and write disturb.

[0208] Step 2012: Based on the preset correspondence between the device state and the number of bit errors, determine the number of bit errors corresponding to the current device state as the current number of bit errors of the storage device.

[0209] In this specific implementation, when the data reading of the storage device fails using the valley voltage obtained by searching, the device state of the storage device can be obtained as the current device state. Then, based on the preset corresponding relationship between the device state and the number of bit errors, the number of bit errors corresponding to the current device state can be determined as the current number of bit errors of the storage device.

[0210] Among them, optionally, in a specific implementation, such as Figure 8 As shown, the above-mentioned method for establishing the corresponding relationship between the device status and the number of bit errors may include the following steps S801-S804.

[0211] S801: Set various device states.

[0212] The device state depends on the parameter value of the device parameter, and as mentioned above, the device parameter used to characterize the device state may include at least one of: erase cycle, data retention, read interference, cross temperature and write interference. Furthermore, the device parameters used to characterize the device state can be first determined, and then the parameter values ​​are assigned to the determined device parameters. When the parameter values ​​of two sets of device parameters used to characterize the device state are not completely the same, the two sets of parameter values ​​are used to characterize two different device states. Based on this, different device states can be set by assigning different parameter values ​​to the device parameters that characterize the device state, thereby obtaining various device states that have been set. The parameter values ​​of the device parameters of each two device states are not completely the same.

[0213] For example, the device parameters used to characterize the device state include: erase cycle, data retention, read interference, cross temperature and write interference. The parameter values ​​of one set of device parameters are set to: erase cycle a1, data retention b1, read interference c1, cross temperature d1 and write interference d1, and the parameter values ​​of another set of device parameters are set to: erase cycle a2, data retention b1, read interference c1, cross temperature d1 and write interference d1. Since the parameter values ​​of the above two sets of device parameters are not exactly the same, the parameter values ​​of the above two sets of device parameters are two different device states.

[0214] S802: For each device state, set a plurality of storage devices having the device state, and determine a threshold voltage distribution of each storage device.

[0215] For each device state, a plurality of storage devices having the device state may be provided, and then the threshold voltage distribution of each storage device may be determined.

[0216] The threshold voltage distribution of each storage device can usually be represented by a VT diagram of the storage device. The VT diagram of each storage device is used to characterize the correspondence between the read voltage of the storage device and the number of storage cells. The correspondence between the read voltage of the storage device and the number of storage cells can be used as the threshold voltage distribution of the storage device. The horizontal coordinate of each point in the VT diagram of the storage device is the read voltage traversed to read data from the storage device, and the vertical coordinate of each point is the difference between the cnt obtained by reading data from the storage device using the horizontal coordinate of the point and the cnt obtained by reading data from the storage device using the previous read voltage of the horizontal coordinate of the traversed point.

[0217] That is, in the embodiment of the present application, in the VT diagram of the storage device, the ordinate represents the cnt within the read voltage range, rather than the cnt of a certain isolated read voltage. For the convenience of description, the ordinate of each point can be referred to as the cnt corresponding to the read voltage represented by the abscissa of the point.

[0218] As Figure 1 Take the VT diagram of MLC shown in the figure as an example, the horizontal axis of the VT diagram is the read voltage of MLC, and the vertical axis is the number of storage cells of MLC (i.e., the number of storage cells). The horizontal axis of each point on the VT diagram is the read voltage used to read MLC, and the vertical axis is the difference between the cnt obtained by reading MLC using the read voltage and the cnt obtained by reading MLC using the previous read voltage of the read voltage. For the convenience of description, for each point, its horizontal axis is the read voltage, and the vertical axis can be called the number of storage cells corresponding to the read voltage.

[0219] For example, for each storage device, a voltage range R, a step size s, and an initial voltage V0 are preset, and the read voltage for each reading is set to V=V0+k×s, where k is the number of times each reading is performed. Then, at each reading, the data of the storage device is read using the above read voltage V, and the cnt obtained during this reading is obtained. Furthermore, at each reading, the difference between the cnt obtained during this reading and the cnt obtained during the previous reading can be calculated as the cnt corresponding to the read voltage used during this reading. The above read voltage setting and data reading process is cycled, and multiple readings are performed until the voltage range R is traversed. Then, based on the read voltage V read each time and the cnt obtained during this reading, multiple sets of read voltages V and cnt are obtained, that is, the coordinates of multiple points in the VT diagram to be drawn are obtained, so that the VT diagram of the storage device can be drawn according to the coordinates of the above obtained points as the threshold voltage distribution of the storage device.

[0220] In order to avoid the randomness caused by single data, multiple storage devices can be set for each device state, and the parameter value of the device parameter of each storage device is the parameter value of the device parameter in the device state, that is, each storage device has the device state.

[0221] For example, if the device status is: erase cycle a1, data retention b1, read interference c1, cross temperature d1, and write interference d2, then the parameter values ​​of the device parameters of multiple storage devices can be set to: erase cycle a1, data retention b1, read interference c1, cross temperature d1, and write interference d1, thereby obtaining multiple storage devices with the device status.

[0222] Furthermore, for each device state, the threshold voltage distribution of each storage device having the device state can be determined.

[0223] S803: For each storage device, traverse each voltage value in the threshold voltage distribution of the storage device, and obtain each traversed voltage value as a read voltage to read data from the storage device, and the decoder performs hard decoding on the read data to feedback the number of error bits.

[0224] S804: Based on the device state of each storage device and the minimum value of the acquired number of error bits, a corresponding relationship between the device state and the number of error bits is established.

[0225] After obtaining the threshold voltage distribution of each storage device, each voltage value in the threshold voltage distribution of the storage device can be traversed for each storage device, and when each voltage value is traversed, the traversed voltage value is used as a read voltage to read data from the storage device, and the decoder is used to hard decode the read data, thereby obtaining the number of error bits fed back by the decoder. Then, the minimum value of the number of error bits fed back by the decoder is determined.

[0226] In this way, for each storage device, the device status of the storage device and the minimum FBC fed back by the decoder can be determined, so that a corresponding relationship between the device status and the number of bit errors can be established based on the device status of each storage device and the minimum FBC fed back by the decoder.

[0227] For example, establish a mathematical model between FBC and equipment status , as the corresponding relationship between the device status and the number of bit errors, where the above Indicates the device status.

[0228] Among them, the above-mentioned correspondence between the device status and the number of bit errors can be established through various methods such as SVR (Support Vector Regression), neural network model, data fitting, etc., and the embodiments of the present application do not make specific limitations on this.

[0229] Optionally, in another specific implementation, in the above step S201, predicting the current number of error bits of the storage device may include the following steps 2013-2014.

[0230] Step 2013: Acquire the current read voltage sequence and the current storage cell number sequence determined in the valley voltage search process as current data.

[0231] Among them, the current read voltage sequence includes: each voltage traversed during the search process, and the current storage cell number sequence includes: when each voltage traversed during the search process is used as the read voltage to read data from the storage device, the difference in the number of storage cells obtained when each two adjacent voltages are used as the read voltage.

[0232] Step 2014: Based on the preset correspondence between the read voltage sequence, the storage unit number sequence and the number of bit errors, determine the number of bit errors corresponding to the current data as the current number of bit errors of the storage device.

[0233] In this specific implementation, as mentioned above, the valley voltage in the above step S201 is obtained by searching a preset voltage range through a coarse scanning process and a fine scanning process. In the process of searching the valley voltage, multiple voltages are sequentially traversed, and the multiple voltages are sorted to obtain the current read voltage sequence. In addition, in the process of searching the valley voltage, when each voltage is traversed, the traversed voltage is used as a read voltage to read data from the storage device to obtain the number of storage cells. For each two adjacent voltages among the multiple voltages traversed, the difference in the number of storage cells obtained when each of the two adjacent voltages is used to read data from the storage device can be calculated, that is, the difference in the number of storage cells obtained when each voltage traversed during the search is used as a read voltage to read data from the storage device is obtained, and then multiple differences can be obtained, and the multiple differences are sorted to obtain the current number of storage cells sequence.

[0234] The above-obtained current read voltage sequence and current storage unit number sequence can be used as current data. Furthermore, based on the preset correspondence between the read voltage sequence, the storage unit number sequence and the number of error bits, the number of error bits corresponding to the above-mentioned current data can be determined as the current number of error bits of the storage device.

[0235] Among them, optionally, in a specific implementation, such as Fig. 9 As shown, the above-mentioned method for establishing the corresponding relationship between the read voltage sequence, the storage unit number sequence and the number of error bits may include the following steps S901-S905.

[0236] S901: Set various device states.

[0237] S902: For each device state, set a plurality of storage devices having the device state.

[0238] Among them, the specific implementation method of the above step S901 is the same as the specific implementation method of the above step S801, and the specific implementation method of the above step S902 is the same as the specific implementation method of "for each device state, setting multiple storage devices with the device state" in the above step S802, which will not be repeated here.

[0239] S903: For each storage device, determine a read voltage sequence and a storage cell number sequence in a search process for an optimal read voltage of the storage device as the read voltage sequence and storage cell number sequence corresponding to the storage device.

[0240] S904: For each storage device, when the optimal read voltage of the storage device obtained by searching is used to read data from the storage device, the number of error bits fed back by the decoder when decoding the read data is obtained as the number of error bits corresponding to the storage device.

[0241] S905: Based on the read voltage sequence, the storage unit number sequence, and the number of error bits corresponding to each storage device, establish a corresponding relationship between the read voltage sequence, the storage unit number sequence, and the number of error bits.

[0242] In this specific implementation, for each storage device, the optimal read voltage of the storage device can be searched within a preset voltage range. During the search process, multiple voltages are sequentially traversed within the above voltage range according to a given step length, and the multiple voltages traversed are sorted to obtain a read voltage sequence as the read voltage sequence corresponding to the storage device. Moreover, when each voltage is traversed, the voltage can be used as the read voltage to read data from the storage device to obtain the cnt read this time. Furthermore, for each two adjacent voltages among the multiple voltages traversed, the difference between the cnts obtained when the two adjacent voltages are traversed can be calculated, and the multiple differences obtained can be sorted to obtain a sequence of the number of storage cells as the sequence of the number of storage cells corresponding to the storage device.

[0243] In addition, in the above search process, when each voltage is traversed and the voltage is used as the read voltage to read data from the storage device, the decoder can be used to hard decode the read data and obtain the number of error bits fed back by the decoder. Then, the minimum number of error bits fed back by the decoder can be determined, and the voltage traversed when the decoder feeds back the minimum number of error bits can be used as the optimal read voltage of the storage device.

[0244] That is, in the above search process, when the above determined optimal read voltage is traversed, the number of bit errors fed back by the decoder is the minimum value of all the number of bit errors fed back by the decoder in the above search process.

[0245] Based on this, for each storage device, in the process of searching for the optimal read voltage of the storage device, the read voltage sequence, the number of storage cells sequence and the optimal read voltage of the storage device can be obtained. In addition, in the above search process, the number of error bits fed back by the decoder when decoding the read data of the storage device using the optimal read voltage can also be obtained as the number of error bits corresponding to the storage device.

[0246] Optionally, in some cases, in order to reduce the number of values ​​in the read voltage sequence and the storage cell number sequence, and further reduce the above-mentioned prediction process of the current number of error bits, and the computing resource consumption in the above-mentioned process of establishing the corresponding relationship between the read voltage sequence, the storage cell number sequence and the number of error bits, in the above-mentioned step 2013, the read voltage sequence and the number of storage cells determined in the fine scanning process during the valley voltage search process can be obtained as the current read voltage sequence and the current storage cell number sequence, respectively, and in the above-mentioned step S903, when searching for the optimal read voltage of the storage device, the pre-given voltage range can also be the fine scanning process in the valley voltage search process, so that the read voltage sequence and the storage cell number sequence in the fine scanning process can be used as the read voltage sequence and the storage cell number sequence of the storage device. In these cases, the optimal read voltage of the storage device is still determined based on the FBC fed back by the decoder.

[0247] In this way, for each storage device, the read voltage sequence, storage cell number sequence and number of error bits corresponding to the storage device can be obtained. Therefore, based on the read voltage sequence, storage cell number sequence and number of error bits corresponding to each storage device, a corresponding relationship between the read voltage sequence, storage cell number sequence and the number of error bits can be established.

[0248] For example, a mathematical model is established about the sequence of read voltages, the sequence of the number of storage cells, and the number of bit errors. , as the corresponding relationship between the read voltage sequence, the number of storage cells and the number of bit errors. is the voltage sequence, is a sequence of storage unit numbers.

[0249] Among them, the above-mentioned correspondence between the read voltage sequence, the storage unit number sequence and the number of error bits can be established through various methods such as SVR, neural network model, data fitting, etc., and the embodiments of the present application do not make specific limitations on this.

[0250] Corresponding to the method for determining an optimal read voltage provided in the above-mentioned embodiment of the present application, the embodiment of the present application also provides a device for determining an optimal read voltage.

[0251] Fig.10 A schematic diagram of a structure of a device for determining an optimal read voltage provided in an embodiment of the present application is shown in FIG. Fig.10 As shown, the device may include:

[0252] A quantity prediction module 1010, configured to predict the current number of error bits of the storage device when data reading from the storage device fails using the valley voltage obtained by searching;

[0253] The condition determination module 1020 is used to determine whether the current number of error bits meets a preset condition; if so, the voltage determination module 1030 is triggered;

[0254] The voltage determination module 1030 is used to search for a voltage value capable of obtaining the number of bit errors fed back by the decoder within the fine scanning range to which the valley voltage belongs, as the optimal read voltage.

[0255] As can be seen from the above, by applying the solution provided by the embodiment of the present application, when the data reading of the storage device fails using the valley voltage obtained by the search as the optimal read voltage, the current number of error bits of the storage device can be predicted, and the current number of error bits can be compared with the preset conditions to determine whether the current number of error bits meets the preset conditions. If the current number of error bits meets the preset conditions, a voltage value that can obtain the number of error bits fed back by the decoder can be searched within the fine scan range to which the valley voltage belongs as the optimal read voltage, that is, within the fine scan range, a voltage value is searched as the new optimal read voltage. When the storage device is read using the new optimal read voltage, the decoder hard decodes the read data and can feed back the number of error bits. At this time, it can be determined that the data reading using the new optimal read voltage is successful.

[0256] Based on this, by applying the solution provided in the embodiment of the present application, when the valley voltage obtained by searching is used as the optimal read voltage to read data from the storage device, the valley voltage can be calibrated by using the current number of error bits of the storage device to determine a new optimal read voltage, so that when the valley voltage obtained by searching is used as the optimal read voltage to read data from the storage device, a new optimal read voltage can be re-determined to improve the data reading success rate of the storage device. Moreover, compared with the above-mentioned related art, in which the valley voltage is searched as the optimal read voltage, the solution provided in the embodiment of the present application uses FBC as the voltage search index, which is essentially to search for a voltage that can make hard decoding successful in a given voltage range, rather than just searching for the voltage corresponding to the valley. Therefore, when the storage device is at the critical capacity of hard decoding, the hard decoding success rate of the storage device can be improved, and compared with directly using soft decoding to read data when the storage device is at the critical capacity of hard decoding, the time overhead can be reduced and the data reading efficiency can be improved.

[0257] Optionally, in a specific implementation, the condition judgment module 1020 is specifically used to:

[0258] Determine whether the current number of bit errors is not greater than a preset threshold; if so, the current number of bit errors meets the preset condition; or,

[0259] Determine whether the current number of bit errors belongs to any preset interval; if so, the current number of bit errors meets the preset condition.

[0260] Optionally, in a specific implementation, the voltage determination module 1030 is specifically configured to:

[0261] Searching for each candidate voltage within a fine scanning range to which the valley bottom voltage belongs according to a specified step length;

[0262] Acquire the number of bit errors fed back by the decoder performing hard decoding on the read data when the storage device is read using each candidate voltage as a read voltage;

[0263] The candidate voltage with the smallest number of error bits fed back by the decoder is determined as the optimal read voltage.

[0264] Optionally, in a specific implementation, the voltage determination module 1030 is specifically configured to:

[0265] According to the specified step length, traverse each candidate voltage in the fine scanning range to which the valley bottom voltage belongs in sequence;

[0266] When traversing each candidate voltage, determining whether the decoder performs hard decoding on the read data to feed back the number of bit errors when using the candidate voltage as a read voltage to read data from the storage device;

[0267] If yes, the candidate voltage traversed is determined as the optimal read voltage, and the candidate voltage traversal ends;

[0268] Otherwise, the next candidate voltage is traversed.

[0269] Optionally, in a specific implementation, the quantity prediction module 1010 is specifically used to:

[0270] Acquire a device state of the storage device as a current device state; wherein the device state includes at least: at least one of erase cycle, data retention, read disturbance, cross temperature and write disturbance;

[0271] Based on a preset correspondence between a device state and a number of bit errors, the number of bit errors corresponding to the current device state is determined as the current number of bit errors of the storage device.

[0272] Optionally, in a specific implementation, the apparatus further includes a first establishing module for establishing the correspondence between the device state and the number of bit errors; the first establishing module is specifically configured to:

[0273] Set various device states;

[0274] For each device state, multiple storage devices having the device state are provided, and a threshold voltage distribution of each storage device is determined;

[0275] For each storage device, traverse each voltage value in the threshold voltage distribution of the storage device, and obtain the number of error bits fed back by the decoder performing hard decoding on the read data when each traversed voltage value is used as a read voltage to read data from the storage device;

[0276] Based on the device state of each storage device and the minimum value of the acquired number of bit errors, a corresponding relationship between the device state and the number of bit errors is established.

[0277] Optionally, in a specific implementation, the quantity prediction module 1010 is specifically used to:

[0278] Acquire a current read voltage sequence and a current storage cell number sequence determined in the valley voltage search process as current data; wherein the current read voltage sequence includes: each voltage traversed in the search process, and the current storage cell number sequence includes: when each voltage traversed in the search process is used as a read voltage to read data from the storage device, the difference in the number of storage cells obtained when each two adjacent voltages are used as read voltages;

[0279] Based on a preset correspondence between a read voltage sequence, a storage unit number sequence, and a number of bit errors, the number of bit errors corresponding to the current data is determined as the current number of bit errors of the storage device.

[0280] Optionally, in a specific implementation, the device further includes a second establishing module for establishing the correspondence between the read voltage sequence, the storage unit number sequence and the number of error bits; the second establishing module is specifically used to:

[0281] Setting various device states, and for each device state, setting a plurality of storage devices having the device state;

[0282] For each storage device, determining a read voltage sequence and a storage unit number sequence in a search process for an optimal read voltage of the storage device as the read voltage sequence and storage unit number sequence corresponding to the storage device;

[0283] For each storage device, when the optimal read voltage of the storage device obtained by searching is used to read data from the storage device, the number of error bits fed back by the decoder when decoding the read data is obtained as the number of error bits corresponding to the storage device;

[0284] Based on the read voltage sequence, storage unit number sequence and the number of bit errors corresponding to each storage device, a corresponding relationship between the read voltage sequence, the storage unit number sequence and the number of bit errors is established.

[0285] Optionally, in a specific implementation, the device further includes:

[0286] The soft decoding module is used to read data from the storage device by using a soft decoding method if the current number of error bits does not meet the preset condition.

[0287] Corresponding to the method for determining an optimal read voltage provided in the above embodiment of the present application, the embodiment of the present application further provides an electronic device, such as Fig.11 As shown, including:

[0288] Memory 1101, used for storing computer programs;

[0289] The processor 1102 is used to implement the steps of any method for determining the optimal read voltage provided in the above-mentioned embodiments of the present application when executing the program stored in the memory 1101.

[0290] In addition, the electronic device may further include a communication bus and / or a communication interface, and the processor 1102, the communication interface, and the memory 1101 communicate with each other via the communication bus.

[0291] The communication bus mentioned in the above electronic device can be a Peripheral Component Interconnect (PCI) bus or an Extended Industry Standard Architecture (EISA) bus, etc. The communication bus can be divided into an address bus, a data bus, a control bus, etc. For ease of representation, only one thick line is used in the figure, but it does not mean that there is only one bus or one type of bus.

[0292] The communication interface is used for communication between the above electronic device and other devices.

[0293] The memory may include a random access memory (RAM) or a non-volatile memory (NVM), such as at least one disk memory. Optionally, the memory may also be at least one storage device located away from the aforementioned processor.

[0294] The above-mentioned processor can be a general-purpose processor, including a central processing unit (CPU), a network processor (NP), etc.; it can also be a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components.

[0295] In another embodiment provided in the present application, a computer-readable storage medium is provided, in which a computer program is stored. When the computer program is executed by a processor, the steps of the method for determining any optimal read voltage provided in the above-mentioned embodiments of the present application are implemented.

[0296] In another embodiment provided in the present application, a computer program product including instructions is also provided. When the computer program product is executed on a computer, the computer executes the steps of any method for determining an optimal read voltage provided in the above-mentioned embodiments of the present application.

[0297] In the above embodiments, it can be implemented in whole or in part by software, hardware, firmware or any combination thereof. When implemented using software, it can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, the process or function described in the embodiment of the present application is generated in whole or in part. The computer may be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions may be stored in a computer-readable storage medium, or transmitted from one computer-readable storage medium to another computer-readable storage medium. For example, the computer instructions may be transmitted from a website site, computer, server or data center to another website site, computer, server or data center by wired (e.g., coaxial cable, optical fiber, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) means. The computer-readable storage medium may be any available medium that a computer can access or a data storage device such as a server or data center that includes one or more available media integrated. The available medium may be a magnetic medium (e.g., a floppy disk, a hard disk, a tape), an optical medium (e.g., a DVD), or a solid-state hard disk (SSD), etc.

[0298] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the existence of other identical elements in the process, method, article or device including the elements.

[0299] Each embodiment in this specification is described in a related manner, and the same or similar parts between the embodiments can be referred to each other, and each embodiment focuses on the differences from other embodiments. In particular, for the device embodiment, electronic device embodiment, computer-readable storage medium embodiment, and computer program product embodiment, since they are basically similar to the method embodiment, the description is relatively simple, and the relevant parts can be referred to the partial description of the method embodiment.

[0300] The above description is only a preferred embodiment of the present application and is not intended to limit the protection scope of the present application. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application are included in the protection scope of the present application.

Claims

1. A method for determining an optimal read voltage, characterized in that: The method comprises: When data reading of a storage device fails using the valley voltage obtained by searching, predicting the current number of error bits of the storage device; Determine whether the current number of bit errors meets a preset condition; wherein the preset condition is determined based on the decoding capability of the decoder; If the condition is satisfied, then within the fine scan range to which the valley voltage belongs, a voltage value capable of obtaining the number of bit errors fed back by the decoder is searched as the optimal read voltage.

2. The method according to claim 1, characterized in that The determining whether the current number of error bits meets a preset condition includes: Determine whether the current number of bit errors is not greater than a preset threshold; if so, the current number of bit errors meets the preset condition; or, Determine whether the current number of bit errors belongs to any preset interval; if so, the current number of bit errors meets the preset condition.

3. The method according to claim 1, characterized in that: The step of searching, within the fine scanning range to which the valley voltage belongs, for a voltage value capable of obtaining the number of bit errors fed back by the decoder as the optimal read voltage, includes: Searching for each candidate voltage within a fine scanning range to which the valley bottom voltage belongs according to a specified step length; Acquire the number of bit errors fed back by the decoder performing hard decoding on the read data when the storage device is read using each candidate voltage as a read voltage; The candidate voltage with the smallest number of error bits fed back by the decoder is determined as the optimal read voltage.

4. The method according to claim 1, characterized in that The step of searching, within the fine scanning range to which the valley voltage belongs, for a voltage value capable of obtaining the number of bit errors fed back by the decoder as the optimal read voltage, includes: According to the specified step length, traverse each candidate voltage in the fine scanning range to which the valley bottom voltage belongs in sequence; When traversing each candidate voltage, determining whether the decoder performs hard decoding on the read data to feed back the number of bit errors when using the candidate voltage as a read voltage to read data from the storage device; If yes, the candidate voltage traversed is determined as the optimal read voltage, and the candidate voltage traversal is terminated; Otherwise, the next candidate voltage is traversed.

5. The method according to claim 1, characterized in that The predicting the current number of bit errors of the storage device includes: Acquire a device state of the storage device as a current device state; wherein the device state includes at least: at least one of erase cycle, data retention, read disturbance, cross temperature and write disturbance; Based on a preset correspondence between a device state and a number of bit errors, the number of bit errors corresponding to the current device state is determined as the current number of bit errors of the storage device.

6. The method according to claim 5, characterized in that The method for establishing the corresponding relationship between the device status and the number of bit errors includes: Set various device states; For each device state, multiple storage devices having the device state are provided, and a threshold voltage distribution of each storage device is determined; For each storage device, traverse each voltage value in the threshold voltage distribution of the storage device, and obtain the number of error bits fed back by the decoder performing hard decoding on the read data when each traversed voltage value is used as a read voltage to read data from the storage device; Based on the device state of each storage device and the minimum value of the acquired number of bit errors, a corresponding relationship between the device state and the number of bit errors is established.

7. The method according to claim 1, characterized in that The predicting the current number of bit errors of the storage device includes: Acquire a current read voltage sequence and a current storage cell number sequence determined in the valley voltage search process as current data; wherein the current read voltage sequence includes: each voltage traversed in the search process, and the current storage cell number sequence includes: when each voltage traversed in the search process is used as a read voltage to read data from the storage device, the difference in the number of storage cells obtained when each two adjacent voltages are used as read voltages; Based on a preset correspondence between a read voltage sequence, a storage unit number sequence, and a number of bit errors, the number of bit errors corresponding to the current data is determined as the current number of bit errors of the storage device.

8. The method according to claim 7, characterized in that The method for establishing the corresponding relationship between the read voltage sequence, the storage unit number sequence and the number of error bits includes: Setting various device states, and for each device state, setting a plurality of storage devices having the device state; For each storage device, determine a read voltage sequence and a storage unit number sequence in a search process for an optimal read voltage of the storage device as the read voltage sequence and storage unit number sequence corresponding to the storage device; For each storage device, when the optimal read voltage of the storage device obtained by searching is used to read data from the storage device, the number of error bits fed back by the decoder when decoding the read data is obtained as the number of error bits corresponding to the storage device; Based on the read voltage sequence, storage unit number sequence and the number of bit errors corresponding to each storage device, a corresponding relationship between the read voltage sequence, the storage unit number sequence and the number of bit errors is established.

9. The method according to any one of claims 1 to 8, characterized in that: The method further comprises: If the current number of error bits does not meet the preset condition, data is read from the storage device using a soft decoding method.

10. A device for determining an optimal read voltage, characterized in that: The device comprises: A quantity prediction module, used for predicting the current number of error bits of the storage device when data reading of the storage device fails using the valley voltage obtained by searching; A condition judgment module, used to judge whether the current number of error bits meets a preset condition; if so, trigger the voltage determination module; The voltage determination module is used to search, within the fine scanning range to which the valley voltage belongs, for a voltage value capable of obtaining the number of error bits fed back by the decoder as the optimal read voltage.

11. An electronic device, characterized in that: include: Memory, used to store computer programs; A processor, for implementing any of the methods described in claims 1-9 when executing a program stored in a memory.

12. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the method according to any one of claims 1 to 9 is implemented.

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