Multiplexer-based Shift Register Data Transmission Method and Device

Abstract

The present invention relates to a multiplexer-based shift register data transmission method and apparatus, which obtains RGB data through an external interface and performs initialization configuration on the shift register. After initialization, the RGB data is gradually transmitted to the corresponding MUX channels in the shift register, and each MUX channel corresponds to a latch circuit, and data transmission is performed in units of MUX. During the data transmission process, the data of each MUX channel is latched, and the data output by the latch circuit is corrected and adjusted through a source buffer, and finally the corrected data is output to the target display screen. In this way, the present invention not only optimizes the data transmission and latching process, but also reduces the number of latch circuits, effectively reducing the chip area and production cost.

Description

Technical Field

[0001] The present invention relates to the technical field of data processing, and particularly relates to a method and device for data transmission of a shift register based on a multiplexer. Background Art

[0002] In traditional LCD LTPS (Low Temperature Poly-Silicon) display driving, the structure of the multiplexer transmits signals to each channel on the glass. Data is transmitted and latched in units of each line through a shift register. Specifically, RGB data passes through the shift register and is then output to the display image through a source buffer. The time unit of each line in this process is used to latch the data. Although this method is simple, it has significant problems:

[0003] 1. A large number of latching circuits: Each line requires a latching circuit to store data. If the resolution of the LCD is higher, the number of lines will increase, thus requiring more latching circuits. The increase in latching circuits not only occupies the area of the chip but also leads to an increase in production costs.

[0004] 2. Size and cost issues: In order to store a large amount of data, a large number of latching circuits need to be arranged on the chip, which will occupy most of the area of the chip and increase the manufacturing cost. For example, assuming the number of multiplexers is 24 channels, the traditional data latching method requires 72 latches.

[0005] In summary, for traditional LCD LTPS display driving, data is transmitted and latched in units of each line, resulting in a large number of latching circuits being required at high resolutions, thereby increasing the chip area and production costs, and there is currently no solution. Summary of the Invention

[0006] The main object of the present invention is to provide a method and device for data transmission of a shift register based on a multiplexer, which is used to solve the technical problem that in traditional LCD LTPS display driving, data is transmitted and latched in units of each line, resulting in a large number of latching circuits being required at high resolutions, thereby increasing the chip area and production costs.

[0007] To achieve the above object, the present invention provides a method for transmitting data of a shift register based on a multiplexer, comprising the following steps: obtaining RGB data through an external interface and performing initialization processing on the shift register; after the shift register completes initialization configuration, gradually transmitting the RGB data to corresponding MUX channels in the shift register and performing data transmission in units of MUX; performing latching processing on the data transmitted to each MUX channel, wherein each MUX channel corresponds to a latching circuit respectively; using a source buffer to correct and adjust the data output by each latching circuit and outputting the corrected and adjusted data to a target display screen.

[0008] The present invention further provides a device for transmitting data of a shift register based on a multiplexer, comprising: an initialization processing unit for obtaining RGB data through an external interface and performing initialization processing on the shift register; a transmission unit for gradually transmitting the RGB data to corresponding MUX channels in the shift register and performing data transmission in units of MUX after the shift register completes initialization configuration; a latching unit for performing latching processing on the data transmitted to each MUX channel, wherein each MUX channel corresponds to a latching circuit respectively; an output unit for using a source buffer to correct and adjust the data output by each latching circuit and outputting the corrected and adjusted data to a target display screen.

[0009] The present invention further provides a computer device, comprising a memory and a processor, wherein a computer program is stored in the memory, and when the processor executes the computer program, the steps of the method described in any one of the above are implemented.

[0010] The present invention further provides a computer-readable storage medium, on which a computer program is stored, and when the computer program is executed by a processor, the steps of the method described in any one of the above are implemented.

[0011] A method and device for transmitting data of a shift register based on a multiplexer provided by the present invention obtain RGB data through an external interface and perform initialization configuration on the shift register. After initialization is completed, the RGB data is gradually transmitted to corresponding MUX channels in the shift register. Each MUX channel corresponds to a latching circuit respectively, and data transmission is performed in units of MUX. During data transmission, the data of each MUX channel is latched, and the data output by the latching circuit is corrected and adjusted through a source buffer, and finally the corrected data is output to a target display screen. In this way, the present invention not only optimizes the data transmission and latching process, but also reduces the number of latching circuits, effectively reducing the chip area and production cost.

[0012] In summary, by introducing a multiplexer, the present invention simplifies the data transmission and latch circuit design in high-resolution display driving, effectively solving the chip area and cost problems in traditional methods, and has significant technical advantages and practical application values. Brief Description of the Drawings

[0013] Figure 1 is a schematic diagram of the steps of a multiplexer-based shift register data transmission method in an embodiment of the present invention;

[0014] Figure 2 is a schematic diagram of the traditional STP transmission direction in an embodiment of the present invention;

[0015] Figure 3 is a schematic diagram of the STP transmission direction based on a multiplexer in an embodiment of the present invention Figure 1 ;

[0016] Figure 4 is a schematic diagram of the STP transmission direction based on a multiplexer in an embodiment of the present invention Figure 2 ;

[0017] Figure 5 is a block diagram of the structure of a multiplexer-based shift register data transmission device in an embodiment of the present invention;

[0018] Figure 6 is a schematic block diagram of the structure of a computer device in an embodiment of the present invention.

[0019] The realization, functional features, and advantages of the objectives of the present invention will be further described with reference to the embodiments and the accompanying drawings. Detailed Embodiments

[0020] In order to make the objectives, technical solutions, and advantages of the present invention clearer and more understandable, the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention.

[0021] Referring to Figure 1 , an embodiment of the present invention provides a multiplexer-based shift register data transmission method, including the following steps:

[0022] S1. Obtain RGB data through an external interface and perform initialization processing on the shift register;

[0023] S2. After the shift register completes the initialization configuration, gradually transmit the RGB data to the corresponding MUX channels in the shift register and perform data transmission in units of MUX;

[0024] S3. Latch the data transmitted to each MUX channel, where each MUX channel corresponds to a latch circuit respectively;

[0025] S4. Use a source buffer to correct and adjust the data output by each latch circuit, and output the corrected and adjusted data to the target display screen.

[0026] In traditional LCD LTPS display driving, data transmission and latching are usually carried out on a per-line basis. This method requires a latch circuit for each line. As the LCD resolution increases, the number of lines increases, resulting in a need for more latch circuits, which not only occupies the chip area but also significantly increases the production cost. To solve this problem, the present invention proposes a multiplexer (MUX)-based shift register data transmission method to reduce the chip area and cost by reducing the number of latch circuits.

[0027] In this technical solution, first, RGB data is obtained through an external interface, and the shift register is initialized. After initialization, the RGB data is gradually transmitted to the corresponding MUX channels in the shift register, with each MUX channel serving as the unit of data transmission. This design changes the traditional per-line data transmission method to a per-MUX transmission method, such that each MUX channel only requires one latch circuit to store the transmitted data. In this way, the efficiency of data transmission and latching is significantly improved. Especially in the case of high resolution, the number of latch circuits is reduced, thereby reducing the chip area.

[0028] Furthermore, when the data is transmitted to each MUX channel, the data will be latched by the corresponding latch circuit. At this time, the data of each MUX channel is not only precisely controlled in time but also effectively stored through the latch circuit, laying a foundation for subsequent data processing. Next, the source buffer corrects and adjusts the data output by these latch circuits to ensure the accuracy and consistency of the data when it is transmitted to the target display screen. The correction and adjustment in this process further optimize the display effect, improving the quality of the finally output image.

[0029] The key to this solution lies in data transmission and latching in units of MUX. This innovation significantly reduces the number of latching circuits. Compared with the traditional method, the number of latches is reduced by three times, and the occupied area is reduced to one-third of the original. This not only reduces the manufacturing cost of the chip but also frees up the chip area, which can be used for the layout of other functional circuits, such as strengthening the power line routing or integrating additional ESD circuits to improve the overall performance of the chip. Through this improvement, the present invention effectively solves the problem of excessive area occupied by the latching circuit at high resolutions, achieving an improvement in the display driving efficiency and image quality while reducing the chip area and cost.

[0030] In one example, the initialization process of the shift register includes: determining the resolution of the target display screen and determining the number of pixels in each row and column on the target display screen based on the resolution; determining the number of MUX channels according to the number of pixels in each row and column on the target display screen; based on the number of MUX channels, re-dividing the storage units of the shift register into areas equal to the number of MUX channels, and sequentially allocating the divided multiple areas to multiple MUX channels, so that each MUX channel has an independent storage area.

[0031] In this example, the initialization process of the shift register is mainly to adapt to the resolution requirements of the target display screen and determine the appropriate number of MUX channels according to the resolution, so as to optimize the data transmission and storage efficiency. This initialization process can be divided into the following key steps:

[0032] First, the system determines the resolution of the target display screen, that is, the number of pixels in each row and column on the screen. Resolution is an important parameter affecting data transmission and display quality. Therefore, this information must be clearly defined first during initialization. For example, assuming the screen resolution is 1920x1080, then there are 1920 pixels in each row and 1080 pixels in each column.

[0033] Next, according to the determined number of pixels in each row and column, calculate how many MUX channels are needed to transmit this data. The number of MUX channels is usually determined according to the screen resolution and the capacity of the shift register. For example, if a MUX channel can process a certain amount of pixel data, then these pixel data need to be reasonably allocated to different MUX channels to ensure the effective transmission and storage of data.

[0034] Then, based on the determined number of MUX channels, the storage units of the shift register are re-partitioned. The purpose of this step is to allocate an independent storage area for each MUX channel to ensure that the data of each channel can be stored and transmitted independently. Specifically, the storage units of the shift register are divided into multiple regions, with each region corresponding to one MUX channel. For example, if the calculated number of MUX channels is 24, then the storage units of the shift register will be divided into 24 regions, and each region is allocated for one MUX channel to use.

[0035] Finally, the system will sequentially allocate these partitioned regions to different MUX channels to ensure that each channel has an independent storage space. The advantage of doing this is to avoid interference between different channels during data transmission and improve the efficiency and accuracy of data transmission. In addition, in this way, the storage area of each MUX channel can be fully utilized, further optimizing the usage efficiency of the chip.

[0036] In summary, the core of this initialization process lies in reasonably determining the number of MUX channels according to the resolution of the target display screen and scientifically partitioning the storage units of the shift register to ensure that each MUX channel has an independent storage area. This method not only improves the efficiency of data transmission but also reduces the circuit complexity, helping to lower the manufacturing cost of the chip.

[0037] In one example, after determining the number of MUX channels according to the number of pixels per row and per column on the target display screen, the shift register data transmission method further includes: allocating a pixel set for each MUX channel according to the number of pixels per row and per column on the target display screen and the number of MUX channels, where the MUX channel is used to process the data content corresponding to the allocated pixel set.

[0038] In this example, after determining the resolution of the target display screen and the corresponding number of MUX channels, it is also necessary to further allocate specific pixel sets for each MUX channel to ensure that each channel can effectively process and transmit the allocated pixel data. This process can be understood as classifying and grouping the pixel data on the screen and allocating the grouped data to different MUX channels for processing.

[0039] The specific steps are as follows:

[0040] First, based on the number of pixels in each row and column of the target display screen and the determined number of MUX channels, calculate the number of pixels that each MUX channel needs to process. For example, if the resolution of the display screen is 1920x1080 and 24 MUX channels are determined, each MUX channel will be responsible for processing approximately 45 rows of pixel data (assuming there are 1920 pixels in each row, each channel processes approximately 86,400 pixels).

[0041] Next, divide the pixel data of the entire screen by rows and columns to form multiple pixel sets. Each pixel set contains a certain number of pixels, and these pixels belong to different parts of the screen. For example, assume the screen is divided into 24 regions, and the pixels in each region form a pixel set. In this way, the pixel data of the screen is divided into 24 independent sets, and the number of pixels in each set is roughly equal to be evenly distributed to each MUX channel.

[0042] Then, allocate these pixel sets to each MUX channel. Each MUX channel is responsible for processing a specific pixel set, which means that the channel will process the data content corresponding to these pixels. For example, MUX channel 1 may be responsible for processing a part of the pixels in the upper left corner of the screen, MUX channel 2 is responsible for the pixels in the middle left part of the screen, and so on until all pixel sets are allocated.

[0043] In the actual operation process, each MUX channel will receive the data content corresponding to the pixel set it is allocated, and then transmit, latch, and finally display this data content on the screen. This allocation method makes the data transmission process more efficient and also avoids data conflicts between different channels. Since each MUX channel only needs to process the data of the pixel set it is allocated, this greatly simplifies the management of data transmission and optimizes the performance of the display driver.

[0044] In summary, the core of this process lies in reasonably grouping the pixel data of the display screen and allocating these grouped pixel sets to different MUX channels. Through this method, each MUX channel can efficiently process and transmit the pixel data content it is responsible for, thus achieving fast and accurate image display.

[0045] In one example, after each MUX channel has an independent storage area, the shift register data transmission method further includes: recalculating the frequency of the clock signal of the shift register according to the number of MUX channels, matching a time unit for each MUX channel, so that the shift register performs data transmission based on the time unit; reconfiguring the start pulse and reset signal of the shift register, wherein the reconfigured start pulse is used to trigger the reset of the shift register, so that the shift register and the MUX channel synchronously enter the initial state. At the same time, the reconfigured reset signal is used to trigger the clearing of the state of the shift register to prevent the residual data of the previous data cycle from affecting the current data transmission.

[0046] In this example, the further optimization of the shift register data transmission method involves the adjustment of the clock signal frequency and the reconfiguration of the start pulse and reset signal. The purpose of these steps is to ensure that the shift register and the MUX channel can perform data transmission efficiently and synchronously, while preventing the residual data of the previous data cycle from affecting the data processing of the current cycle. The following is a detailed explanation of these steps:

[0047] First, after each MUX channel is assigned an independent storage area, the system needs to recalculate the clock signal frequency of the shift register according to the number of MUX channels. The frequency of the clock signal directly affects the speed and efficiency of data transmission. Specifically, the clock frequency must match the number of MUX channels and the refresh requirements of the display screen to ensure that each MUX channel can complete data processing within the specified time. To this end, the system matches a suitable time unit for each MUX channel, and this time unit represents the basic time interval for data transmission and processing in the channel. By adjusting the frequency of the clock signal, the shift register can synchronously transmit data to each MUX channel within a suitable time unit.

[0048] Next, the system reconfigures the start pulse and reset signal of the shift register. The start pulse is an important signal for the shift register to start working, and it determines the starting point of data transmission. Through reconfiguration, the function of the start pulse is not only to start data transmission, but also to trigger the reset operation of the shift register, so that the shift register and the MUX channel synchronously enter the initial state. In this way, each data transmission cycle starts from a consistent and clean starting point, avoiding problems such as timing chaos or asynchronization.

[0049] Meanwhile, the reset signal has also been reconfigured. The reconfiguration of the reset signal is to trigger the state clearing of the shift register at the end of each data transmission cycle. This step is very important because if the residual data from the previous cycle is not cleared, it may lead to data confusion or errors, affecting the accuracy of the current data transmission. By reconfiguring the reset signal, it is ensured that all states and data in the shift register are cleared before the start of a new data cycle, thus providing a clean operating environment for the new data transmission cycle.

[0050] In summary, the method in this example achieves efficient synchronization between the shift register and the MUX channels by recalculating the clock signal frequency, matching the time units for the MUX channels, and reconfiguring the start pulse and the reset signal. Such a design not only improves the accuracy and efficiency of data transmission but also effectively avoids the influence of the residual data from the previous data cycle on the current cycle, ensuring the stability and quality of the displayed image.

[0051] In one example, the RGB data is gradually transmitted to the corresponding MUX channels in the shift register, and the data is transmitted in units of MUX, including: when receiving the RGB data each time, based on the start pulse and the reset signal, starting the reset process for each MUX channel in sequence so that subsequent data starts from a unified starting point; and, according to the advancement of the clock signal, allocating pixel sets based on each MUX channel and transmitting the RGB data to each MUX channel.

[0052] In this example, the transmission process of the RGB data is carried out step by step through the MUX channels in the shift register, ensuring that each MUX channel starts data processing from a unified starting point, thereby improving the accuracy and efficiency of data transmission. The following is a detailed explanation of this process:

[0053] First, when the shift register receives the RGB data, the system starts the reset process for each MUX channel based on the start pulse and the reset signal. The role of the start pulse and the reset signal is to ensure that all MUX channels are in the same initial state at the start of data transmission. Specifically, the start pulse is used to trigger the start of the shift register, while the reset signal is responsible for clearing the states of all MUX channels, so that the previous data no longer affects the current transmission. Through this process, all MUX channels start receiving and processing data from a unified and clean starting point, avoiding problems such as timing inconsistency or data confusion.

[0054] Next, after each receipt of RGB data, the system gradually transfers the data to each MUX channel according to the progression of the clock signal. The clock signal plays a synchronization role here, ensuring that the data is transmitted orderly at a predetermined time interval. Since each MUX channel has been assigned a specific set of pixels, the RGB data will be accurately transferred to the corresponding MUX channel according to the distribution of these pixel sets. For example, MUX channel 1 may be responsible for processing a set of pixel data in the upper left corner of the screen, MUX channel 2 for the pixel data in the upper middle part of the screen, and so on.

[0055] This process ensures that when the RGB data is transmitted, it can enter each MUX channel orderly according to the predetermined order and time nodes, and the data received by each MUX channel can be processed starting from the same initial state. In this way, not only the accuracy and consistency of data transmission are guaranteed, but also the quality and efficiency of image display are improved. By transmitting data in units of MUX, the system can better control the data flow direction and reduce image distortion or flicker phenomena caused by timing problems or data conflicts.

[0056] In summary, in this example, the transmission of RGB data is achieved through precise timing control and channel reset mechanism. Each time RGB data is received, the system starts the reset process of the MUX channel, making the data start from a unified starting point, and then transfers the data to each MUX channel according to the progression of the clock signal. This method effectively improves the stability of data transmission and the quality of image display.

[0057] In one example, latching the data transmitted to each MUX channel includes: transferring the data of each MUX channel to the first latch in the latch circuit corresponding to the MUX channel; according to the progression of the clock signal, transferring and latching the data in each latch circuit in sequence according to the connection order of multiple latches in the latch circuit.

[0058] In this example, the process of latching the data transmitted to each MUX channel mainly involves transferring the data from the MUX channel to its corresponding latch circuit, and then gradually transferring and latching in the latch circuit to ensure the correct storage and subsequent output of the data. The following is a detailed explanation of this process:

[0059] First, after each MUX channel receives the data, it transfers this data to the first latch in its corresponding latch circuit. The latch circuit can be understood as a sequence composed of multiple latches, and each latch can temporarily store a certain amount of data. The process of transferring the data to the first latch is similar to the preliminary storage of the data, ensuring that the data of each MUX channel has a fixed storage location and is ready for further processing.

[0060] Next, the advancement of the clock signal plays a crucial role in this process. The clock signal controls the transfer order of data in the latch circuit by generating a series of synchronous pulses. With each advancement of the clock signal, the data in the first latch is sequentially transferred to the next latch according to the connection order in the latch circuit. This step-by-step transfer and latching process of data ensures that each piece of data can be stored in the predetermined order without data loss or confusion due to timing issues.

[0061] For example, assume that the latch circuit corresponding to a certain MUX channel consists of three latches. When the first latch receives data, the first advancement of the clock signal triggers the first latch to transfer the data to the second latch. Then, with the second advancement of the clock signal, the second latch transfers the data to the third latch, and so on. In this way, the data will be gradually transferred and stored in the latch circuit according to the rhythm of the clock signal.

[0062] This mechanism of latch processing helps to ensure that data can be stably stored in the correct position at different times, thus laying a foundation for subsequent data processing and display. By controlling the sequential transfer of data in the latch circuit, the system can avoid data conflicts or chaos and ensure that the image signal can be output to the display screen on time and in order. This method is particularly suitable for high-resolution displays, and can effectively improve the performance and display effect of the system in the case of large data volume and high processing speed requirements.

[0063] In summary, in this example, the core of the latch processing of the data transmitted to each MUX channel lies in the cooperation of the latch circuit and the clock signal to transfer and store the data orderly in multiple latches. This method not only ensures the integrity of the data and the consistency of timing, but also provides a reliable foundation for subsequent image display.

[0064] In one example, a source buffer is used to correct and adjust the data output by each latch circuit, and the corrected and adjusted data is output to a target display screen, including: using the source buffer to receive the data output by each latch circuit, and performing stabilization processing and synchronization calibration processing on the data. Among them, the stabilization processing at least includes: filtering out instantaneous interference and noise; using a color correction algorithm built into the source buffer, and according to preset correction parameters, performing color difference adjustment on the data to compensate for color deviations caused by manufacturing processes; obtaining the temperature detection value of the target display screen, and performing temperature compensation processing on the data after color difference adjustment processing based on the temperature detection value; according to the gamma curve built into the source buffer, performing non-linear mapping processing of gamma correction on the data after temperature compensation processing; converting the data after gamma correction into corresponding analog voltage signals, and enhancing the linearity of the analog voltage signals to obtain output signals corresponding to each pixel; correspondingly sending the output signals to each pixel of the target display screen, so that the target display screen performs picture presentation processing based on the received output signals.

[0065] In this example, using a source buffer to correct and adjust the data output by each latch circuit is mainly to ensure that the image quality finally output to the target display screen reaches the best effect. This process involves a series of steps, including data reception, stabilization processing, color correction, temperature compensation, gamma correction, and finally signal output. The following is a detailed explanation of this process:

[0066] First of all, the source buffer will receive data from each latch circuit. These data may be affected by external interference or noise during transmission. Therefore, the source buffer will first perform stabilization processing. The core task of the stabilization processing is to filter out instantaneous interference and noise. This can be achieved by applying a filtering algorithm during data transmission, thereby removing those noise components that may cause image instability and ensuring the purity of the data.

[0067] Next, the source buffer will use the built-in color correction algorithm to perform color difference adjustment on the data. Due to differences in manufacturing processes, color deviations may occur on the display screen, such as certain colors appearing too strong or dim. By applying preset correction parameters, the source buffer can adjust these deviations according to the actual situation, making the finally displayed colors more accurate and natural. This step is very crucial because it directly affects the authenticity and consistency of the image colors seen by users.

[0068] After completing color correction, the source buffer also performs temperature compensation processing on the data. The temperature of the display screen can affect color performance. For example, high temperatures may cause the colors to be warmer, while low temperatures may cause the colors to be colder. To address this issue, the source buffer acquires the temperature detection values of the target display screen and further compensates the data that has already undergone color difference adjustment based on these values. In this way, the display screen can maintain color accuracy regardless of the temperature.

[0069] Next, the source buffer performs non-linear mapping processing of gamma correction on the data. Gamma correction is a common image processing technique used to adjust the brightness and contrast of an image to make it more in line with the perceptual characteristics of the human eye. Through gamma correction, the light and dark levels of the image will be more distinct, and the detail performance will also be more abundant. The source buffer performs non-linear mapping on the data through the built-in gamma curve, making the brightness and contrast of the image more natural and reasonable when finally displayed.

[0070] Finally, the data after gamma correction is converted into corresponding analog voltage signals. These signals are the key to driving each pixel of the display screen. To ensure that each pixel can accurately reflect the data, the source buffer enhances the linearity of the analog voltage signals. This step ensures that the relationship between the voltage signal and the pixel brightness is more linear, thus avoiding problems such as image distortion or uneven brightness.

[0071] The output signal after this series of processing is sent to each pixel of the target display screen. Each pixel performs screen rendering processing based on the received output signal, and finally forms a clear, accurate, and colorful image on the screen. This process not only ensures the stability and accuracy of the image quality but also can adapt to different temperature environments and manufacturing process differences, providing the best visual experience for users.

[0072] Generally speaking, this application proposes a technical solution for a source channel in 3D printing to transmit data in units of multiplexers (MUX), aiming to optimize the data transmission and latching processes in the LCD 3D printer stage. Specifically, in the MUX circuit of the LCD low-temperature polysilicon (LTPS) structure, signals are transmitted to the channels on the glass through the source driver of the DDIC, and RGB data is transmitted through the shift register in units of each line, then these data are latched into the corresponding latches, and finally output to the display screen through the source buffer to generate an image.

[0073] However, in traditional technologies, such as Figure 2As shown, the data transmission of the shift register is latched in units of lines, and this approach requires a large number of latching circuits to store data. If the resolution of the LCD is higher, the number of required latches will be greater, which will not only occupy a large area of the chip but also significantly increase the cost. For example, in the data latching schematic of the multiplexer 3 (MUX3), assuming the number of channels is 24, the start pulse (AS_LT_STP) is reset once during each data transmission, and the data transmission is arranged in sequence as MUX1, MUX2, MUX3, and finally the data is sequentially transmitted to each channel through the clock signal (AS_LT_CLK). Under the traditional method, 72 latches are required to complete data storage, which results in a large occupation of the chip area.

[0074] In view of the above defects, the present application proposes an improved MUX type shift register (STREG) structure, as Figure 3 shown, the unit of data transmission is switched from lines to MUX. Specifically, in this solution, when transmitting data in units of MUX, the start pulse (AS_LT_STP) is still used for resetting, the data is arranged in sequence as MUX1, MUX2, MUX3, and the data is sequentially transmitted to the channels through the clock signal (AS_LT_CLK), and finally output to the display screen through the source buffer. In this structure, although 72 pieces of data still need to be transmitted, due to the use of the MUX-based transmission method, only 27 latches are required to complete data storage. Compared with the traditional method, the chip area is reduced to one-third of the original.

[0075] In order to achieve accurate data transmission and output, the present application also proposes a supplementary solution, that is, as Figure 4 shown, when the data is transmitted to the output, it is first sequentially transmitted to the first latch (latch1), then transmitted to the second latch (latch2) according to specific address requirements, and finally output through the source buffer. Therefore, the latched data of each MUX will actually become the MUX data at the next time point, and this design effectively reduces the number of latches used, thus saving the chip area.

[0076] The key innovation points of this technical solution are: 1. The time unit of data transmission is switched from lines to MUX, and this conversion not only reduces the number of latches but also effectively reduces the chip area, thus reducing the production cost; 2. In the case of a higher resolution and a larger number of MUXs, the MUX-based data transmission method can significantly save area and use the vacated space for other circuits or enhance the wiring of the power supply line.

[0077] Compared with traditional technologies, the embodiments of the present application have made significant technological progress in aspects such as the utilization rate of chip area, the control of production costs, and the flexibility of circuit design. This not only brings higher efficiency and lower costs to 3D printing technology but also provides new ideas and references for circuit design in related fields.

[0078] As Figure 5 shown, an apparatus for shifting register data transmission based on a multiplexer is also provided in an embodiment of the present invention, including:

[0079] An initialization processing unit 1, configured to obtain RGB data through an external interface and perform initialization processing on the shift register;

[0080] A transmission unit 2, configured to gradually transmit the RGB data to corresponding MUX channels in the shift register and perform data transmission in units of MUX after the shift register completes initialization configuration;

[0081] A latching unit 3, configured to latch the data transmitted to each MUX channel, where each MUX channel corresponds to a latch circuit;

[0082] An output unit 4, configured to correct and adjust the data output by each latch circuit using a source buffer and output the corrected and adjusted data to a target display screen.

[0083] In this embodiment, for the specific implementation of each unit in the above apparatus embodiment, please refer to the above method embodiment and will not be elaborated herein.

[0084] Referring to Figure 6 , a computer device is also provided in an embodiment of the present invention. The computer device may be a server, and its internal structure may be as Figure 6 shown. The computer device includes a processor, a memory, a display screen, an input device, a network interface, and a database connected through a system bus. Among them, the processor of the computer design is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system, a computer program, and a database. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The database of the computer device is used to store the corresponding data in this embodiment. The network interface of the computer device is used to communicate with an external terminal through a network connection. The computer program, when executed by the processor, implements the above method.

[0085] Those skilled in the art can understand that Figure 6The structure shown is only a block diagram of some structures related to the solution of the present invention, and does not constitute a limitation on the computer device to which the solution of the present invention is applied.

[0086] An embodiment of the present invention further provides a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the above method is implemented. It can be understood that the computer-readable storage medium in this embodiment can be a volatile readable storage medium or a non-volatile readable storage medium.

[0087] Those of ordinary skill in the art can understand that all or part of the processes of implementing the methods in the above embodiments can be completed by instructing relevant hardware through a computer program. The computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the above method embodiments. Among them, any reference to a memory, storage, database or other medium provided by the present invention and used in the embodiments can include non-volatile and / or volatile memories. Non-volatile memory can include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM) or flash memory. Volatile memory can include random access memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in many forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (SSRSDRAM), enhanced SDRAM (ESDRAM), synchronous link (Synchlink) DRAM (SLDRAM), memory bus (Rambus) direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM, etc.

[0088] It should be noted that in this article, the term "including", "comprising" or any other variant thereof is intended to cover non-exclusive inclusion, so that a process, device, article or method including a series of elements not only includes those elements, but also includes other elements not expressly listed, or further includes elements inherent to such process, device, article or method. Without further limitation, an element defined by the statement "including one..." does not exclude the presence of additional identical elements in the process, device, article or method including that element.

[0089] The above are only the preferred embodiments of the present invention, and do not limit the patent scope of the present invention. Any equivalent structure or equivalent process transformation made by using the content of the specification and drawings of the present invention, or directly or indirectly applied in other related technical fields, shall be similarly included in the patent protection scope of the present invention.

Claims

1. A method for multiplexer-based shift register data transmission, characterized in that The steps include: Obtain RGB data through an external interface, determine the resolution of the target display screen, and determine the number of pixels in each row and each column on the target display screen based on the resolution; Determine the number of MUX channels according to the number of pixels in each row and each column on the target display screen, call the corresponding MUX channels in the shift register according to the number of MUX channels, and allocate a pixel set for each MUX channel according to the number of pixels in each row and each column on the target display screen and the number of MUX channels, where the MUX channels are used to process the data content corresponding to the allocated pixel sets; Based on the number of MUX channels, re-divide the storage units of the shift register into areas equal to the number of MUX channels, and sequentially allocate the divided multiple areas to the multiple MUX channels, so that each MUX channel has an independent storage area, re-calculate the frequency of the clock signal of the shift register according to the number of MUX channels, and match a time unit for each MUX channel, so that the shift register performs data transmission based on the time unit; Reconfigure the start pulse and reset signal of the shift register, where the reconfigured start pulse is used to trigger the reset of the shift register, so that the shift register and the MUX channels enter the initial state synchronously, and at the same time, the reconfigured reset signal is used to trigger the clearing of the state of the shift register to prevent the residual data of the previous data cycle from affecting the current data transmission; After the shift register completes the initialization configuration, gradually transfer the RGB data to the corresponding MUX channels in the shift register, and perform data transmission in units of MUX; Latch the data transmitted to each MUX channel, where each MUX channel corresponds to a latch circuit; Use a source buffer to correct and adjust the data output by each latch circuit, and output the corrected and adjusted data to the target display screen.

2. The shift register data transmission method according to claim 1, characterized in that, Gradually transfer the RGB data to the corresponding MUX channels in the shift register, and perform data transmission in units of MUX, including: When receiving the RGB data each time, based on the start pulse and the reset signal, start each MUX channel for sequential reset processing so that subsequent data starts from a unified starting point; and, According to the advancement of the clock signal, based on the pixel sets allocated to each MUX channel, transfer the RGB data to each MUX channel.

3. The shift register data transmission method according to claim 2, characterized in that, Latch the data transmitted to each MUX channel, including: Transfer the data of each MUX channel to the first latch in the latch circuit corresponding to the MUX channel; According to the advancement of the clock signal, transfer and latch the data in each latch circuit in sequence according to the connection order of the multiple latches in the latch circuit.

4. The shift register data transmission method according to claim 3, characterized in that Use a source buffer to correct and adjust the data output by each latch circuit, and output the corrected and adjusted data to the target display screen, including: The source buffer is adopted to receive the data output by each latch circuit, and perform stability processing and synchronization calibration processing on the data. Among them, the stability processing at least includes: filtering out instantaneous interference and noise; The source buffer incorporates a color correction algorithm, and performs color difference adjustment on the data according to preset correction parameters to compensate for color deviations caused by manufacturing processes; Obtain the temperature detection value of the target display screen, and perform temperature compensation processing on the data after the color difference adjustment processing based on the temperature detection value; According to the gamma curve built in the source buffer, perform non-linear mapping processing of gamma correction on the data after temperature compensation processing; Convert the data after gamma correction into corresponding analog voltage signals, and enhance the linearity of the analog voltage signals to obtain output signals corresponding to each pixel; Correspondingly send the output signals to each pixel of the target display screen, so that the target display screen performs picture presentation processing based on the received output signals.

5. A multiplexer-based shift register data transmission device, characterized in that, It includes: An initialization processing unit, configured to obtain RGB data through an external interface, determine the resolution of the target display screen, and determine the number of pixels in each row and each column on the target display screen based on the resolution; According to the number of pixels in each row and each column on the target display screen, determine the number of MUX channels, call the MUX channels corresponding to the number of MUX channels in the shift register, and allocate a pixel set to each MUX channel according to the number of pixels in each row and each column on the target display screen and the number of MUX channels. Among them, the MUX channels are used to process the data content corresponding to the allocated pixel sets; based on the number of MUX channels, re-divide the storage unit of the shift register into areas with the number of MUX channels, and sequentially allocate the divided multiple areas to multiple MUX channels, so that each MUX channel has an independent storage area, re-calculate the frequency of the clock signal of the shift register according to the number of MUX channels, and match a time unit for each MUX channel, so that the shift register performs data transmission based on the time unit; re-configure the start pulse and reset signal of the shift register, where the re-configured start pulse is used to trigger the reset of the shift register, so that the shift register and the MUX channel enter the initial state synchronously. At the same time, the re-configured reset signal is used to trigger the state clearing of the shift register to prevent the residual data of the previous data cycle from affecting the current data transmission; A transmission unit, configured to gradually transmit the RGB data to the corresponding MUX channels in the shift register after the shift register completes the initialization configuration, and perform data transmission in units of MUX; A latching unit, configured to latch the data transmitted to each MUX channel, where each MUX channel corresponds to a latch circuit respectively; An output unit is configured to use a source buffer to correct and adjust the data output by each latch circuit, and output the corrected and adjusted data to a target display screen.

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