Display panel, method for manufacturing same, and display device

Abstract

The present application provides a display panel, a manufacturing method thereof, and a display device. The display panel includes: a driving substrate; a pixel definition layer protruding on the driving substrate and having a plurality of pixel openings; a sub-pixel including an anode electrode, at least two stacked light-emitting functional layers, and a cathode electrode stacked in the pixel opening, a charge generation layer is provided between adjacent light-emitting functional layers, the charge generation layer includes a first charge generation layer, a metal connection layer, and a second charge generation layer stacked in sequence, the cathode electrode extends out of the pixel opening and is electrically connected to an adjacent cathode electrode; a first isolation layer is disposed on a surface of the pixel definition layer away from the driving substrate and extends in a mesh shape along the extension direction of the pixel definition layer to enclose the pixel opening, and the first isolation layer repels the metal material to isolate adjacent metal connection layers. The display panel can reduce the risk of poor dot screen caused by the series connection and conduction of the metal connection layer and the cathode electrode in the charge generation layer.

Description

Technical Field

[0001] The present application relates to the field of display technologies, and particularly to a display panel, a preparation method thereof, and a display device. Background Art

[0002] With the continuous improvement of the requirements of end users, the requirements for display technologies are also getting higher and higher. In order to meet the growing needs of customers, various new technologies have emerged, such as Color Filter on Encapsulationg (COE) technology, Micro Lens Array (MLA) integration technology, eLEAP maskless technology, transparent display technology, stacked technology, etc. Among them, the stacked technology has been listed as a new technology that major panel factories and terminal factories focus on developing due to its advantages such as high brightness and long lifespan.

[0003] However, the disadvantages of this technology are also obvious. First, since the stacked device structure is more complex than the single-layer device structure, it is easy to cause a substantial increase in the investment costs of materials and equipment. Second, compared with the single-layer device structure, its yield is lower, especially the cathode and the Charge Generation Layer (CGL) are extremely easy to conduct in series. In addition, in order to further reduce the voltage and its stability of the stacked device, it is often necessary to add a metal layer with better conductivity in the structural layer of the Charge Generation Layer (CGL). However, since the distance between the metal layer in the Charge Generation Layer and the cathode is extremely close, and when evaporating the light-emitting functional layer of the upper stack, the Fine Metal Mask (FMM) repeatedly rubs the Pixel Definition Layer (PDL) and the spacer PS, further exposing the metal layer in the CGL layer to conduct with the cathode. Summary of the Invention

[0004] The present application provides a display panel, a preparation method thereof, and a display device, aiming to solve the problem that in the prior art, the stacked OLED is prone to series conduction between the CGL and the cathode.

[0005] To solve the above technical problems, the first technical solution provided by the present application is: to provide a display panel. The display panel includes:

[0006] A driving substrate;

[0007] A pixel definition layer, protruding on the driving substrate and having a plurality of pixel openings;

[0008] A sub-pixel includes an anode electrode, at least two stacked light-emitting functional layers, and a cathode electrode, which are stacked in a pixel opening; wherein, a charge generation layer is further provided between adjacent light-emitting functional layers, and the charge generation layer includes a first charge generation layer, a metal connection layer, and a second charge generation layer that are stacked in sequence; the cathode electrode extends out of the pixel opening and is electrically connected to an adjacent cathode electrode;

[0009] Wherein, a first isolation layer is further provided on a surface of the pixel definition layer away from the driving substrate, and the first isolation layer extends in a mesh shape along the extending direction of the pixel definition layer to enclose the pixel opening; and the first isolation layer repels the metal material to isolate adjacent metal connection layers.

[0010] In some embodiments, the display panel further includes a spacer structure, which is spaced and protrudingly provided on the pixel definition layer for supporting a mask; the first isolation layer is further provided on a surface of the spacer structure away from the driving substrate.

[0011] In some embodiments, in the radial direction of the pixel opening, the width of the first isolation layer is greater than or equal to the width of the spacer structure to at least cover the spacer structure and a part of the pixel definition layer.

[0012] In some embodiments, a second isolation layer is further covered on a surface of the first isolation layer away from the driving substrate, and the material of the second isolation layer is an insulating material.

[0013] In some embodiments, the orthographic projection of the second isolation layer on the pixel definition layer covers the orthographic projection of the first isolation layer on the pixel definition layer; or, the orthographic projection of the second isolation layer on the pixel definition layer coincides with the orthographic projection of the first isolation layer on the pixel definition layer.

[0014] In some embodiments, the material of the first isolation layer is a cathode patterning material, which repels the metal material.

[0015] To solve the above technical problems, the second technical solution provided by this application is: to provide a method for manufacturing a display panel. The manufacturing method includes:

[0016] Providing a prefabricated board; the prefabricated board includes a driving substrate, a pixel definition layer, and an anode electrode; wherein, the pixel definition layer protrudes on the driving substrate and forms a plurality of pixel openings; one anode electrode is provided in each pixel opening;

[0017] Depositing and forming a first light-emitting functional layer and a first charge generation layer in sequence in the pixel opening;

[0018] Depositing and forming a first isolation layer on the pixel definition layer; the first isolation layer extends in a mesh shape along the extending direction of the pixel definition layer to enclose each pixel opening, and the first isolation layer repels the metal material;

[0019] A metal connection layer is deposited and formed in the pixel opening, and the metal connection layer is disconnected at the first isolation layer;

[0020] A second charge generation layer, a second light-emitting functional layer, and a cathode electrode are sequentially deposited and formed in the pixel opening; wherein, the cathode electrode extends out of the pixel opening and is electrically connected to an adjacent cathode electrode.

[0021] In some embodiments, the prefabricated panel further includes spacer structures that are spaced apart and protrude from the pixel definition layer for supporting the mask;

[0022] The step of depositing and forming the first isolation layer on the pixel definition layer includes:

[0023] The cathode patterning material is vapor-deposited through a corresponding mask to deposit and form the first isolation layer on the surfaces of the pixel definition layer and the spacer structures; wherein, in the radial direction of the pixel opening, the width of the first isolation layer is greater than or equal to the width of the spacer structures so as to cover at least the spacer structures and a part of the pixel definition layer.

[0024] In some embodiments, the step of depositing and forming the metal connection layer in the pixel opening and disconnecting the metal connection layer at the first isolation layer includes: vapor-depositing a metal material through a common mask to deposit and form the metal connection layer on the surface of the first charge generation layer, and the metal connection layer is disconnected at the first isolation layer;

[0025] After that, it further includes:

[0026] An insulating material is vapor-deposited through a corresponding mask to deposit and form a second isolation layer on the surface of the first isolation layer; wherein, the orthographic projection of the second isolation layer on the pixel definition layer covers the orthographic projection of the first isolation layer on the pixel definition layer; or, the orthographic projection of the second isolation layer on the pixel definition layer coincides with the orthographic projection of the first isolation layer on the pixel definition layer.

[0027] To solve the above technical problems, the third technical solution provided by this application is: to provide a display device. The display device includes:

[0028] A display panel, which is the display panel provided in the above embodiments;

[0029] A control circuit board, which is electrically connected to the display panel and is used to control the display panel to display corresponding images.

[0030] Advantages of the present application: Different from the prior art, the present application provides a display panel, a preparation method thereof, and a display device. The display panel includes a driving substrate, a pixel definition layer, and sub-pixels. Among them, the sub-pixels are disposed within pixel openings and include an anode electrode, at least two stacked light-emitting functional layers, a cathode electrode, and a charge generation layer disposed between adjacent light-emitting functional layers, so as to form a stacked light-emitting device, thereby improving the brightness and service life of the display panel. At the same time, by making the charge generation layer include a first charge generation layer, a metal connection layer, and a second charge generation layer stacked in sequence, that is, by disposing a metal connection layer between the first charge generation layer and the second charge generation layer, the voltage of the sub-pixel of the stacked structure is reduced, and the current stability of the sub-pixel is improved. Further, by disposing a first isolation layer on a surface of the pixel definition layer away from the driving substrate, the first isolation layer extends along the extending direction of the pixel definition layer to form a mesh to enclose the pixel opening, and the first isolation layer repels the metal material, so that the metal connection layer cannot be deposited on the first isolation layer, which can be used to isolate adjacent metal connection layers, and then the metal connection layer can be restricted within the pixel opening, effectively reducing the problem of lateral conductive crosstalk of the metal connection layer, thereby reducing the lateral crosstalk between sub-pixels. At the same time, in the subsequent process of evaporating the light-emitting functional layer, when the FMM frequently rubs against the pixel definition layer and the spacer structure during the alignment process, it can effectively reduce the occurrence of the problem of exposure of the metal connection layer due to friction, avoid the distance between the metal connection layer and the cathode electrode from becoming smaller, and thus reduce the problem that the light-emitting functional layer is easily broken down under a large current due to the proximity of the metal connection layer and the cathode electrode, resulting in direct conduction between the metal connection layer and the cathode electrode, and reducing the problems of dot screen failure and sub-pixel lateral crosstalk caused by the series connection and conduction of the metal connection layer and the cathode electrode. Description of the Drawings

[0031] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following will briefly introduce the drawings required for description in the embodiments. Obviously, the drawings in the following description are only some embodiments of the present application. For those of ordinary skill in the art, without any creative effort, other drawings can be obtained based on these drawings.

[0032] Figure 1 It is a schematic cross-sectional structure diagram of a display panel provided by the first embodiment of the present application;

[0033] Figure 2 It is a schematic plan structure diagram of a display panel provided by the first embodiment of the present application;

[0034] Figure 3 It is another schematic cross-sectional structure diagram of a display panel provided by the first embodiment of the present application;

[0035] Figure 4 It is a schematic cross-sectional structure diagram of a display panel provided by the second embodiment of the present application;

[0036] Figure 5 It is a schematic plan structure diagram of a display panel provided by the second embodiment of the present application;

[0037] Figure 6 It is another schematic cross-sectional structure diagram of a display panel provided by the second embodiment of the present application;

[0038] Figure 7 It is a schematic longitudinal cross-sectional structure diagram of a display panel provided by the third embodiment of the present application;

[0039] Figure 8 It is another schematic longitudinal cross-sectional structure diagram of a display panel provided by the third embodiment of the present application;

[0040] Figure 9 It is a schematic process flow diagram of a method for manufacturing a display panel provided by the first embodiment of the present application;

[0041] Figure 10 It corresponds to Figure 9 a schematic process flow diagram of the corresponding embodiment;

[0042] Figure 11 It is a schematic process flow diagram of a method for manufacturing a display panel provided by the second embodiment of the present application;

[0043] Figure 12 It corresponds to Figure 11 a schematic process flow diagram of the corresponding embodiment;

[0044] Figure 13 It is a schematic process flow diagram of a method for manufacturing a display panel provided by the third embodiment of the present application;

[0045] Figure 14 It corresponds to Figure 13 a schematic process flow diagram of the corresponding embodiment;

[0046] Figure 15 It is a schematic structure diagram of a display device provided by an embodiment of the present application.

[0047] Reference numerals:

[0048] 100 - Display panel; 10 - Driving substrate; 20 - Pixel definition layer; 21 - Pixel opening; 22 - Spacer structure; 30 - Sub - pixel; 31 - Anode electrode; 32 - Light - emitting functional layer; 321 - First light - emitting functional layer; 322 - Second light - emitting functional layer; 33 - Charge generation layer; 331 - First charge generation layer; 332 - Second charge generation layer; 333 - Metal connection layer; 34 - Cathode electrode; 41 - First isolation layer; 42 - Second isolation layer; 200 - Control circuit board. Detailed implementation manners

[0049] The following will, with reference to the accompanying drawings of the specification, elaborate on the solutions of the embodiments of the present application in detail.

[0050] In the following description, specific details such as specific system structures, interfaces, and technologies are presented for the purpose of illustration rather than limitation, so as to understand the present application thoroughly.

[0051] The following will clearly and completely describe the technical solutions in the embodiments of the present application with reference to the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the scope of protection of the present application.

[0052] The terms "first", "second", and "third" in the present application are only used for descriptive purposes and cannot be construed as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, features defined with "first", "second", and "third" may explicitly or implicitly include at least one of such features. In the description of the present application, the meaning of "a plurality" is at least two, such as two, three, etc., unless otherwise specifically and clearly defined. All directional indications (such as up, down, left, right, front, back...) in the embodiments of the present application are only used to explain the relative positional relationship and movement conditions between components in a specific posture (as shown in the drawings). If the specific posture changes, the directional indications will also change accordingly. In addition, the terms "include" and "have" and any variations thereof are intended to cover non - exclusive inclusion. For example, a process, method, system, product, or device that includes a series of steps or units is not limited to the listed steps or units, but optionally further includes steps or units not listed, or optionally further includes other steps or units inherent to these processes, methods, products, or devices.

[0053] Reference to "embodiments" herein means that a particular feature, structure, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present application. The appearance of the phrase in various locations in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0054] With the continuous development of display technology, organic light emitting diode (OLED) display panels have become one of the mainstream display technologies in the future due to their advantages such as self-luminescence, wide viewing angle, fast response speed, thinness, and bendability. Among them, the underlying technology of sub-pixels has been listed as a new technology for key development by major panel manufacturers and terminal manufacturers due to its advantages such as high brightness and long life. In order to further reduce the voltage and stability of the stacked light-emitting device, it is often necessary to add a metal connection layer with good conductivity to the structural layer of the charge generation layer (CGL). However, in the evaporation process of the subsequent light-emitting functional layer after the metal connection layer, a high-precision metal mask (Fine Metal Mask, FMM) is required. The mask (FMM) will frequently rub against the pixel definition layer and / or the spacer structure during the alignment process, which can easily lead to the exposure of the metal connection layer, making the distance between the metal connection layer and the cathode electrode too close. When the light-emitting functional layer is further evaporated, the distance between the metal connection layer and the cathode electrode is too close. When the current flowing through the sub-pixel of the stacked structure is large, it is easy to break through the light-emitting functional layer, so that the cathode electrode and the metal connection layer in the charge generation layer are directly connected in series, resulting in poor display panel point screen. Moreover, after adding a metal connection layer in the charge generation layer, due to the existence of lateral conductive crosstalk, when the sub-pixel is lit, the upper light-emitting functional layer of the adjacent sub-pixel is also likely to be lit, resulting in the problem of lateral crosstalk lighting.

[0055] In order to solve the above technical problems, a groove is often dug or an undercut is used on the pixel definition layer so that the metal connection layer in the charge generation layer is disconnected at this location, thereby reducing the problem of series conduction between the metal connection layer and the cathode electrode and lateral conductive crosstalk. However, this design is not only complex in process, but also easily leads to poor continuity of the subsequently deposited cathode electrode film layer, thereby causing abnormal cathode conductivity.

[0056] Embodiments of the present application provide a display panel, which includes a driving substrate, a pixel definition layer, and sub-pixels. Among them, the sub-pixels are disposed within the pixel openings and include an anode electrode, at least two stacked light-emitting functional layers, a cathode electrode, and a charge generation layer disposed between adjacent light-emitting functional layers, so as to form a stacked light-emitting device, thereby improving the brightness and service life of the display panel. At the same time, by making the charge generation layer include a first charge generation layer, a metal connection layer, and a second charge generation layer that are sequentially stacked, that is, a metal connection layer is disposed between the first charge generation layer and the second charge generation layer, thereby reducing the voltage of the sub-pixels of the stacked structure and improving the current stability of the sub-pixels. Further, by providing a first isolation layer on a surface of the pixel definition layer away from the driving substrate, the first isolation layer extends along the extending direction of the pixel definition layer to form a mesh to surround the pixel openings, and the first isolation layer repels the metal material, so that the metal connection layer cannot be deposited on the first isolation layer, which can be used to isolate adjacent metal connection layers, and further the metal connection layer can be restricted within the pixel openings, effectively reducing the problem of lateral conductive crosstalk of the metal connection layer, thereby reducing the lateral crosstalk between sub-pixels. At the same time, in the subsequent process of evaporating the light-emitting functional layer, when the FMM frequently rubs against the pixel definition layer and the spacer structure during the alignment process, it can effectively reduce the occurrence of the exposure problem of the metal connection layer due to friction, avoid the distance between the metal connection layer and the cathode electrode from becoming smaller, and thus reduce the problem that the light-emitting functional layer is easily broken down under a large current due to the close distance between the metal connection layer and the cathode electrode, resulting in direct conduction between the metal connection layer and the cathode electrode, and reducing the problems of dot screen failure and sub-pixel lateral crosstalk caused by the series connection and conduction of the metal connection layer and the cathode electrode.

[0057] The present application will be described in detail below with reference to the accompanying drawings and embodiments.

[0058] Please refer to Figure 1 and Figure 2 , Figure 1 which is a schematic cross-sectional structure diagram of the display panel provided by the first embodiment of the present application, Figure 2 and which is a schematic plan structure diagram of the display panel provided by the first embodiment of the present application. In this embodiment, a display panel 100 is provided, and the display panel 100 includes:

[0059] A driving substrate 10;

[0060] A pixel definition layer 20, protruding on the driving substrate 10 and having a plurality of pixel openings 21;

[0061] The sub-pixel 30 includes an anode electrode 31, at least two stacked light-emitting functional layers 32, and a cathode electrode 34 that are stacked and disposed within the pixel opening 21. Among them, a charge generation layer 33 is further provided between adjacent light-emitting functional layers 32. The charge generation layer 33 includes a first charge generation layer 331, a metal connection layer 333, and a second charge generation layer 332 that are sequentially stacked. The cathode electrode 34 extends out of the pixel opening 21 and is electrically connected to an adjacent cathode electrode 34.

[0062] Among them, a first isolation layer 41 is further provided on a surface of the pixel definition layer 20 away from the driving substrate 10. The first isolation layer 41 extends in a mesh shape along the extending direction of the pixel definition layer 20 to enclose the pixel opening 21. And the first isolation layer 41 repels the metal material to isolate adjacent metal connection layers 333.

[0063] Among them, the driving substrate 10 includes a driving circuit for driving the sub-pixel 30 to emit light. The driving substrate 10 can specifically be a silicon-based driving substrate 10, such as a single-crystalline silicon driving substrate 10 or a polycrystalline silicon driving substrate 10. The driving substrate 10 can specifically be a rigid substrate or a flexible driving substrate 10, and can be specifically selected and designed according to the usage scenario and usage requirements. The driving circuit includes a plurality of sub-pixel 30 driving circuits. The sub-pixel 30 driving circuit is composed of at least one semiconductor driving device and at least one energy storage device to provide a driving signal to the sub-pixel 30, thereby driving the sub-pixel 30 to emit light.

[0064] Among them, the pixel definition layer 20 is disposed on the driving substrate 10 and protrudes from the driving substrate 10 to form a plurality of pixel openings 21 for accommodating the sub-pixels 30. Specifically, the pixel openings 21 can be formed by a patterning process such as a photolithography process or some other patterning process, and a plurality of pixel openings 21 are formed by etching. The pixel openings 21 are arranged in an array, and can be specifically arranged according to the arrangement design of the sub-pixels 30.

[0065] Among them, the sub-pixel 30 is disposed in the pixel opening 21 and is electrically connected to the driving substrate 10, so as to receive a driving signal to perform corresponding screen display work. Specifically, the sub-pixel 30 includes an anode electrode 31, at least two stacked light-emitting functional layers 32, and a cathode electrode 34 that are sequentially stacked in a direction away from the driving substrate 10 to form a series-type stacked light-emitting device, thereby improving the display brightness and extending the service life.

[0066] Specifically, the anode electrode 31 is disposed on the driving substrate 10 and electrically connected to the driving circuit of the corresponding sub-pixel 30 to serve as the anode of the sub-pixel 30 to receive the driving signal. The anode electrode 31 is exposed in the pixel opening 21 to be in contact connection with the light-emitting functional layer 32. The material of the anode electrode 31 may include one or a combination of two of metal and conductive metal oxide; wherein, the metal material may be a metal conductive material such as gold (Au), silver (Ag), copper (Cu), aluminum (Al), etc., and the metal oxide may be a metal oxide conductive material such as indium tin oxide (ITO), indium zinc oxide (IZO), indium gallium zinc oxide (IGZO), etc. For example, the anode electrode 31 may be a multi-layer structure of "ITO layer - metal layer - ITO layer", which can be specifically set according to actual needs. The anode electrode 31 can be specifically formed by patterning processes such as photolithography process or evaporation process.

[0067] Specifically, the light-emitting functional layer 32 at least includes a hole transport layer, a light-emitting layer, and an electron transport layer stacked in sequence to form a light-emitting unit. Further, the functional layer may further include a hole injection layer, an electron blocking layer, and a hole blocking layer; wherein, the hole injection layer may be disposed between the anode electrode 31 and the hole transport layer, the electron blocking layer is disposed between the hole transport layer and the light-emitting layer, and the hole blocking layer is disposed between the light-emitting layer and the electron transport layer. Specifically, it can be selected and set according to the use environment and light-emitting requirements of the display panel 100, and no specific limitation is made thereto.

[0068] It should be noted that in a specific embodiment, the sub-pixel 30 includes at least two stacked light-emitting functional layers 32, specifically, it may include a first light-emitting functional layer 321, a second light-emitting functional layer 322, a third light-emitting functional layer, and even more. The above charge generation layer 33 is provided between adjacent light-emitting functional layers 32. In the embodiment of the present application, only the case where the sub-pixel 30 includes two stacked light-emitting functional layers 32 is taken as an example for illustration, which does not mean that the sub-pixel 30 only has two stacked light-emitting functional layers 32. In other embodiments, the sub-pixel 30 may include more stacked light-emitting functional layers 32. In the embodiment of the present application, the two stacked light-emitting functional layers 32 are respectively the first light-emitting functional layer 321 and the second light-emitting functional layer 322. The first light-emitting functional layer 321 is disposed between the anode electrode 31 and the charge generation layer 33, and the second light-emitting functional layer 322 is disposed between the charge generation layer 33 and the cathode electrode 34.

[0069] Specifically, the emitted light of the first light-emitting functional layer 321 has the same color as the emitted light of the second light-emitting functional layer 322, so that the color of the sub-pixel 30 is unified with the color of the emitted light of the two light-emitting functional layers 32. Specifically, the sub-pixel 30 may include a red sub-pixel 30, a green sub-pixel 30, and a blue sub-pixel 30. The red sub-pixel 30, the green sub-pixel 30, and the blue sub-pixel 30 may be distributed and arranged according to a preset color arrangement rule of the sub-pixel 30. Among them, adjacent red sub-pixel 30, green sub-pixel 30, and blue sub-pixel 30 may form a pixel unit. In some embodiments, the sub-pixel 30 may further include a white sub-pixel 30, and the pixel unit may also include a white sub-pixel 30. In some embodiments, in the sub-pixel 30, the color of the emitted light of the first light-emitting functional layer 321 and the color of the emitted light of the second light-emitting functional layer 322 may also be different, so as to form a sub-pixel 30 with a special color to meet some special display requirements.

[0070] Among them, the charge generation layer 33 is disposed between adjacent light-emitting functional layers 32, and is used for generating carriers and transporting the carriers to the corresponding film layers. The charge generation layer 33 includes a first charge generation layer 331, a metal connection layer 333, and a second charge generation layer 332 that are sequentially stacked. Specifically, the first charge generation layer 331 and the second charge generation layer 332 are an N-type charge generation layer and a P-type charge generation layer respectively. The N-type charge generation layer is used for generating electrons and transporting the electrons to the corresponding film layers, and the P-type charge generation layer is used for generating holes and transporting the holes to the corresponding film layers; among them, the first charge generation layer 331 is an N-type charge generation layer, and the second charge generation layer 332 is a P-type charge generation layer, or the first charge generation layer 331 is a P-type charge generation layer, and the second charge generation layer 332 is an N-type charge generation layer, which can be specifically set according to actual needs. The metal connection layer 333 can be used to reduce the voltage of the stacked light-emitting device to improve the current stability of the stacked light-emitting device. The material of the metal connection layer 333 is a metal material, specifically, it can be a metal conductive material such as gold (Au), silver (Ag), copper (Cu), aluminum (Al), or an alloy material of several of them.

[0071] Among them, the cathode electrode 34 is disposed on the light-emitting functional layer 32 that is farthest from the driving substrate 10 and covers the light-emitting functional layer 32. The cathode electrodes 34 of adjacent sub-pixels 30 are electrically connected to each other, so that the cathode electrode 34 forms a continuous integral surface electrode, thereby improving the uniformity of the cathode signal. The material of the cathode electrode 34 can be a metal material, such as a metal conductive material with a low work function such as aluminum (Al), silver (Ag), lithium (Li), magnesium (Mg), calcium (Ca), indium (In), etc., to facilitate the injection of electrons; or it can also be an alloy of a low work function metal with active properties such as magnesium-silver alloy (Mg:Ag) and lithium-aluminum alloy (Li:Al) and a high work function metal with relatively stable chemical properties.

[0072] In this embodiment, a first isolation layer 41 is further provided on the surface of the pixel definition layer 20 away from the driving substrate 10. The first isolation layer 41 extends in a net shape along the extending direction of the pixel definition layer 20 to enclose the pixel opening 21. That is, in the direction parallel to the driving substrate 10, the shape of the first isolation layer 41 is the same as or similar to that of the pixel definition layer 20, so that the first isolation layer 41 forms a net shape and can enclose the pixel opening 21. In this setting method, the mask plate used for patterning the pixel definition layer 20 can be used when manufacturing the first isolation layer 41, that is, the first isolation layer 41 and the pixel definition layer 20 can share the same mask plate, without the need to additionally increase the number of mask plates.

[0073] Furthermore, the first isolation layer 41 is mutually exclusive with the metal material to isolate adjacent metal connection layers 333. That is, the metal connection layer 333 can be disconnected at the first isolation layer 41, which can effectively reduce the problem of lateral conductive crosstalk of the metal connection layer 333, thereby reducing the problem that the upper light-emitting functional layer 32 of adjacent sub-pixels 30 is lit when the sub-pixel 30 is lit, and reducing the lateral crosstalk between sub-pixels 30. Specifically, the material of the first isolation layer 41 may include a cathode patterning material (CPM), which is incompatible with the metal material and mutually exclusive. The CPM material is a fluorine-containing organic material, such as a perfluorinated cyclotriphosphazene compound. The CPM material can be deposited on the pixel definition layer 20 by a low-temperature vacuum evaporation method to form the above-mentioned first isolation layer 41. The CPM material is incompatible with the metal material, so that the metal material cannot be deposited on the first isolation layer 41. Therefore, when the metal connection layer 333 is manufactured by evaporating the metal material subsequently, the metal material cannot be deposited on the first isolation layer 41, so that the metal connection layer 333 is disconnected at the first isolation layer 41, that is, the metal connection layers 333 of adjacent sub-pixels 30 are disconnected at the pixel definition layer 20.

[0074] At the same time, in the subsequent process of evaporating the light-emitting functional layer 32, when the FMM frequently rubs against the pixel definition layer 20 and the spacer structure 22 during the alignment process, since the metal connection layer 333 can be disconnected at the first isolation layer 41 on the pixel definition layer 20, it can effectively reduce the occurrence of the problem of exposure of the metal connection layer 333 due to friction, and reduce the possibility that the distance between the metal connection layer 333 and the cathode electrode 34 becomes smaller. Thus, it reduces the problem that the metal connection layer 333 and the cathode electrode 34 are directly conducted due to the short distance between the metal connection layer 333 and the cathode electrode 34 and the light-emitting functional layer 32 is easily broken down under a large current, and reduces the occurrence of the problem of defective dot screen caused by the series connection and conduction of the metal connection layer 333 and the cathode electrode 34.

[0075] Please refer to Figures 1 - 3 , Figure 3It is another cross-sectional structural schematic diagram of the display panel 100 provided by the first embodiment of the present application. Specifically, in the radial direction of the pixel opening 21, the width of the first isolation layer 41 is less than or equal to the width of the side surface of the pixel definition layer 20 away from the driving substrate 10. It can be understood that the orthographic projection of the first isolation layer 41 on the pixel definition layer 20 is located within the upper surface of the pixel definition layer 20, or coincides with the upper surface of the pixel definition layer 20; wherein, the side surface of the pixel definition layer 20 away from the driving substrate 10 is the upper surface of the pixel definition layer 20.

[0076] As Figure 1 and Figure 2 shown, in this embodiment, in the radial direction of the pixel opening 21, the width of the first isolation layer 41 is less than the width of the side surface of the pixel definition layer 20 away from the driving substrate 10, that is, the orthographic projection of the first isolation layer 41 on the pixel definition layer 20 is located within the upper surface of the pixel definition layer 20 and does not completely cover the pixel definition layer 20. By this setting method, the metal connection layer 333 in the charge generation layer 33 can be disconnected at the first isolation layer 41 on the pixel definition layer 20, thereby reducing the problem of lateral conductive crosstalk; at the same time, in the subsequent processes of evaporating the second charge generation layer 332 and the light-emitting functional layer 32, when the FMM frequently rubs against the pixel definition layer 20 during the alignment process, it can also reduce the exposure of the metal connection layer 333 due to friction, reducing the possibility that the distance between the metal connection layer 333 and the cathode electrode 34 becomes smaller, thereby reducing the problem of series connection and conduction between the metal connection layer 333 and the cathode electrode 34 caused by large current breakdown of the light-emitting functional layer 32, and reducing the problem of defective dot screen caused by series connection and conduction between the metal connection layer 333 and the cathode electrode 34. Moreover, by the above setting method, the width of the first isolation layer 41 part is less than the width of the pixel definition layer 20 in the radial direction of the pixel opening 21, which can reduce the material consumption of the first isolation layer 41 and reduce the cost. At the same time, since the shape of the first isolation layer 41 is basically the same as the shape of the pixel definition layer 20, a mask plate can still be shared with the pixel definition layer 20 for preparation, and only process parameters need to be adjusted, such as parameters related to evaporation, such as evaporation angle and evaporation rate, or etching process parameters, etc., specifically depending on the preparation process and structural dimensions, etc.

[0077] As Figure 3As shown, in this embodiment, in the radial direction of the pixel opening 21, the width of the first isolation layer 41 is equal to the width of the side surface of the pixel definition layer 20 away from the driving substrate 10, that is, the orthographic projection of the first isolation layer 41 on the pixel definition layer 20 coincides with the upper surface of the pixel definition layer 20, or it can be understood that the first isolation layer 41 exactly covers the upper surface of the pixel definition layer 20. By making the first isolation layer 41 cover the upper surface of the pixel definition layer 20, the metal connection layer 333 can be better restricted within the pixel opening 21, which can not only further reduce the problem of lateral conductive crosstalk, but also further reduce the possibility of the metal connection layer 333 being exposed due to friction between the FMM and the pixel definition layer 20 during the subsequent evaporation of the second charge generation layer 332 and the light-emitting functional layer 32, thereby further reducing the problem of the metal connection layer 333 being serially connected and conducting with the cathode electrode 34. Similarly, through this setting method, in the radial direction of the pixel opening 21, the width of the first isolation layer 41 is the same as the width of the pixel definition layer 20, and the first isolation layer 41 and the pixel definition layer 20 can share a mask for preparation.

[0078] Please refer to Figure 4 and Figure 5 , Figure 4 which is a schematic cross-sectional structure diagram of a display panel provided by the second embodiment of the present application, Figure 5 and is a schematic plan structure diagram of the display panel 100 provided by the second embodiment of the present application. In this embodiment, the display panel 100 further includes a spacer structure 22, which is spaced and protrudingly arranged on the pixel definition layer 20 for supporting the mask; the first isolation layer 41 is also arranged on the side surface of the spacer structure 22 away from the driving substrate 10.

[0079] Among them, the spacer structure 22 is spaced on the pixel definition layer 20 for supporting the mask to protect the film layer structures on the display panel 100. The spacer structure 22 can be prepared by a patterning process, such as lithography, deposition, inkjet printing and other patterning processes. The material of the spacer structure 22 can be prepared by using a transparent insulating material, such as polystyrene (PS), etc.

[0080] Specifically, the first isolation layer 41 is also disposed on the surface of the spacer structure 22 away from the driving substrate 10, that is, the first isolation layer 41 covers the surface of the spacer structure 22 protruding from the pixel definition layer 20. It can be understood that the first isolation layer 41 is deposited on the pixel definition layer 20 and the surface of the spacer structure 22 away from the driving substrate 10 to form a continuous network film layer structure, so as to limit the metal connection layer 333 between adjacent sub-pixels 30 within the pixel opening 21, thereby reducing the risk of lateral conductive crosstalk caused by the metal connection layer 333 and reducing the risk of series connection and conduction between the metal connection layer 333 and the cathode connection layer, and reducing the risk of defective panel display.

[0081] Please refer to Figure 5 and Figure 6 , Figure 6 which is another schematic cross-sectional structure diagram of the display panel provided in the second embodiment of the present application. Specifically, in the radial direction of the pixel opening 21, the width of the first isolation layer 41 is greater than or equal to the width of the spacer structure 22 to cover at least the spacer structure 22 and a part of the pixel definition layer 20.

[0082] Similar to the first embodiment, in the radial direction of the pixel opening 21, the width of the first isolation layer 41 is greater than or equal to the width of the spacer structure 22, so that the surface of the spacer structure 22 exposed relative to the pixel definition layer 20 is completely covered by the first isolation layer 41. It should be noted that in the deposition process such as evaporation, the spacer structure 22 is mainly used to support the mask plate. Therefore, during the alignment of the mask plate with the driving substrate 10, the mask plate mainly rubs frequently with the spacer structure 22, which easily causes the metal connection layer 333 to be exposed at this place, making the distance between the metal connection layer 333 and the cathode electrode 34 too close at this place, and easily causing series connection and conduction between the metal connection layer 333 and the cathode electrode 34 at this place, thus causing the problem of defective panel display. In this embodiment, by covering the exposed surface of the spacer structure 22 with the first isolation layer 41, when the first isolation layer 41 is deposited subsequently, the first isolation layer 41 cannot be deposited at the spacer structure 22, thereby reducing the risk of exposure of the first isolation layer 41 due to friction, reducing the problem of series connection and conduction between the metal connection layer 333 and the cathode electrode 34, and thus reducing the problem of defective panel display caused thereby.

[0083] Meanwhile, the first isolation layer 41 extends along the extending direction of the pixel definition layer 20 to form a continuous mesh film layer, so as to cover at least a part of the pixel definition layer 20 in the radial direction of the pixel opening 21. Since the metal connection layer 333 cannot be deposited on the first isolation layer 41, it can be disconnected at the pixel definition layer 20 to separate the metal connection layers 333 in adjacent sub-pixels 30, so that the metal connection layers 333 in each sub-pixel 30 are independent of each other, thereby reducing the pixel lighting crosstalk caused by the lateral conductive crosstalk of the metal connection layer 333 and reducing the yield risk.

[0084] As Figure 5 shown, in this embodiment, in the radial direction of the pixel opening 21, the width of the first isolation layer 41 is equal to the width of the spacer structure 22. The first isolation layer 41 covers the spacer structure 22 and at least a part of the pixel definition layer 20, thereby reducing the risk of exposure of the metal connection layer 333 due to the friction between the mask plate and the spacer structure 22, reducing the problem of series conduction between the metal connection layer 333 and the cathode click. At the same time, the metal connection layers 333 of each sub-pixel 30 can be independent of each other, reducing the pixel lighting crosstalk caused by the lateral conductive crosstalk of the metal connection layer 333, thereby reducing the problem of defective dot screen and lateral conductive crosstalk during pixel lighting, and improving the product yield; moreover, it can also reduce the material consumption of the first isolation layer 41 and reduce the production cost.

[0085] As Figure 6 shown, in this embodiment, in the radial direction of the pixel opening 21, the width of the first isolation layer 41 is greater than the width of the spacer structure 22 and is the same as the width of the pixel definition layer 20, so that the first isolation layer 41 covers the spacer structure 22 and the pixel definition layer 20, which can better limit the metal connection layer 333 within the pixel opening 21, further reducing the risk of exposure of the metal connection layer 333 due to the friction between the mask plate and the spacer structure 22, thereby further reducing the problem of series conduction between the metal connection layer 333 and the cathode click, and can also better separate the metal connection layers 333 of each sub-pixel 30, further reducing the pixel lighting crosstalk caused by the lateral conductive crosstalk of the metal connection layer 333.

[0086] Please refer to Figure 7 , Figure 7 which is a schematic longitudinal cross-sectional structure diagram of the display panel 100 provided by the third embodiment of the present application. In this embodiment, a second isolation layer 42 is further covered on the surface of the first isolation layer 41 away from the driving substrate 10, and the material of the second isolation layer 42 is an insulating material.

[0087] Specifically, when the first isolation layer 41 is difficult to completely inhibit the adhesion of metal materials, in order to further isolate the metal connection layer 333 from the cathode electrode 34 and reduce the lateral conductive crosstalk at the same time, after the metal connection layer 333 is prepared, a second insulating layer formed of an insulating material can be covered on the first isolation layer 41. The second isolation layer further separates the pixel definition layer 20 and the metal connection layer 333 at the spacer from the cathode electrode 34, thereby improving the insulation stability between the metal connection layer 333 and the cathode electrode 34 and further reducing the problem of series conduction between the metal connection layer 333 and the cathode electrode 34. The material of the second insulating layer can specifically be an inorganic or organic insulating material with good insulation performance, such as lithium fluoride (LiF), oxide insulating material, or CPL material, etc., and can be specifically selected according to actual needs.

[0088] Please refer to Figure 7 and Figure 8 , Figure 8 FIG. is another longitudinal cross-sectional structural schematic diagram of the display panel 100 provided by the third embodiment of the present application. Specifically, the orthographic projection of the second isolation layer 42 on the pixel definition layer 20 covers the orthographic projection of the first isolation layer 41 on the pixel definition layer 20; or, the orthographic projection of the second isolation layer 42 on the pixel definition layer 20 coincides with the orthographic projection of the first isolation layer 41 on the pixel definition layer 20. That is, along the radial direction of the pixel opening 21, the edge of the second isolation layer 42 at least coincides with the edge of the first isolation layer 41, so that the second isolation layer 42 can completely cover the first isolation layer 41, thereby improving the insulation performance between the metal connection layer 333 and the cathode electrode 34 and further reducing the risk of series conduction between the metal connection layer 333 and the cathode electrode 34.

[0089] As Figure 7 shown, in this embodiment, along the radial direction of the pixel opening 21, the width of the first isolation layer 41 is smaller than the width of the pixel definition layer 20, and the orthographic projection of the first isolation layer 41 on the pixel definition layer 20 is located within the upper surface of the first pixel isolation layer. The orthographic projection of the second isolation layer 42 on the pixel definition layer 20 covers the orthographic projection of the first isolation layer 41 on the pixel definition layer 20. That is, along the radial direction of the pixel opening 21, the two side edges of the second isolation layer 42 extend beyond the first isolation layer 41 to completely cover the first isolation layer 41, thereby further isolating the metal connection layer 333 and the cathode electrode 34, avoiding series conduction between the metal connection layer 333 and the cathode electrode 34, and reducing the lateral conductive crosstalk of the metal connection layer 333 at the same time.

[0090] As Figure 8As shown, in this embodiment, in the radial direction of the pixel opening 21, the width of the first isolation layer 41 is the same as that of the second isolation layer 42, and the orthographic projection of the second isolation layer 42 on the pixel definition layer 20 coincides with the orthographic projection of the first isolation layer 41 on the pixel definition layer 20, so that the second isolation layer 42 has the same shape and size as the first isolation layer 41, and the second isolation layer 42 exactly and completely covers the first isolation layer 41, thereby further isolating the metal connection layer 333 and the cathode electrode 34, avoiding the series connection and conduction between the metal connection layer 333 and the cathode electrode 34, and at the same time reducing the lateral conductive crosstalk of the metal connection layer 333.

[0091] Specifically, the manufacturing method of the display panel 100 provided in the above embodiment is as described below, and specific details can be referred to the detailed introduction and description of the following embodiments.

[0092] Please refer to Figure 9 and Figure 10 , Figure 9 which is a schematic flow chart of the manufacturing method of the display panel 100 provided in the first embodiment of the present application, Figure 10 is corresponding to Figure 9 an embodiment of a process flow diagram. In this embodiment, a manufacturing method of a display panel 100 is provided. This manufacturing method is used to manufacture the display panel 100 provided in the above embodiment. This manufacturing method includes:

[0093] S10: Provide a prefabricated board; the prefabricated board includes a driving substrate 10, a pixel definition layer 20, and an anode electrode 31; wherein, the pixel definition layer 20 protrudes from the driving substrate 10 and is formed with a plurality of pixel openings 21; one anode electrode 31 is provided in each pixel opening 21;

[0094] S20: Sequentially deposit and form a first light-emitting functional layer 321 and a first charge generation layer 331 in the pixel opening 21;

[0095] S30: Deposit and form a first isolation layer 41 on the pixel definition layer 20; the first isolation layer 41 extends in a mesh shape along the extension direction of the pixel definition layer 20, enclosing each pixel opening 21, and the first isolation layer 41 repels metal materials;

[0096] S40: Deposit and form a metal connection layer 333 in the pixel opening 21, and the metal connection layer 333 is disconnected at the first isolation layer 41;

[0097] S50: Sequentially deposit and form a second charge generation layer 332, a second light-emitting functional layer 322, and a cathode electrode 34 in the pixel opening 21; wherein, the cathode electrode 34 extends out of the pixel opening 21 and is electrically connected to adjacent cathode electrodes 34.

[0098] Among them, the prefabricated board includes a driving substrate 10, a pixel definition layer 20, and an anode electrode 31. It can be understood that the prefabricated board is a substrate on which the anode electrode 31 and the pixel definition layer 20 are fabricated on the driving substrate 10. Specifically, the steps of providing the prefabricated board may include:

[0099] S11: Provide the driving substrate 10;

[0100] S12: Fabricate the anode electrode 31 on the driving substrate 10;

[0101] S13: Fabricate the pixel definition layer 20 on the driving substrate 10.

[0102] Among them, the anode electrode 31 can be patterned by evaporation or photolithography processes. The anode electrode 31 is electrically connected to the corresponding sub-pixel 30 driving circuit on the driving substrate 10 to serve as the anode of the sub-pixel 30 to receive the driving signal. The anode electrodes 31 are arranged in an array manner and can be specifically patterned according to the arrangement design of the sub-pixels 30. The structure, material, and function of the anode electrode 31 are the same as those of the anode electrode 31 involved in the above embodiments, and specific reference can be made to the above introduction.

[0103] Among them, the pixel definition layer 20 can be fabricated by photolithography or other patterning processes to form a plurality of pixel openings 21 corresponding to the anode electrodes 31. The pixel openings 21 correspond to the anode electrodes 31 one by one, so that the anode electrodes 31 are exposed in the pixel openings 21 to be in contact connection with the subsequent light-emitting functional layer 32.

[0104] Specifically, step S20 may specifically include:

[0105] S21: Sequentially deposit a first hole transport layer, a first light-emitting layer, and a first electron transport layer in the pixel opening 21 to form a first light-emitting functional layer 321 on the anode electrode 31;

[0106] S22: Deposit a first charge generation layer 331 on the first light-emitting functional layer 321.

[0107] Among them, the structure and function of the first light-emitting functional layer 321 are the same as or similar to those of the light-emitting functional layer 32 involved in the above embodiments, and specific reference can be made to the above detailed introduction and will not be elaborated here. The first charge generation layer 331 can specifically be an N-type charge generation layer 33, and can be specifically deposited on the first light-emitting functional layer 321 by an evaporation process to generate electrons and transport the electrons to the electron transport layer.

[0108] Among them, in step S30, a first isolation layer 41 can be deposited on the pixel definition layer 20 through a fine metal mask (FMM), so that the first isolation layer 41 forms a continuous mesh film layer on the pixel definition layer 20 to enclose each pixel opening 21. Specifically, an insulating material incompatible with the metal material can be used for evaporation coating to form the first isolation layer 41, so that when the metal material is evaporated and coated subsequently, the metal material cannot adhere to the first isolation layer 41. Specifically, a cathode patterned material (CPM) can be used for evaporation coating to form the first isolation layer 41. The CPM material can be a fluorine-containing organic material, such as a per-substituted fluorocyclotriphosphazene compound. This material is incompatible with the metal material and can be specifically deposited on the pixel definition layer 20 by a low-temperature vacuum evaporation coating method to form the first isolation layer 41.

[0109] Among them, in step S40, a metal connection layer 333 can be deposited on the first light-emitting functional layer 321 through a common metal mask (CMM). Since the first isolation layer 41 has been formed on the pixel definition layer 20 before, when the metal connection layer 333 is evaporated and coated, the metal material cannot adhere to the first isolation layer 41, so that the metal connection layer 333 is disconnected at the first isolation layer 41, and the metal connection layers 333 between adjacent sub-pixels 30 are spaced apart, which can effectively reduce the risk of pixel lighting crosstalk caused by the lateral conductive crosstalk of the metal connection layer 333.

[0110] Specifically, step S50 can specifically include:

[0111] S51: Deposit a second charge generation layer 332 on the metal connection layer 333;

[0112] S52: Sequentially deposit a second hole transport layer, a second light-emitting layer, and a second electron transport layer on the second charge generation layer 332 in the pixel opening 21 to form a second light-emitting functional layer 322 on the charge generation layer 33;

[0113] S53: Deposit a cathode electrode 34 on the second light-emitting functional layer 322.

[0114] Among them, in steps S51, S52, and S53, a mask plate is required. In the manufacturing process of each step, the mask plate needs to be aligned and set on the prefabricated plate first, and then evaporation deposition is carried out. During the alignment process of the mask plate, the mask plate will inevitably rub against the pixel definition layer 20. Frequent rubbing easily causes the metal connection layer 333 at this place to be exposed. In this embodiment, by first forming the above-mentioned first isolation layer 41 on the pixel definition layer 20, the metal connection layer 333 cannot be deposited on the first isolation layer 41. Therefore, in subsequent steps S51, S52, and S53, the risk of exposure of the metal connection layer 333 caused by rubbing during the alignment of the mask plate is effectively reduced, thereby reducing the risk of series connection and conduction between the metal connection layer 333 and the cathode electrode 34 at the pixel definition layer 20, and improving the product yield.

[0115] Specifically, in the steps of manufacturing the first charge generation layer 331, the metal connection layer 333, the second charge generation layer 332, and the cathode electrode 34, a common metal mask plate (CMM) can be used for evaporation deposition, that is, the common metal mask plate (CMM) is shared, thereby reducing the manufacturing cost.

[0116] Specifically, in the radial direction of the pixel opening 21, the width of the first isolation layer 41 is less than or equal to the width of the surface of the pixel definition layer 20 away from the driving substrate 10, which is the same as the design of the width of the first isolation layer 41 involved in the above embodiment. For specific details, please refer to the above detailed introduction and will not be elaborated here.

[0117] Please refer to Figure 11 and Figure 12 , Figure 11 is a schematic flowchart of a preparation method of the display panel 100 provided by the second embodiment of the present application, Figure 12 is corresponding to Figure 11 a schematic process flowchart of an embodiment. In this embodiment, the prefabricated plate further includes spacer structures 22 that are spaced apart and protrude from the pixel definition layer 20 for supporting the mask plate;

[0118] The step S30 of depositing and forming the first isolation layer 41 on the pixel definition layer 20 includes:

[0119] S31: Evaporate the cathode patterning material through the corresponding mask plate, and deposit and form the first isolation layer 41 on the surfaces of the pixel definition layer 20 and the spacer structures 22; wherein, in the radial direction of the pixel opening 21, the width of the first isolation layer 41 is greater than or equal to the width of the spacer structures 22 to at least cover the spacer structures 22 and part of the pixel definition layer 20.

[0120] Specifically, the step S10 of providing the prefabricated plate further includes:

[0121] S14: Fabricate the spacer structure 22 on the pixel definition layer 20.

[0122] Among them, the spacer structure 22 is formed on the pixel definition layer 20, and patterning processes such as photolithography can be specifically used for fabrication. The spacer structure 22 is mainly used to support the mask plate to protect each film layer structure on the display panel 100. The material of the spacer structure 22 can be prepared with a transparent insulating material, such as polystyrene (PS), etc. Specifically, by supporting the mask plate with the spacer structure 22, the friction between the mask plate and the pixel definition layer 20 can be reduced, thereby reducing the exposure problem of the metal connection layer 333 on the pixel definition layer 20 due to friction, and further reducing the risk of series connection and conduction between the metal connection layer 333 and the cathode electrode 34 at the pixel definition layer 20 and the spacer structure 22, improving the product yield.

[0123] Please refer to Figure 13 and Figure 14 , Figure 13 which is a schematic flowchart of a process for the manufacturing method of the display panel 100 provided in the third embodiment of the present application, Figure 14 is corresponding to Figure 13 an embodiment, a schematic flowchart of a process flow. In this embodiment, the step S40 of depositing and forming the metal connection layer 333 in the pixel opening 21 and disconnecting the metal connection layer 333 at the first isolation layer 41 includes:

[0124] S41: Evaporate and deposit a metal material through a common mask plate to deposit and form the metal connection layer 333 on the surface of the first charge generation layer 331, and the metal connection layer 333 is disconnected at the first isolation layer 41;

[0125] After that, it further includes:

[0126] S42: Evaporate and deposit an insulating material through a corresponding mask plate to deposit and form the second isolation layer 42 on the surface of the first isolation layer 41; among them, the orthographic projection of the second isolation layer 42 on the pixel definition layer 20 covers the orthographic projection of the first isolation layer 41 on the pixel definition layer 20; or, the orthographic projection of the second isolation layer 42 on the pixel definition layer 20 coincides with the orthographic projection of the first isolation layer 41 on the pixel definition layer 20.

[0127] Among them, step S41 is the same as the above embodiment, and a metal material can be evaporated and deposited through a common metal mask (CMM) to deposit and form the metal connection layer 333 on the first light-emitting functional layer 321. The metal material can be a metal conductive material such as gold (Au), silver (Ag), copper (Cu), aluminum (Al), etc. or an alloy material of several of them. The structure and function of the metal connection layer 333 are specifically the same as or similar to those of the metal connection layer 333 involved in the above embodiments, and specific reference can be made to the detailed introduction above.

[0128] Among them, in step S42, an insulating material can be evaporated through a mask plate for fabricating the first isolation layer 41 to deposit and form a second isolation layer 42 on the surface of the first isolation layer 41. When the first isolation layer 41 is difficult to completely inhibit the adhesion of the metal material, in order to further isolate the metal connection layer 333 from the cathode electrode 34 and at the same time reduce the lateral conductive crosstalk, after the metal connection layer 333 is fabricated, a second insulating layer formed of an insulating material can be covered on the first isolation layer 41, and the second isolation layer further separates the pixel defining layer 20 and the metal connection layer 333 at the spacer from the cathode electrode 34, thereby improving the insulation stability between the metal connection layer 333 and the cathode electrode 34 and further reducing the problem of series conduction between the metal connection layer 333 and the cathode electrode 34.

[0129] Specifically, the orthographic projection of the second isolation layer 42 on the pixel defining layer 20 covers the orthographic projection of the first isolation layer 41 on the pixel defining layer 20; or, the orthographic projection of the second isolation layer 42 on the pixel defining layer 20 coincides with the orthographic projection of the first isolation layer 41 on the pixel defining layer 20. This setting method is the same as the setting method between the second isolation layer 42 and the first isolation layer 41 in the above embodiments, and the same technical effects can be achieved. For specific details, please refer to the detailed introduction above and will not be elaborated here.

[0130] Please refer to Figure 15 , Figure 15 which is a schematic structural diagram of a display device provided by an embodiment of the present application. In this embodiment, a display device is provided, and this display device can be used in display fields such as flat panels, mobile phones, vehicles, VR glasses, lighting devices, etc.

[0131] The display device includes:

[0132] A display panel 100, which is the display panel 100 provided in the above embodiments;

[0133] A control circuit board 200, electrically connected to the display panel 100, for controlling the display panel 100 to display corresponding images.

[0134] Among them, the specific structure and function of the display panel 100 are the same as or similar to those of the display panel 100 in the above embodiments, and the same technical effects can be achieved. For specific details, please refer to the relevant introduction above. Specifically, the display panel 100 can be fabricated by the fabrication method provided in the above embodiments, and the fabrication method can be referred to the relevant introduction above.

[0135] Among them, the control circuit board 200 is electrically connected to the display panel, and is used to provide various driving signals, power supply signals, and other driving signals required by the display panel 100 to the display panel 100, so as to control the display panel 100 to display corresponding images.

[0136] In this embodiment, the display device is a stacked tandem type OLED display device, which has high display brightness and long service life. Moreover, by providing the above-mentioned display panel 100, the display device can reduce the risks of defective screen lighting caused by the series connection and conduction of the metal connection layer 333 of the charge generation layer 33 and the cathode electrode 34, and pixel lighting crosstalk caused by the lateral conduction crosstalk of the metal connection layer 333, thereby improving the product yield.

[0137] The above are only the implementation manners of the present application, and do not limit the patent protection scope of the present application. Any equivalent structure or equivalent process transformation made by using the content of the specification and drawings of the present application, or directly or indirectly applied in other related technical fields, shall be equally included in the patent protection scope of the present application.

Claims

1. A display panel, comprising: A driving substrate; A pixel definition layer, protruding and disposed on the driving substrate, and having a plurality of pixel openings; Sub-pixels, including an anode electrode, at least two stacked light-emitting functional layers, and a cathode electrode, which are stacked and disposed in the pixel openings; wherein, a charge generation layer is further disposed between adjacent light-emitting functional layers, and the charge generation layer includes a first charge generation layer, a metal connection layer, and a second charge generation layer, which are sequentially stacked; the cathode electrode extends out of the pixel opening and is electrically connected to the adjacent cathode electrode; Characterized in that, a first isolation layer is further disposed on a surface of the pixel definition layer away from the driving substrate; the first isolation layer is formed by using a mask plate for manufacturing the pixel definition layer, and the first isolation layer extends along the extending direction of the pixel definition layer to form a network shape to enclose the pixel openings; and the first isolation layer is incompatible with a metal material, so that the metal material cannot be deposited on the first isolation layer to isolate adjacent metal connection layers; The display panel further includes a spacer structure, which is spaced and protrudes on the pixel definition layer for supporting a mask plate; the first isolation layer is further disposed on a surface of the spacer structure away from the driving substrate.

2. The display panel according to claim 1, wherein In a radial direction of the pixel opening, a width of the first isolation layer is greater than or equal to a width of the spacer structure to at least cover the spacer structure and a part of the pixel definition layer.

3. The display panel according to claim 1, characterized in that, A second isolation layer is further covered on a surface of the first isolation layer away from the driving substrate, and a material of the second isolation layer is an insulating material.

4. The display panel according to claim 3, wherein, A positive projection of the second isolation layer on the pixel definition layer covers a positive projection of the first isolation layer on the pixel definition layer; or, a positive projection of the second isolation layer on the pixel definition layer coincides with a positive projection of the first isolation layer on the pixel definition layer.

5. The display panel according to claim 1, wherein, A material of the first isolation layer is a cathode patterning material, which is mutually exclusive with a metal material.

6. A method for manufacturing a display panel, characterized in that, Including: Providing a prefabricated board; The prefabricated board includes a driving substrate, a pixel definition layer, a spacer structure, and an anode electrode; wherein, the pixel definition layer protrudes and is disposed on the driving substrate and forms a plurality of pixel openings; one anode electrode is disposed in each pixel opening; the spacer structure is spaced and protrudes on the pixel definition layer for supporting a mask plate; Sequentially depositing a first light-emitting functional layer and a first charge generation layer in the pixel opening; Evaporating a cathode patterning material through a corresponding mask plate to deposit and form a first isolation layer on surfaces of the pixel definition layer and the spacer structure; the corresponding mask plate is also used for manufacturing the pixel definition layer; the first isolation layer extends along the extending direction of the pixel definition layer to form a network shape to enclose each pixel opening, and the first isolation layer is incompatible with a metal material, so that the metal material cannot be deposited on the first isolation layer; Depositing and forming a metal connection layer in the pixel opening, and the metal connection layer is disconnected at the first isolation layer; A second charge generation layer, a second light-emitting functional layer, and a cathode electrode are sequentially deposited and formed in the pixel opening; wherein, the cathode electrode extends out of the pixel opening and is electrically connected to the adjacent cathode electrode.

7. The preparation method according to claim 6, characterized in that, In the step of depositing and forming the first isolation layer on the surfaces of the pixel definition layer and the spacer structure, in the radial direction of the pixel opening, the width of the first isolation layer is greater than or equal to the width of the spacer structure so as to cover at least the spacer structure and a part of the pixel definition layer.

8. The preparation method according to claim 6, wherein The step of depositing and forming a metal connection layer in the pixel opening, and the metal connection layer is disconnected at the first isolation layer includes: evaporating a metal material through a common mask plate to deposit and form the metal connection layer on the surface of the first charge generation layer, and the metal connection layer is disconnected at the first isolation layer; After that, it further includes: Evaporating an insulating material through a corresponding mask plate to deposit and form a second isolation layer on the surface of the first isolation layer; wherein, the orthographic projection of the second isolation layer on the pixel definition layer covers the orthographic projection of the first isolation layer on the pixel definition layer; or, the orthographic projection of the second isolation layer on the pixel definition layer coincides with the orthographic projection of the first isolation layer on the pixel definition layer.

9. A display device, characterized in that, It includes: A display panel, which is the display panel according to any one of claims 1-5; A control circuit board, which is electrically connected to the display panel and is used to control the display panel to display a corresponding picture.

Images