Message writing method and device

Abstract

The embodiment of the invention discloses a message writing method and device. A specific embodiment of the method comprises the steps that in response to a message received by a network card, a target receiving queue corresponding to the message is determined, the network card comprises at least one virtual network card, each virtual network card comprises at least one receiving queue, and the number of buffer area information of the receiving queues is dynamically configured; and writing the message into a target buffer region corresponding to the target buffer region information in the target receiving queue. According to the embodiment, the number of the buffer area information prefetched by the receiving queue is dynamically allocated in a software-hardware combination mode, so that the problem of packet loss caused by DMA delay fluctuation due to insufficient utilization of hardware resources and sudden service volume is solved.

Description

Technical Field

[0001] Embodiments of the present disclosure relate to the field of computer technology, and in particular to a message writing method and device. Background Art

[0002] A set of drivers will be defined between the host operating system and the hardware network card to implement the sending and receiving of network messages. For receiving messages, the driver will allocate a series of buffers in the host memory to store the received messages. In order to increase the packet receiving rate, the network card usually pre-fetches the buffer information allocated by the driver in the host memory into the network card hardware RAM (Random Access Memory). When the network card receives a message, it directly obtains the buffer information from the hardware RAM and writes the message to the corresponding host memory described by the buffer information.

[0003] Due to the limited hardware RAM resources, it is not possible to pre-fetch all buffer information allocated by the host driver into the hardware RAM. Therefore, in the implementation process, each receive queue usually pre-fetches the same amount of buffer information into the hardware RAM. When the pre-fetched buffer information of a receive queue is consumed to a certain amount, the receive queue will pre-fetch new buffer information from the host in time to supplement the hardware RAM. Summary of the invention

[0004] The embodiments of the present disclosure provide a message writing method and device.

[0005] In a first aspect, an embodiment of the present disclosure provides a message writing method, the method comprising: in response to a network card receiving a message, determining a target receiving queue corresponding to the message, wherein the network card comprises at least one virtual network card, each virtual network card comprises at least one receiving queue, and the number of buffer information of the receiving queue is dynamically configured; writing the message to a target buffer corresponding to the target buffer information in the target receiving queue.

[0006] In a second aspect, an embodiment of the present disclosure provides a message writing device, which includes: a determination module, configured to determine a target receiving queue corresponding to the message in response to a network card receiving a message, wherein the network card includes at least one virtual network card, each virtual network card includes at least one receiving queue, and the number of buffer information of the receiving queue is dynamically configured; a writing module, configured to write the message to a target buffer corresponding to the target buffer information in the target receiving queue.

[0007] In a third aspect, an embodiment of the present disclosure provides a network card that implements the method described in any implementation manner in the first aspect.

[0008] In a fourth aspect, an embodiment of the present disclosure provides an electronic device, comprising: one or more processors; a storage device for storing one or more programs; when the one or more programs are executed by one or more processors, the one or more processors implement the method described in any implementation manner in the first aspect.

[0009] In a fifth aspect, an embodiment of the present disclosure provides a computer-readable medium having a computer program stored thereon, which, when executed by a processor, implements the method described in any implementation manner in the first aspect.

[0010] In a sixth aspect, an embodiment of the present disclosure proposes a computer program product, including a computer program, which implements the method described in the first aspect when executed by a processor.

[0011] The method provided by the above embodiment of the present disclosure adopts a combination of software and hardware to dynamically allocate the number of buffer information pre-fetched by the receiving queue, thereby solving the packet loss problem caused by insufficient hardware resource utilization and DMA delay fluctuation caused by sudden business volume. The method can be applied to smart network cards, improving the hardware resource utilization and working stability of smart network cards, thereby improving the network performance of cloud hosts. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] Other features, objects and advantages of the present disclosure will become more apparent from the detailed description of non-limiting embodiments made with reference to the following drawings:

[0013] Figure 1 is a flow chart of an embodiment of a message writing method according to the present disclosure;

[0014] Figure 2 is a flow chart of another embodiment of a message writing method according to the present disclosure;

[0015] Figure 3 It is a schematic diagram of the receiving queue stored in linked list format;

[0016] Figure 4 This is the architecture diagram for receiving queue dynamic configuration;

[0017] Figure 5 is a structural schematic diagram of an embodiment of a message writing device according to the present disclosure;

[0018] Figure 6 It is a schematic diagram of the structure of an electronic device suitable for implementing the embodiments of the present disclosure. DETAILED DESCRIPTION

[0019] The present disclosure is further described in detail below in conjunction with the accompanying drawings and embodiments. It is understood that the specific embodiments described herein are only used to explain the relevant invention, rather than to limit the invention. It is also necessary to explain that, for ease of description, only the parts related to the relevant invention are shown in the accompanying drawings.

[0020] It should be noted that in the technical solution of the present invention, the collection / collection, update, analysis, use, transmission, storage and other aspects of user personal information involved are in compliance with the provisions of relevant laws and regulations, are used for legal and reasonable purposes, are not shared, leaked or sold outside of these legal uses, and are subject to supervision and management by national regulatory authorities. Necessary measures should be taken for user personal information to selectively block the use or access to personal information data to prevent illegal access to such personal information data, ensure that persons who have access to personal information data comply with the provisions of relevant laws and regulations, and ensure the security of user personal information. In addition, once these user personal information data are no longer needed, the risks should be minimized by limiting or even prohibiting data collection and / or deleting data.

[0021] It should be noted that, in the absence of conflict, the embodiments and features in the embodiments of the present disclosure may be combined with each other. The present disclosure will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.

[0022] Figure 1 A process 100 of an embodiment of a message writing method according to the present disclosure is shown. The message writing method comprises the following steps:

[0023] Step 101, in response to a network card receiving a message, determining a target receiving queue corresponding to the message.

[0024] In this embodiment, when the network card receives a message, the target receiving queue corresponding to the message can be determined.

[0025] In cloud computing, a network card can support at least one virtual network card. Each virtual network card can support at least one receive queue. The number of buffer information of a receive queue can be dynamically configured. That is, the number of buffer information of different receive queues can be different.

[0026] The number of buffer information of the receiving queue can be configured by the management software when creating the virtual network card. At the same time, the management software can also configure the buffer of the configured receiving queue through the interface function.

[0027] In some embodiments, when creating a virtual network card, the management software may adopt a corresponding strategy to dynamically configure the number of buffer information of the receiving queue in the virtual network card according to the usage of the server virtual machine and the network service status.

[0028] The target receiving queue may be a receiving queue selected from the receiving queues included in the network card. Generally, when the network card receives a message, it may be mapped to a receiving queue through hashing, and the receiving queue is the target receiving queue.

[0029] In some embodiments, a hash value may be obtained by performing a hash operation on the information of the message. The hash value is modulo the number of receiving queues to obtain the identifier of the target receiving queue. The information of the message may include but is not limited to at least one of the following: the source IP (Internet Protocol) address, destination IP address, source port, destination port and type of the message. The identifier of the receiving queue starts from 0 and increases by 1. For example, for M receiving queues, their identifiers are: 0, 1, ..., M-2, M-1.

[0030] Step 102, writing the message into the target buffer corresponding to the target buffer information in the target receiving queue.

[0031] In this embodiment, the message may be written into the target buffer corresponding to the target buffer information in the target receiving queue, wherein the target buffer information may be the buffer information read from the target receiving queue.

[0032] In some embodiments, based on the identifier of the target receiving queue, a read pointer of the target receiving queue can be determined. According to the identifier and the read pointer of the target receiving queue, the target buffer information corresponding to the message can be read from the target receiving queue. The message is written into the target buffer corresponding to the target buffer information. Among them, the read pointer of the target receiving queue can point to the current read position of the target receiving queue.

[0033] In some embodiments, in order to improve the packet receiving performance, the message writing task may be divided into N subtasks, and the N subtasks are executed by N serially connected execution modules using N-stage pipeline operations, where N is an integer greater than 1.

[0034] The method provided by the above embodiment of the present disclosure adopts a combination of software and hardware to dynamically allocate the number of buffer information pre-fetched by the receiving queue, thereby solving the packet loss problem caused by insufficient hardware resource utilization and DMA (Direct Memory Access) delay fluctuations caused by burst traffic. This method can be applied to smart network cards, improving the hardware resource utilization and working stability of smart network cards, thereby improving the network performance of cloud hosts.

[0035] Figure 2 A process 200 of another embodiment of a message writing method according to the present disclosure is shown. The message writing method comprises the following steps:

[0036] Step 201, in response to a network card receiving a message, determining a target receiving queue corresponding to the message.

[0037] In this embodiment, when the network card receives a message, the target receiving queue corresponding to the message can be determined.

[0038] In cloud computing, a network card can support at least one virtual network card. Each virtual network card can support at least one receive queue. The number of buffer information of a receive queue can be dynamically configured. That is, the number of buffer information of different receive queues can be different.

[0039] The number of buffer information of the receiving queue can be configured by the management software when creating the virtual network card. At the same time, the management software can also configure the buffer of the configured receiving queue through the interface function.

[0040] In some embodiments, when creating a virtual network card, the management software may adopt a corresponding strategy to dynamically configure the number of buffer information of the receiving queue in the virtual network card according to the usage of the server virtual machine and the network service status.

[0041] The target receiving queue may be a receiving queue selected from the receiving queues included in the network card. Generally, when the network card receives a message, it may be mapped to a receiving queue through hashing, and the receiving queue is the target receiving queue.

[0042] In some embodiments, a hash value may be obtained by performing a hash operation on the information of the message. The hash value is modulo the number of receiving queues to obtain the identifier of the target receiving queue. The information of the message may include but is not limited to at least one of the following: the source IP address, destination IP address, source port, destination port and type of the message. The identifier of the receiving queue increases from 0 to 1. For example, for M receiving queues, their identifiers are: 0, 1, ..., M-2, M-1.

[0043] Step 202, dividing the task of writing the message into three subtasks.

[0044] In this embodiment, in order to improve the packet receiving performance, the message writing task can be divided into three subtasks.

[0045] Among them, the subtasks may include a first subtask, a second subtask and a third subtask. The first subtask is to determine the read pointer of the target receive queue based on the identifier of the target receive queue. The second subtask is to read the target buffer information corresponding to the message from the target receive queue according to the identifier and the read pointer of the target receive queue. The third subtask is to write the message into the target buffer corresponding to the target buffer information.

[0046] Step 203: Execute a first subtask through a first execution module, wherein the first subtask is to determine a read pointer of the target receiving queue based on an identifier of the target receiving queue.

[0047] In this embodiment, the first subtask can be executed through the first execution module (Vnet_rx_act1), wherein the first subtask is to determine the read pointer of the target receive queue based on the identifier of the target receive queue.

[0048] In some embodiments, based on the identifier of the target receive queue, the buffer configuration table (Rx_buf_cfg_tbl) and the buffer usage record table (Rx_buf_rwptr_tbl) of the target receive queue can be searched to determine the read pointer of the target receive queue. Among them, the receive queue can be stored in a linked list. The buffer configuration table (Rx_buf_cfg_tbl) can be used to store the number of buffer information and linked list information of the receive queue. The linked list information may include the number and base address of the basic unit (item) of the receive queue. The buffer usage record table (Rx_buf_rwptr_tbl) can be used to record the usage of the buffer information of the receive queue.

[0049] The buffer information pre-fetched by the receive queue can be stored in the hardware RAM in a linked list format. Taking 128 buffer information as a basic unit (item) as an example, a single receive queue can support up to 8 basic units (items), a total of 1024 buffer information. The buffer configuration table (Rx_buf_cfg_tbl) can be used to store linked list information, and its table item structure can be as follows:

[0050] struct q_buf_cfg_tbl_data{

[0051] ap_uint <4> item_num / / The number of items used by the receiving queue

[0052] ap_uint <12> item0_base / / The location of item0 in hardware RAM

[0053] ap_uint <12> item1_base

[0054] ap_uint <12> item2_base

[0055] ap_uint <12> item3_base

[0056] ap_uint <12> item4_base

[0057] ap_uint <12> item5_base

[0058] ap_uint <12> item6_base

[0059] ap_uint <12> item7_base

[0060] };

[0061] After adopting the linked list method, the location of the buffer information of each receiving queue in RAM is not a fixed value, and needs to be determined according to the configuration of the management software when creating a new virtual network card. For example, the configuration information of the receiving queue q0 is as follows:

[0062]

[0063] At this time, the storage of the receive queue q0 in the hardware RAM can be as follows: Figure 3 As shown, the receiving queue q0 supports 3 basic units (items), namely, q.item0_base=0, q.item1_base=37, q.item2_base=55, and a total of 384 buffer information.

[0064] The buffer usage record table (Rx_buf_rwptr_tbl) can be used to record the usage of the buffer information of the receive queue. The buffer usage record table (Rx_buf_rwptr_tbl) can be used in conjunction with the buffer configuration table (Rx_buf_cfg_tbl) to pre-fetch buffer information and use buffer information. The table entry structure can be as follows:

[0065]

[0066]

[0067] Step 204 , executing the second subtask through the second execution module, wherein the second subtask is to read the target buffer information corresponding to the message from the target receiving queue according to the identifier and the read pointer of the target receiving queue.

[0068] In this embodiment, the second subtask can be executed by the second execution module (Vnet_rx_act2), wherein the second subtask is to read the target buffer information corresponding to the message from the target receiving queue according to the identifier and the read pointer of the target receiving queue.

[0069] When a message is received, the buffer configuration table (Rx_buf_cfg_tbl) and buffer usage record table (Rx_buf_rwptr_tbl) of the target receive queue can be queried through the identifier of the target receive queue to obtain the corresponding read pointer, which is used to calculate the location of the buffer information to be used by the current receive message in the hardware RAM. The calculation formula can be as follows:

[0070] cur_rd_item=(rd_ptr / 128)%q.item_num;

[0071] cur_rd_buf_addr=(q.item[cur_rd_item].base×128)+(rd_ptr%128).

[0072] Where cur_rd_item is the identifier of the target basic unit. rd_ptr is the read pointer. 128 is the number of the buffer information of the basic unit item. q.item_num is the number of basic units in the target receive queue. cur_rd_buf_addr is the address of the target buffer information. q.item[cur_rd_item].base is the base address of the target basic unit.

[0073] That is to say, divide the read pointer rd_ptr by 128, take the remainder of the number of basic units in the target receiving queue q.item_num, and obtain the identifier cur_rd_item of the target basic unit corresponding to the message. Based on the identifier cur_rd_item of the target basic unit, determine the base address q.item[cur_rd_item].base of the target basic unit. Multiply the base address q.item[cur_rd_item].base of the target basic unit by 128, and add the remainder of the read pointer rd_ptr taken as 128 to obtain the address cur_rd_buf_addr of the target buffer information. In this way, the target buffer information can be read from the address cur_rd_buf_addr of the target buffer information.

[0074] In some embodiments, the second execution module (Vnet_rx_act2) can also store the usage of the buffer information of the target receive queue into the buffer usage record table (Rx_buf_rwptr_tbl).

[0075] Step 205: Execute a third subtask through a third execution module, wherein the third subtask is to write the message into a target buffer corresponding to the target buffer information.

[0076] In this embodiment, the third subtask can be executed by the third execution module (Vnet_rx_act3), wherein the third subtask is to write the message into the target buffer corresponding to the target buffer information.

[0077] In some embodiments, in response to the buffer information of the target receiving queue being consumed to a preset number (eg, 1 / 4 of the buffer information of a basic unit is consumed), new buffer information may be inserted into the target receiving queue.

[0078] Since the second execution module (Vnet_rx_act2) executes the subtask of reading the target buffer information corresponding to the message from the target receiving queue, the second execution module (Vnet_rx_act2) records the usage of the buffer information of the target receiving queue. Therefore, the second execution module (Vnet_rx_act2) can perform pre-fetch operations in time according to the usage of the buffer information of the target receiving queue. The buffer information pre-fetch module (Vnet_rx_buf_prefetch) can write the pre-fetched buffer information into the corresponding hardware RAM and update the information of the corresponding receiving queue.

[0079] Taking 128 buffer information as a basic unit (item), and 1 / 4 of the buffer information of a basic unit (item) is consumed for prefetching as an example, a single prefetch can be set to prefetch up to 32 buffer information. The prefetch operation can also adopt pipeline operation, that is, multiple prefetches are performed continuously according to the usage of the buffer information of the target receive queue. The buffer information returned by the prefetch passes through the buffer information prefetch module (Vnet_rx_buf_prefetch), and the buffer configuration table (Rx_buf_cfg_tbl) and buffer usage record table (Rx_buf_rwptr_tbl) of the target receive queue can be queried through the identifier of the target receive queue, and the buffer information is written to the corresponding hardware RAM specified location through the result returned by the table query. The address calculation formula in the hardware RAM can be processed as follows:

[0080] cur_wr_item=(wr_ptr / 128)%q.item_num;

[0081] cur_wr_buf_addr=(q.item[cur_wr_item].base×128)+(wr_ptr%128).

[0082] Where cur_wr_item is the identifier of the basic unit to be written. wr_ptr is the write pointer. 128 is the number of buffer information of the basic unit item. q.item_num is the number of basic units of the target receive queue. cur_wr_buf_addr is the address of the buffer information to be written. q.item[cur_wr_item].base is the base address of the basic unit to be written.

[0083] That is to say, divide the write pointer wr_ptr by 128, and take the remainder of the number of basic units in the target receiving queue q.item_num to obtain the identifier cur_wr_item of the basic unit to be written. Based on the identifier cur_wr_item of the basic unit to be written, determine the base address q.item[cur_wr_item].base of the basic unit to be written. Multiply the base address q.item[cur_wr_item].base of the basic unit to be written by 128, and add the remainder of the write pointer wr_ptr taken as 128 to obtain the address cur_wr_buf_addr of the buffer information to be written. In this way, the new buffer information can be written to the address cur_wr_buf_addr of the buffer information to be written.

[0084] The method provided by the above embodiment of the present disclosure adopts a combination of software and hardware to dynamically allocate the number of buffer information pre-fetched by the receiving queue, thereby solving the packet loss problem caused by insufficient hardware resource utilization and DMA delay fluctuation caused by sudden business volume. The method can be applied to smart network cards, improving the hardware resource utilization and working stability of smart network cards, thereby improving the network performance of cloud hosts.

[0085] Figure 4 An architectural diagram showing dynamic configuration of receive queues.

[0086] like Figure 4 As shown, the dynamic configuration architecture of the receive queue may include management software, a buffer configuration table (Rx_buf_cfg_tbl), a buffer usage record table (Rx_buf_rwptr_tbl), a first execution module (Vnet_rx_act1), a second execution module (Vnet_rx_act2), a third execution module (Vnet_rx_act3), hardware RAM (Rx_buf_ram) and a buffer information prefetch module (Vnet_rx_buf_prefetch).

[0087] The storage of the receive queue in the hardware RAM (Rx_buf_ram) is managed in a linked list. The number of buffer information pre-fetched by the receive queue supports dynamic configuration. Among them, the number of pre-fetched buffer information and linked list information of the receive queue are placed in the buffer configuration table (Rx_buf_cfg_tbl), which is configured by the management software when a new network card is created.

[0088] When the network card receives a message, it is mapped to a certain receive queue through hash mapping, and the buffer configuration table (Rx_buf_cfg_tbl) and buffer usage record table (Rx_buf_rwptr_tbl) of the receive queue are searched through the identifier of the receive queue to obtain the location of the buffer information needed by the current message in the hardware RAM (Rx_buf_ram), so as to retrieve the corresponding buffer information and write the message to the corresponding host memory.

[0089] In order to improve the packet receiving performance, the receiving direction adopts the three-stage pipeline operation of the first execution module (Vnet_rx_act1), the second execution module (Vnet_rx_act2), and the third execution module (Vnet_rx_act3). In addition to the normal packet receiving processing, the second execution module (Vnet_rx_act2) will also perform pre-fetch operations in time according to the usage of the buffer information of the current receiving queue. The buffer information pre-fetch module (Vnet_rx_buf_prefetch) is responsible for writing the pre-fetched buffer information to the corresponding hardware RAM (Rx_buf_ram) and updating the corresponding receiving queue information.

[0090] Further references Figure 5 As an implementation of the methods shown in the above figures, the present disclosure provides an embodiment of a message writing device, which is similar to Figure 1 Corresponding to the method embodiment shown, the device can be specifically applied to various electronic equipment.

[0091] like Figure 5 As shown, the message writing device 500 provided in this embodiment includes a determination module 501 and a writing module 502. The determination module 501 is configured to determine the target receiving queue corresponding to the message in response to the network card receiving the message, wherein the network card includes at least one virtual network card, each virtual network card includes at least one receiving queue, and the number of buffer information of the receiving queue is dynamically configured; the writing module 502 is configured to write the message into the target buffer corresponding to the target buffer information in the target receiving queue.

[0092] In this embodiment, in the message writing device 500, the specific processing of the determination module 501 and the writing module 502 and the technical effects thereof can be referred to in Figure 1 The relevant descriptions of step 101 and step 102 in the corresponding embodiment are not repeated here.

[0093] In some optional implementations of this embodiment, the determination module 501 is further configured to: perform a hash operation on the information of the message to obtain a hash value, wherein the information of the message includes at least one of the following: the source Internet Protocol IP address, destination IP address, source port, destination port and type of the message; and take the modulus of the hash value by the number of receiving queues to obtain the identifier of the target receiving queue.

[0094] In some optional implementations of this embodiment, the write module 502 is further configured to: determine the read pointer of the target receive queue based on the identifier of the target receive queue; read the target buffer information corresponding to the message from the target receive queue according to the identifier and read pointer of the target receive queue; and write the message into the target buffer corresponding to the target buffer information.

[0095] In some optional implementations of the present embodiment, the writing module 502 includes: a division submodule, configured to divide the writing task of the message into N subtasks, where N is an integer greater than 1; an execution submodule, configured to execute the N subtasks through N serially connected execution modules using N-level pipeline operations.

[0096] In some optional implementations of this embodiment, N is 3; and the execution submodule is further configured to: execute the first subtask through the first execution module, wherein the first subtask is to determine the read pointer of the target receive queue based on the identifier of the target receive queue; execute the second subtask through the second execution module, wherein the second subtask is to read the target buffer information corresponding to the message from the target receive queue according to the identifier and the read pointer of the target receive queue; execute the third subtask through the third execution module, wherein the third subtask is to write the message into the target buffer corresponding to the target buffer information.

[0097] In some optional implementations of this embodiment, the message writing device 500 further includes: a storage module configured to store the usage status of the buffer information of the target receiving queue into a buffer usage record table through the second execution module.

[0098] In some optional implementations of this embodiment, the execution submodule is further configured to: based on the identifier of the target receiving queue, search the buffer configuration table and the buffer usage record table of the target receiving queue, and determine the read pointer of the target receiving queue, wherein the receiving queue is stored in a linked list format, and the buffer configuration table is used to store the number of buffer information and linked list information of the receiving queue, and the linked list information includes the number and base address of the basic units of the receiving queue.

[0099] In some optional implementations of the present embodiment, the execution submodule is further configured to: divide the read pointer by the quotient of the number of buffer information of the basic unit, modulo the number of basic units of the target receiving queue, and obtain the identifier of the target basic unit corresponding to the message; determine the base address of the target basic unit based on the identifier of the target basic unit; multiply the base address of the target basic unit by the number of buffer information of the basic unit, plus the product of the read pointer modulo the number of buffer information of the basic unit, to obtain the address of the target buffer information; read the target buffer information from the address of the target buffer information.

[0100] In some optional implementations of this embodiment, the message writing device 500 further includes: an inserting module configured to insert new buffer information into the target receiving queue in response to the buffer information of the target receiving queue being consumed to a preset number.

[0101] In some optional implementations of the present embodiment, the insertion module is further configured to: divide the write pointer by the quotient of the number of buffer information of the basic unit, modulo the number of basic units of the target receiving queue, to obtain the identifier of the basic unit to be written; determine the base address of the basic unit to be written based on the identifier of the basic unit to be written; multiply the base address of the basic unit to be written and the number of buffer information of the basic unit, plus the product of the write pointer modulo the number of buffer information of the basic unit, to obtain the address of the buffer information to be written; write the new buffer information into the address of the buffer information to be written.

[0102] In some optional implementations of this embodiment, the message writing device 500 also includes: a configuration module, which is configured to configure the number of buffer information of the receiving queue in the virtual network card when creating the virtual network card according to the usage of the server virtual machine and the network service status.

[0103] The device provided by the above embodiment of the present disclosure adopts a combination of software and hardware to dynamically allocate the number of buffer information pre-fetched by the receiving queue, thereby solving the packet loss problem caused by insufficient hardware resource utilization and DMA delay fluctuation caused by sudden traffic. This method can be applied to smart network cards, improving the hardware resource utilization and working stability of smart network cards, thereby improving the network performance of cloud hosts.

[0104] Reference below Figure 6 , which shows a schematic diagram of the structure of an electronic device (e.g., a server) 600 suitable for implementing the embodiments of the present disclosure. The terminal device in the embodiments of the present disclosure may include, but is not limited to, mobile terminals such as mobile phones, notebook computers, digital broadcast receivers, PDAs (personal digital assistants), PADs (tablet computers), PMPs (portable multimedia players), vehicle-mounted terminals (e.g., vehicle-mounted navigation terminals), etc., and fixed terminals such as digital TVs, desktop computers, etc. Figure 6The server shown is only an example and should not bring any limitation to the functions and scope of use of the embodiments of the present disclosure.

[0105] like Figure 6 As shown, the electronic device 600 may include a processing device (e.g., a central processing unit, a graphics processing unit, etc.) 601, which can perform various appropriate actions and processes according to a program stored in a read-only memory (ROM) 602 or a program loaded from a storage device 608 into a random access memory (RAM) 603. In the RAM 603, various programs and data required for the operation of the electronic device 600 are also stored. The processing device 601, the ROM 602, and the RAM 603 are connected to each other via a bus 604. An input / output (I / O) interface 605 is also connected to the bus 604.

[0106] Typically, the following devices may be connected to the I / O interface 605: an input device 606 including, for example, a touch screen, a touch pad, a keyboard, a mouse, a camera, a microphone, an accelerometer, a gyroscope, etc.; an output device 607 including, for example, a liquid crystal display (LCD), a speaker, a vibrator, etc.; a storage device 608 including, for example, a magnetic tape, a hard disk, etc.; and a communication device 609. The communication device 609 may allow the electronic device 600 to communicate with other devices wirelessly or by wire to exchange data. Although Figure 6 The electronic device 600 is shown with various devices, but it should be understood that it is not required to implement or possess all the devices shown. More or fewer devices may be implemented or possessed instead. Figure 6 Each block shown in the figure may represent one device, or may represent multiple devices as required.

[0107] In particular, according to an embodiment of the present disclosure, the process described above with reference to the flowchart can be implemented as a computer software program. For example, an embodiment of the present disclosure includes a computer program product, which includes a computer program carried on a computer-readable medium, and the computer program contains program code for executing the method shown in the flowchart. In such an embodiment, the computer program can be downloaded and installed from a network through a communication device 609, or installed from a storage device 608, or installed from a ROM 602. When the computer program is executed by the processing device 601, the above-mentioned functions defined in the method of the embodiment of the present disclosure are executed.

[0108] It should be noted that the computer-readable medium described in the embodiments of the present disclosure may be a computer-readable signal medium or a computer-readable storage medium or any combination of the above two. The computer-readable storage medium may be, for example, but not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, device or device, or any combination of the above. More specific examples of computer-readable storage media may include, but are not limited to: an electrical connection with one or more wires, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the above. In the embodiments of the present disclosure, the computer-readable storage medium may be any tangible medium containing or storing a program, which may be used by or in combination with an instruction execution system, device or device. In the embodiments of the present disclosure, the computer-readable signal medium may include a data signal propagated in a baseband or as part of a carrier wave, in which a computer-readable program code is carried. This propagated data signal may take a variety of forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination of the above. The computer readable signal medium may also be any computer readable medium other than a computer readable storage medium, which may send, propagate or transmit a program for use by or in conjunction with an instruction execution system, apparatus or device. The program code contained on the computer readable medium may be transmitted using any suitable medium, including but not limited to: wires, optical cables, RF (radio frequency), etc., or any suitable combination of the above.

[0109] The computer-readable medium may be included in the electronic device; or it may exist independently without being installed in the electronic device. The computer-readable medium carries one or more programs. When the one or more programs are executed by the electronic device, the electronic device: in response to a network card receiving a message, determines a target receiving queue corresponding to the message, wherein the network card includes at least one virtual network card, each virtual network card includes at least one receiving queue, and the number of buffer information of the receiving queue is dynamically configured; writes the message into a target buffer corresponding to the target buffer information in the target receiving queue.

[0110] Computer program code for performing the operations of embodiments of the present disclosure may be written in one or more programming languages ​​or a combination thereof, including object-oriented programming languages, such as Java, Smalltalk, C++, and conventional procedural programming languages, such as "C" or similar programming languages. The program code may be executed entirely on a user's computer, partially on a user's computer, as a separate software package, partially on a user's computer and partially on a remote computer, or entirely on a remote computer or server. In cases involving a remote computer, the remote computer may be connected to the user's computer via any type of network, including a local area network (LAN) or a wide area network (WAN), or may be connected to an external computer (e.g., via the Internet using an Internet service provider).

[0111] The flow chart and block diagram in the accompanying drawings illustrate the possible architecture, function and operation of the system, method and computer program product according to various embodiments of the present disclosure. In this regard, each square box in the flow chart or block diagram can represent a module, a program segment or a part of a code, and the module, the program segment or a part of the code contains one or more executable instructions for realizing the specified logical function. It should also be noted that in some implementations as replacements, the functions marked in the square box can also occur in a sequence different from that marked in the accompanying drawings. For example, two square boxes represented in succession can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each square box in the block diagram and / or flow chart, and the combination of the square boxes in the block diagram and / or flow chart can be implemented with a dedicated hardware-based system that performs a specified function or operation, or can be implemented with a combination of dedicated hardware and computer instructions.

[0112] The modules involved in the embodiments described in the present disclosure may be implemented by software or hardware. The modules described may also be set in a processor, for example, it may be described as: a processor includes a determination module and a writing module. The names of these modules do not constitute a limitation on the modules themselves in some cases, for example, the determination module may also be described as "a module for determining a target receiving queue corresponding to the message".

[0113] The above description is only a preferred embodiment of the present disclosure and an explanation of the technical principles used. Those skilled in the art should understand that the scope of the invention involved in the embodiments of the present disclosure is not limited to the technical solutions formed by a specific combination of the above-mentioned technical features, but should also cover other technical solutions formed by any combination of the above-mentioned technical features or their equivalent features without departing from the above-mentioned inventive concept. For example, the above-mentioned features are replaced with the technical features with similar functions disclosed in the embodiments of the present disclosure (but not limited to) to form a technical solution.

Claims

1. A message writing method, comprising: In response to the network card receiving the message, determining a target receiving queue corresponding to the message, wherein the network card includes at least one virtual network card, each virtual network card includes at least one receiving queue, and the number of buffer information of the receiving queue is dynamically configured; The message is written into the target buffer corresponding to the target buffer information in the target receiving queue.

2. The method according to claim 1, wherein: The determining a target receiving queue corresponding to the message includes: Performing a hash operation on the information of the message to obtain a hash value, wherein the information of the message includes at least one of the following: a source Internet Protocol IP address, a destination IP address, a source port, a destination port, and a type of the message; The hash value is modulo the number of receiving queues to obtain the identifier of the target receiving queue.

3. The method according to claim 2, wherein: The step of writing the message into a target buffer corresponding to the target buffer information in the target receiving queue includes: Based on the identifier of the target receiving queue, determining a read pointer of the target receiving queue; Reading target buffer information corresponding to the message from the target receiving queue according to the identifier and the read pointer of the target receiving queue; The message is written into the target buffer corresponding to the target buffer information.

4. The method according to claim 2, wherein: The step of writing the message into a target buffer corresponding to the target buffer information in the target receiving queue includes: Divide the message writing task into N subtasks, where N is an integer greater than 1; The N subtasks are executed by N serially connected execution modules and N-stage pipeline operations.

5. The method according to claim 4, wherein: N is 3; as well as The N subtasks are executed by N serially connected execution modules and N-stage pipeline operations, including: Executing a first subtask through a first execution module, wherein the first subtask is to determine a read pointer of the target receiving queue based on an identifier of the target receiving queue; Executing a second subtask through a second execution module, wherein the second subtask is to read target buffer information corresponding to the message from the target receiving queue according to an identifier and a read pointer of the target receiving queue; A third subtask is executed by a third execution module, wherein the third subtask is to write the message into a target buffer corresponding to the target buffer information.

6. The method according to claim 5, wherein: The method further comprises: The second execution module stores the usage of the buffer information of the target receiving queue in a buffer usage record table.

7. The method according to claim 6, wherein: The step of determining a read pointer of the target receive queue based on an identifier of the target receive queue includes: Based on the identifier of the target receiving queue, the buffer configuration table and the buffer usage record table of the target receiving queue are searched to determine the read pointer of the target receiving queue, wherein the receiving queue is stored in a linked list format, and the buffer configuration table is used to store the number of buffer information and linked list information of the receiving queue, and the linked list information includes the number and base address of the basic units of the receiving queue.

8. The method according to claim 7, wherein: The step of reading target buffer information corresponding to the message from the target receiving queue according to the identifier and the read pointer of the target receiving queue comprises: Divide the read pointer by the number of basic unit buffer information, and take the remainder by the number of basic units of the target receiving queue to obtain an identifier of the target basic unit corresponding to the message; Determining a base address of the target basic unit based on the identifier of the target basic unit; The product of the base address of the target basic unit and the number of buffer information of the basic unit is added to the number of buffer information of the basic unit modulo the read pointer to obtain the address of the target buffer information; The target buffer information is read from the address of the target buffer information.

9. The method according to any one of claims 1 to 8, wherein: The method further comprises: In response to the buffer information of the target receiving queue being consumed to a preset number, new buffer information is inserted into the target receiving queue.

10. The method according to claim 9, wherein: The inserting new buffer information into the target receiving queue comprises: Divide the write pointer by the number of buffer information of the basic unit, and take the remainder by the number of basic units of the target receiving queue to obtain an identifier of the basic unit to be written; Determining a base address of the basic unit to be written based on the identifier of the basic unit to be written; The product of the base address of the basic unit to be written and the number of the buffer information of the basic unit is added to the number of the buffer information of the basic unit modulo the write pointer to obtain the address of the buffer information to be written; The new buffer information is written into the address of the buffer information to be written.

11. The method according to any one of claims 1 to 8, wherein: The method further comprises: When creating the virtual network card, the number of buffer information of the receiving queue in the virtual network card is configured according to the usage of the server virtual machine and the network service situation.

12. A message writing device, comprising: A determination module is configured to determine a target receiving queue corresponding to a message in response to the network card receiving the message, wherein the network card includes at least one virtual network card, each virtual network card includes at least one receiving queue, and the number of buffer information of the receiving queue is dynamically configured; The writing module is configured to write the message into the target buffer corresponding to the target buffer information in the target receiving queue.

13. A network card, implementing the method according to any one of claims 1 to 11.

14. An electronic device comprising: one or more processors; a storage device having one or more programs stored thereon; When the one or more programs are executed by the one or more processors, the one or more processors implement the method according to any one of claims 1 to 11.

15. A computer readable medium having a computer program stored thereon, wherein: When the program is executed by a processor, the method according to any one of claims 1 to 11 is implemented.

16. A computer program product comprising a computer program, which, when executed by a processor, implements the method according to any one of claims 1 to 11.

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